A signal acquisition and processing system

Abstract

The application relates to a signal acquisition and processing system, belonging to the technical field of circuit boards, which comprises a carrier plate provided with an analog circuit, a core plate provided with a first digital circuit and a second digital circuit, wherein the second digital circuit is used for realizing a local control function of the carrier plate except for analog signal acquisition and conversion, so as to replace a local control circuit of the carrier plate; an inter-board connector is used for connecting the carrier plate and the core plate, and comprises a digital pin area, an analog pin area and a high-impedance isolation area; the high-impedance isolation area is used for electrically isolating a digital transmission channel and an analog transmission channel and blocking mutual interference between digital signals and analog signals. The problems of self-interference of the digital circuit of the carrier plate and noise coupling of the inter-board connector in the prior art signal acquisition and processing system, which result in low sampling precision of the signal acquisition and processing system, are solved, and the sampling precision of the analog signal and the anti-interference capability of the signal acquisition and processing system are improved.

Description

Technical Field

[0001] This invention relates to the field of circuit board technology, and in particular to a signal acquisition and processing system. Background Technology

[0002] In high-precision signal acquisition and processing systems, a core board and a carrier board hardware architecture are typically used for system design. The core board integrates an FPGA (Field-Programmable Gate Array), an ARM (Advanced RISC Machine) processor, and DDR (Double Data Rate Synchronous Dynamic Random Access Memory) memory, undertaking the main digital logic control and data processing functions. The carrier board simultaneously integrates analog front-end conditioning circuits, an ADC (Analog-to-Digital Converter), a high-precision reference source, and other analog circuits, as well as peripheral digital communication circuits and local control circuits, responsible for the acquisition, conditioning, and interface conversion of weak analog signals.

[0003] Because both digital and analog circuits exist on the carrier board, the switching noise generated by the digital circuits on the carrier board itself can directly interfere with adjacent analog circuits through parasitic coupling of the ground plane, power plane, and traces within the same board. Even with measures such as partitioned grounding and ferrite bead isolation inside the carrier board, it is impossible to completely eliminate the self-interference of the digital circuits on the analog circuits, thus limiting further improvement of the signal-to-noise ratio of the high-precision signal acquisition and processing system.

[0004] The core board and carrier board are typically connected via inter-board connectors. Existing inter-board connector pins employ a "digital / analog / power" staggered arrangement strategy, which can cause near-field coupling interference between digital signals and weak analog signals. Rapid transitions in digital signals (such as the SPI (Serial Peripheral Interface) clock, with a rise time <5ns), induce spike noise on the analog pins through the 0.2pF~0.5pF parasitic capacitance and mutual inductance between connector pins, directly raising the noise floor of the analog pins. For high-precision signal acquisition and processing systems, this significantly reduces sampling accuracy. For example, in micro-vibration measurement systems, the current inter-board connector pin arrangement can cause accelerometer resolution to fail to meet specifications. Summary of the Invention

[0005] Based on the above analysis, the present invention aims to provide a signal acquisition and processing system to solve the problem of low sampling accuracy caused by self-interference of the digital circuits on the carrier board and noise coupling of the inter-board connectors in the prior art.

[0006] On one hand, embodiments of the present invention provide a signal acquisition and processing system, comprising: a carrier board, on which an analog circuit is disposed for acquiring analog signals and converting the acquired analog signals into digital signals; a core board, connected to the carrier board, on which a first digital circuit and a second digital circuit are disposed; wherein, the first digital circuit is used to receive and process digital signals, and simultaneously control the analog circuit to acquire and convert analog signals; the second digital circuit is used to implement local control functions of the carrier board other than analog signal acquisition and conversion, thereby replacing the local control circuit of the carrier board; and an inter-board connector for connecting the carrier board and the core board, the inter-board connector including a digital pin area, an analog pin area, and a high-impedance isolation area located between the digital pin area and the analog pin area; wherein, the digital pin area constitutes a digital transmission channel for transmitting digital signals between the first digital circuit and the analog circuit and digital signals between the second digital circuit and the analog circuit; the analog pin area constitutes an analog transmission channel for transmitting analog signals between the first digital circuit and the analog circuit; and the high-impedance isolation area is used to electrically isolate the digital transmission channel from the analog transmission channel.

[0007] Furthermore, the core board is also equipped with peripheral digital communication circuits to enable communication between the core board and peripheral circuits, and between the carrier board and peripheral circuits.

[0008] Furthermore, it also includes: a power isolation device for achieving electrical power isolation between the carrier board and the core board; the power isolation device includes: an isolation converter located on the core board for interference isolation and power conversion of the input power of the signal acquisition and processing system; wherein, one end of the power isolation converter is connected to the input power of the signal acquisition and processing system, and the other end is connected to the inter-board connector, converting the interference-isolated input power into analog and digital power required by the carrier board; wherein, the analog circuit includes on-board analog circuits and on-board integrated digital circuits, the analog power supplies power the on-board analog circuits through the power supply pins of the analog pin area, and the digital power supplies power the on-board integrated digital circuits through the power supply pins of the digital pin area.

[0009] Furthermore, the power isolation device also includes: a voltage regulator for regulating the analog and digital power supplies input to the carrier board; wherein the voltage regulator includes an analog voltage regulator and a digital voltage regulator, one end of the analog voltage regulator is connected to the power supply pin of the analog pin area, and the other end is connected to the analog circuit on the board, with each analog voltage regulator corresponding to one of the analog circuits on the board; one end of the digital voltage regulator is connected to the power supply pin of the digital pin area, and the other end is connected to the integrated digital circuit on the board, with each digital voltage regulator corresponding to one of the integrated digital circuits on the board.

[0010] Furthermore, it also includes: a signal isolation device for achieving electrical isolation of signals between the carrier board and the core board; the signal isolation device includes: a first digital isolator located on the core board, one end of the first digital isolator being connected to a first digital circuit and a second digital circuit, and the other end being connected to a signal pin in the digital pin area, for achieving electrical isolation of signals between the core board and the digital pin area; and / or, a second digital isolator located on the carrier board, one end of the second digital isolator being connected to a signal pin in the digital pin area, and the other end being connected to an analog circuit, for achieving electrical isolation of signals between the digital pin area and the carrier board.

[0011] Furthermore, the signal transmission methods of the first digital isolator and the second digital isolator include at least one of the following: optocoupler transmission, magnetic coupling transmission, and capacitive coupling transmission.

[0012] Furthermore, it also includes: a ground isolation device for achieving ground electrical isolation between the core board and the carrier board; the ground isolation device includes: a digital ground, connected to the core board and the digital pin area; and an analog ground, connected to the carrier board and the analog pin area; wherein the digital ground and the analog ground are connected by a Y-type single-point grounding connection.

[0013] Furthermore, the analog circuit includes on-board analog circuitry and on-board integrated digital circuitry, with the analog ground connected to the on-board analog circuitry; the ground isolation device also includes a local digital ground, connected to the on-board integrated digital circuitry; wherein, the analog ground and the local digital ground are connected at a single point.

[0014] Furthermore, the high-impedance isolation region includes multiple consecutive idle pins; wherein, the consecutive idle pins are connected to the chassis ground of the signal acquisition and processing system through resistors and / or left floating.

[0015] Furthermore, the second digital circuit is integrated with the first digital circuit, and the functions of the first and second digital circuits are implemented using an FPGA.

[0016] Compared with the prior art, the present invention can achieve at least one of the following beneficial effects: The second digital circuit migrates the functions of the digital circuits on the traditional carrier board to the core board, while the carrier board retains only the analog circuits. This physically eliminates the interference of the carrier board's own digital circuits on the analog circuits, reduces noise interference in the analog circuits, and improves the sampling accuracy of the analog circuits. By integrating all digital circuits of the signal acquisition and processing system onto the core board, making the core board a purely digital board and the carrier board a purely analog board, the system integration and maintainability are improved. All digital logic is unified on the core board, and the carrier board only needs to acquire analog signals, reducing the complexity of system design. By setting a high-impedance isolation area on the inter-board connector between the core board and the carrier board, the digital transmission channel and the analog transmission channel are electrically isolated, blocking the mutual interference between digital signals and analog signals, providing an electromagnetic clean area for weak signal acquisition, and improving the signal-to-noise ratio of the signal acquisition and processing system. Due to the separation of digital and analog circuits and the setting of high-impedance isolation areas, the self-interference of the digital circuits on the carrier board itself and the noise coupling of the inter-board connectors are effectively isolated. There is no need to add a large number of filters, shielding covers and other components inside the board, saving PCB board area and simplifying the hardware structure.

[0017] In this invention, the above-described technical solutions can be combined with each other to achieve more preferred combinations. Other features and advantages of this invention will be set forth in the following description, and some advantages may become apparent from the description or be learned by practicing the invention. The objects and other advantages of this invention can be realized and obtained from what is particularly pointed out in the description and drawings. Attached Figure Description

[0018] The accompanying drawings are for illustrative purposes only and are not intended to limit the invention. Throughout the drawings, the same reference numerals denote the same parts. Figure 1 This is a schematic diagram of an optional structure of the signal acquisition and processing system according to an embodiment of the present invention; Figure 2 This is an optional overall block diagram of the signal acquisition and processing system according to an embodiment of the present invention; Figure 3 This is an optional schematic diagram of the high impedance boundary of the inter-board connector pins in an embodiment of the present invention; Figure 4 This is an optional circuit diagram of the signal acquisition and processing system according to an embodiment of the present invention. Detailed Implementation

[0019] Preferred embodiments of the present invention will now be described in detail with reference to the accompanying drawings, which form part of this application and are used together with the embodiments of the present invention to illustrate the principles of the present invention, but are not intended to limit the scope of the present invention.

[0020] One specific embodiment of the present invention discloses a signal acquisition and processing system. This system is suitable for the acquisition of weak, high-precision analog signals that are susceptible to noise interference. It is also suitable for high-precision data acquisition and processing systems that require high signal-to-noise ratio (SNR) and high acceleration resolution, such as micro-vibration monitoring equipment, high-precision acoustic measuring instruments, medical-grade signal acquisition instruments, and industrial precision measurement and control equipment.

[0021] Figure 1 This diagram illustrates an optional structural design of the signal acquisition and processing system of the present invention, such as... Figure 1 As shown, this system includes: The carrier board contains analog circuitry for acquiring analog signals and converting them into digital signals. The analog circuitry is primarily responsible for the acquisition and conversion of analog signals and is part of the front-end analog signal acquisition and conditioning circuitry. The core board, connected to the carrier board, houses both a first digital circuit and a second digital circuit. The first digital circuit receives and processes digital signals while simultaneously controlling the analog circuitry for analog signal acquisition and conversion. The second digital circuit performs local control functions on the carrier board, in addition to analog signal acquisition and conversion, effectively replacing the carrier board's local control circuitry. Traditional carrier boards, besides analog circuitry, also contain digital circuitry, such as the local control circuitry. This local control circuitry does not participate in the carrier board's analog signal acquisition and digital-to-analog conversion; it only handles auxiliary control functions, such as power management, analog front-end auxiliary configuration, carrier board status monitoring, and peripheral control. However, noise generated by the local controller can directly interfere with adjacent analog circuits through parasitic coupling between the ground plane, power plane, and traces within the same board. Even with measures such as partitioned grounding and ferrite bead isolation within the carrier board, it is impossible to completely eliminate self-interference from digital circuits to analog circuits on the same board, thus limiting further improvements in the signal-to-noise ratio of high-precision signal acquisition and processing systems. To address this, a second digital circuit is incorporated into this system. This second digital circuit enables local control functions on the carrier board, in addition to analog signal acquisition and conversion. Essentially, it replaces the traditional local control circuitry on the carrier board. Through these improvements, the analog and digital circuits are physically separated. Only analog circuits remain on the carrier board, making it a purely analog carrier board. There are no independent active digital circuits or their noise sources on the board, fundamentally eliminating self-interference from on-board digital circuits. This provides an "electromagnetic clean zone" for weak signal acquisition, improving the sampling accuracy of analog signals and the system's signal-to-noise ratio. The inter-board connector is used to connect the carrier board and the core board. The inter-board connector includes a digital pin area, an analog pin area, and a high-impedance isolation area located between the digital pin area and the analog pin area. The digital pin area forms a digital transmission channel for transmitting digital signals between the first digital circuit and the analog circuit, and digital signals between the second digital circuit and the analog circuit. The analog pin area forms an analog transmission channel for transmitting analog signals between the first digital circuit and the analog circuit. The high-impedance isolation area is used to electrically isolate the digital transmission channel from the analog transmission channel.

[0022] Existing inter-board connector pins employ a "digital / analog / power" staggered arrangement strategy. Due to this staggered arrangement, digital signals can cause near-field coupling interference with weak analog signals. Rapid transitions in digital signals (such as the SPI serial peripheral interface clock, with a rise time <5ns) induce spike noise on analog pins through the 0.2pF~0.5pF parasitic capacitance and mutual inductance between connector pins, directly raising the noise floor of the analog pins. For high-precision signal acquisition and processing systems, this significantly reduces sampling accuracy. To avoid near-field coupling interference between pins, the physical structure of the inter-board connector is restructured, dividing it into a digital pin area, an analog pin area, and a high-impedance isolation area between them. This cuts off the low-impedance coupling path of parasitic capacitance and mutual inductance, reducing crosstalk between digital switching noise and clock noise on analog acquisition signals, thereby improving analog signal sampling accuracy. Furthermore, the structure achieves electrical isolation between the digital and analog pin areas, enhancing the system's anti-interference capability.

[0023] In another preferred embodiment of the present invention, the high-impedance isolation region includes multiple consecutive idle pins; wherein, the consecutive idle pins are connected to the chassis ground of the signal acquisition and processing system via resistors and / or are left floating. Since the electromagnetic field of high-frequency digital signals decays exponentially with distance, the idle pins may optionally be connected to the chassis ground at a single point using a 1MΩ resistor, be left floating, or be arranged in a mixed manner. The physical spacing between the idle pins in the high-impedance isolation region is ≥5mm, so that the equivalent parasitic capacitance between the digital pin area and the analog pin area is <0.05pF, cutting off the low-impedance coupling path of the parasitic capacitance, and increasing the crosstalk attenuation from -20dB in the traditional architecture to more than -60dB (under 100MHz high-frequency harmonics).

[0024] The above setup achieves physical separation between analog and digital circuits, eliminating noise interference from local digital circuits on the carrier board to the analog circuits at the layout level and improving the sampling accuracy of analog signals. Simultaneously, for signal transmission between the separated analog and digital circuits, the high-impedance isolation zone of the inter-board connector further suppresses crosstalk from digital signals to analog signals, further reducing interference noise on the analog signals. Through these dual anti-interference isolation measures, the sampling accuracy of analog signals can be significantly improved, and the signal-to-noise ratio and operational stability of the entire data acquisition and processing system can be effectively enhanced.

[0025] In existing technologies, the digital circuitry of the core board includes not only local control circuitry but also peripheral digital communication circuitry for data interaction between the carrier board and external devices. These independent active digital circuits on the carrier board generate digital noise during operation, which can easily interfere with nearby analog acquisition circuits, thus affecting the sampling accuracy of analog signals. Therefore, in a preferred embodiment of this invention, the core board also includes peripheral digital communication circuitry to enable communication between the core board, carrier board, and peripheral circuits. That is, this system eliminates the need for a separate peripheral digital communication circuit on the carrier board, integrating the communication functions required by the carrier board with those of the core board. Communication between the core board and external circuits, as well as communication between the carrier board and external circuits, are uniformly handled by the peripheral digital communication circuitry on the core board. By integrating the carrier board communication circuitry into the core board, interference from digital noise generated by the carrier board's communication circuitry on the analog circuits is avoided, further optimizing the analog signal acquisition environment and improving the system's sampling accuracy and anti-interference capability.

[0026] In the existing architecture of interconnecting the core board and the carrier board, in addition to the self-interference of the digital circuits on the carrier board itself and the noise coupling problem of the inter-board connectors, the following problems also exist: 1) In the existing architecture, the core board's digital power supplies (+3.3V_D, +1.8V_D) are directly transmitted to the carrier board via connectors. The DC-DC switching ripple (>1MHz) superimposed on the digital power supply and the broadband noise generated by digital logic switching are injected into the carrier board's power supply network through a low-impedance power path. Although the carrier board is equipped with an LDO (Low Dropout Regulator) for voltage regulation, a typical LDO has a power supply rejection ratio (PSRR) ≤20dB at 1MHz, failing to filter out high-frequency noise. This results in severe degradation of the signal-to-noise ratio and dynamic range of the high-precision ADC (Analog-to-Digital Converter). Furthermore, the LDO provides centralized power to all analog circuits on the carrier board, leading to cross-coupling issues due to internal power supply resistance.

[0027] 2) Unlike the self-interference of the digital circuitry on the carrier board, there is mutual interference between the digital circuitry of the core board and the analog circuitry of the carrier board. When signals are transmitted between the core board and the carrier board via the inter-board connector, the digital noise generated by the first and second digital circuits on the core board can be directly coupled to the analog circuitry of the carrier board through the signal transmission path. Simultaneously, the weak analog signals acquired by the carrier board's analog circuitry may also be interfered with by the digital signals from the core board, leading to a decrease in analog signal sampling accuracy and a reduction in the signal-to-noise ratio. Furthermore, if effective electrical isolation is not provided between the core board and the carrier board, voltage anomalies or surges on one side can easily be transmitted to the other side through the signal path, damaging precision components on the core board or carrier board and affecting system stability and reliability.

[0028] 3) Traditional mixed-signal circuit boards use single-point grounding for both analog and digital grounds. The core board's digital ground (DGND) is directly shorted to the carrier board's analog ground (AGND) via a connector, or connected through a 0Ω resistor / ferrite bead. The connector pins have a parasitic inductance of 1~5nH / pin. Under the influence of the high-frequency transient return current (ΔI) generated by the logic switching of the core board's digital devices, a significant voltage drop (V=L) occurs. The di / dt signal causes high-frequency potential difference fluctuations (ground bounce) between the core board and the carrier board, and the digital ground noise is transmitted to the carrier board analog path through common impedance coupling.

[0029] To address the aforementioned issues, existing technologies often employ methods such as adding filter capacitors and ferrite beads within the board for compensation and correction. However, these measures not only occupy a large amount of PCB area but also have limited effectiveness in suppressing high-frequency noise above 1MHz, failing to fundamentally block the noise transmission and radiation path from the core board to the carrier board.

[0030] To address the power interference, signal interference, and ground interference issues inherent in the core board and carrier board interconnection architecture, this system also provides electrical isolation for power, signal, and ground connections. Specifically, the system includes: a power isolation device for electrical isolation of power supplies between the carrier board and the core board; a signal isolation device for electrical isolation of signals between the carrier board and the core board; and a ground isolation device for electrical isolation of ground connections between the core board and the carrier board.

[0031] 1) For power isolation, this system also includes: a power isolation device to achieve electrical power isolation between the carrier board and the core board; specifically, the power isolation device includes: The isolation converter, located on the core board, is used for interference isolation and power conversion of the input power supply of the signal acquisition and processing system. One end of the power isolation converter is connected to the input power supply of the signal acquisition and processing system, and the other end is connected to the inter-board connector. It converts the interference-isolated input power supply into analog and digital power supplies required by the carrier board. The analog circuit includes on-board analog circuits and on-board integrated digital circuits. The analog power supply powers the on-board analog circuits through the power supply pins of the analog pin area, and the digital power supply powers the on-board integrated digital circuits through the power supply pins of the digital pin area.

[0032] The analog circuitry on the carrier board, such as the commonly used ADC, includes internal digital circuits like the SPI interface, digital filters, and calibration circuits. These are essential on-chip integrated circuits for performing analog-to-digital conversion and are not independent active digital devices. Because they are located inside the ADC, they are situated on the carrier board. However, the on-chip integrated digital circuits still have an impact on the analog circuitry. Therefore, to achieve extreme isolation, special treatment is needed for their power supply, clock, and grounding to limit the influence of their digital components to a localized area.

[0033] In terms of power isolation, the system input power is isolated and voltage is converted by an isolation converter set on the core board. The isolated and purified power is converted into analog power and digital power. Then, the analog and digital pin areas of the board connectors are used to independently supply power to the on-board analog circuits and the on-board integrated digital circuits. The transmission of digital power noise from the core board to the carrier board analog circuit is cut off from the power supply path, avoiding the pollution of analog power supply by digital power ripple and switching noise.

[0034] The power isolation device also includes: a voltage regulator for regulating the analog and digital power supplies input to the carrier board; wherein the voltage regulator includes an analog voltage regulator and a digital voltage regulator, one end of the analog voltage regulator is connected to the power supply pin of the analog pin area, and the other end is connected to the analog circuit on the board, with each analog voltage regulator corresponding to one of the analog circuits on the board; one end of the digital voltage regulator is connected to the power supply pin of the digital pin area, and the other end is connected to the integrated digital circuit on the board, with each digital voltage regulator corresponding to one of the integrated digital circuits on the board.

[0035] In existing technologies, the core board directly provides a regulated analog power supply (e.g., +5V_AV) to the carrier board, with the LDO on the carrier board serving only as a secondary filter, offering limited suppression of power supply ripple. In this invention, the core board provides the carrier board with a DC coarse-adjustment bus voltage, isolated by an isolation converter, including both digital and analog power supplies (e.g., analog power supply +12V_ISO, digital power supply +5V_ISO_CTRL). The LDO on the carrier board performs analog voltage regulation. Furthermore, existing technologies use a single LDO to centrally power all analog submodules on the carrier board, leading to cross-coupling issues due to internal resistance, causing crosstalk between analog channels and reducing sampling accuracy.

[0036] To address the aforementioned shortcomings, the core board of this invention no longer directly outputs regulated analog power. Instead, it provides the carrier board with a DC coarse adjustment bus voltage isolated by an isolation converter, including isolated analog power (e.g., +12V_ISO) and isolated digital power (e.g., +5V_ISO_CTRL). The LDOs on the carrier board independently regulate the analog and digital power supplies. Furthermore, this invention employs a distributed independent LDO power supply architecture, configuring corresponding independent LDOs for the ADC analog power supply, ADC digital power supply, and each analog front-end circuit. This ensures that each power supply is independent, physically cutting off the coupling path of power supply noise between different power supply circuits. By configuring analog regulators to correspond one-to-one with on-board analog circuits and digital regulators to correspond one-to-one with on-board integrated digital circuits, each analog and digital power supply is guaranteed to have independent voltage regulation and filtering capabilities. This completely avoids channel crosstalk caused by cross-coupling of power supply internal resistance, further reducing the impact of power supply noise on weak analog signals and significantly improving analog signal sampling accuracy and system signal-to-noise ratio.

[0037] 2) For signal isolation, this system also includes a signal isolation device to achieve electrical isolation between the carrier board and the core board; specifically, the signal isolation device includes: A first digital isolator, located on the core board, has one end connected to a first digital circuit and a second digital circuit, and the other end connected to a signal pin in the digital pin area, used to achieve electrical isolation of signals between the core board and the digital pin area; and / or a second digital isolator, located on the carrier board, has one end connected to a signal pin in the digital pin area, and the other end connected to an analog circuit, used to achieve electrical isolation of signals between the digital pin area and the carrier board.

[0038] The access position of the digital isolator can be flexibly configured for different types of signals transmitted through inter-board connectors. For unidirectional control signals through inter-board connectors, a digital isolator can be connected to one side of the connector to cut off the signal coupling path. For bidirectional control signals (such as SPI clock / data, PGA gain control code, and reset signal) through inter-board connectors, digital isolators can be connected to both sides or one side of the connector to cut off the signal coupling path.

[0039] The signal transmission methods of the first and second digital isolators include at least one of the following: optocoupler transmission, magnetic coupling transmission, and capacitive coupling transmission. For example, capacitive coupling isolators (such as ISO7740) or magnetic coupling isolators (such as ADUM1400) can be used to achieve isolated signal transmission between the core board and the carrier board without a direct electrical connection. Specifically, the capacitive coupling isolator (such as the TI ISO7740 series) has two metal plates separated by a silicon dioxide insulating layer (insulation strength >2500Vdc). The transmitting end modulates the digital signal into a high-frequency carrier wave, which is transmitted to the receiving end through capacitive coupling between the plates. The receiving end demodulates the carrier wave to recover the original digital signal. The magnetic coupling isolator (such as the ADIADuM1400 series) has two miniature coils separated by a polyimide insulating layer. The transmitting end converts the digital signal into a magnetic field signal, which is transmitted to the receiving end through mutual inductance between the coils. The receiving end recovers the magnetic field signal back into a digital signal, thus completing the isolated transmission.

[0040] The common-mode rejection ratio (CMRR) of the aforementioned isolator is ≥50kV / μs. CMRR is an indicator of an isolator's ability to suppress ground potential differences between its two ends, representing the maximum rate of ground potential change the isolator can withstand. When the core board ground potential experiences a drastic jump (ground bounce), this potential difference is applied as a common-mode signal to all pins at both ends of the isolator. The differential detection circuitry inside the isolator is only sensitive to the differential-mode signal (valid data) between the pins at both ends, exhibiting extremely high suppression capability against common-mode signals, thus ensuring error-free transmission even under core board ground bounce noise.

[0041] Through the aforementioned signal isolation device, the signal passes through the internal insulating layer of the isolation chip in the form of an electromagnetic field / electric field. There is no direct electrical path between the core board and the carrier board, which can effectively block the transmission of ground potential difference, common-mode noise and digital interference along the signal line, further improving the purity of analog signal acquisition and the reliability of system operation.

[0042] 3) For ground isolation, this system is also equipped with a ground isolation device to achieve electrical isolation between the core board and the carrier board; specifically, the ground isolation device includes: The ground isolation device includes: a digital ground, connected to the core board and digital pin area; and an analog ground, connected to the carrier board and analog pin area; wherein the digital ground and analog ground are connected via a Y-type single-point grounding connection. Further, the analog circuitry includes on-board analog circuitry and on-board integrated digital circuitry, with the analog ground connected to the on-board analog circuitry; the ground isolation device also includes: a local digital ground, connected to the on-board integrated digital circuitry; wherein the analog ground and local digital ground are connected at a single point.

[0043] In the above implementation, the core board digital ground (DGND) only covers the core board area and the digital pin area of ​​the inter-board connector, while the carrier board analog ground (AGND) only covers the carrier board area and the analog pin area of ​​the inter-board connector. The two ground networks are independent and physically separated. The potential reference point for the digital ground and analog ground is only connected by a Y-type single-point grounding at the system's main power input (such as the backplane or power module output), for example, through a 10Ω resistor, thus forming a unique ground potential reference point for the entire system and avoiding ground loops caused by multiple grounding points. At the same time, no ground plane is set in the high-impedance isolation area of ​​the inter-board connector, and the digital ground pins and analog ground pins are completely physically disconnected, with no DC path. This completely cuts off the path of the core board's digital return current flowing into the carrier board's analog area through the ground plane, fundamentally eliminating ground loop interference.

[0044] Furthermore, since the carrier board integrates onboard digital circuits in addition to the onboard analog circuits, these digital circuits still generate digital return noise during operation. Directly sharing a ground with the analog ground would introduce interference. Therefore, this solution further establishes a separate local digital ground on the carrier board, limiting the return current of the onboard integrated digital circuits to the local digital ground area. This local digital ground is then connected to the analog ground at a single point. This ensures a consistent potential reference while preventing the noise from the carrier board's internal digital ground from directly contaminating the analog ground, further improving the purity of the analog signal acquisition and the system's anti-interference capability.

[0045] Preferably, the second digital circuit is integrated with the first digital circuit, and the functions of both circuits are implemented using an FPGA. In other words, the original on-board local control logic, implemented independently in hardware, is integrated into the same FPGA's programmable logic resources, with the FPGA uniformly handling and executing both signal processing and local control functions. By integrating control logic and data processing logic into the same FPGA, system integration can be effectively improved, the number of discrete components reduced, hardware circuit structure simplified, system wiring complexity and potential failure points reduced, while simultaneously enhancing system stability and reliability.

[0046] In yet another preferred embodiment of the present invention, an optional overall block diagram of the signal acquisition and processing system is provided, such as... Figure 2 As shown, the overall architecture of this system is divided into three main components: the top is a purely digital core board, the lower right is the board-to-board connector, and the lower left is the purely analog carrier board.

[0047] Pure digital core board: contains only digital circuits, including FPGA / ARM / DSP main control unit, digital power module, digital clock source, isolation converter, peripheral digital communication circuit, and digital ground (DGND), without any analog acquisition and conditioning circuits.

[0048] Inter-board connectors: Internally divided into three functional areas: digital pin area, high impedance isolation area, and analog pin area, forming the boundary of physical and electrical isolation between the core board and the carrier board.

[0049] Pure analog carrier board: contains only analog circuits and related functional modules, including analog front-end (AFE) amplification / filtering / conditioning circuits, high-precision ADC, and can also be configured with voltage regulation modules (such as LDO). All digital control and configuration signals are transmitted from the core board side through an isolated path.

[0050] Combination Figure 2 As shown, the implementation path of the triple isolation mechanism in this system is as follows: 1) Isolated power transmission path (power isolation) The digital power supply is generated by the core board, powering the FPGA / ARM / DSP, peripheral digital communication circuits, and digital clock source within the core board. The power supply to the carrier board first passes through an isolation converter on the core board, which isolates the input power supply from interference and performs voltage conversion, outputting a clean, isolated analog power supply. This isolated analog power supply is then transmitted to the carrier board via the analog pins of the inter-board connector, powering the analog front-end (AFE) and high-precision ADC. The carrier board can further purify the power supply ripple through an independent voltage regulator module. The power supply circuits of the core board and the carrier board are completely independent, preventing power supply noise from being conducted across boards via power lines.

[0051] 2) Isolate the signal transmission path (signal isolation) Control signals, data signals, and clock signals on the core board side are first connected to a high-speed digital isolator (capacitively coupled / magnetically coupled isolation), and then transmitted through the digital pin area of ​​the inter-board connector. The high-impedance isolation area inside the connector physically separates the digital pin area from the analog pin area, further suppressing crosstalk coupling of digital signals to the analog channel.

[0052] 3) Physical boundary (ground isolation) between DGND and AGND The core board's digital ground (DGND) only covers the digital pin areas of the core board and connectors, while the carrier board's analog ground (AGND) only covers the analog pin areas of the carrier board and connectors. At the inter-board connectors, DGND and AGND are physically disconnected, with no DC path provided. They are only connected via a Y-type single-point grounding connection at the system's main power input to form a unique ground potential reference point, thus avoiding ground loop interference.

[0053] Through the above triple isolation mechanism, the power, signal, and ground paths are all isolated across the board, physically cutting off all paths for digital noise to be transmitted to analog circuits, and significantly improving the signal-to-noise ratio and anti-interference capability of high-precision analog signal acquisition.

[0054] In yet another preferred embodiment of the invention, an optional schematic diagram of the high impedance boundary of the inter-board connector pins is provided, such as... Figure 3 As shown, the pin area of ​​the board-to-board connector is divided into an analog pin area, an intermediate high-impedance isolation area, and a digital pin area according to their functions. The three areas are arranged in sequence to form physical and electrical independent boundaries.

[0055] The functions of each pin area are defined as follows: 1) Analog Pin Area: Used for transmitting analog signals and analog power, including but not limited to: Analog power supply pin: AVDD_ISO (isolated analog power input); Analog ground pin: AGND (Analog ground reference); Analog front-end power supply: AFEPWR; Analog signal pin: AIN+ (positive input terminal of analog signal); Analog signal pin: AIN- (Negative analog signal input terminal); High-precision reference voltage pin: ADC_REF (ADC reference voltage), used to ensure ADC conversion accuracy.

[0056] 2) High-impedance isolation area: Serving as an electrical barrier between the analog and digital pin areas, this area contains 5-10 consecutive unused pins. The electrical definitions for these pins are: NC (no signal), Floating, or High-ZGND (high impedance ground). They do not transmit any valid signals and are used to increase the physical spacing between digital / analog pins.

[0057] 3) Digital Pin Area: Used for transmitting digital control signals, data signals, and isolating digital power supplies, including but not limited to: Digital ground pin: DGND (digital ground reference). Communication interface pins: SPI_CLK (SPI clock), SPI_MOSI (SPI master transmits data to slave and receives data from slave), SPI_CS (SPI chip select line); Digital output line: DOUT (outputs digital signals); Digital power supply pin: DVDD (core board side isolated digital power supply).

[0058] By setting up the aforementioned high-impedance isolation zone, the inter-board connector of this invention achieves complete separation of the digital pin area and the analog pin area from a physical structural perspective. Compared with the traditional staggered arrangement, this architecture achieves significant improvements in pin spacing, parasitic capacitance, and high-frequency crosstalk suppression, fundamentally blocking the coupling path of digital noise to the analog circuit and ensuring the stability and accuracy of high-precision ADC acquisition.

[0059] In yet another preferred embodiment of the present invention, an optional circuit diagram of a signal acquisition and processing system is provided, such as... Figure 4 As shown in the figure, the circuit architecture of the data acquisition and processing system of the present invention is divided into three main modules: core board, inter-board connectors, and carrier board. It achieves triple electrical isolation for power, signal, and ground. Specific details are as follows: 1) Signal transmission link: Starting from the FPGA / GPIO / SPI control pins of the pure digital core board, the signal transmission path passes through the high-speed capacitive / magnetic coupling digital isolator on the core board side, through the signal channel pins in the connector digital pin area, reaches the digital isolator on the carrier board side, and finally connects to the high-precision ADC control pin, thus realizing the complete control signal transmission path between the core board and the carrier board.

[0060] 2) The power transmission link fully demonstrates the transmission path of two independent isolated power supplies: Analog power supply link: The core board side power isolation module outputs +12V_ISO analog power, which enters the carrier board through the analog pin area of ​​the inter-board connector. The carrier board side LDO secondary regulation generates a pure analog power supply to power the analog front-end circuit and high-precision ADC. Figure 4 Only one LDO voltage regulator module is shown in the figure. In practice, multiple LDO voltage regulator modules can be used to achieve voltage regulation of multiple power supplies. Digital power supply link: The core board side power isolation module outputs +5V_ISO_CTRL digital power, which enters the carrier board through the power supply pins of the digital pin area of ​​the inter-board connector. It only supplies power to the digital isolator on the carrier board side and the integrated digital circuits on the board, and does not share a path with the analog power supply loop.

[0061] 3) Ground connection relationship: Digital ground DGND is only connected to the core board and the digital pin area of ​​the connector, and analog ground AGND is only connected to the carrier board and the analog pin area of ​​the connector. The two are physically disconnected at the inter-board connector and have no DC path. They are only connected at the main power input of the system through a Y-type single-point grounding method to form the only ground potential reference point of the entire system, which fundamentally eliminates ground loop interference.

[0062] This invention proposes a two-stage anti-interference system combining physical separation of digital and analog circuits with triple isolation of power, signal, and ground, fundamentally different from existing technologies and solving the problem of digital noise interference in high-precision analog acquisition systems at its source. First, digital and analog circuits are completely separated, migrating all digital circuits to the core board, making the carrier board a pure analog carrier board without any digital components. This architecture fundamentally eliminates the self-interference of the carrier board's own digital circuits to nearby analog front-ends, ADCs, and other sensitive circuits, providing a clean local environment for analog signal acquisition. Second, the inter-board connectors are reconstructed from traditional signal conduction nodes into electrical isolation boundaries between digital and analog circuits. By setting analog pin areas, digital pin areas, and an intermediate high-impedance isolation area in the inter-board connectors, the physical spacing is increased, suppressing near-field electromagnetic coupling and crosstalk of digital signals to the analog channel. Third, a triple collaborative isolation mechanism, employing power isolation, signal isolation, and ground isolation, completely blocks the noise conduction path from the digital core board to the pure analog carrier board.

[0063] Through the above two-level anti-interference system, noise is eliminated at the source and blocked along the path, significantly improving the sampling accuracy of analog signals and the system signal-to-noise ratio, providing a highly reliable and low-noise hardware foundation for high-precision data acquisition.

[0064] The above-described method and system embodiments are based on the same principles, and their related aspects can be referenced from each other to achieve the same technical effects. For specific implementation processes, please refer to the foregoing embodiments, which will not be repeated here.

[0065] The above description is only a preferred embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any changes or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in the present invention should be included within the scope of protection of the present invention.

Claims

1. A signal acquisition and processing system, characterized in that, include: A carrier board, on which analog circuitry is provided for acquiring analog signals and converting the acquired analog signals into digital signals; A core board is connected to the carrier board, and the core board is provided with a first digital circuit and a second digital circuit; wherein, the first digital circuit is used to receive and process the digital signal, and at the same time control the analog circuit to perform analog signal acquisition and conversion; the second digital circuit is used to implement the local control functions of the carrier board other than analog signal acquisition and conversion, so as to replace the local control circuit of the carrier board. An inter-board connector is used to connect the carrier board and the core board. The inter-board connector includes: a digital pin area, an analog pin area, and a high-impedance isolation area located between the digital pin area and the analog pin area; wherein, the digital pin area constitutes a digital transmission channel for transmitting digital signals between the first digital circuit and the analog circuit and digital signals between the second digital circuit and the analog circuit; the analog pin area constitutes an analog transmission channel for transmitting analog signals between the first digital circuit and the analog circuit; the high-impedance isolation area is used to electrically isolate the digital transmission channel from the analog transmission channel.

2. The signal acquisition and processing system according to claim 1, characterized in that, The core board is also provided with peripheral digital communication circuits for communication between the core board and peripheral circuits, and communication between the carrier board and peripheral circuits.

3. The signal acquisition and processing system according to claim 1, characterized in that, Also includes: A power isolation device is used to achieve power electrical isolation between the carrier board and the core board; The power isolation device includes an isolation converter located on the core board, used for interference isolation and power conversion of the input power supply of the signal acquisition and processing system; wherein, one end of the power isolation converter is connected to the input power supply of the signal acquisition and processing system, and the other end is connected to the inter-board connector, converting the interference-isolated input power supply into analog and digital power supplies required by the carrier board; wherein, the analog circuit includes on-board analog circuits and on-board integrated digital circuits, the analog power supply supplies power to the on-board analog circuits through the power supply pins of the analog pin area, and the digital power supply supplies power to the on-board integrated digital circuits through the power supply pins of the digital pin area.

4. The signal acquisition and processing system according to claim 3, characterized in that, The power isolation device further includes: A voltage regulator is used to regulate the analog power supply and the digital power supply input to the carrier board; wherein, the voltage regulator includes an analog voltage regulator and a digital voltage regulator, one end of the analog voltage regulator is connected to the power supply pin of the analog pin area, and the other end is connected to the analog circuit on the board, and the analog voltage regulator is configured in a one-to-one correspondence with the analog circuit on the board; one end of the digital voltage regulator is connected to the power supply pin of the digital pin area, and the other end is connected to the integrated digital circuit on the board, and the digital voltage regulator is configured in a one-to-one correspondence with the integrated digital circuit on the board.

5. The signal acquisition and processing system according to claim 1, characterized in that, Also includes: A signal isolation device is used to achieve electrical isolation of signals between the carrier board and the core board; The signal isolation device includes: A first digital isolator, located on the core board, has one end connected to the first digital circuit and the second digital circuit, and the other end connected to the signal pins of the digital pin area, used to achieve electrical isolation of signals between the core board and the digital pin area; and / or, A second digital isolator is located on the carrier board. One end of the second digital isolator is connected to the signal pin of the digital pin area, and the other end is connected to the analog circuit, for the purpose of achieving electrical isolation of signals between the digital pin area and the carrier board.

6. The signal acquisition and processing system according to claim 5, characterized in that, The signal transmission methods of the first digital isolator and the second digital isolator include at least one of the following: optocoupler transmission, magnetic coupling transmission, and capacitive coupling transmission.

7. The signal acquisition and processing system according to claim 1, characterized in that, Also includes: A grounding isolation device is used to achieve grounding electrical isolation between the core board and the carrier board; The grounding isolation device includes: Digitally grounded, connected to the core board and the digital pin area; The analog ground is connected to the carrier board and the analog pin area; wherein the digital ground and the analog ground are connected via a Y-type single-point grounding connection.

8. The signal acquisition and processing system according to claim 7, characterized in that, The analog circuit includes on-board analog circuitry and on-board integrated digital circuitry, and the analog ground is connected to the on-board analog circuitry; the ground isolation device further includes: The local digital ground is connected to the integrated digital circuitry within the board; wherein the analog ground is connected to the local digital ground at a single point.

9. The signal acquisition and processing system according to claim 1, characterized in that, The high-impedance isolation region includes multiple consecutive idle pins; wherein, the consecutive idle pins are connected to the chassis ground of the signal acquisition and processing system through resistors and / or left floating.

10. The signal acquisition and processing system according to claim 1, characterized in that, The second digital circuit is integrated with the first digital circuit, and the functions of the first digital circuit and the second digital circuit are implemented using an FPGA.

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