High-frequency cooperative control method for jacquard array multi-way switch

Abstract

The application discloses a jacquard array multi-way switch high-frequency cooperative control method and belongs to the technical field of automatic control, which comprises the following steps: digitally analyzing a preset weaving pattern program to obtain multi-way switch array channel control timing data, needle lifting action logic table and region division code, synchronously collecting control channel number, transmission mechanism angle, running speed and load current; generating initial switch control instructions based on the analysis result and the channel number, outputting partition synchronous digital trigger instructions through partition caching and FIFO queue scheduling, realizing dynamic feedforward compensation through angle deviation and running speed, combining load current deviation to perform amplitude compensation through a positional PID algorithm, obtaining digital optimization driving signals, converting the digital optimization driving signals into driving voltage to control multi-way switch contacts to perform needle lifting actions, and performing real-time dynamic updating according to feedback parameters; and the application improves multi-way switch cooperative control precision and response speed and enhances equipment running stability.

Description

Technical Field

[0001] This invention belongs to the field of automation control technology, specifically a high-frequency coordinated control method for jacquard array multi-channel switches. Background Technology

[0002] As a core piece of equipment in textile weaving, the jacquard loom relies on a multi-channel switch array for high-frequency on / off control of needle lifting movements. Its coordinated response speed and timing accuracy directly determine weaving efficiency and pattern quality. Traditional jacquard control often employs centralized command output without partitioned scheduling by pattern area, leading to timing conflicts and poor synchronization during high-frequency, multi-channel parallel operation. Existing technologies typically use open-loop control, failing to compensate for transmission mechanism angle deviations, speed fluctuations, and load current changes in real time. This results in needle lifting phase shifts and unstable drive amplitudes, easily causing needles to misalign or malfunction. Furthermore, the system is susceptible to interference from mechanical vibrations and environmental temperature and humidity, lacking a closed-loop adaptive adjustment mechanism, leading to insufficient reliability during long-term continuous operation. In addition, traditional control methods do not provide real-time feedback and parameter optimization for switch contact states and interference parameters, making it difficult to meet the demands of high-speed, complex pattern weaving in terms of control accuracy and response speed, thus hindering the operational stability and product yield improvement of jacquard weaving equipment. Therefore, developing a high-frequency coordinated control method for jacquard array multi-channel switches with partitioned synchronization, dynamic compensation, and adaptive anti-interference capabilities has become a pressing technical challenge for the industry. Summary of the Invention

[0003] To address the shortcomings of existing technologies, this invention proposes a high-frequency collaborative control method for jacquard array multi-channel switches. It performs digital analysis on a preset knitting pattern program to obtain the control timing data of the multi-channel switch array channels, the needle lifting action logic table, and the region division code. Simultaneously, it collects the number of control channels, the angle of the transmission mechanism, the running speed, and the load current. Based on the analysis results and the number of channels, it generates initial switch control commands, which are then output as partitioned synchronous digital trigger commands through partitioned buffering and FIFO queue scheduling. Dynamic feedforward compensation is achieved through angle deviation and running speed, and amplitude compensation is performed using a position-based PID algorithm combined with load current deviation to obtain a digitally optimized drive signal. This digitally optimized drive signal is converted into a drive voltage to control the multi-channel switch contacts to execute needle lifting actions, and is dynamically updated in real time based on feedback parameters. This invention improves the accuracy and response speed of multi-channel switch collaborative control and enhances the stability of equipment operation.

[0004] To achieve the above objectives, the present invention provides the following technical solution:

[0005] A high-frequency coordinated control method for multiple switches in a jacquard array includes:

[0006] Digital analysis is performed based on the preset knitting pattern program to obtain the control timing data of the multi-channel switch array, the needle lifting action logic table and the area division code. Simultaneously, the number of control channels, the angle of the transmission mechanism, the running speed and the load current are collected through the incremental encoder.

[0007] Based on the digital analysis results and the number of control channels, the initial switch control command is generated by the program, and the initial switch control command is partitioned, cached, and scheduled in a FIFO queue according to the control area, and the partitioned synchronous digital trigger command is output.

[0008] Calculate the angle deviation between the transmission mechanism angle and the preset reference angle, perform dynamic feedforward compensation in combination with the running speed, obtain the angle phase correction coefficient, use the angle phase correction coefficient to perform dynamic phase correction on the partition synchronization digital trigger command, and output the phase synchronization digital trigger signal.

[0009] The current deviation between the load current and the preset current threshold is calculated, and a position-based PID algorithm is used to output the voltage amplitude compensation amount. The voltage amplitude compensation amount is used to dynamically compensate the amplitude of the phase synchronization digital trigger signal, and a digitally optimized drive signal is output.

[0010] The digitally optimized drive signal is converted into a switch on / off drive voltage to control the multi-channel switch contacts to perform the needle lifting on / off action, and the angle phase correction coefficient and voltage amplitude compensation amount are updated according to the real-time collected feedback parameters; the feedback parameters include contact on / off state, vibration interference parameters, and ambient temperature and humidity parameters.

[0011] Specifically, the digital analysis based on the preset knitting pattern program yields multi-channel switch array control timing data, needle lifting action logic table, and region division encoding, including:

[0012] Based on the preset knitting pattern program, read the lifting needle dot matrix data of each row in the knitting pattern program;

[0013] Based on the needle matrix data, channel control timing data corresponding to the on / off time and on / off duration of each switch channel within a knitting cycle is generated by matrix transpose operation;

[0014] Based on the channel control timing data, a logic state mapping method is used to map the high-level valid state of each switch channel to the needle lifting action execution state, and the low-level invalid state to the needle lifting action release state, thereby constructing a needle lifting action logic table with the switch channel address as the row index and the timing beat as the column index.

[0015] Based on the pattern area identifier in the pattern weaving program, extract the switch channel address range corresponding to different pattern areas and generate a region division code with the region number as the primary key.

[0016] The channel control timing data, the needle lifting action logic table, and the region division code are output as digital parsing results.

[0017] Specifically, the step of generating initial switch control commands through program parsing based on the digital analysis results and the number of control channels includes:

[0018] Obtain the channel control timing data and needle lifting action logic table from the digital analysis results, and obtain the number of control channels acquired by the incremental encoder;

[0019] Using the number of control channels as the upper limit, a loop traversal program is used to traverse the switch channel address corresponding to each row index in the needle lifting action logic table. For the currently traversed switch channel address, based on the on / off time and on / off duration corresponding to the switch channel address in the channel control timing data, an instruction encoding generation function is used to convert the on / off time into an instruction timestamp parameter, the on / off duration into an instruction duration parameter, and the corresponding logic state in the needle lifting action logic table into an instruction action type parameter. The instruction timestamp parameter, instruction duration parameter, and instruction action type parameter are then encapsulated into an initial switch control instruction.

[0020] Repeatedly traverse all switch channel addresses to generate the same number of initial switch control commands as the number of control channels.

[0021] Specifically, the initial switch control command is partitioned, buffered, and scheduled in a FIFO queue according to the control area, and a partitioned synchronization digital trigger command is output, including:

[0022] Obtain the region division code; the region division code includes at least one region number and the switch channel address range corresponding to each region number;

[0023] Based on the region number, establish a partitioned cache area that corresponds one-to-one with the region number;

[0024] Traverse all initial switch control instructions, extract the switch channel address contained in each initial switch control instruction, query the region number corresponding to the switch channel address range to which the switch channel address belongs, and store the initial switch control instruction into the partition cache area corresponding to the region number.

[0025] For each partition buffer, the FIFO queue scheduling algorithm is used to arrange the initial switch control instructions in the partition buffer into an instruction output queue according to the order of the instruction timestamp parameters in each initial switch control instruction. When multiple initial switch control instructions in the same partition buffer have the same instruction timestamp parameter, they are arranged in ascending order of switch channel address.

[0026] According to the preset global synchronization clock beat, an initial switch control instruction is read from the head of the instruction output queue of each partition buffer. The read initial switch control instructions are packaged into a partition synchronization data packet, and the partition synchronization data packet is output as a partition synchronization digital trigger instruction.

[0027] Specifically, the calculation process of the angle phase correction coefficient includes:

[0028] The deviation between the transmission mechanism angle and the preset reference angle is calculated to obtain the angle deviation value, and the angular acceleration value is obtained by differentiating the running speed using differential operation;

[0029] Based on the angular deviation value and the angular acceleration value, a dynamic feedforward compensation algorithm is used to calculate the feedforward compensation amount; the transfer function of the dynamic feedforward compensation algorithm is a parallel form of velocity feedforward and acceleration feedforward.

[0030] The angle deviation value is input into the proportional-integral controller to obtain the feedback compensation amount;

[0031] The feedforward compensation amount is added to the feedback compensation amount to obtain the total compensation amount, and the total compensation amount is superimposed on the unit reference coefficient to obtain the angle phase correction coefficient.

[0032] Specifically, the phase of the partition synchronization digital trigger command is dynamically corrected using the aforementioned angle phase correction coefficient, and a phase synchronization digital trigger signal is output, including:

[0033] Obtain the partition synchronization digital trigger instruction, parse each initial switch control instruction in the partition synchronization digital trigger instruction, and extract the instruction timestamp parameter in each initial switch control instruction;

[0034] Obtain the angle phase correction coefficient, multiply the instruction timestamp parameter by the angle phase correction coefficient to obtain the corrected timestamp parameter. If the corrected timestamp parameter exceeds the preset timestamp maximum value, then the timestamp maximum value is used as the corrected timestamp parameter.

[0035] The original instruction timestamp parameter in the initial switch control instruction is replaced with the corrected timestamp parameter to generate the corrected switch control instruction. All the corrected switch control instructions are then reordered according to the corrected timestamp parameter and repackaged into a phase correction data packet. The phase correction data packet is then output as a phase synchronization digital trigger signal.

[0036] Specifically, the current deviation between the load current and the preset current threshold is calculated, and a position-based PID algorithm is used to output the voltage amplitude compensation, including:

[0037] The load current collected by the incremental encoder is acquired in real time, and a preset current threshold is subtracted from the load current to obtain the current deviation value.

[0038] Based on the current deviation value, the initial amount of voltage amplitude compensation is calculated using a position-based PID algorithm;

[0039] If the initial voltage amplitude compensation amount is greater than the preset compensation upper limit value, then the compensation upper limit value is used as the voltage amplitude compensation amount;

[0040] If the initial voltage amplitude compensation amount is less than the preset compensation lower limit, then the compensation lower limit will be used as the voltage amplitude compensation amount.

[0041] If the initial voltage amplitude compensation amount is less than or equal to the preset upper limit of compensation and greater than or equal to the preset lower limit of compensation, then the initial voltage amplitude compensation amount will be output as the voltage amplitude compensation amount.

[0042] Specifically, the voltage amplitude compensation amount is used to dynamically compensate the phase synchronization digital trigger signal to output a digitally optimized drive signal, including:

[0043] Analyze each corrected switching control command in the phase synchronization digital trigger signal and obtain the voltage amplitude compensation amount;

[0044] For each corrected switch control instruction, extract its instruction action type parameter;

[0045] When the instruction action type parameter is in a high-level active state, the voltage amplitude compensation is superimposed on the preset standard driving voltage amplitude to obtain the actual driving voltage amplitude.

[0046] When the instruction action type parameter is in a low-level invalid state, the driving voltage amplitude is set to zero;

[0047] The actual driving voltage amplitude or zero value is re-encapsulated with the corrected timestamp parameter and instruction duration parameter in the corrected switching control instruction to generate a digitally optimized driving instruction.

[0048] All digitally optimized drive instructions are arranged in the corrected timestamp parameter sequence to form a digitally optimized drive signal.

[0049] Specifically, the step of converting the digitally optimized drive signal into a switch on / off drive voltage to control the multiplexer contacts to perform a pin lifting on / off action includes:

[0050] The digitally optimized drive signal is acquired, and each digitally optimized drive instruction is input to the digital-to-analog converter. The digital-to-analog converter outputs the corresponding analog voltage value according to the actual drive voltage amplitude or zero value in the digitally optimized drive instruction.

[0051] The analog voltage value is input to the input terminal of the power amplifier, which amplifies the analog voltage value to the pull-in voltage or release voltage of the switch contacts to obtain the switch on / off drive voltage;

[0052] Apply the switching drive voltage to both ends of the electromagnetic coil of the switch contact corresponding to the switch channel address;

[0053] Based on the corrected timestamp parameter in the digitally optimized drive instruction, the switch on / off drive voltage is turned on or off at a specified time, and the switch contacts are controlled to perform a pull-in or release reset action for the duration specified by the instruction duration parameter.

[0054] Specifically, updating the angle phase correction coefficient and voltage amplitude compensation amount based on the real-time collected feedback parameters includes:

[0055] Real-time acquisition of contact on / off status, vibration interference parameters, and ambient temperature and humidity parameters as feedback parameters;

[0056] Obtain the angle phase correction coefficient and voltage amplitude compensation amount at the current moment;

[0057] Based on the contact on / off state and the vibration interference parameters, a correlation analysis method is used to calculate the correlation coefficient between the vibration interference parameters and the state change of the contact on / off state; the state change of the contact on / off state is the result of an XOR logical operation between the current contact on / off state and the previous contact on / off state.

[0058] When the correlation coefficient exceeds the preset correlation coefficient threshold, it is determined that the vibration interference has caused an unexpected switch in the contact on / off state, and an angle correction trigger flag is generated.

[0059] In response to the angle correction trigger flag, the dynamic feedforward compensation algorithm is re-executed, using the vibration interference parameter as the feedforward input, the angle phase correction coefficient is recalculated, and the original angle phase correction coefficient is updated with the newly calculated angle phase correction coefficient.

[0060] Based on the ambient temperature and humidity parameters and the load current, the environmental compensation coefficient is obtained by looking up the pre-stored ambient temperature and humidity-current compensation mapping table using the table lookup method.

[0061] The updated voltage amplitude compensation is obtained by multiplying the environmental compensation coefficient by the voltage amplitude compensation amount at the current moment.

[0062] Specifically, the incremental encoder is a photoelectric incremental encoder, which is installed at the end of the main shaft of the transmission mechanism. The incremental encoder outputs three signals, namely A-phase signal, B-phase signal and Z-phase signal. The A-phase signal and B-phase signal have a 90-degree phase difference with each other and are used to detect the angle and running speed of the transmission mechanism. The Z-phase signal outputs one pulse for each revolution of rotation as an absolute angle zero position reference.

[0063] Specifically, the multi-channel switch array is a matrix relay array used in electromagnetic devices. The row lines of the matrix relay array are connected to the address selection terminals of the switch channels, and the column lines are connected to the common terminals of the drive coils of the switch contacts. The individual switch contacts are independently addressed and controlled by a combination of row selection signals and column selection signals. The number of control channels is the product of the number of row lines and the number of column lines.

[0064] Compared with the prior art, the beneficial effects of the present invention are:

[0065] 1. This invention proposes a high-frequency collaborative control method for multi-channel switches in jacquard arrays. By using partitioned buffering and FIFO queue scheduling, the method achieves partitioned synchronous control of the multi-channel switch array. Control commands are packaged and output uniformly according to the pattern area, effectively solving the problem of timing disorder of multi-channel switch channels under high-frequency operation. This significantly improves the overall coordination and synchronization accuracy of needle lifting actions, meeting the stringent requirements of multi-channel parallel control for complex pattern knitting.

[0066] 2. This invention proposes a high-frequency collaborative control method for multiple switches in a jacquard array. It employs dual optimization of dynamic feedforward compensation for angle and phase and PID regulation of voltage amplitude to correct the angle deviation of the transmission mechanism in real time and compensate for load current fluctuations, thereby reducing the impact of mechanical vibration and speed changes on needle lifting action. At the same time, it adaptively adjusts control parameters by combining feedback parameters such as temperature and humidity and contact status, thereby improving the stability and anti-interference capability of the system under complex working conditions.

[0067] 3. This invention proposes a high-frequency collaborative control method for multi-channel switches in jacquard arrays. The entire process of digital analysis, instruction encoding, and analog-to-digital conversion is digitally processed, allowing for precise control over the on / off time, duration, and driving amplitude of the needle lifting mechanism. This reduces contact malfunctions and needle lifting errors, improves the consistency of pattern weaving, and increases the yield. The high-frequency response and closed-loop optimization characteristics are adapted to high-speed jacquard equipment, effectively improving weaving efficiency and the upper limit of pattern complexity. Attached Figure Description

[0068] Figure 1 This is a schematic diagram of the high-frequency collaborative control method for a jacquard array multi-channel switch according to the present invention;

[0069] Figure 2 This is a flowchart of the initial switch control command generation process in the jacquard array multi-channel switch high-frequency collaborative control method of the present invention;

[0070] Figure 3 This is a flowchart illustrating the generation of phase-synchronized digital trigger signals in the high-frequency coordinated control method for jacquard array multi-channel switches of the present invention. Detailed Implementation

[0071] Example 1:

[0072] Please see Figure 1 The present invention provides an embodiment of a high-frequency coordinated control method for a jacquard array multi-channel switch, the method comprising S1~S5, including the following steps:

[0073] S1: Based on the preset knitting pattern program, digital analysis is performed to obtain the control timing data of the multi-channel switch array, the needle lifting action logic table and the area division code. Simultaneously, the number of control channels, the angle of the transmission mechanism, the running speed and the load current are collected through the incremental encoder.

[0074] The incremental encoder is a photoelectric incremental encoder, which is installed at the end of the main shaft of the transmission mechanism. The incremental encoder outputs three signals, namely A-phase signal, B-phase signal and Z-phase signal. The A-phase signal and B-phase signal are 90 degrees out of phase with each other and are used to detect the angle and running speed of the transmission mechanism. The Z-phase signal outputs one pulse for each revolution of rotation as an absolute angle zero position reference.

[0075] The multi-channel switch array is a matrix relay array used in electromagnetic devices. The row lines of the matrix relay array are connected to the address selection terminals of the switch channels, and the column lines are connected to the common terminals of the drive coils of the switch contacts. The individual switch contacts are independently addressed and controlled by a combination of row selection signals and column selection signals. The number of control channels is the product of the number of row lines and the number of column lines.

[0076] S2: Based on the digital analysis results and the number of control channels, the initial switch control command is generated by program analysis, and the initial switch control command is partitioned, buffered, and scheduled in a FIFO queue according to the control area, and the partitioned synchronization digital trigger command is output.

[0077] S3: Calculate the angle deviation between the transmission mechanism angle and the preset reference angle, perform dynamic feedforward compensation in combination with the running speed, obtain the angle phase correction coefficient, use the angle phase correction coefficient to perform dynamic phase correction on the partition synchronization digital trigger command, and output the phase synchronization digital trigger signal.

[0078] S4: Calculate the current deviation between the load current and the preset current threshold, use a position-based PID algorithm to output the voltage amplitude compensation amount, use the voltage amplitude compensation amount to perform dynamic amplitude compensation on the phase synchronization digital trigger signal, and output a digitally optimized drive signal.

[0079] S5: Convert the digitally optimized drive signal into a switch on / off drive voltage, control the multi-channel switch contacts to perform the needle lifting on / off action, and update the angle phase correction coefficient and voltage amplitude compensation amount according to the real-time collected feedback parameters; the feedback parameters include contact on / off state, vibration interference parameters, and ambient temperature and humidity parameters.

[0080] Furthermore, the contact on / off state is acquired in the following manner: an optocoupler-isolated voltage sampling circuit is connected in series between the moving contact and the stationary contact of each switch contact. When the switch contact is closed, the voltage sampling circuit outputs a high-level digital signal, and when the switch contact is open, it outputs a low-level digital signal. The high-level digital signal or the low-level digital signal is processed by a filtering and debouncing circuit and used as the contact on / off state parameter.

[0081] Furthermore, the vibration interference parameters are collected in the following manner: a triaxial accelerometer is installed on the frame of the jacquard machine and the mounting plate of the multi-channel switch array, respectively. The triaxial accelerometer collects the instantaneous acceleration values ​​in the X-axis, Y-axis and Z-axis directions at a sampling frequency of 20kHz. The square root of the sum of the squares of the instantaneous acceleration values ​​in the three directions is calculated to obtain the resultant vibration acceleration value, which is used as the vibration interference parameter.

[0082] Furthermore, the environmental temperature and humidity parameters are acquired in the following way: a digital temperature and humidity sensor is installed both inside and outside the multi-channel switch array. The digital temperature and humidity sensor outputs temperature and relative humidity values ​​using a single-bus protocol. The temperature and relative humidity values ​​inside the multi-channel switch array are used as internal environmental parameters, and the temperature and relative humidity values ​​outside the array are used as external environmental parameters, together forming the environmental temperature and humidity parameters.

[0083] The process involves digital analysis based on a preset knitting pattern program to obtain multi-channel switch array control timing data, needle lifting action logic table, and area division encoding, including:

[0084] S1.1: Based on the preset knitting pattern program, read the lifting needle dot matrix data of each row in the knitting pattern program;

[0085] Furthermore, the preset weaving pattern program is stored in binary format, containing complete pattern information, process parameters, and area division identifiers for the jacquard fabric. The system reads the program data through a dedicated parsing interface, extracts the needle dot matrix data of each row according to the weaving column order, and the needle dot matrix data of each row corresponds to the needle lifting requirements of one row of fabric during the weaving process. Each bit code corresponds to the needle lifting status of one switch channel. The system reads quickly at a rate of 20kHz to ensure that the dot matrix data is complete and accurate.

[0086] Furthermore, the needle dot matrix data is in the form of a two-dimensional matrix, with rows corresponding to weaving columns and columns corresponding to switching channels.

[0087] S1.2: Based on the needle dot matrix data, generate channel control timing data corresponding to the on / off time and on / off duration of each switch channel within a knitting cycle through matrix transpose operation;

[0088] In this embodiment, the knitting cycle is set as the complete cycle for the device to complete the weaving of a whole pattern, with a total duration of 200 milliseconds, matching the actual running time of one rotation of the device spindle. The system processing clock frequency is set to 20kHz, i.e., the clock cycle is 50 microseconds. Each clock cycle corresponds to a timing beat, used to accurately mark the on / off moments. The number of rows of the needle dot matrix data is set to 200, corresponding to the 200 weaving steps within the knitting cycle. The total number of switch channels is set to 256, consistent with the number of physical channels in the matrix relay array.

[0089] Furthermore, the specific steps in S1.2 include:

[0090] (1) Read all the needle lifting dot matrix data in a complete knitting cycle in the knitting pattern program in sequence. The horizontal direction corresponds to 256 switch channels, and the vertical direction corresponds to 200 knitting columns. The data at each position represents whether the corresponding channel needs to perform the needle lifting action in the corresponding column. The data status is only divided into two types: action required and no action required. The system first performs regularization processing on the read needle lifting dot matrix data to ensure that the horizontal channel number is arranged continuously from the 1st to the 256th channel, and the vertical column number is arranged continuously from the 1st to the 200th column, and there is no missing channel or disordered column.

[0091] (2) Iterate through all the switch channels from channel 1 to channel 256 in sequence. For a single switch channel, extract all the action status data corresponding to the switch channel in the 200 weaving columns. Map the status data originally distributed on the vertical columns to the timing beats corresponding to the weaving cycle according to the order of the columns. The 200 weaving columns correspond to 200 consecutive timing beats. The duration of each timing beat is fixed at 50 microseconds, which is consistent with the system clock cycle. After transposing, each channel forms a continuous timing curve with the timing beat as the horizontal axis and the action status as the vertical axis, thus completing the dimensional conversion from two-dimensional dot matrix data to single-channel timing data.

[0092] (3) For the timing data after transposing each switch channel, start from the first timing beat and traverse and detect each beat to determine whether the current beat is the action start node. The criteria for determining the action start node is that the current beat state is required to perform an action and the previous timing beat state is not required to perform an action. The system records the timing beat number corresponding to each action start node, and then multiplies the timing beat number by the duration of a single beat, 50 microseconds, to calculate the on / off time of the current action of the channel. The value range is from 0 milliseconds to 200 milliseconds, covering the entire weaving cycle. After traversal, all action start times of the switch channel within one weaving cycle are sorted out to ensure no omissions and no incorrect identification.

[0093] (4) After determining the start time of the action, continue to detect the time sequence step by step to determine the end node of the action. The criteria for determining the end node of the action is that the current time sequence state is no action required and the previous time sequence state is action required. After finding the end node, record the time sequence number corresponding to the end node. Subtract the time sequence number of the start node from the time sequence number of the end node to obtain the total number of time sequences occupied by the action. Then multiply the total number of time sequences by the duration of a single time sequence of 50 microseconds to obtain the on / off duration of the action. If the channel maintains the state of requiring action in multiple consecutive time sequences, the on / off duration is calculated according to the total duration of the consecutive time sequences to ensure that the duration data is completely matched with the actual duration of the needle lifting action.

[0094] (5) Arrange all the on / off times of a single channel in a weaving loop in chronological order to form an ordered time sequence. At the same time, match and bind the on / off duration corresponding to each on / off time to form a complete data combination with one-to-one correspondence between time and duration. For channels that do not need to perform any actions in the entire weaving loop, mark the on / off time as empty and the on / off duration as 0 milliseconds to ensure that the data format of all channels is uniform and standardized.

[0095] (6) In order of channel number from channel 1 to channel 256, the on / off time sequence and on / off duration sequence of each channel are summarized and integrated to form channel control timing data.

[0096] S1.3: Based on the channel control timing data, a logic state mapping method is used to map the high-level valid state of each switch channel to the needle lifting action execution state, and the low-level invalid state to the needle lifting action release state, thereby constructing a needle lifting action logic table with the switch channel address as the row index and the timing beat as the column index.

[0097] Furthermore, the specific settings of the logic state mapping method are as follows: the high-level signal received by the switch channel is defined as the valid state, and the valid state uniquely corresponds to the needle lifting action execution state. The needle lifting action execution state represents the needle lifting mechanism moving upward and maintaining the working position. The low-level signal received by the switch channel is defined as the invalid state, and the invalid state uniquely corresponds to the needle lifting action release state. The needle lifting action release state represents the needle lifting mechanism resetting downward and maintaining the initial position.

[0098] Furthermore, the specific steps in S1.3 include:

[0099] (1) Using the switch channel address as the traversal basis, read the channel control timing data corresponding to each switch channel address in the order from channel 1 to channel 256.

[0100] (2) For the single channel being processed, the timing of the switch channel in the entire braiding cycle is traversed sequentially from the 1st to the 4000th. Since the total duration is set to 200 milliseconds and the system processing clock frequency is set to 20kHz, i.e., the clock period is 50 microseconds, the ratio of the total duration of a braiding cycle to the duration of a single timing beat is 200÷0.05=4000, which is the number of timing beats. According to the on / off time and on / off duration recorded in the channel control timing data, the level state of the current channel is determined at each timing beat. The determination rule is as follows: when the system time reaches the on / off time of the channel and has not exceeded the coverage range of the on / off duration, the level state corresponding to the current timing beat is determined to be a high level valid state; when the system time has not reached the on / off time or has exceeded the coverage range of the on / off duration, the level state corresponding to the current timing beat is determined to be a low level invalid state. The level state determination of all timing beats is strictly based on the timing data and no subjective adjustments are made.

[0101] (3) When the current timing cycle is in a high-level active state, immediately map the high-level active state to the needle lifting action execution state; when the current timing cycle is in a low-level inactive state, immediately map the low-level inactive state to the needle lifting action release state.

[0102] (4) Fill in the logical table content according to the row and column index rules. The needle lifting action logical table adopts a fixed two-dimensional index structure. The row index is the switch channel address. From row 1 to row 256, it corresponds to the 1st to 256th switch channels. The column index is the timing beat. From column 1 to column 4000, it corresponds to the 1st to 4000th timing beats. The system fills in the mapping result of the current processing channel into the corresponding position of the logical table according to the index position. The specific operation is as follows: take the current switch channel address as the row number and the current timing beat number as the column number. Accurately write the mapped needle lifting action execution status or needle lifting action release status into the cell where the row and column intersect. The status of each timing beat is filled in independently. Do not merge, omit, or replace. Ensure that each cell has a clear and unique status content.

[0103] (5) After all 4,000 timing cycles corresponding to a single channel have completed state mapping and cell filling, the data in that row is locked and solidified. The solidified data is not allowed to be modified or overwritten.

[0104] (6) Repeat the entire process from reading channel data line by line to solidifying single channel row data. Process all switch channels from channel 2 to channel 256 in sequence. After processing each channel, fill and solidify one row of data in the logic table. When all 256 channels have been processed, all rows and columns of the logic table are completely filled, forming a complete needle lifting action logic table with the switch channel address as the row index and the timing beat as the column index.

[0105] S1.4: Based on the pattern area identifier in the weaving pattern program, the switch channel address range corresponding to different pattern areas is extracted using the area boundary scanning algorithm, and an area division code with the area number as the primary key is generated;

[0106] Furthermore, the specific steps in S1.4 include:

[0107] (1) Extract all pattern area identifiers from the header data segment of the imported weaving pattern program. The pattern area identifiers exist in the form of continuous data segments in the weaving pattern program and are used to mark the start and end positions of different pattern areas. In this embodiment, the preset number of pattern areas is 3, which correspond to the left pattern area, the right pattern area, and the middle transition area respectively. The system reads and temporarily stores the three area identifiers in the order in which the identifiers appear.

[0108] (2) Set the parameters of the region boundary scanning algorithm, including: the scan start address is set to the address corresponding to the 1st switch channel, the scan end address is set to the address corresponding to the 256th switch channel, the single-step scan step length is set to the address of one switch channel, the boundary judgment threshold is set to the state change amplitude of four consecutive switch channel addresses, and the region numbering rule is set to be assigned sequentially according to the scanning order, with the first region to be identified as number 1, the second region to be identified as number 2, and the third region to be identified as number 3.

[0109] (3) Starting from the set scan start address, scan sequentially from the first switch channel address to the scan end address according to the single-step scan step length. For each switch channel address scanned, read all the timing state data corresponding to that address in the needle lifting action logic table, and match the pattern area belonging mark corresponding to that address in the knitting pattern program. The scanning process is executed at a constant speed, without skipping any channel address or changing the scanning direction.

[0110] (4) In the process of scanning one channel at a time, the pattern area belonging mark of the currently scanned switch channel address is compared and matched with the read pattern area identifier in real time. When the four consecutive scanned switch channel addresses all match the same pattern area identifier and meet the boundary judgment threshold requirements, the first address of the group of consecutive addresses is marked as the starting channel address of the current pattern area. The scanning continues until the four consecutive switch channel addresses no longer match the pattern area identifier. Then the last address of the group of consecutive addresses is marked as the ending channel address of the current pattern area. The boundary judgment of the three pattern areas is completed in sequence, and the starting channel address and ending channel address corresponding to each area are obtained respectively. Among them, the starting channel address of the left pattern area is the first channel and the ending channel address is the 85th channel. The starting channel address of the middle transition area is the 86th channel and the ending channel address is the 170th channel. The starting channel address of the right pattern area is the 171st channel and the ending channel address is the 256th channel.

[0111] (5) The boundary addresses that have been determined are normalized. The starting channel address and the ending channel address of each pattern area are combined to form a continuous and non-overlapping switch channel address range. The switch channel address range of the left pattern area is from channel 1 to channel 85, the switch channel address range of the middle transition area is from channel 86 to channel 170, and the switch channel address range of the right pattern area is from channel 171 to channel 256. The three switch channel address ranges completely cover all 256 switch channel addresses.

[0112] (6) Bind area number 1 to the switch channel address range of the left pattern area, area number 2 to the switch channel address range of the middle transition area, and area number 3 to the switch channel address range of the right pattern area. Using the area number as the unique primary key, combine the primary key information, the corresponding area name, the corresponding starting channel address, the corresponding ending channel address, and the total number of channels contained in the switch channel address range in sequence to form structured coded data. The total number of channels corresponding to area number 1 and area number 2 is 85, and the total number of channels corresponding to area number 3 is 86.

[0113] (7) The structured encoded data that has been encapsulated is processed to unify the format, remove redundant information, retain the core primary key and address range data, and form a standard area division code.

[0114] S1.5: Output the channel control timing data, the needle lifting action logic table, and the region division code as digital parsing results.

[0115] Example 2:

[0116] Please see Figure 2 In this embodiment, the process of generating initial switch control commands through program parsing based on digital analysis results and the number of control channels includes:

[0117] S2.1: Obtain the channel control timing data and needle lifting action logic table from the digital analysis results, and obtain the number of control channels acquired by the incremental encoder;

[0118] S2.2: Using the number of control channels as the upper limit, a loop traversal program is used to traverse the switch channel address corresponding to each row index in the needle lifting action logic table. For the currently traversed switch channel address, according to the on / off time and on / off duration corresponding to the switch channel address in the channel control timing data, the on / off time is converted into an instruction timestamp parameter, the on / off duration is converted into an instruction duration parameter, the corresponding logic state in the needle lifting action logic table is converted into an instruction action type parameter, and the instruction timestamp parameter, instruction duration parameter, and instruction action type parameter are encapsulated into an initial switch control instruction.

[0119] In this embodiment, the number of 256 control channels is set as the upper limit of this loop traversal, serving as the sole criterion for loop termination. When the loop traversal program is initialized, the starting value of the current traversal channel address is set to the address corresponding to the first switch channel, and the loop step length is set to the address of one switch channel. This ensures that the traversal process is executed sequentially from the first channel, without skipping, repeating, or reversing. At the same time, the temporary instruction storage area is cleared to provide independent storage space for the initial switch control instructions generated by each channel, avoiding data cross-interference.

[0120] In this embodiment, the instruction encoding generation function has completed parameter configuration during initialization. The timestamp parameter base value is set to 0 milliseconds, corresponding to the start time of the knitting cycle. The duration parameter minimum unit is set to 50 microseconds, consistent with the duration of a single timing beat. The action type parameter retains only two valid states, corresponding to the needle lifting action execution state and the needle lifting action release state, respectively.

[0121] Furthermore, the specific steps of S2.2 include:

[0122] (1) The loop traversal program uses the row index of the needle action logic table as the traversal basis. Starting from the first row, it traverses sequentially to the 256th row. Each row index uniquely corresponds to the address of a switch channel. Read the switch channel address corresponding to the current traversal row, lock the switch channel address as the current processing object, pause the processing of other channels, and continue until all instruction generation operations of the current channel are completed.

[0123] (2) Based on the locked current switch channel address, accurately retrieve all timing information specific to the switch channel address from the generated channel control timing dataset, including all on / off times and on / off durations of the channel within a complete weaving cycle;

[0124] (3) The instruction encoding generation function reads the on / off time of the current channel and directly converts the on / off time into an instruction timestamp parameter in milliseconds. The instruction timestamp parameter marks the trigger time of the initial switch control instruction. It reads the on / off duration of the current channel and directly converts the on / off duration into an instruction duration parameter in microseconds. The instruction duration parameter marks the effective holding duration of the initial switch control instruction. It reads the logic state of the current channel address and the corresponding timing beat intersection position in the needle lifting action logic table, converts the needle lifting action execution state into a high-level valid action type parameter, and converts the needle lifting action release state into a low-level invalid action type parameter. All parameter conversion processes are executed according to preset rules.

[0125] (4) The converted instruction timestamp parameter, instruction duration parameter, and instruction action type parameter are combined in a fixed order. The combination order is to place the instruction timestamp parameter first, the instruction duration parameter in the middle, and the instruction action type parameter last. The three types of parameters are independent of each other and closely related to form a single initial switch control instruction with a complete structure and uniform format. The generated single initial switch control instruction is temporarily stored in a dedicated storage unit.

[0126] (5) Compare the current completed instruction generation switch channel address with the set 256-way traversal upper limit. If the current address has not reached the 256th channel, increase the current channel address by 1 according to the step length, return to the step of reading the channel address of the needle action logic table by row, and continue to execute the instruction generation process of the next channel. If the current address has reached the 256th channel, it is determined that the loop traversal operation is completed and the loop traversal program is terminated.

[0127] (6) The 256 initial switch control instructions corresponding to the 256 switch channels are centrally summarized and sorted according to the switch channel address from channel 1 to channel 256 to ensure that the order of instructions is completely consistent with the order of channel addresses. After sorting, the integrity of all instructions is checked to confirm that the total number of instructions is equal to the number of control channels. Each initial switch control instruction contains complete three types of parameters, and finally forms the initial switch control instruction set.

[0128] S2.3: Repeatedly traverse all switch channel addresses to generate the same number of initial switch control instructions as the number of control channels.

[0129] The initial switch control command is partitioned, buffered, and scheduled in a FIFO queue according to the control area, and the partitioned synchronization digital trigger command is output, including:

[0130] S2.4: Obtain the region division code; the region division code includes at least one region number and the switch channel address range corresponding to each region number;

[0131] S2.5: Based on the region number, establish a partitioned cache area that corresponds one-to-one with the region number;

[0132] Furthermore, the specific steps of S2.5 include:

[0133] (1) Extract all valid area number information from the area division code, check the value and quantity of the area number one by one, and confirm that there are three valid area numbers, namely area number 1, area number 2 and area number 3.

[0134] (2) Before creating the cache area, configure fixed parameters uniformly. The minimum number of storage units in a single partition cache area is set to the storage space of one initial switch control instruction corresponding to one switch channel. The cache area address offset step is set to 64 bits, which is consistent with the storage length of a single initial switch control instruction. The cache area data read and write permissions are set to only allow writing initial switch control instructions and reading scheduling instructions, and do not allow modification of existing instruction content in the middle. The cache area overflow protection threshold is set to trigger write protection when it exceeds the maximum planned capacity by 10%. All parameters remain unchanged throughout the process once set.

[0135] (3) Create an independent partition cache for each region number in ascending order of region number. First, create a partition cache for the left patterned area for region number 1. Then, create a partition cache for the middle transition area for region number 2. Finally, create a partition cache for the right patterned area for region number 3. Each partition cache occupies an independent physical address segment in the system storage resources. There is no address overlap or data interference between them.

[0136] (4) Calculate and configure the capacity of the corresponding partition buffer according to the total number of channels in each region recorded in the region division code. Specifically, configure the capacity of the left pattern region partition buffer corresponding to region number 1 to store 85 initial switch control instructions, configure the capacity of the middle transition region partition buffer corresponding to region number 2 to store 85 initial switch control instructions, and configure the capacity of the right pattern region partition buffer corresponding to region number 3 to store 86 initial switch control instructions. The capacity of each buffer matches the number of channels in the corresponding region, which ensures that all instructions in the region can be stored completely without causing redundant waste of storage resources.

[0137] (5) Assign a fixed mapping identifier to each created partition cache area, bind area number 1 to the left pattern area partition cache area one-to-one, bind area number 2 to the middle transition area partition cache area one-to-one, bind area number 3 to the right pattern area partition cache area one-to-one. The binding relationship is based solely on the area number. The system can directly locate the corresponding partition cache area by inputting any area number. There is no fuzzy mapping situation of one-to-many or many-to-one.

[0138] (6) Set up dedicated instruction write pointer and instruction read pointer for each independent partition cache. In the initial state, all pointers point to the starting storage address of the corresponding cache. The write pointer is used to mark the storage location of the next instruction to be stored, and the read pointer is used to mark the storage location of the instruction to be read during scheduling. The pointer movement step size is consistent with the storage length of a single instruction, which is 64 bits, to ensure that the pointer movement corresponds precisely to the instruction storage location.

[0139] (7) Set all created partition caches to the ready-to-write state, disable temporary configuration permissions, and generate a valid status identifier indicating that the partition cache has been created.

[0140] S2.6: Traverse all initial switch control instructions, extract the switch channel address contained in each initial switch control instruction, query the region number corresponding to the switch channel address range according to the switch channel address range to which the switch channel address belongs, and store the initial switch control instruction into the partition cache area corresponding to the region number;

[0141] Further, after extracting the switch channel address contained in each initial switch control command, it is first determined whether the switch channel address is within the range of channel 1 to channel 85. If the determination result is yes, the switch channel address is marked as belonging to the left pattern area; if not, it is further determined whether it is within the range of channel 86 to channel 170. If the determination result is yes, the switch channel address is marked as belonging to the intermediate transition area; if still not, it is directly determined that the switch channel address is within the range of channel 171 to channel 256 and belongs to the right pattern area. The corresponding area number is queried according to the address range matching result. If it matches the left pattern area, area number 1 is obtained; if it matches the intermediate transition area, area number 2 is obtained; if it matches the right pattern area, area number 3 is obtained.

[0142] S2.7: For each partition buffer, the FIFO queue scheduling algorithm is used to arrange the initial switch control instructions in the partition buffer into an instruction output queue according to the order of the instruction timestamp parameters in each initial switch control instruction. When multiple initial switch control instructions in the same partition buffer have the same instruction timestamp parameter, they are arranged in ascending order of switch channel address.

[0143] Furthermore, the specific steps in S2.7 include:

[0144] (1) Perform FIFO queue scheduling operation on each partition buffer in ascending order of region number, including: first process the partition buffer corresponding to region number 1, then process the partition buffer corresponding to region number 2, and finally process the partition buffer corresponding to region number 3; before scheduling a single partition buffer, clear the temporary sorting storage area corresponding to the partition buffer, reset the queue sorting pointer, set the initial position of the sorting pointer to the address of the first initial switch control instruction stored in the partition buffer, and set the sorting step length to the 64-bit storage length corresponding to a single instruction to ensure the accuracy of instruction-by-instruction traversal sorting;

[0145] (2) By stepping through the queue sorting pointer, all initial switch control instructions stored in the current partition cache are read in their entirety. The instruction timestamp parameter and switch channel address parameter contained in each initial switch control instruction are extracted one by one. The instruction timestamp parameter and switch channel address parameter are bound to the complete content of the corresponding initial switch control instruction and temporarily stored to form a temporary data set in which the instruction parameters and the instruction body correspond one-to-one.

[0146] (3) Before the sorting begins, two levels of sorting rules are fixed. The first level of sorting rules is to arrange the instructions in ascending order according to the value of the timestamp parameter. The smaller the value, the earlier the trigger time and the earlier the position in the output queue. The second level of sorting rules is to arrange the switch channel address in ascending order according to the value of the switch channel address. The smaller the address value, the earlier the position in the instruction group with the same timestamp. The determination precision of the timestamp parameter is set to microseconds. As long as there is a difference in the value, it is determined to be a different trigger time. The determination precision of the switch channel address is single channel to ensure that the address is clearly distinguished and unambiguous.

[0147] (4) For all the temporary initial switch control instructions, compare and adjust their positions one by one based on the instruction timestamp parameter. The process is as follows: starting from the first initial switch control instruction, compare the timestamp parameter value of each initial switch control instruction with the other initial switch control instructions in turn. Place the initial switch control instruction with the smallest timestamp parameter value at the front of the queue, and then arrange the initial switch control instructions with the second smallest timestamp parameter value in turn, until the initial switch control instruction with the largest timestamp parameter value is placed at the back of the current partition sorting result.

[0148] (5) After completing the first level of sorting, check whether there are multiple initial switch control instructions sharing the same instruction timestamp parameter in the output queue segment by segment. Once multiple initial switch control instructions are found to be under the same timestamp, immediately extract the switch channel address parameters corresponding to these initial switch control instructions, sort them within the group based on the address value, arrange the initial switch control instruction with the smallest switch channel address value at the front of the group, and arrange the initial switch control instructions with the address values ​​increasing sequentially backward until all initial switch control instructions in the group have been sorted in ascending order of address.

[0149] (6) All initial switch control instructions are integrated in an orderly manner according to the final order after the two-level sorting is completed, forming a stable and fixed instruction output queue. The generated instruction output queue is stored in a dedicated queue output storage area, which is independent of the data in the original partition buffer area, so as to avoid the sorting operation from causing changes to the original instruction data.

[0150] S2.8: According to the preset global synchronization clock beat, read an initial switch control instruction from the head of the instruction output queue of each partition buffer, package the read initial switch control instructions into a partition synchronization data packet, and output the partition synchronization data packet as a partition synchronization digital trigger instruction. In this embodiment, the preset global synchronization clock beat is 50 microseconds.

[0151] Furthermore, the specific steps in S2.8 include:

[0152] (1) Locate the head position of the instruction output queue of the three partitioned buffers simultaneously through the partitioned buffer mapping relationship, and lock the head of the instruction output queue of the left patterned area corresponding to area number 1, the head of the instruction output queue of the middle transition area corresponding to area number 2, and the head of the instruction output queue of the right patterned area corresponding to area number 3 respectively.

[0153] (2) Using the global synchronization clock tick as the sole trigger, at the same time point, from the head position of the instruction output queue of the three partition buffers, an initial switch control instruction is read sequentially according to the queue arrangement order. First, the first initial switch control instruction corresponding to the queue head of region number 1 is read, then the first initial switch control instruction corresponding to the queue head of region number 2 is read, and finally the first initial switch control instruction corresponding to the queue head of region number 3 is read. After reading an initial switch control instruction, the queue head pointer of the corresponding partition is immediately moved one position to the right according to the length of a single instruction, marking the position of the next instruction to be read, ensuring that the next initial switch control instruction is read in the next tick, without repeated reading or skipping instructions.

[0154] (3) Assemble the partition synchronization data packets, specifically: First, assemble the data packet header, which includes the current clock tick count of the global synchronization clock, the total length identifier of the partition synchronization data packets, the data packet generation timestamp, and the checksum field. Then assemble the data packet body, which contains the initial switch control instructions corresponding to area number 1, area number 2, and area number 3, respectively. The instructions for each partition are arranged in the packet body according to the partition number and occupy a fixed byte length. The assembly process strictly follows the preset length specification of 16 bytes for the header and 192 bytes for the body.

[0155] (4) Write the assembled partition synchronization data packet into the initialized data packet packaging buffer. Write continuously according to the current position of the partition synchronization data packet write pointer. After writing, move the partition synchronization data packet write pointer forward by 208 bytes of data packet length, mark the next writing position, and solidify the data packet content in the buffer.

[0156] (5) After confirming that the partition synchronization data packet has been written and solidified, a partition synchronization digital trigger instruction is generated. The partition synchronization digital trigger instruction contains the storage address identifier and trigger execution identifier of the partition synchronization data packet. The partition synchronization data packet and the partition synchronization digital trigger instruction are associated. The partition synchronization digital trigger instruction is used to notify the external execution module to read and execute the data packet content. Then, the partition synchronization data packet and the corresponding partition synchronization digital trigger instruction are output synchronously through the system communication interface.

[0157] The calculation process of the angle phase correction coefficient includes:

[0158] S3.1: Calculate the deviation between the transmission mechanism angle and the preset reference angle to obtain the angle deviation value, and use differential operation to differentiate the running speed to obtain the angular acceleration value;

[0159] Furthermore, the specific steps of S3.1 include:

[0160] (1) The real-time motion signal of the main shaft of the transmission mechanism is continuously collected by photoelectric incremental encoder. The A-phase signal and the B-phase signal are orthogonally decoded. The current actual angle value of the transmission mechanism is calculated based on the phase difference and the number of pulses. The acquisition process is performed once every 50 microseconds. Each acquisition uses the Z-phase signal as the absolute zero position reference to eliminate the angle accumulation error caused by long-term operation and ensure that the current actual angle value accurately reflects the real-time position status of the main shaft.

[0161] (2) The system reads the preset reference angle value from the process parameter storage area. The reference angle value is preset by the process flow of jacquard weaving and corresponds one-to-one with the weaving cycle timing beat. Each global synchronization clock beat has a unique matching reference angle value. There are a total of 4000 weaving cycle timing beats.

[0162] (3) Perform a numerical difference operation between the current actual angle value of the transmission mechanism and the preset reference angle value after locking. Subtract the preset reference angle value from the current actual angle value. The result is the angle deviation value. When the angle deviation value is positive, it means that the actual angle is ahead of the preset reference angle. When the angle deviation value is negative, it means that the actual angle is behind the preset reference angle. After the calculation is completed, store the angle deviation value in the dedicated data register.

[0163] (4) The real-time running speed of the spindle is synchronously acquired by photoelectric incremental encoder. The current running speed value is calculated based on the number of pulses output by the encoder per unit time. The speed acquisition accuracy is controlled within 0.1%. The acquisition time interval is also set to 50 microseconds to keep the time synchronized with the angle acquisition. The current running speed value after acquisition is stored in the speed buffer unit in real time.

[0164] (5) Create a continuous velocity storage unit for differential operation to store the running velocity value within the two most recent time steps. The first storage unit stores the running velocity value of the previous moment, and the second storage unit stores the running velocity value of the current moment. In the initial state, the data of the two storage units are cleared to zero. After the first operation is completed, the data is continuously updated to ensure that the data used for the operation is the effective velocity value of consecutive adjacent moments.

[0165] (6) Using a time step of 50 microseconds as the time interval for differential operation, read the previous running speed value and the current running speed value in the continuous speed storage unit, and subtract the previous running speed value from the current running speed value to obtain the change in running speed within a unit time step;

[0166] (7) The calculated change in running speed is converted into an angular acceleration value in degrees per square second according to the conversion relationship between angle and rotation speed. The conversion process is performed according to the standard rule that one revolution of the spindle corresponds to 360 degrees. The time dimension is converted into square seconds in a step of 50 microseconds. The final angular acceleration value accurately reflects the speed and trend of the spindle running speed. When the value is positive, it means that the spindle is in an accelerating state. When the value is negative, it means that the spindle is in a decelerating state.

[0167] (8) Store the calculated angle deviation value and angular acceleration value into a dedicated parameter register, and perform numerical range calibration on the two sets of data. The effective range of the angle deviation value is set to -10 degrees to 10 degrees. Data exceeding this range is judged as abnormal acquisition value and automatically removed. The angular acceleration value retains the original value according to the actual calculation result without additional restrictions.

[0168] (9) Assign the current running speed value to the speed storage unit of the previous moment.

[0169] S3.2: Based on the angular deviation value and the angular acceleration value, the feedforward compensation amount is calculated using a dynamic feedforward compensation algorithm; the transfer function of the dynamic feedforward compensation algorithm is a parallel form of velocity feedforward and acceleration feedforward.

[0170] Furthermore, the transfer function of the dynamic feedforward compensation algorithm is specifically as follows: the running speed is used as the input of the velocity feedforward quantity, and the angular acceleration value is used as the input of the acceleration feedforward quantity. The transfer function of the velocity feedforward channel is the velocity feedforward coefficient multiplied by the Laplace operator, and the transfer function of the acceleration feedforward channel is the acceleration feedforward coefficient multiplied by the square of the Laplace operator. The output of the velocity feedforward channel and the output of the acceleration feedforward channel are added together to obtain the feedforward compensation quantity output. In this embodiment, the velocity feedforward coefficient is set to 0.8, the acceleration feedforward coefficient is set to 0.3, and the Laplace operator is the prior art in this field and is not an inventive solution of this application, so it will not be described in detail here.

[0171] S3.3: Input the angle deviation value into the proportional-integral controller to obtain the feedback compensation amount. In this embodiment, the proportional gain parameter is preset to 1.2 and the integral gain parameter is preset to 0.05. The proportional-integral controller is the prior art in this field and is not an inventive solution of this application, so it will not be described in detail here.

[0172] S3.4: Add the feedforward compensation amount to the feedback compensation amount to obtain the total compensation amount, and superimpose the total compensation amount onto the unit reference coefficient to obtain the angle phase correction coefficient, wherein the unit reference coefficient is defined as 1, representing the reference phase state without compensation.

[0173] Example 3:

[0174] Please see Figure 3 In this embodiment, the angle phase correction coefficient is used to dynamically correct the phase of the partition synchronization digital trigger command, and the phase synchronization digital trigger signal is output, including:

[0175] S3.5: Obtain the partition synchronization digital trigger instruction, parse each initial switch control instruction in the partition synchronization digital trigger instruction, and extract the instruction timestamp parameter in each initial switch control instruction;

[0176] S3.6: Obtain the angle phase correction coefficient, multiply the instruction timestamp parameter by the angle phase correction coefficient, and obtain the corrected timestamp parameter;

[0177] S3.7: If the corrected timestamp parameter exceeds the preset maximum timestamp value, then the maximum timestamp value shall be used as the corrected timestamp parameter. In this embodiment, the maximum timestamp value is set to the total running time of a complete weaving cycle, i.e., 200 milliseconds.

[0178] S3.8: Replace the original instruction timestamp parameter in the initial switch control instruction with the corrected timestamp parameter to generate the corrected switch control instruction. Reorder all the corrected switch control instructions according to the corrected timestamp parameter, repackage them into a phase correction data packet, and output the phase correction data packet as a phase synchronization digital trigger signal.

[0179] Furthermore, the specific steps in S3.8 include:

[0180] (1) Read the complete instruction content one by one from the initial switch control instruction set obtained by parsing the partition synchronization digital trigger instruction, and at the same time read the corrected timestamp parameter after the angle phase correction coefficient is calculated and the amplitude limiting process is completed;

[0181] (2) Locate the fixed storage field where the original instruction timestamp parameter is located in each initial switch control instruction, clear the original value in the field, write the corrected timestamp parameter that has been limited and verified into the field, and complete the parameter replacement operation. The replacement process only modifies the instruction timestamp related fields, does not change the original values ​​of the instruction duration parameter and the instruction action type parameter, and does not destroy the overall structure of the instruction.

[0182] (3) After the parameter replacement operation is completed, the instruction containing the new timestamp parameter automatically becomes the corrected switch control instruction. All corrected switch control instructions are stored one by one in a dedicated temporary sorting storage area. The total capacity of the temporary sorting storage area is set to be able to store 256 instructions to ensure that it can accommodate all corrected switch control instructions. The temporary storage process is to store the instructions in the original processing order without changing the order of the instructions.

[0183] (4) The sorting rule is set to arrange the corrected timestamp parameter values ​​in ascending order. The smaller the value, the earlier the instruction is triggered and the earlier it is in the sequence. At the same time, the sorting pointer is initialized and the starting position of the sorting pointer is set to the first corrected switch control instruction in the temporary sorting storage area. The sorting step length is set to the 64-bit storage length corresponding to a single instruction to ensure the accuracy of instruction-by-instruction traversal comparison.

[0184] (5) By stepping through the sorting pointer, all the corrected switch control instructions in the temporary sorting storage area are traversed. The corrected timestamp parameters are used as the basis for comparison and position adjustment. Starting from the first corrected switch control instruction, the timestamp value of each corrected switch control instruction is compared with the other corrected switch control instructions. The corrected switch control instruction with the smallest timestamp value is placed at the beginning of the sequence. Then the corrected switch control instructions with the second smallest timestamp value are arranged in sequence until the corrected switch control instruction with the largest timestamp value is placed at the end of the sorting result.

[0185] (6) Write all the corrected switch control instructions after sorting into the body area of ​​the phase correction data packet in sequence. At the same time, write the current global synchronization clock tick identifier, total data packet length identifier, and checksum field into the header area of ​​the data packet. The overall length of the data packet must be strictly kept at 208 bytes.

[0186] (7) Store the packaged phase correction data packet into a dedicated output storage area, and then generate a phase synchronization digital trigger signal with the phase correction data packet as the core content.

[0187] Calculate the current deviation between the load current and the preset current threshold, and output the voltage amplitude compensation amount using a position-based PID algorithm, including:

[0188] S4.1: The load current collected by the incremental encoder is acquired in real time, and the load current is subtracted from the preset current threshold to obtain the current deviation value. In this embodiment, the preset current threshold is set according to the rated operating current of the electromagnetic relay coil used by the jacquard array multiplexer, specifically 200 mA. This value is configured during the equipment factory debugging stage and remains fixed during system operation.

[0189] S4.2: Based on the current deviation value, the initial amount of voltage amplitude compensation is calculated using a position-based PID algorithm;

[0190] Furthermore, the calculation formula of the positional PID algorithm is as follows: the initial voltage amplitude compensation is equal to the proportional coefficient multiplied by the current deviation value at the current moment, plus the integral coefficient multiplied by the sum of all current deviation values ​​from the starting moment to the current moment, plus the differential coefficient multiplied by the difference between the current deviation value at the current moment and the current deviation value at the previous moment; the proportional coefficient, integral coefficient and differential coefficient are pre-tuned by the Ziegler-Nichols tuning method, wherein the proportional coefficient tuning result is 1.5, the integral coefficient tuning result is 0.02 and the differential coefficient tuning result is 0.1, and the Ziegler-Nichols tuning method is the prior art in this field and is not an inventive solution of this application, so it will not be described in detail here.

[0191] If the initial amount of voltage amplitude compensation is greater than the preset upper limit value of compensation, then the upper limit value of compensation is used as the voltage amplitude compensation amount. In this embodiment, the preset upper limit value of compensation is determined according to the maximum safe output voltage, specifically set to 5V, in order to avoid the electromagnetic coil from overheating and being damaged due to excessive driving voltage.

[0192] If the initial amount of voltage amplitude compensation is less than the preset lower limit of compensation, then the lower limit of compensation is used as the amount of voltage amplitude compensation. In this embodiment, the preset lower limit of compensation is determined according to the minimum effective compensation amplitude of the system, specifically set to -5V, in order to avoid the compensation amplitude being too small to play a driving regulation role.

[0193] If the initial voltage amplitude compensation amount is less than or equal to the preset upper limit of compensation and greater than or equal to the preset lower limit of compensation, then the initial voltage amplitude compensation amount will be output as the voltage amplitude compensation amount.

[0194] The voltage amplitude compensation amount is used to dynamically compensate the phase synchronization digital trigger signal, and a digitally optimized drive signal is output, including:

[0195] S4.3: Analyze each corrected switching control command in the phase synchronization digital trigger signal and obtain the voltage amplitude compensation amount;

[0196] S4.4: For each corrected switch control instruction, extract its instruction action type parameter;

[0197] S4.5: When the instruction action type parameter is in a high-level active state, the voltage amplitude compensation amount is superimposed on the preset standard driving voltage amplitude to obtain the actual driving voltage amplitude.

[0198] S4.6: When the instruction action type parameter is in a low-level invalid state, the driving voltage amplitude is set to zero;

[0199] S4.7: Re-encapsulate the actual driving voltage amplitude or zero value with the corrected timestamp parameter and instruction duration parameter in the corrected switching control instruction to generate a digitally optimized driving instruction;

[0200] S4.8: Arrange all digitally optimized drive instructions according to the corrected timestamp parameters to form a digitally optimized drive signal.

[0201] The process of converting the digitally optimized drive signal into a switch on / off drive voltage to control the multi-channel switch contacts to perform a needle lifting on / off action includes:

[0202] S5.1: Obtain the digitally optimized drive signal, input each digitally optimized drive instruction to the digital-to-analog converter, and output the corresponding analog voltage value according to the actual drive voltage amplitude or zero value in the digitally optimized drive instruction. The digital-to-analog converter is the prior art in this field and is not an inventive solution of this application, so it will not be described in detail here.

[0203] S5.2: The analog voltage value is input to the input terminal of the power amplifier. The power amplifier amplifies the analog voltage value to the pull-in voltage or release voltage of the switch contacts to obtain the switch on / off driving voltage. The power amplifier is prior art in this field and is not an inventive solution of this application, so it will not be described in detail here.

[0204] In this embodiment, the power amplifier adopts a linear power amplifier circuit. The voltage amplification factor of the amplifier is fixed at 12 times during the device initialization stage. The pull-in voltage of the switch contacts is set to 24V according to the rated operating parameters of the electromagnetic relay used, and the release voltage is set to 0V. The operating mode of the power amplifier is set to voltage follower amplification mode.

[0205] Further, the specific steps of S5.2 include: acquiring the analog voltage value output by the digital-to-analog converter; sending the analog voltage value to the signal input terminal of the power amplifier; the power amplifier performing linear amplification of the input signal according to a fixed voltage amplification factor, including: after receiving the analog voltage input signal, the power amplifier immediately performs linear amplification operation according to a preset voltage amplification factor of 12. When the input analog voltage is 2V, a 24V output voltage can be obtained after 12 times amplification; when the input analog voltage is 0V, the amplified output remains 0V; determining the output of the amplified voltage according to the current command action type parameter, including: when the command is a needle lifting action execution state, the required switch contact closing voltage is 2V. The power amplifier outputs a 24V voltage after amplification as the effective driving voltage. When the command is to release the pin action, the required switch contact release voltage is 0V, and the power amplifier directly outputs a 0V voltage. The power amplifier performs voltage regulation on the amplified and judged voltage signal to form a stable amplitude and fast-response switch on / off driving voltage. This driving voltage is directly used to drive the electromagnetic coil of the switch contact. In the energized state, it outputs a stable 24V voltage to reliably energize and engage the coil. In the released state, it outputs a 0V voltage to reliably de-energize and release the coil. During the output of the switch on / off driving voltage, the power amplifier continuously maintains the current amplification state and output amplitude until it receives the next analog voltage input signal.

[0206] S5.3: Apply the switch on / off drive voltage to both ends of the electromagnetic coil of the switch contact at the corresponding switch channel address;

[0207] S5.4: Based on the corrected timestamp parameter in the digitally optimized drive instruction, the switch on / off drive voltage is turned on or off at a specified time, and the switch contacts are controlled to perform a pull-in holding or release reset action for the duration specified by the instruction duration parameter.

[0208] The step of updating the angle phase correction coefficient and voltage amplitude compensation amount based on real-time collected feedback parameters includes:

[0209] S5.5: Real-time acquisition of contact on / off status, vibration interference parameters, and ambient temperature and humidity parameters as feedback parameters;

[0210] S5.6: Obtain the angle phase correction coefficient and voltage amplitude compensation amount at the current moment;

[0211] S5.7: Based on the contact on / off state and the vibration interference parameters, a correlation analysis method is used to calculate the correlation coefficient between the vibration interference parameters and the state change of the contact on / off state; the state change of the contact on / off state is the result of an XOR logic operation between the contact on / off state at the current moment and the contact on / off state at the previous moment.

[0212] Further, the correlation coefficient is calculated as follows: A vibration interference parameter sequence and a contact on / off state sequence are collected for N consecutive time points, with N being an integer greater than or equal to 10; the vibration interference parameter sequence is normalized to obtain a normalized vibration sequence; the contact on / off state sequence is binary encoded, with high-level states encoded as 1 and low-level states encoded as 0, to obtain a state encoding sequence; the Pearson correlation coefficient between the normalized vibration sequence and the state encoding sequence is calculated, thus obtaining the correlation coefficient. The formula for calculating the Pearson correlation coefficient is existing technology in this field and is not an inventive solution of this application, and will not be elaborated upon here.

[0213] S5.8: When the correlation coefficient exceeds the preset correlation coefficient threshold, it is determined that the vibration interference has caused the contact on / off state to switch unexpectedly, and an angle correction trigger flag is generated. In this embodiment, the correlation coefficient threshold is obtained by actual measurement and calibration based on the vibration interference tolerance level of the jacquard equipment under typical textile working conditions, and is specifically set to 0.8. This threshold is set during the equipment factory debugging stage and is not changed during system operation.

[0214] S5.9: In response to the angle correction trigger flag, re-execute the dynamic feedforward compensation algorithm, use the vibration interference parameter as the feedforward input, recalculate the angle phase correction coefficient, and update the original angle phase correction coefficient with the newly calculated angle phase correction coefficient.

[0215] S5.10: Based on the ambient temperature and humidity parameters and the load current, use a lookup table method to query the pre-stored ambient temperature and humidity-current compensation mapping table to obtain the environmental compensation coefficient;

[0216] Furthermore, the construction method of the environmental temperature and humidity-current compensation mapping table is as follows: In a laboratory environment, multiple temperature gradients and multiple humidity gradients are set, and each temperature gradient and each humidity gradient is combined to form a test point; at each test point, the minimum driving current value required for the switch contacts to normally engage is measured and recorded as the standard engagement current value; using the environmental temperature value and environmental humidity value as two-dimensional indexes, and the ratio of the standard engagement current value to the preset reference current value as the environmental compensation coefficient, a two-dimensional array-form mapping table is constructed; the lookup method is specifically as follows: based on the temperature value and relative humidity value in the currently collected environmental temperature and humidity parameters, bilinear interpolation is performed in the mapping table to obtain the environmental compensation coefficient under the current environment.

[0217] S5.11: Multiply the environmental compensation coefficient by the voltage amplitude compensation amount at the current moment to obtain the updated voltage amplitude compensation amount.

[0218] The embodiments of the present invention have been described above with reference to the accompanying drawings. However, the present invention is not limited to the specific embodiments described above. The specific embodiments described above are merely illustrative and not restrictive. Those skilled in the art can make changes, modifications, substitutions and variations to the above embodiments under the guidance of the present invention without departing from the spirit and scope of the present invention. All of these variations are within the protection scope of the present invention.

Claims

1. A high-frequency coordinated control method for multiple switches in a jacquard array, characterized in that, include: Digital analysis is performed based on the preset knitting pattern program to obtain the control timing data of the multi-channel switch array, the needle lifting action logic table and the area division code. Simultaneously, the number of control channels, the angle of the transmission mechanism, the running speed and the load current are collected through the incremental encoder. Based on the digital analysis results and the number of control channels, the initial switch control command is generated by the program, and the initial switch control command is partitioned, cached, and scheduled in a FIFO queue according to the control area, and the partitioned synchronous digital trigger command is output. Calculate the angle deviation between the transmission mechanism angle and the preset reference angle, perform dynamic feedforward compensation in combination with the running speed, obtain the angle phase correction coefficient, use the angle phase correction coefficient to perform dynamic phase correction on the partition synchronization digital trigger command, and output the phase synchronization digital trigger signal. The current deviation between the load current and the preset current threshold is calculated, and a position-based PID algorithm is used to output the voltage amplitude compensation amount. The voltage amplitude compensation amount is used to dynamically compensate the amplitude of the phase synchronization digital trigger signal, and a digitally optimized drive signal is output. The digitally optimized drive signal is converted into a switch on / off drive voltage to control the multi-channel switch contacts to perform the needle lifting on / off action, and the angle phase correction coefficient and voltage amplitude compensation amount are updated according to the real-time collected feedback parameters; the feedback parameters include contact on / off state, vibration interference parameters, and ambient temperature and humidity parameters.

2. The high-frequency coordinated control method for multiple switches in a jacquard array as described in claim 1, characterized in that, The process involves digital analysis based on a preset knitting pattern program to obtain multi-channel switch array control timing data, needle lifting action logic table, and area division encoding, including: Based on the preset knitting pattern program, read the lifting needle dot matrix data of each row in the knitting pattern program; Based on the needle matrix data, channel control timing data corresponding to the on / off time and on / off duration of each switch channel within a knitting cycle is generated by matrix transpose operation; Based on the channel control timing data, a logic state mapping method is used to map the high-level valid state of each switch channel to the needle lifting action execution state, and the low-level invalid state to the needle lifting action release state, thereby constructing a needle lifting action logic table with the switch channel address as the row index and the timing beat as the column index. Based on the pattern area identifier in the pattern weaving program, extract the switch channel address range corresponding to different pattern areas and generate a region division code with the region number as the primary key. The channel control timing data, the needle lifting action logic table, and the region division code are output as digital parsing results.

3. The high-frequency coordinated control method for multiple switches in a jacquard array as described in claim 2, characterized in that, The process of generating initial switch control commands through program analysis based on digital analysis results and the number of control channels includes: Obtain the channel control timing data and needle lifting action logic table from the digital analysis results, and obtain the number of control channels acquired by the incremental encoder; Using the number of control channels as the upper limit, a loop traversal program is used to traverse the switch channel address corresponding to each row index in the needle lifting action logic table. For the currently traversed switch channel address, based on the on / off time and on / off duration corresponding to the switch channel address in the channel control timing data, an instruction encoding generation function is used to convert the on / off time into an instruction timestamp parameter, the on / off duration into an instruction duration parameter, and the corresponding logic state in the needle lifting action logic table into an instruction action type parameter. The instruction timestamp parameter, instruction duration parameter, and instruction action type parameter are then encapsulated into an initial switch control instruction. Repeatedly traverse all switch channel addresses to generate the same number of initial switch control commands as the number of control channels.

4. The high-frequency coordinated control method for multiple switches in a jacquard array as described in claim 3, characterized in that, The initial switch control command is partitioned, buffered, and scheduled in a FIFO queue according to the control area, and the partitioned synchronization digital trigger command is output, including: Obtain the region division code; the region division code includes at least one region number and the switch channel address range corresponding to each region number; Based on the region number, establish a partitioned cache area that corresponds one-to-one with the region number; Traverse all initial switch control instructions, extract the switch channel address contained in each initial switch control instruction, query the region number corresponding to the switch channel address range to which the switch channel address belongs, and store the initial switch control instruction into the partition cache area corresponding to the region number. For each partition buffer, the FIFO queue scheduling algorithm is used to arrange the initial switch control instructions in the partition buffer into an instruction output queue according to the order of the instruction timestamp parameters in each initial switch control instruction. When multiple initial switch control instructions in the same partition buffer have the same instruction timestamp parameter, they are arranged in ascending order of switch channel address. According to the preset global synchronization clock beat, an initial switch control instruction is read from the head of the instruction output queue of each partition buffer. The read initial switch control instructions are packaged into a partition synchronization data packet, and the partition synchronization data packet is output as a partition synchronization digital trigger instruction.

5. The high-frequency coordinated control method for multiple switches in a jacquard array as described in claim 4, characterized in that, The calculation process of the angle phase correction coefficient includes: The deviation between the transmission mechanism angle and the preset reference angle is calculated to obtain the angle deviation value, and the angular acceleration value is obtained by differentiating the running speed using differential operation; Based on the angular deviation value and the angular acceleration value, a dynamic feedforward compensation algorithm is used to calculate the feedforward compensation amount; the transfer function of the dynamic feedforward compensation algorithm is a parallel form of velocity feedforward and acceleration feedforward. The angle deviation value is input into the proportional-integral controller to obtain the feedback compensation amount; The feedforward compensation amount is added to the feedback compensation amount to obtain the total compensation amount, and the total compensation amount is superimposed on the unit reference coefficient to obtain the angle phase correction coefficient.

6. The high-frequency coordinated control method for multiple switches in a jacquard array as described in claim 5, characterized in that, The phase of the partition synchronization digital trigger command is dynamically corrected using the aforementioned angle phase correction coefficient, and a phase synchronization digital trigger signal is output, including: Obtain the partition synchronization digital trigger instruction, parse each initial switch control instruction in the partition synchronization digital trigger instruction, and extract the instruction timestamp parameter in each initial switch control instruction; Obtain the angle phase correction coefficient, multiply the instruction timestamp parameter by the angle phase correction coefficient to obtain the corrected timestamp parameter. If the corrected timestamp parameter exceeds the preset timestamp maximum value, then the timestamp maximum value is used as the corrected timestamp parameter. The original instruction timestamp parameter in the initial switch control instruction is replaced with the corrected timestamp parameter to generate the corrected switch control instruction. All the corrected switch control instructions are then reordered according to the corrected timestamp parameter and repackaged into a phase correction data packet. The phase correction data packet is then output as a phase synchronization digital trigger signal.

7. The high-frequency coordinated control method for multiple switches in a jacquard array as described in claim 6, characterized in that, Calculate the current deviation between the load current and the preset current threshold, and output the voltage amplitude compensation amount using a position-based PID algorithm, including: The load current collected by the incremental encoder is acquired in real time, and a preset current threshold is subtracted from the load current to obtain the current deviation value. Based on the current deviation value, the initial amount of voltage amplitude compensation is calculated using a position-based PID algorithm; If the initial voltage amplitude compensation amount is greater than the preset compensation upper limit value, then the compensation upper limit value is used as the voltage amplitude compensation amount; If the initial voltage amplitude compensation amount is less than the preset compensation lower limit, then the compensation lower limit will be used as the voltage amplitude compensation amount. If the initial voltage amplitude compensation amount is less than or equal to the preset upper limit of compensation and greater than or equal to the preset lower limit of compensation, then the initial voltage amplitude compensation amount will be output as the voltage amplitude compensation amount.

8. The high-frequency coordinated control method for multiple switches in a jacquard array as described in claim 7, characterized in that, The voltage amplitude compensation amount is used to dynamically compensate the phase synchronization digital trigger signal, and a digitally optimized drive signal is output, including: Analyze each corrected switching control command in the phase synchronization digital trigger signal and obtain the voltage amplitude compensation amount; For each corrected switch control instruction, extract its instruction action type parameter; When the instruction action type parameter is in a high-level active state, the voltage amplitude compensation is superimposed on the preset standard driving voltage amplitude to obtain the actual driving voltage amplitude. When the instruction action type parameter is in a low-level invalid state, the driving voltage amplitude is set to zero; The actual driving voltage amplitude or zero value is re-encapsulated with the corrected timestamp parameter and instruction duration parameter in the corrected switching control instruction to generate a digitally optimized driving instruction. All digitally optimized drive instructions are arranged in the corrected timestamp parameter sequence to form a digitally optimized drive signal.

9. The high-frequency coordinated control method for multiple switches in a jacquard array as described in claim 8, characterized in that, The process of converting the digitally optimized drive signal into a switch on / off drive voltage to control the multi-channel switch contacts to perform a needle lifting on / off action includes: The digitally optimized drive signal is acquired, and each digitally optimized drive instruction is input to the digital-to-analog converter. The digital-to-analog converter outputs the corresponding analog voltage value according to the actual drive voltage amplitude or zero value in the digitally optimized drive instruction. The analog voltage value is input to the input terminal of the power amplifier, which amplifies the analog voltage value to the pull-in voltage or release voltage of the switch contacts to obtain the switch on / off drive voltage; Apply the switching drive voltage to both ends of the electromagnetic coil of the switch contact corresponding to the switch channel address; Based on the corrected timestamp parameter in the digitally optimized drive instruction, the switch on / off drive voltage is turned on or off at a specified time, and the switch contacts are controlled to perform a pull-in or release reset action for the duration specified by the instruction duration parameter.

10. The high-frequency coordinated control method for multiple switches in a jacquard array as described in claim 9, characterized in that, The step of updating the angle phase correction coefficient and voltage amplitude compensation amount based on real-time collected feedback parameters includes: Real-time acquisition of contact on / off status, vibration interference parameters, and ambient temperature and humidity parameters as feedback parameters; Obtain the angle phase correction coefficient and voltage amplitude compensation amount at the current moment; Based on the contact on / off state and the vibration interference parameters, a correlation analysis method is used to calculate the correlation coefficient between the vibration interference parameters and the state change of the contact on / off state; the state change of the contact on / off state is the result of an XOR logical operation between the current contact on / off state and the previous contact on / off state. When the correlation coefficient exceeds the preset correlation coefficient threshold, it is determined that the vibration interference has caused an unexpected switch in the contact on / off state, and an angle correction trigger flag is generated. In response to the angle correction trigger flag, the dynamic feedforward compensation algorithm is re-executed, using the vibration interference parameter as the feedforward input, the angle phase correction coefficient is recalculated, and the original angle phase correction coefficient is updated with the newly calculated angle phase correction coefficient. Based on the ambient temperature and humidity parameters and the load current, the environmental compensation coefficient is obtained by looking up the pre-stored ambient temperature and humidity-current compensation mapping table using the table lookup method. The updated voltage amplitude compensation is obtained by multiplying the environmental compensation coefficient by the voltage amplitude compensation amount at the current moment.

11. The high-frequency coordinated control method for multiple switches in a jacquard array as described in claim 10, characterized in that, The incremental encoder is a photoelectric incremental encoder, which is installed at the end of the main shaft of the transmission mechanism. The incremental encoder outputs three signals, namely A-phase signal, B-phase signal and Z-phase signal. The A-phase signal and B-phase signal are 90 degrees out of phase with each other and are used to detect the angle and running speed of the transmission mechanism. The Z-phase signal outputs one pulse for each revolution of rotation as an absolute angle zero position reference.

12. The high-frequency coordinated control method for multiple switches in a jacquard array as described in claim 11, characterized in that, The multi-channel switch array is a matrix relay array used in electromagnetic devices. The row lines of the matrix relay array are connected to the address selection terminals of the switch channels, and the column lines are connected to the common terminals of the drive coils of the switch contacts. The individual switch contacts are independently addressed and controlled by a combination of row selection signals and column selection signals. The number of control channels is the product of the number of row lines and the number of column lines.

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