Triplex-in triplex-out optical arithmetic chip

By designing a hexahedral pyramidal cube structure optical computing chip, and employing a fixed eccentric optical path and dual filtering technology, the latency and heat generation problems of traditional electronic CPUs are solved, achieving high stability and compatibility, supporting multiple packaging forms, and suitable for high-speed computing and optical communication.

CN122431490APending Publication Date: 2026-07-21申志远
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
申志远
Filing Date
2026-04-17
Publication Date
2026-07-21

AI Technical Summary

Technical Problem

Traditional electronic CPUs suffer from problems such as high latency, high heat generation, significant crosstalk, and prominent integration bottlenecks, making it difficult to meet the demands of next-generation ultra-high-speed computing. Existing optical computing devices have complex structures, are prone to optical path deviation, suffer from significant stray light interference, have poor compatibility, and are difficult to manufacture, making industrialization challenging.

Method used

The optical computing chip adopts a hexahedral pyramidal cube structure and features a fixed eccentric optical path, independent channels, and dual filtering to achieve crosstalk-free, low-loss, and highly stable optical computing. It is compatible with traditional electronic chip integration and uses sapphire as the material. Through an 18° outward eccentric optical path design, laser emission stabilization, photoelectric reception and conversion, and dual filtering, it ensures stable signal transmission.

Benefits of technology

It achieves high-speed and stable optical logic operations, reduces heat dissipation and interference, has high stability and compatibility, supports multiple packaging forms, is suitable for high-speed computing and optical communication, and has complete engineering implementation capabilities.

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Abstract

The application discloses a three-in-three-out hexagonal pyramid cube light operation CPU (central processing unit) chip, adopts an integrated sapphire carrier structure, and light paths linearly pass through the carrier and are offset by 18 degrees relative to the geometric center of the carrier, and three-color laser of 650nm red light, 550nm green light and 450nm blue light are matched to realize parallel light operation without crosstalk. The chip directly outputs 0 / 1 digital logic through light beam on-off, signal transmission is stable and complete, low heat, high reliability, anti-interference, easy to mass production, and can be compatible and integrated with traditional electronic chips, and is suitable for the field of new generation photonic computing.
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Description

Technical Field

[0001] This invention belongs to the technical field of optoelectronic integrated chips and optical computing CPU chips (central processing units), specifically relating to a three-in-three-out hexahedral pyramidal cube optical computing chip. The chip supports multiple optical path modes, including one-in-one-out, two-in-two-out, and three-in-three-out. Through laser emission stabilization, photoelectric reception conversion, and dual filtering and shielding structures, it achieves high-speed, stable, and complete optical logic operations, and can be widely used in high-speed computing, optical communication, and optoelectronic integrated systems. Sapphire is the preferred material for the carrier, but various high-transmittance optical crystals can also be used. The optical path is a straight line piercing through the chip at an 18° deviation from the geometric center, resulting in high processing precision and good mass production capabilities. The size can be flexibly adjusted according to the application scenario, domestic processing level, and the precision of the laser transceiver devices, and it is compatible with various packaging forms and installation environments. The chip has low optical loss, strong anti-interference capabilities, a wide operating temperature range, and can operate in tandem with traditional electronic chips. Background Technology

[0002] Traditional electronic CPUs rely on electronic transmission to perform calculations, which suffers from problems such as high latency, high heat generation, significant crosstalk, and prominent integration bottlenecks, making it difficult to meet the needs of next-generation ultra-high-speed computing. Summary of the Invention

[0003] Existing optical computing devices generally suffer from drawbacks such as complex structure, easy optical path deviation, large stray light interference, poor compatibility, and high processing difficulty, making industrialization difficult.

[0004] This invention proposes an integrated hexahedral pyramidal cube optical computing core. Through structural designs such as fixed eccentric optical path, independent channel, and dual filtering, it achieves crosstalk-free, low-loss, and highly stable optical computing. It can be directly integrated with electrical chips and has complete engineering implementation capabilities.

[0005] The present invention aims to provide a highly stable optical computing CPU chip (central processing unit) with regular structure, adjustable size, no crosstalk, low heat dissipation, anti-interference, mature technology, and mass production capability.

[0006] The chip solves industry pain points such as optical path crosstalk, offset, size adaptation, heat dissipation, and lifespan matching by adopting an 18° outward offset optical path design and combining technologies such as independent transmission of three-color lasers, dual filtering, conical light shielding, and synchronous transmission and reception.

[0007] The three optical paths operate independently in parallel, which can linearly increase computing power. The optical paths pass through the carrier in a straight line without deflection or cross reflection. The 18° eccentricity angle error is ≤±0.1°. Digital logic is directly output by optical transmission and interruption. The signal transmission is stable and complete, and the physical principle is clear and reliable.

[0008] Figure 1This is a schematic diagram illustrating the chip's workflow in this embodiment of the invention. It visually demonstrates the complete path of optical signal input, transmission, processing, and output, helping to explain the chip's working principle and operating logic. 1 is the A1 input port, corresponding to the laser emitter, which is the incident position of the three-color laser. It is equipped with a conical focusing and light-shielding anti-interference structure to achieve initial focusing and stray light filtering. 2 is the core transmission link, which is the straight-line transmission path of the beam through the carrier, sequentially passing through the emission stabilization, incident filtering, core carrier, and output filtering stages. 3 is the A2 output port, corresponding to the photosensitive receiver, which completes photoelectric conversion and outputs digital logic signals. 4 is the chip's peripheral structure, compatible with conventional integrated circuit packaging and mounting methods, ensuring the chip's operational stability.

[0009] Core carrier structure The chip carrier has a hexahedral pyramidal-cubic structure, with each of the six sides featuring an outwardly convex conical shape. It is precision-machined as a single piece, without splicing, cracks, or internal stress. Sapphire is the preferred material, but other high-transmittance optical crystals can be used as equivalent substitutes. The carrier has a regular shape and is highly compatible with traditional chip packaging specifications.

[0010] Carrier size adaptation The carrier size is not fixed and can be flexibly adjusted according to the domestic optical processing level, laser wavelength, and assembly precision of transceiver devices, adapting to different environments such as computers, embedded devices, and industrial modules. Performance and stability remain unaffected after adjustment. High-precision processing is employed to ensure surface quality and dimensional accuracy meet the requirements for stable optical transmission.

[0011] Compatibility with the same structure as the electrical chip This optical computing CPU chip (central processing unit) can achieve compatibility with traditional electronic chips in terms of packaging, installation, and layout, and can be optoelectronically coordinated. It can match existing installation space, has no electromagnetic or optical interference, can be directly integrated, and has high industrial feasibility.

[0012] Optical path, filtering and anti-interference design The incident end is equipped with a conical focusing structure and a high light-absorbing coating to achieve initial light filtering; the three optical paths, the focusing structure and the filter funnel are all integrally formed with the carrier, forming a continuous homogeneous optical medium.

[0013] The three optical paths are uniformly offset outwards by 18° from their geometric centers, with the beam spacing greater than the beam diameter, thus structurally eliminating crosstalk. 18° is the optimal angle that balances no crosstalk, low loss, and ease of fabrication.

[0014] The output end adopts a secondary depth filter structure to further improve signal purity; both the transmitting and receiving ends are equipped with a conical light-shielding structure, which only allows the axial direct light to pass through, greatly suppressing stray light and electromagnetic interference.

[0015] The three-color lasers have independent channels, independent transmission, independent calculation, and independent output, with precise timing synchronization and stable and reliable operation.

[0016] The optical path channel of this invention can be configured in the following modes as needed: 1. One input and one output: Simple structure, meeting basic computing needs; 2. Two inputs and two outputs: Minimal crosstalk, significantly improved computing power; 3. Three inputs and three outputs: Independent channels with no interference, optimal parallel computing power, the preferred implementation method for this chip.

[0017] The laser emitter stabilization mechanism uses a long-life industrial laser diode, coupled with APC automatic power control and ATC automatic temperature control in a dual closed-loop system. 1. Wavelength locking: 650nm, 550nm, 450nm, drift ≤ ±1nm; 2. Power stability: fluctuation ≤ 0.5%, no sudden flicker; 3. High-frequency response: supports continuous high-speed triggering; 4. Precise alignment: the emitting surface and the incident surface are parallel at the micrometer level, matching an 18° off-center optical path.

[0018] The photodiode receiver mechanism uses a PIN photodiode of the same grade and lifespan as the transmitter to achieve strict synchronization between the transceiver devices. 1. Highly consistent response speed with no loss differences or timing deviations; 2. Stable and reliable optical signal transmission with no timing errors or data loss; 3. Precise alignment of the photosensitive surface and the output surface, achieving complete reception of the entire light spot; 4. Possesses wavelength selective recognition capability, strong anti-interference ability, and extremely low photoelectric conversion distortion.

[0019] The chip generates only a small amount of heat in the photoelectric conversion process, with about 10%–20% of light energy being converted into heat energy, resulting in extremely low temperature rise per unit. Even after large-scale integration, the overall temperature rise is still far lower than that of traditional electronic chips, enabling long-term stable operation under high load and wide temperature range, thus breaking through the high-heat bottleneck of electronic CPUs.

[0020] End-to-end working principle After being stabilized, the laser beam is formed into a standard beam. After being filtered by the incident focusing system, it passes through the carrier in a straight line at an 18° outward offset. Within an independent channel, it transmits stably without deflection or cross-reflection. After further depth filtering at the output end, it reaches the receiving device, where it completes photoelectric conversion and outputs a 0 / 1 logic signal. The entire signal transmission is stable and complete, without the high heat loss caused by electron flow, and can be packaged and used collaboratively with traditional electronic chips. Beneficial effects

[0021] The beneficial effects of this invention include: 1. The patent protection is comprehensive, making the technical solution difficult to circumvent and imitate; 2. The 18° eccentric optical path design is scientific and rigorous, with no crosstalk and low loss; 3. The process is mature, compatible with commonly used optical materials such as sapphire, and can be mass-produced with controllable costs; 4. The carrier size can be flexibly adapted to different application scenarios, with stable structure and good performance consistency.

[0022] This invention also has the following advantages: 1. Seamlessly compatible with traditional electronic chips, making system modification easy; 2. Three-channel independent parallel operation significantly improves computing power and efficiency; 3. Dual filtering + conical shading anti-interference design ensures stable and reliable signal transmission; 4. Low-heat operation throughout the entire chain, with outstanding stability under high integration; 5. Wide operating temperature range, suitable for industrial, civilian, and scientific research needs. Detailed Implementation

[0023] The specific embodiments of the present invention are as follows: 1. Utilizing sapphire optical crystals, a one-piece hexahedral pyramidal cube carrier is fabricated without splicing or welding. Dimensions are flexibly customized based on application scenarios, processing conditions, and laser transceiver accuracy. Surface polishing achieves Ra≤1nm. 2. A one-piece molding process is employed, including an incident cone-shaped focusing cavity, a high-absorption coating, an exit focusing cone, and an inverted funnel structure. The optical path is precisely calibrated to deviate 18° from the center point, with tolerances controlled within ±0.1°. 3. A three-color laser diode, APC+ATC dual closed-loop stabilization circuit, and synchronously matched PIN photodiode are packaged and assembled to achieve parallel alignment calibration of the optical path. 4. Laser output power, operating wavelength, and optical signal threshold are adjusted to verify chip performance, heat dissipation, and optoelectronic compatibility. 5. Wide-temperature cycling reliability testing is conducted to ensure the chip meets the requirements for long-term stable industrial operation.

Claims

1. A three-input, three-output hexahedral pyramidal cube optical computing CPU chip (central processing unit), characterized in that: It includes a one-piece hexahedral pyramidal cube optical carrier, three sets of independent optical input and output channels, and three routes that pass through each other in straight lines offset from the geometric center of the carrier by 18°, without crossing, overlapping, or crosstalk, to achieve highly stable parallel optical computing.

2. The chip according to claim 1, characterized in that: The optical path eccentricity angle is fixed at 18°, with an angle error ≤ ±0.1°; the beam spacing is greater than the beam diameter, structurally eliminating stray light and crosstalk.

3. The chip according to claim 1, characterized in that: It employs three independent lasers of 650nm, 550nm, and 450nm, with wavelength drift ≤ ±1nm; the optical path is straight-line transmission, without deflection, cross-reflection, optical path coupling, or crosstalk.

4. The chip according to claim 1, characterized in that: It achieves 0 / 1 logic operations entirely through optical switching, without the need for electronic transistors, resulting in low latency, low heat generation, high speed, and high stability.

5. The chip according to claim 1, characterized in that: The carrier uses sapphire as the primary material and is manufactured using a one-piece precision machining process. It is seamless, crack-free, and stress-free, and can be adapted to existing electronic chip packaging specifications, making it easy for industrial integration and production.