An inverter fault recording method and device based on multi-stage adaptive period and multi-cache

Abstract

The application discloses a kind of based on multistage self-adapting period and multibuffer inverter fault recording method and system, it is related to inverter fault recording technical field.For the problem that traditional fixed cycle recording cannot consider data details and long-term development trend at fault time, and single cache area cannot respond to continuous fault recording request during data writing, the application adopts BN independent recording cache area (BN≥2), and realizes multi-fault continuous recording by one-way state switching of idle-recording-writing-refreshing;Meanwhile, the recording data is divided into LN levels (LN≥2), the closer the data time is to the fault time, the smaller the recording period is. After recording is completed, the complete data set is written into nonvolatile memory, and transmitted to EMS system or PC end through RS485 bus, supporting cloud and local multi-terminal data analysis. The application greatly improves the accuracy and timeliness of inverter fault diagnosis, and guarantees the stable operation of power system.

Description

Technical Field

[0001] This invention relates to the field of inverter fault recording technology, and in particular to an inverter fault recording method and apparatus based on multi-level adaptive cycles and multiple buffers. Background Technology

[0002] Inverters play a core role in energy conversion in energy storage and new energy power generation systems, and their operational stability directly affects the safety and efficiency of the entire system. During inverter operation, fault protection may be triggered by factors such as voltage surges, current overshoots, abnormal temperatures, and grid frequency fluctuations. Although fault alarm flags can indicate that a certain parameter has exceeded a threshold, they cannot reveal the root cause of the fault. Therefore, fault recording technology is widely used in inverters. By periodically recording key parameter data points before and after a fault occurs, it helps engineers analyze the cause of the fault, locate the root cause of the problem, and optimize control strategies.

[0003] Currently, common inverter fault recording schemes use a fixed-period data recording method. This scheme has significant drawbacks: if the fixed period is short, although it can record detailed data near the fault, the total recording time is short due to the limited storage capacity of the equipment, making it difficult to fully observe the development trend of the fault from its inception to its triggering; if the fixed period is long, it may lose key data details immediately adjacent to the fault moment, making it impossible to accurately analyze the cause of the fault. In addition, existing schemes usually use a single buffer for data recording. When fault recording is triggered, the buffer needs to continue recording data after the fault and write the recorded data to non-volatile memory. During this period, it cannot respond to new fault recording requests, which can easily lead to the loss of recording data for multiple consecutive or cascading faults, seriously affecting the completeness and reliability of fault diagnosis.

[0004] Therefore, there is an urgent need for an inverter fault recording method that can take into account both data details and trend observation, and support continuous recording of multiple faults. Summary of the Invention

[0005] To address this, embodiments of the present invention provide an inverter fault recording method and apparatus based on multi-level adaptive cycles and multiple buffers, which solves the problems in the prior art where fixed-cycle recording cannot simultaneously take into account the data details at the fault moment and the observation of the fault development trend, and where a single buffer cannot respond to multiple consecutive fault recording requests during the recording writing period.

[0006] To address the aforementioned technical problems, this invention provides an inverter fault recording method based on multi-level adaptive cycles and multiple buffers, applied to an inverter fault recording system. The system includes a recording buffer unit and a non-volatile memory. The method includes the following steps: Step S1: Initialize BN independent waveform recording buffers, set the initial state of each buffer to the idle state, and initialize the buffer index and the idle buffer count, where BN is an integer and BN≥2; Step S2: Read the idle buffer count in real time. When the number of idle buffers is not 0, control all idle buffers to refresh the real-time operating data of the inverter in a preset minimum recording cycle. Step S3: When an inverter fault trigger signal is detected, select an idle buffer according to the current buffer index, update the state of the buffer to the waveform recording state, increment the buffer index by 1 in a loop, and decrement the idle buffer count by 1. Step S4: Based on the preset LN-level adaptive waveform recording cycle rule, filter out the waveform recording data before the fault from the real-time running data that has been refreshed and stored in the buffer area in the waveform recording state, where LN is an integer and LN≥2. The LN-level adaptive waveform recording cycle rule is: the closer the time corresponding to the data is to the time of the fault, the smaller the waveform recording cycle is used. Step S5: According to the LN-level adaptive recording cycle rule, continue to record the inverter operation data after the fault in the buffer area that is in the recording state until the preset recording termination condition is met. Step S6: Update the state of the buffer in the waveform recording state to the data writing state, integrate the pre-fault waveform recording data and post-fault waveform recording data stored in the buffer into a complete fault waveform recording dataset, and write it into the non-volatile memory. Step S7: When a feedback signal indicating that the fault recording dataset has been written is detected, the status of the buffer is updated to refresh status, and all data in the buffer is refreshed once using the preset minimum recording cycle. Step S8: After the cache data is refreshed, update the status of the cache to idle and increment the idle cache count by 1.

[0007] Preferably, in step S1, the total capacity of the BN waveform recording buffers is determined based on the maximum length of a single fault waveform recording data and the value of BN. The value of BN is calculated by the total storage capacity of the inverter device and the average write efficiency of the fault waveform recording data to the non-volatile memory.

[0008] Preferably, in step S4, the LN-level adaptive recording cycle rule is as follows: the time axis before and after the fault time is divided into LN consecutive time intervals, each time interval corresponds to a fixed recording cycle, and the further the starting time of the time interval is from the fault time, the corresponding recording cycle increases linearly or exponentially.

[0009] Preferably, in step S3, the method for selecting a free cache area based on the current cache area index is as follows: select the first cache area that is free in ascending order of cache area index.

[0010] Preferably, in step S5, the preset recording termination condition is: after recording a preset number of fault data points according to the LN-level adaptive recording cycle rule.

[0011] Preferably, in step S6, the fault waveform dataset written to the non-volatile memory also includes the absolute timestamp of the fault occurrence, the fault type code, and the corresponding buffer number information.

[0012] Preferably, the method further includes step S9: transmitting the fault waveform dataset stored in the non-volatile memory to an external device via an RS485 bus. The external device includes an EMS system based on an ARM platform and a PC desktop application. The EMS system stores the fault waveform dataset to an SD card or transmits it to a cloud server, and finally performs data plotting, display, and analysis on a mobile terminal. The PC desktop application stores the fault waveform dataset to a local hard drive and performs data plotting, display, and analysis.

[0013] Preferably, the inverter is an energy storage inverter in an energy storage system, and the real-time operating data of the inverter includes at least one of grid voltage, grid current, DC-side voltage, DC-side current, power module temperature, and grid frequency.

[0014] Preferably, the state of each buffer can only switch unidirectionally in the order of idle state → waveform recording state → data writing state → refresh state → idle state, and any reverse state jump is prohibited.

[0015] This invention also provides an inverter fault recording device based on multi-level adaptive cycles and multiple buffers. This device is used to execute the aforementioned inverter fault recording method based on multi-level adaptive cycles and multiple buffers, specifically including: The buffer initialization module is used to initialize BN independent waveform recording buffers, set the initial state of each buffer to the idle state, and initialize the buffer index and the idle buffer count, where BN is an integer and BN≥2; The data refresh module is used to read the count of the idle buffer in real time. When the number of idle buffers is not 0, it controls all idle buffers to refresh and store the real-time running data of the inverter in a preset minimum recording cycle. The fault detection and buffer allocation module is used to select an idle buffer based on the current buffer index when an inverter fault trigger signal is detected, update the status of the buffer to the waveform recording status, increment the buffer index by 1 in a loop, and decrement the idle buffer count by 1. The hierarchical waveform recording module is used to filter out pre-fault waveform recording data from the real-time operating data that has been refreshed and stored in the waveform recording buffer based on a preset LN-level adaptive waveform recording cycle rule, where LN is an integer and LN≥2. The LN-level adaptive waveform recording cycle rule is: the closer the time corresponding to the data is to the fault time, the smaller the waveform recording cycle is used; and according to the LN-level adaptive waveform recording cycle rule, continue to record inverter operating data after the fault in the waveform recording buffer until the preset waveform recording termination condition is met. The data writing module is used to update the state of the buffer in the waveform recording state to the data writing state, integrate the pre-fault waveform recording data and post-fault waveform recording data stored in the buffer into a complete fault waveform recording dataset, and write it into the non-volatile memory. The cache reset module is used to update the status of the cache area to refresh state when a feedback signal indicating that the fault recording dataset has been written is detected, and refresh all the data in the cache area once with the preset minimum recording cycle; and after the data in the cache area has been refreshed, update the status of the cache area to idle state and increment the idle cache area count by 1.

[0016] As can be seen from the above technical solutions, this invention application has the following beneficial effects: First, this invention employs an LN-level adaptive recording period design, using a smaller recording period closer to the fault occurrence and a larger period further away. With limited storage capacity, it can record crucial transient data details of the fault with microsecond-level precision, while also covering the long-term development process of tens of seconds before the fault occurs, providing comprehensive data support for accurately tracing the root cause of the fault.

[0017] Secondly, this invention utilizes BN independent waveform recording buffers and a one-way state switching mechanism of idle → waveform recording → data writing → refresh → idle. While data is being written to a single buffer, the remaining idle buffers can still refresh running data in real time and respond to new fault requests. This solves the problem of traditional single-buffer writing methods being unable to handle new faults and avoids the loss of critical data in cascading failure scenarios.

[0018] Third, this invention achieves unified transmission of waveform data through a standardized RS485 bus, supporting offline analysis on a local PC, local storage on the EMS system, and remote sharing on a cloud server. Users can access fault waveform data anytime, anywhere via mobile terminals, breaking down data silos and significantly improving the efficiency of fault diagnosis and the convenience of operation and maintenance. Attached Figure Description

[0019] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the embodiments will be briefly described below. Referring to the drawings will make the features and advantages of the present invention clearer. The drawings are illustrative and should not be construed as limiting the present invention in any way. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort. Wherein: Figure 1 This is a flowchart of an inverter fault recording method based on multi-level adaptive cycle and multi-buffer provided by an embodiment of the present invention; Figure 2 This is a schematic diagram of the buffer loop recording in an embodiment of the present invention; Figure 3 This refers to the cache state switching in this embodiment of the invention; Figure 4 This is an architecture diagram of the inverter fault recording system in an embodiment of the present invention; Figure 5 This is a block diagram of an inverter fault recording device based on multi-level adaptive cycle and multi-buffering provided in an embodiment of the present invention. Detailed Implementation

[0020] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0021] This invention addresses the shortcomings of existing inverter fault recording technologies, such as fixed-period recording which cannot capture both fault details and development trends, and single-buffer technology which cannot respond to continuous fault recording requests. It proposes a method and apparatus for inverter fault recording based on multi-level adaptive cycles and multiple buffers. This invention achieves continuous recording of multiple faults through cyclical state switching of BN independent buffers, and simultaneously ensures data accuracy at the fault moment and long-term trend observation capability within limited storage capacity through LN-level adaptive recording cycles. Finally, it achieves efficient fault diagnosis through multi-terminal data display. The following is in conjunction with the appendix... Figures 1 to 5 The specific embodiments of the present invention will be described in detail below.

[0022] Example 1: The inverter fault recording system of this invention is mainly applied to energy storage inverters in energy storage systems, and can also be applied to various power electronic conversion devices such as photovoltaic inverters and wind power converters. Figure 4As shown, the core of the system consists of a DSP controller, a waveform recording buffer unit, a non-volatile memory, and an RS485 communication interface. External devices include an ARM platform EMS system, a PC desktop application, a cloud server, and a mobile terminal.

[0023] The DSP controller, as the core control unit, is responsible for executing all logic such as fault detection, cache management, data acquisition and writing control; the waveform recording cache unit contains BN independent RAM cache areas (BN is an integer and BN≥2) for temporary storage of real-time running data and fault waveform recording data; the non-volatile memory uses Flash or EEPROM for permanent storage of complete fault waveform recording datasets; the RS485 communication interface uses the Modbus-RTU protocol to realize data transmission between the DSP and external devices.

[0024] This embodiment describes in detail the inverter fault recording method based on the above system, such as... Figure 1 As shown, it includes the following steps: Step S1: Initialize BN independent waveform recording buffers, set the initial state of each buffer to the idle state, and initialize the buffer index and the idle buffer count, where BN is an integer and BN≥2; Step S2: Read the idle buffer count in real time. When the number of idle buffers is not 0, control all idle buffers to refresh the real-time operating data of the inverter in a preset minimum recording cycle. Step S3: When an inverter fault trigger signal is detected, select an idle buffer according to the current buffer index, update the state of the buffer to the waveform recording state, increment the buffer index by 1 in a loop, and decrement the idle buffer count by 1. Step S4: Based on the preset LN-level adaptive waveform recording cycle rule, filter out the waveform recording data before the fault from the real-time running data that has been refreshed and stored in the buffer area in the waveform recording state, where LN is an integer and LN≥2. The LN-level adaptive waveform recording cycle rule is: the closer the time corresponding to the data is to the time of the fault, the smaller the waveform recording cycle is used. Step S5: According to the LN-level adaptive recording cycle rule, continue to record the inverter operation data after the fault in the buffer area that is in the recording state until the preset recording termination condition is met. Step S6: Update the state of the buffer in the waveform recording state to the data writing state, integrate the pre-fault waveform recording data and post-fault waveform recording data stored in the buffer into a complete fault waveform recording dataset, and write it into the non-volatile memory. Step S7: When a feedback signal indicating that the fault recording dataset has been written is detected, the status of the buffer is updated to refresh status, and all data in the buffer is refreshed once using the preset minimum recording cycle. Step S8: After the cache data is refreshed, update the status of the cache to idle and increment the idle cache count by 1.

[0025] As can be seen from the above technical solution, this invention proposes an inverter fault recording method based on multi-level adaptive cycles and multiple buffers. By initializing BN independent recording buffers and uniformly managing their states, during the idle phase, all idle buffers are controlled to cyclically refresh and store real-time inverter operating data with the minimum recording cycle. When a fault trigger signal is detected, an idle buffer is automatically allocated and real-time data is locked. Based on the LN-level adaptive rule of "the closer to the fault, the smaller the recording cycle," historical data before the fault is filtered and operating data after the fault is recorded. After recording is completed, the integrated complete dataset is written to non-volatile memory, and then the buffers are fully refreshed to restore their idle state for cyclic reuse. This method ensures both high-precision acquisition of critical transient fault data and complete presentation of long-term fault development trends within limited storage capacity. It also completely solves the defect of traditional single-buffer architectures that cannot respond to continuous or cascading fault recording requests during data writing, avoiding the loss of critical fault data. This provides comprehensive and reliable data support for inverter fault root cause analysis, significantly improving the accuracy of fault diagnosis and system operational stability.

[0026] Further, in step S1, the system is initialized. After the DSP controller is powered on, it first performs a cache initialization operation: 1. Calculate and determine the value of BN based on the total storage capacity of the inverter equipment and the average write efficiency of fault waveform data to non-volatile memory. For example, if the maximum length of a single fault waveform data is 128KB, the average write speed of non-volatile memory is 50KB / s, and the total RAM capacity allocated to the waveform buffer is 512KB, then BN can be set to 4 to ensure that at least one free buffer area is available to respond to new fault requests within the time it takes to write one waveform data (approximately 2.56s).

[0027] 2. Initialize BN independent waveform recording buffers, with the capacity of each buffer equal to the maximum length of a single fault waveform recording.

[0028] 3. Set the initial state of all caches to idle, initialize the cache index to 0, and set the free cache count to BN.

[0029] 4. Preset minimum recording period (The control frequency is usually 16~25kHz, and the period is 40us~62.5us, which can be adjusted according to the control accuracy of the inverter.) The preset LN level adaptive recording cycle rule (LN is an integer and LN≥2) and the preset recording termination condition are also included.

[0030] Furthermore, in step S2, the free buffer area is refreshed cyclically.

[0031] The DSP controller reads the idle buffer count in real time. When the number of idle buffers is not zero, it controls all idle buffers to operate at a preset minimum recording period. The real-time operating data of the storage inverter is refreshed continuously.

[0032] The real-time operating data of the inverter includes at least one of the following: grid voltage, grid current, DC-side voltage, DC-side current, power module temperature, and grid frequency. Each data point is accompanied by a precise timestamp (minimum precision in microseconds, maximum precision in milliseconds).

[0033] The cyclic refresh mechanism employs a circular buffer: when the buffer is full, new data points overwrite the oldest data points, ensuring that the buffer always retains complete operational data from the most recent period, thus preparing for recording sudden faults. For example... Figure 2 As shown, the cache stores data point 1, data point 2, ..., data point N in chronological order, with new data points continuously overwriting the oldest data points.

[0034] Furthermore, in step S3, fault triggering and cache allocation are performed.

[0035] When the DSP controller detects an inverter fault trigger signal (such as overvoltage, overcurrent, overtemperature, frequency abnormality, or other protection signals), it performs the following operations: 1. Select the first free cache area in ascending order of cache area index. For example, when BN=3 and the current index is 2, if cache area 2 is not free, check cache area 0, cache area 1, etc., until a free cache area is found.

[0036] 2. Update the status of the selected buffer to waveform recording status, immediately stop its cyclic refresh operation, and lock all currently stored real-time running data.

[0037] 3. Increment the cache index by 1 in a loop (e.g., index 2 becomes 0 after incrementing), and decrement the free cache count by 1.

[0038] Further, in step S4, the pre-fault waveform recording data is filtered. Based on the preset LN-level adaptive waveform recording cycle rule, the pre-fault waveform recording data is filtered from the real-time running data locked in the buffer area that is in the waveform recording state.

[0039] The LN-level adaptive recording cycle rule is as follows: the time axis before and after the fault time is divided into LN consecutive time intervals, each time interval corresponds to a fixed recording cycle, and the further the starting time of the time interval is from the fault time, the corresponding recording cycle increases linearly or exponentially.

[0040] Example: When LN=3, the following hierarchical rules can be set: 1. Level 1 (5ms before the fault to the moment of the fault): Recording period = =62.5us; 2. Second level (5ms to 15ms before fault): Recording cycle =312.5us; 3. Level 3 (15ms to 30ms before fault): Recording cycle =625us.

[0041] Screening process: According to the above rules, data points are extracted from all pre-fault data stored in the buffer according to the corresponding period to form a pre-fault waveform dataset. For example, all data points at 62.5us intervals are retained within 5ms before the fault, one data point is retained every 312.5us between 5ms and 15ms, and one data point is retained every 625us between 15ms and 30ms.

[0042] Further, in step S5, the waveform data after the fault is recorded. Following the same LN-level adaptive waveform recording cycle rule as in step S4, the inverter operation data after the fault continues to be recorded in the buffer area during the waveform recording state until the preset waveform recording termination condition is met.

[0043] The classification rules for post-fault waveform recording are consistent with those before the fault: a 62.5us period is used within 5ms after the fault, a 312.5us period is used from 5ms to 15ms, and a 625us period is used from 15ms to 30ms.

[0044] The preset recording termination condition is: after recording a preset number of fault data points according to the LN-level adaptive recording cycle rule (for example, a total of 2000 fault data points are recorded).

[0045] Further, in step S6, the fault recording data is written to a non-volatile memory. After the post-fault data acquisition is complete, the following operations are performed: 1. Update the status of the buffer that is in the waveform recording state to the data writing state.

[0046] 2. Integrate the pre-fault waveform data and post-fault waveform data stored in the buffer into a complete fault waveform dataset. The fault waveform dataset also includes the absolute timestamp of the fault occurrence (accurate to the second), the fault type code (e.g., 0x01 indicates overvoltage, 0x02 indicates overcurrent), and the corresponding buffer number information.

[0047] 3. Write the complete fault waveform dataset to the non-volatile memory. During the writing process, the DSP controller can simultaneously handle the refresh and waveform recording tasks of other buffers.

[0048] Further, in step S7, the buffer data is refreshed. When the DSP controller detects a feedback signal indicating that the fault recording dataset has been written, it updates the state of the buffer to a refresh state and performs a preset minimum recording cycle. Refresh all data in the cache.

[0049] The purpose of this refresh is to clear the old fault recording data remaining in the buffer and ensure that the buffer stores the latest real-time operating data to prepare for the next fault recording.

[0050] Further, in step S8, the buffer state is restored. After the buffer data is refreshed, the state of the buffer is updated to idle, the idle buffer count is incremented by 1, and the buffer re-enters the cyclic refresh process of step S2.

[0051] It should be noted that, for example Figure 3 As shown, the state of each buffer can only switch unidirectionally in the order of idle state → waveform recording state → data writing state → refresh state → idle state, and any reverse state jump is prohibited to ensure the logical rigor of buffer management and data security.

[0052] Furthermore, the method also includes step S9, uploading and analyzing the fault waveform data. The DSP controller transmits the fault waveform dataset stored in the non-volatile memory to the external device via the RS485 bus, as detailed below: 1. When transmitting data to an EMS system on an ARM platform, the EMS system can store the fault waveform dataset as a binary file on a local SD card, or it can transmit it to a cloud server via Ethernet or 4G network. After the cloud server parses and stores the data, users can access the cloud data through mobile terminals (phones, tablets) to perform data plotting and fault analysis.

[0053] 2. When the data is transferred to the PC desktop application, the PC desktop application stores the fault waveform dataset as a file on the local hard drive and directly provides analysis functions such as data plotting, waveform comparison, and parameter statistics, supporting engineers to perform fault diagnosis offline.

[0054] Example 2: This invention also provides an inverter fault recording device based on multi-level adaptive cycles and multiple buffers. This device is integrated into the inverter's DSP controller and is used to execute the inverter fault recording method based on multi-level adaptive cycles and multiple buffers described in Embodiment 1 above. Figure 5 As shown, it specifically includes: The buffer initialization module is used to initialize BN independent waveform recording buffers, set the initial state of each buffer to the idle state, and initialize the buffer index and the idle buffer count, where BN is an integer and BN≥2; The data refresh module is used to read the count of the idle buffer in real time. When the number of idle buffers is not 0, it controls all idle buffers to refresh and store the real-time running data of the inverter in a preset minimum recording cycle. The fault detection and buffer allocation module is used to select an idle buffer based on the current buffer index when an inverter fault trigger signal is detected, update the status of the buffer to the waveform recording status, increment the buffer index by 1 in a loop, and decrement the idle buffer count by 1. The hierarchical waveform recording module is used to filter out pre-fault waveform recording data from the real-time operating data that has been refreshed and stored in the waveform recording buffer based on a preset LN-level adaptive waveform recording cycle rule, where LN is an integer and LN≥2. The LN-level adaptive waveform recording cycle rule is: the closer the time corresponding to the data is to the fault time, the smaller the waveform recording cycle is used; and according to the LN-level adaptive waveform recording cycle rule, continue to record inverter operating data after the fault in the waveform recording buffer until the preset waveform recording termination condition is met. The data writing module is used to update the state of the buffer in the waveform recording state to the data writing state, integrate the pre-fault waveform recording data and post-fault waveform recording data stored in the buffer into a complete fault waveform recording dataset, and write it into the non-volatile memory. The cache reset module is used to update the status of the cache area to refresh state when a feedback signal indicating that the fault recording dataset has been written is detected, and refresh all the data in the cache area once with the preset minimum recording cycle; and after the data in the cache area has been refreshed, update the status of the cache area to idle state and increment the idle cache area count by 1.

[0055] Furthermore, the device also includes a data transmission module for performing the data upload operation described in step S9: transmitting the fault waveform dataset in the non-volatile memory to the EMS system or PC desktop application via an RS485 bus to achieve data display and analysis across multiple terminals.

[0056] This embodiment provides an inverter fault recording system based on multi-level adaptive cycle and multi-buffer, used to implement the aforementioned inverter fault recording method based on multi-level adaptive cycle and multi-buffer. Therefore, the specific implementation of the inverter fault recording system based on multi-level adaptive cycle and multi-buffer can be found in the previous embodiment section of the inverter fault recording method based on multi-level adaptive cycle and multi-buffer. For example, to avoid redundancy, it will not be repeated here.

[0057] Those skilled in the art will understand that embodiments of this application can be provided as methods, systems, or computer program products. Therefore, this application can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, this application can take the form of a computer program product embodied on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0058] This application is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of this application. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart... Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.

[0059] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The functions specified in one or more boxes. These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable apparatus for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.

[0060] Obviously, the above embodiments are merely illustrative examples for clear explanation and are not intended to limit the implementation. Those skilled in the art will recognize that other variations or modifications can be made based on the above description. It is neither necessary nor possible to exhaustively list all possible implementations here. However, obvious variations or modifications derived therefrom are still within the scope of protection of this invention.

Claims

1. A fault recording method for inverters based on multi-level adaptive cycles and multiple buffers, applied to an inverter fault recording system, the system comprising a recording buffer unit and a non-volatile memory, characterized in that, The method includes the following steps: Step S1: Initialize BN independent waveform recording buffers, set the initial state of each buffer to the idle state, and initialize the buffer index and the idle buffer count, where BN is an integer and BN≥2; Step S2: Read the idle buffer count in real time. When the number of idle buffers is not 0, control all idle buffers to refresh the real-time operating data of the inverter in a preset minimum recording cycle. Step S3: When an inverter fault trigger signal is detected, select an idle buffer according to the current buffer index, update the state of the buffer to the waveform recording state, increment the buffer index by 1 in a loop, and decrement the idle buffer count by 1. Step S4: Based on the preset LN-level adaptive waveform recording cycle rule, filter out the waveform recording data before the fault from the real-time running data that has been refreshed and stored in the buffer area that is in the waveform recording state, where LN is an integer and LN≥2. The LN-level adaptive waveform recording cycle rule is: the closer the time corresponding to the data is to the fault time, the smaller the waveform recording cycle is used; the LN-level adaptive waveform recording cycle rule is specifically: divide the time axis before and after the fault time into LN consecutive time intervals, each time interval corresponds to a fixed waveform recording cycle, and the farther the starting time of the time interval is from the fault time, the corresponding waveform recording cycle increases linearly or exponentially. Step S5: According to the LN-level adaptive recording cycle rule, continue to record the inverter operation data after the fault in the buffer area that is in the recording state until the preset recording termination condition is met. Step S6: Update the state of the buffer in the waveform recording state to the data writing state, integrate the pre-fault waveform recording data and post-fault waveform recording data stored in the buffer into a complete fault waveform recording dataset, and write it into the non-volatile memory. Step S7: When a feedback signal indicating that the fault recording dataset has been written is detected, the status of the buffer is updated to refresh status, and all data in the buffer is refreshed once using the preset minimum recording cycle. Step S8: After the data in the cache area is refreshed, update the status of the cache area to the idle state and increment the idle cache area count by 1; Each buffer's state can only switch unidirectionally in the order of idle state, waveform recording state, data writing state, refresh state, and idle state, and any reverse state transition is prohibited.

2. The inverter fault recording method based on multi-level adaptive cycle and multi-buffer as described in claim 1, characterized in that, In step S1, the total capacity of the BN waveform recording buffers is determined based on the maximum length of a single fault waveform recording data and the value of BN. The value of BN is calculated by the total storage capacity of the inverter device and the average write efficiency of writing fault waveform recording data into the non-volatile memory.

3. The inverter fault recording method based on multi-level adaptive cycle and multi-buffer as described in claim 1, characterized in that, In step S3, the method for selecting a free cache area based on the current cache area index is as follows: select the first cache area that is free in the cyclic order of the cache area index from smallest to largest.

4. The inverter fault recording method based on multi-level adaptive cycle and multi-buffer as described in claim 1, characterized in that, In step S5, the preset recording termination condition is: after recording a preset number of fault data points according to the LN-level adaptive recording cycle rule.

5. The inverter fault recording method based on multi-level adaptive cycle and multi-buffer as described in claim 1, characterized in that, In step S6, the fault waveform dataset written to the non-volatile memory also includes the absolute timestamp of the fault occurrence, the fault type code, and the corresponding buffer number information.

6. The inverter fault recording method based on multi-level adaptive cycle and multi-buffer as described in claim 1, characterized in that, The method also includes step S9: transmitting the fault waveform dataset stored in the non-volatile memory to an external device via an RS485 bus. The external device includes an EMS system based on an ARM platform and a PC desktop application. The EMS system stores the fault waveform dataset to an SD card or transmits it to a cloud server, and finally performs data plotting, display and analysis on a mobile terminal. The PC desktop application stores the fault waveform dataset to a local hard drive and performs data plotting, display and analysis.

7. The inverter fault recording method based on multi-level adaptive cycle and multi-buffer as described in claim 1, characterized in that, The inverter is an energy storage inverter in an energy storage system, and the real-time operating data of the inverter includes at least one of the following: grid voltage, grid current, DC-side voltage, DC-side current, power module temperature, and grid frequency.

8. An inverter fault recording device based on multi-level adaptive cycles and multiple buffers, characterized in that, The apparatus is used to execute the inverter fault recording method based on multi-level adaptive cycles and multiple buffers as described in any one of claims 1 to 7, specifically including: The buffer initialization module is used to initialize BN independent waveform recording buffers, set the initial state of each buffer to the idle state, and initialize the buffer index and the idle buffer count, where BN is an integer and BN≥2; The data refresh module is used to read the count of the idle buffer in real time. When the number of idle buffers is not 0, it controls all idle buffers to refresh and store the real-time running data of the inverter in a preset minimum recording cycle. The fault detection and buffer allocation module is used to select an idle buffer based on the current buffer index when an inverter fault trigger signal is detected, update the status of the buffer to the waveform recording status, increment the buffer index by 1 in a loop, and decrement the idle buffer count by 1. The hierarchical waveform recording module is used to filter out pre-fault waveform recording data from the real-time operating data that has been refreshed and stored in the waveform recording buffer based on a preset LN-level adaptive waveform recording cycle rule, where LN is an integer and LN≥2. The LN-level adaptive waveform recording cycle rule is: the closer the time corresponding to the data is to the fault time, the smaller the waveform recording cycle is used; and according to the LN-level adaptive waveform recording cycle rule, it continues to record inverter operating data after the fault in the waveform recording buffer until the preset waveform recording termination condition is met. The data writing module is used to update the state of the buffer in the waveform recording state to the data writing state, integrate the pre-fault waveform recording data and post-fault waveform recording data stored in the buffer into a complete fault waveform recording dataset, and write it into the non-volatile memory. The cache reset module is used to update the status of the cache area to refresh state when a feedback signal indicating that the fault recording dataset has been written is detected, and refresh all the data in the cache area once with the preset minimum recording cycle; and after the data in the cache area has been refreshed, update the status of the cache area to idle state and increment the idle cache area count by 1.

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