GPU-cpu heterogeneous-based radar video signal parallel processing system and method

Abstract

The application provides a GPU-CPU heterogeneous radar video signal parallel processing system and method, relates to the technical field of radar signal processing, and is composed of a signal input module, a signal preprocessing module, a heterogeneous computing processing module, a data interaction and synchronization module and a result output module. The signal input module accesses radar echo and video images; the signal preprocessing module dynamically generates a computing task after denoising, pulse compression and other processing. The GPU in the heterogeneous computing processing module is responsible for algorithm power matching and task parallel optimization, the multi-threaded CPU executes global and local double-layer scheduling, and the load balancing unit dynamically adjusts the distribution strategy according to the real-time resource state. The data interaction and synchronization module establishes a zero-copy ring buffer based on a PCIe bus, and realizes data timing alignment and consistency verification through a serial number, a timestamp and a synchronization barrier counter. The result output module finally provides radar signals, video data and target multi-dimensional attribute information obtained by spatiotemporal fusion of the radar signals and the video data.

Description

Technical Field

[0001] This invention relates to the field of radar signal processing technology, and in particular to a parallel processing system and method for radar video signals based on GPU-CPU heterogeneity. Background Technology

[0002] With the rapid iteration and development of radar detection and video imaging technologies, application scenarios are placing increasingly stringent demands on the real-time response capabilities, data processing accuracy, and multimodal information processing capacity of signal processing systems. Radar signal processing typically involves large-scale complex matrix operations and high-density floating-point computational loads such as Fast Fourier Transform (FFT). Meanwhile, in the field of video signal processing, especially for analyzing high-definition and ultra-high-definition image sequences, highly parallel computing architectures are required to perform complex operations such as image enhancement, target detection and recognition, and hardware encoding and decoding.

[0003] In traditional engineering implementations, radar signal processing often relies on application-specific integrated circuits (ASICs) or digital signal processors (DSPs) to build the processing platform. These hardware solutions primarily utilize fixed-point arithmetic logic to perform fast Fourier transform butterfly operations, resulting in significant quantization loss in signal processing accuracy. The output shape is relatively fixed, typically providing only low-resolution two-dimensional spectral information. This makes it difficult to support deeper, more refined feature extraction and intelligent analysis of the raw sampled data, and the system's computing power cannot meet the deployment requirements of complex backend processing algorithms.

[0004] Meanwhile, traditional software processing architectures based on single-threaded or simplified multi-threaded central processing units (CPUs) struggle to meet stringent real-time performance requirements when dealing with rapidly increasing data throughput and increasingly complex algorithm models, due to the inherent bottlenecks of their serial execution or coarse-grained parallelism. Although dedicated digital signal processors (DSPs) have demonstrated good energy efficiency in specific narrowband applications, the closed nature of their programming models and the specialized nature of their hardware architecture limit system flexibility and general scalability, leading to longer development iteration cycles and increased lifecycle costs.

[0005] In recent years, massively parallel computing units such as Graphics Processing Units (GPUs) and Neural Processing Units (NPUs) have been widely deployed in the field of general-purpose parallel computing due to their on-chip integrated large number of stream processor cores and high-bandwidth memory architecture. The thousands of computing units within a GPU are naturally adapted to the Single Instruction Multiple Data (SIMD) parallel processing mode, making them extremely adept at processing large-scale, regularized data. Meanwhile, modern multi-core CPUs generally support Hyper-Threading technology and the SIMD extended instruction set, possessing excellent logic control and multi-task concurrent scheduling capabilities. Therefore, heterogeneously integrating the massive data parallel computing advantages of GPUs with the complex task scheduling and logic arbitration capabilities of multi-threaded CPUs to build a CPU-GPU collaborative computing system has become a key technological path for achieving real-time, high-precision processing of radar and video signals.

[0006] However, within the existing heterogeneous parallel processing technology framework, how to accurately partition tasks at the task granularity, dynamically load balance, and achieve low-latency data collaboration between GPU computing units and multi-threaded CPU logic units, based on the vastly different computational and memory access characteristics and real-time constraints of radar signal processing and video analysis tasks, in order to fully unleash the aggregated computing power of heterogeneous hardware and eliminate cross-device data interaction bottlenecks, remains a core engineering challenge restricting the overall throughput performance and real-time stability of the system. Therefore, designing a parallel system architecture that can deeply adapt to CPU-GPU heterogeneous computing resources and achieve efficient fusion processing of multimodal radar video signals has significant theoretical research value and remarkable engineering application prospects. Summary of the Invention

[0007] In view of this, embodiments of the present invention provide a parallel processing system and method for radar video signals based on GPU-CPU heterogeneity. By utilizing the heterogeneous collaboration of GPU's massive parallel computing power and multi-threaded CPU's logical scheduling capabilities, combined with dynamic load balancing and zero-copy synchronization mechanisms, it breaks through the real-time processing bottlenecks and accuracy limitations of traditional single architectures. Finally, it outputs spatiotemporally aligned multi-dimensional target attribute representation information in an integrated manner, providing a high-throughput, low-latency, and robust technical solution for intelligent detection and multimodal perception in complex scenarios, and realizing efficient parallel processing and deep fusion of radar raw echo and video image signals.

[0008] The technical solution of this invention is implemented as follows: This invention provides a GPU-CPU heterogeneous parallel processing system for radar video signals, comprising: a signal input module, a signal preprocessing module, a heterogeneous computing processing module, a data interaction and synchronization module, and a result output module. The signal input module receives raw radar echo signals and raw video image signals. The signal preprocessing module performs preprocessing operations on the raw radar echo signals and raw video image signals respectively, and then dynamically generates radar signal processing tasks and video signal processing tasks. The heterogeneous computing processing module includes a GPU unit, a multi-threaded CPU unit, and a task allocation and load balancing unit. The GPU unit is used to match and schedule computing resources according to the computational intensity of the radar signal processing tasks, and optimize the task execution order according to the data parallelism scale of the video signal processing tasks. The multi-threaded CPU unit is used for... The system performs normalized weighted evaluation of task priority parameters and executes global and local two-layer heterogeneous scheduling. The task allocation and load balancing unit dynamically adjusts the task allocation strategy based on real-time hardware load and resource utilization. The data interaction and synchronization module constructs a CPU-GPU zero-copy circular buffer and atomic synchronization lock based on the PCIe bus, realizes task status polling and delay verification through sequence number and timestamp, completes the timing alignment of radar and video data based on synchronization barrier counter, ensures data consistency through cyclic redundancy check and retransmission, and outputs radar signal data and video signal data after consistency verification. The result output module outputs radar signal data, video signal data and their fusion result after consistency verification. The fusion result is the target multi-dimensional attribute representation information obtained by joint decision-making of radar and video data after spatiotemporal alignment.

[0009] This invention provides a GPU-CPU heterogeneous parallel processing method for radar video signals, comprising: receiving raw radar echo signals and raw video image signals; performing preprocessing operations on the raw radar echo signals and raw video image signals respectively, and dynamically generating radar signal processing tasks and video signal processing tasks; a heterogeneous computing processing module performing heterogeneous parallel processing: the GPU unit matches and schedules computing power and optimizes task order, the multi-threaded CPU unit performs two-layer heterogeneous scheduling, and the task allocation and load balancing unit dynamically adjusts the task allocation strategy; constructing a zero-copy circular buffer to complete task synchronization, timing alignment and data consistency verification, and outputting radar signal data and video signal data after consistency verification; outputting radar signal data, video signal data and their fusion result after consistency verification, wherein the fusion result is the target multi-dimensional attribute representation information obtained by joint decision processing of radar signal data and video signal data after consistency verification based on spatiotemporal alignment.

[0010] According to another aspect of this disclosure, a non-transitory computer-readable storage medium storing computer instructions is provided, wherein the computer instructions are used to cause a computer to execute a GPU-CPU heterogeneous parallel processing method for radar video signals.

[0011] The beneficial effects of the technical solutions provided in the embodiments of the present invention include at least the following: 1. By parallelizing the decomposition and execution of high-density computational tasks such as pulse compression, batch fast Fourier transform, multi-dimensional windowing, video image feature extraction, and target detection and segmentation using GPU units, the computational bottleneck of traditional single-core serial processing architecture is effectively overcome. This mechanism significantly reduces the processing latency of single-frame radar data and video image sequences, significantly improving the overall signal processing speed and data throughput bandwidth of the system. This, in turn, increases the video analysis frame rate while shortening the radar data update cycle, fully meeting the stringent requirements of real-time detection and intelligent perception scenarios for low latency and high throughput processing capabilities.

[0012] 2. This invention constructs a heterogeneous working mode that deeply collaborates between multi-threaded CPUs and GPUs. It utilizes the CPU to coordinate global task scheduling, logical branch arbitration, data consistency verification, and result post-processing—all serial logic-intensive tasks—while offloading large-scale parallel computing tasks to the GPU. This achieves a refined division of heterogeneous computing resources based on task computation and memory access characteristics. This architecture effectively integrates the CPU's flexible logical control capabilities with the GPU's powerful single-instruction multiple-data-stream parallel computing capabilities. It is compatible with radar video processing algorithms of varying complexity and computational characteristics, exhibiting excellent algorithm iteration adaptability and collaborative working efficiency.

[0013] 3. This invention features a dedicated task allocation and load balancing unit that can collect real-time hardware resource status vectors such as CPU core utilization, GPU streaming multiprocessor utilization, and memory bandwidth utilization. Based on real-time load snapshots and task computation characteristics, this unit dynamically and adaptively adjusts the task allocation strategy, balancing the load on heterogeneous devices through methods such as computing power migration, task stealing, and dynamic priority adjustment. This mechanism completely avoids the operational defects of idle computing resources or overloaded single devices in traditional heterogeneous systems, maximizing the utilization potential of CPU and GPU collaborative computing resources, thereby comprehensively improving system operating efficiency and energy efficiency.

[0014] 4. This invention adopts a modular and standardized heterogeneous computing architecture design. At the hardware level, it is natively compatible with the flexible stacking and linear expansion of multi-core CPUs and multi-GPU devices. At the software level, it supports dynamic hot adaptation of task granularity partitioning and scheduling strategies. When faced with an increase in the number of radar channels, improved video resolution, or increased complexity of backend processing algorithms, the system can expand its computing power by directly adding hardware units or upgrading computing devices without reconstructing the core processing architecture. This feature gives the system excellent hardware compatibility and functional scalability, enabling it to smoothly adapt to engineering deployment needs of different scales and sizes.

[0015] 5. This invention integrates dual-link functions for radar echo signal processing and video image signal processing, enabling simultaneous completion of the entire computational process, including radar 3D data cube generation, micro-Doppler feature extraction and video multi-scale feature extraction, target detection, and semantic segmentation. Simultaneously, the system achieves decision-level correlation between radar physical scattering attributes and video visual semantic attributes through precise spatiotemporal alignment and a multimodal feature fusion layer, outputting integrated multi-dimensional target attribute representation information. This highly integrated multi-sensor processing capability provides a stable and efficient technical foundation for integrated applications such as intelligent detection in complex environments, high-precision target tracking, and wide-area scene perception. Attached Figure Description

[0016] Figure 1 This is a schematic diagram of the structure of the parallel processing system for radar video signals based on GPU-CPU heterogeneity provided in an embodiment of the present invention; Figure 2 This is a flowchart of a parallel processing method for radar video signals based on GPU-CPU heterogeneity provided in an embodiment of the present invention. Detailed Implementation

[0017] To make the objectives, technical solutions, and advantages of the present invention clearer, the present invention will be further described in detail below with reference to the accompanying drawings. The described embodiments should not be regarded as limitations on the present invention. All other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0018] In the following description, references to "some embodiments" refer to a subset of all possible embodiments. However, it is understood that "some embodiments" can be the same or different subsets of all possible embodiments and can be combined with each other without conflict. Embodiments of the present invention provide a parallel processing system and method for radar video signals based on GPU-CPU heterogeneity. Figure 1The diagram shows the architecture of a GPU-CPU heterogeneous parallel radar video signal processing system. The system's processing flow includes a signal input module, a signal preprocessing module, a heterogeneous computing processing module, a data interaction and synchronization module, and a result output module. The signal input module receives the raw radar echo signal and the raw video image signal. The signal preprocessing module, communicatively connected to the signal input module, performs preprocessing operations on the raw radar echo signal and the raw video image signal. Based on the data scale and dimensional characteristics of the obtained three-dimensional radar data (channel-Doppler-range dimension), and combined with the current system resource status, it dynamically decomposes the data into radar signal processing tasks with clear computational boundaries, such as range windowing, Doppler-dimensional fast Fourier transform batch partitioning, and inter-channel incoherent accumulation. The video signal processing task dynamically generates a parallel task graph containing feature extraction, target detection, semantic segmentation, inter-frame registration, and hardware encoding / decoding, based on the resolution, frame rate, color space attributes, and structural characteristics of the target detection and semantic segmentation network model of the preprocessed video image frames.During task generation, the task granularity is adjusted in real time based on data volume and algorithm computation density to adapt to the scheduling characteristics of heterogeneous computing resources. The heterogeneous computing processing module communicates with the signal preprocessing module and includes a GPU unit, a multi-threaded CPU unit, and a task allocation and load balancing unit. The GPU unit matches and schedules computing resources according to the computational density of radar signal processing tasks and optimizes the task execution order based on the data parallelism scale of video signal processing tasks. The multi-threaded CPU unit performs global and local two-layer heterogeneous scheduling based on normalized weighted evaluation of task priority parameters. The task allocation and load balancing unit dynamically adjusts the task allocation strategy based on real-time hardware load and resource utilization. The data interaction and synchronization module communicates with the GPU unit and the multi-threaded CPU unit respectively. It constructs a CPU-GPU zero-copy circular buffer and atomic synchronization lock based on the PCIe bus, uses sequence numbers and timestamps to poll task status and verify delays, and completes the synchronization of radar and video data based on a synchronization barrier counter. The sequence alignment ensures data consistency through cyclic redundancy check and retransmission, outputting radar signal data and video signal data after consistency verification. The result output module, which communicates with the data interaction and synchronization module, is used to output radar signal data, video signal data, and their fusion result after consistency verification. The fusion result is the target multi-dimensional attribute representation information obtained by joint decision-making of radar and video data after spatiotemporal alignment. The fusion process is as follows: the radar range-Doppler two-dimensional complex data matrix and video image frames are sequentially aligned within the same time window, and spatial registration from radar point cloud polar coordinates to video pixel coordinates is completed according to calibration parameters; radar micro-Doppler features, scattering cross-section sequence, video appearance features, and motion optical flow vectors are extracted and stitched together through a multi-modal feature fusion layer to generate a fused feature map; the GPU unit is called to perform target re-identification and intent prediction, and a fusion result data packet carrying target identity, three-dimensional position, radial velocity, trajectory prediction confidence, and behavior label is output, representing the decision-level correlation between radar physical attributes and video semantic attributes.

[0019] This invention clarifies the logical relationships and data flow between modules. The range-Doppler two-dimensional complex data matrix refers to the complex-valued spectral matrix representing the target's range and radial velocity information after pulse compression and Doppler processing. Micro-Doppler features refer to the subtle frequency modulation traces generated in the spectral sidelobes by the target's micro-movements (such as rotor rotation or human body swaying). Spatiotemporal alignment refers to the process of accurately mapping the radar point cloud to video pixel coordinates through timestamp synchronization and coordinate system calibration parameters. This invention constructs a complete pipeline from raw signal acquisition and heterogeneous parallel processing to multimodal decision-level fusion. It utilizes the massive parallel computing power of GPUs and the complex scheduling capabilities of CPUs to collaboratively process radar and video data, ultimately outputting a fused target attribute package that combines physical measurement accuracy with semantic understanding depth. This significantly improves the system's real-time perception and intent recognition capabilities for multidimensional targets in complex scenes.

[0020] The signal preprocessing module includes a radar signal preprocessing submodule and a video signal preprocessing submodule. The radar signal preprocessing submodule is used to perform filtering, pulse compression, and moving target detection operations on the raw radar echo signal. Specifically, it includes: receiving the raw time-domain echo signal from each receiving channel, performing anti-aliasing low-pass filtering to filter out out-of-band noise and high-frequency interference components higher than the Nyquist frequency of the analog-to-digital converter; using a band-pass filter to perform band-pass filtering on the signal after anti-aliasing low-pass filtering to retain the echo energy within the effective working bandwidth corresponding to the radar transmitted waveform and suppress out-of-band electromagnetic interference, receiver internal thermal noise, and low-frequency components of strong clutter from nearby ground objects; and generating matched filter coefficients based on the modulation parameters of the radar transmitted waveform. The modulation parameters of the radar transmitted waveform include, but are not limited to: pulse width, frequency modulation slope (for linear frequency modulation signals), carrier start frequency, sampling rate, pulse repetition interval, and number of Doppler pulses. The process of generating matched filter coefficients is as follows: Based on the waveform modulation type (such as linear frequency modulation, nonlinear frequency modulation, or phase coding), a discrete-time sequence of the complex envelope of the ideal transmitted signal is constructed. Time reversal and complex conjugate operations are performed on the sequence, and window function modulation is performed according to the preset pulse compression sidelobe suppression requirements (such as Taylor weighting or Hamming weighting) to finally obtain the matched filter coefficient vector.The matched filter coefficients are essentially the conjugate inverted complex sequence of the transmitted waveform, used as a frequency response function in the frequency domain fast convolution operation to achieve pulse compression and obtain high range resolution. For the sampling point sequence corresponding to each Doppler pulse of each receiving channel, the filtered sampling point sequence is subjected to a frequency domain fast convolution operation with the matched filter coefficients to obtain the range-Doppler two-dimensional complex data matrix corresponding to each receiving channel. The frequency domain fast convolution operation specifically includes: performing a fast Fourier transform on the sampling point sequence to obtain the frequency domain echo signal; performing a point-by-point complex multiplication operation on the frequency domain echo signal with the pre-calculated and stored frequency response of the matched filter; and performing an inverse fast Fourier transform on the multiplication result to restore it to the time domain, thereby compressing the wide pulse echo signal transmitted by the radar into a narrow pulse signal with high range resolution; for the range of each receiving channel... The range-Doppler two-dimensional complex data matrix is ​​generated by performing a windowed Fast Fourier Transform (FFT) operation on the slow-time sampling sequence within the same range sampling point unit along the Doppler pulse dimension. The window function used in the FFT operation includes a Chebyshev window or a Hamming window to suppress Doppler spectral sidelobe leakage. The FFT operation along the Doppler pulse dimension is performed independently on each range unit, generating the range-Doppler two-dimensional complex data matrix corresponding to that receiving channel. The range-Doppler two-dimensional complex data matrices of each receiving channel are stacked according to the receiving channel index to form channel-Doppler-range dimension three-dimensional radar data. The video signal preprocessing submodule performs adaptive denoising, grayscale enhancement, color space conversion, and resolution normalization preprocessing on the original video image signal to generate preprocessed video data.

[0021] In radar preprocessing, the Doppler pulse is a wide pulse signal whose frequency changes linearly with time. The matched filter coefficients are frequency domain response vectors generated by weighting the complex conjugate time-reversed sequence of the transmitted waveform using a window function. This invention achieves pulse compression through fast frequency domain convolution, converging the wide pulse energy into a narrow pulse peak, achieving centimeter-level range resolution while maintaining high average power. Combined with Doppler Viga window FFT operations, it effectively suppresses spectral sidelobe leakage, ultimately generating a three-dimensional radar data cube with high signal-to-noise ratio and good sidelobe suppression, providing a high-fidelity data foundation for subsequent target detection and feature extraction.

[0022] Furthermore, the adaptive denoising operation of the preprocessing submodule specifically involves: calculating the statistical median of the gradient magnitude in the pixel neighborhood, adaptively adjusting the filter kernel weights, and filtering out Gaussian noise, salt-and-pepper noise, and sensor noise through convolutional filtering, while preserving image edge and texture features; grayscale enhancement specifically involves: performing grayscale remapping based on the average pixel brightness in the local area, expanding the grayscale dynamic range, improving low-light contrast, and suppressing illumination distortion; color space conversion specifically involves: separating the image luminance and chrominance components based on the luminance-chrominance separation matrix to reduce data redundancy; and resolution normalization specifically involves: scaling the image to a preset uniform resolution to generate standardized preprocessed video data.

[0023] In video preprocessing, adaptive denoising dynamically adjusts the filter kernel weights based on neighborhood gradient statistics, grayscale enhancement remaps based on local brightness mean, and color space conversion reduces data redundancy through luminance-chrominance separation. This invention effectively preserves image edge and texture details while filtering out sensor noise and illumination interference, significantly improving image recognizability in low-light and high-dynamic scenes. After resolution normalization, a standardized video stream with a unified format is generated, effectively reducing parameter adaptation overhead and irregular storage access when subsequent heterogeneous computing modules process video data from different sources.

[0024] Furthermore, the GPU unit includes one or more GPU cores. The specific steps for matching and scheduling computing resources based on the computational intensity of the radar signal processing task include: during compilation, pre-generating a two-dimensional window coefficient matrix according to the required window function types for the Doppler and range dimensions. The two-dimensional window coefficients refer to the two-dimensional weight matrix generated by applying one-dimensional window functions to the Doppler and range dimensions and then performing an outer product operation. This weight matrix is ​​used for weighted preprocessing of the range-Doppler two-dimensional complex data matrix. The generation process is as follows: based on the specific requirements of the radar system for Doppler sidelobe suppression and range sidelobe suppression, one-dimensional window functions such as Chebyshev windows, Hamming windows, and Blackman windows are selected to generate Doppler window vectors and range window vectors. Then, the outer product of the two one-dimensional window vectors is calculated to obtain a two-dimensional window coefficient matrix of the same size as the range-Doppler data matrix. This coefficient matrix is ​​pre-calculated during compilation and stored in the GPU's constant memory to reduce runtime repetitive computation overhead. During runtime, the three-dimensional data is split into multiple two-dimensional data slices according to the channel dimension, and element-wise dot product multiplication is performed on each batch of two-dimensional slices and the two-dimensional window coefficient matrix. The GPU uses a parallel thread array to distribute different data blocks from different channels or within the same channel to a large number of thread bundles, achieving single-instruction multiple-data parallel processing. This allows for independent windowing operations on each distance and Doppler unit, thereby suppressing spectral leakage caused by the Fourier transform. The GPU device is adaptively selected based on the number of FFT batches: when the number of FFT batches is less than a first threshold, a low-power GPU device is selected; when the number of FFT batches is between the first and second thresholds, the available GPU device with the lowest load is selected; when the number of FFT batches is greater than or equal to the second threshold, a high-power GPU device with a low load is selected. A batch 2D FFT operator is invoked to perform a batch Fourier transform on the windowed data, generating channel-distance 2D angular spectrum data. The batch 2D FFT operator refers to a dedicated parallel operator within the GPU computing framework that simultaneously performs a 2D fast Fourier transform on a batch of 2D complex matrices. This operator internally encapsulates the batch call process for row-direction one-dimensional FFT and column-direction one-dimensional FFT. It utilizes the batch processing interface provided by CUDA's cuFFT library or ROCm's rocFFT library to merge multiple independent two-dimensional matrix FFT requests into a single library function call. By using streaming parallelism and kernel concurrency, it reduces GPU kernel startup latency and improves memory bandwidth utilization. It reads the radar sampling mode identifier. If it is real sampled data, it performs conjugate symmetric pruning on the angle spectrum data to remove redundant components. If it is complex sampled data, it retains the complete angle spectrum data. The radar sampling mode identifier is a flag bit stored in the radar data packet header or system configuration register, used to indicate whether the time domain signal acquired by the current radar receiving channel is orthogonal dual-channel complex sampling (I / Q channels) or real sampling mode containing only in-phase components.The judgment is based on reading the identifier value: if the identifier corresponds to the real sampling mode, the acquired signal only contains the real part, and its spectrum has conjugate symmetry characteristics. Therefore, after performing FFT processing on the angle spectrum data, a conjugate symmetry pruning operation needs to be performed to remove redundant negative frequency components; if the identifier corresponds to the complex sampling mode, the signal contains complete complex information, and no pruning is required to directly retain the complete angle spectrum data for subsequent processing.

[0025] The two-dimensional window coefficients are weight matrices generated by the outer product of the range window vector and the Doppler window vector. The batch two-dimensional FFT operator refers to the parallel operator that performs two-dimensional Fourier transforms on multiple two-dimensional matrices in batches using GPU library functions. The radar sampling mode identifier is used to distinguish between I / Q complex sampling and real sampling to determine whether to prune redundant negative spectra. This invention eliminates runtime repetitive weighting operations by pre-compiling the window coefficients at compile time and storing them in constant memory. Combined with adaptive GPU device selection and batch FFT interface calls, it significantly reduces kernel startup latency and improves memory bandwidth utilization, enabling the angle spectrum generation speed of large-scale three-dimensional radar data to meet the sub-millisecond real-time processing requirements.

[0026] Furthermore, the GPU unit optimizes the task execution order based on the data parallelism scale of the video signal processing task. Specifically, this includes: image feature extraction, based on a lightweight convolutional neural network architecture, performs multi-scale convolution operations, pooling dimensionality reduction, and batch normalization on the preprocessed video signal data to extract global texture features, edge gradient features, and local keypoint feature vectors from the video frames, constructing a high-dimensional feature map; feature calculation blocks are divided according to the GPU memory bandwidth and the number of parallel computing cores, and a pipelined parallel strategy is used to complete batch normalization and dimensionality compression of feature vectors; target detection and recognition operations input the high-dimensional feature map into a preset target detection network model, perform candidate box generation, feature matching, and confidence filtering operations, locate the pixel coordinate bounding boxes of target objects in the video frame, and classify and identify the target class. The system performs multi-target non-maximum suppression processing in batches using GPU multi-threaded parallel mechanisms, eliminating duplicate and redundant detection boxes. Image segmentation uses the target detection bounding boxes as regions of interest, employing semantic segmentation algorithms to perform pixel-level classification operations on the feature map, distinguishing the target foreground region from the background environment region in the video frame, and generating a binarized segmentation mask image. Image registration extracts the corresponding feature keypoints from the binarized segmentation mask image, calculates the spatial transformation matrix parameters between feature points, and performs rigid registration operations including inter-frame image translation, rotation, and scaling based on the transformation matrix. Pixel grayscale filling and distortion correction of the registered image are completed using GPU parallel interpolation algorithms. Video encoding and decoding operations are performed using GPU hardware acceleration for video compression encoding and decoding reconstruction, dynamically adjusting encoding parameters to reduce bandwidth consumption.

[0027] In GPU video processing, lightweight convolutional neural networks specifically refer to backbone network structures optimized for edge computing. Non-maximum suppression is used to eliminate overlapping and redundant candidate bounding boxes in object detection, and rigid registration refers to the geometric alignment of image translation, rotation, and scaling through a spatial transformation matrix. This invention maps the entire chain of feature extraction, object detection, semantic segmentation, inter-frame registration, and hardware encoding / decoding to a GPU parallel pipeline for execution. Utilizing the concurrent throughput of thousands of computing cores, the latency of multi-task analysis of high-definition video streams is compressed to the millisecond level per frame, and the dynamic adjustment of the bitstream through a hardware encoder significantly reduces transmission bandwidth pressure.

[0028] Furthermore, the multi-threaded CPU unit contains one or more multi-core CPUs. Based on the normalized weighted evaluation of task priority parameters, the specific steps for performing global and local two-layer heterogeneous scheduling include: performing normalized weighted calculations using floating-point operation density, branch prediction friendliness, and data parallelism granularity as priority parameters. Floating-point operation density refers to the ratio of the number of floating-point arithmetic operations performed by a single thread or single computing unit per unit time to the number of memory access operations, reflecting the computational bottleneck characteristics of the task; branch prediction friendliness characterizes the predictability of conditional branch instructions in the task code, commonly measured by branch prediction failure rate or the proportion of branch instructions to total instructions; data parallelism granularity refers to the number of data elements that can be processed simultaneously or the number of subtasks that can be executed independently, reflecting the degree to which the task is naturally suitable for SIMD or SIMT parallel architectures, generating a task heterogeneous execution tendency index; tasks with a tendency index reaching the GPU scheduling threshold are assigned to the global task scheduling layer, and the remaining tasks are assigned to the local execution scheduling layer; the global task scheduling layer maintains an estimated remaining execution time and a task deadline timestamp for each task, and the difference between the two is defined as the task slack. The scheduler employs a dynamic priority update strategy: when the slack of a task is detected to be less than a first preset threshold, its priority is increased to the highest level to ensure completion before the deadline; when the slack is greater than a second preset threshold, its priority is appropriately reduced to make way for more urgent tasks. The adjustment range of priority is proportional to the inverse of the slack, and a smoothing factor is introduced to prevent priority jitter, ensuring that radar signal processing tasks and video analysis tasks with high real-time requirements obtain scheduling decisions that meet timing constraints in heterogeneous resource competition. The scheduler adjusts priorities based on task deadlines, dynamically classifies tasks into high-priority and low-priority categories, and generates tasks based on these adjusted priorities. It monitors CPU and GPU loads in real time; if either load exceeds a preset threshold, it maintains resource allocation for high-priority tasks while halting resource allocation for low-priority tasks. The local execution scheduling layer employs a preemptive minimum load priority algorithm, combined with cache affinity for task allocation, supporting resource preemption for high-priority tasks. Specifically, the scheduler maintains the ready task queue and current load status of each CPU core in real time, prioritizing the available core with the lowest current load when allocating new tasks to balance the computational pressure across cores. For tasks with cache hotness characteristics—meaning the data address space accessed by the task overlaps with data from a recently processed task on a certain core—the scheduler forcibly binds such tasks to a CPU core holding relevant cached data that is still valid, thereby leveraging the principle of cache locality to reduce last-level cache miss rate and memory access latency.In terms of priority management, this layer supports preemptive preemption of execution resources from low-priority tasks by high-priority tasks: when a high-priority task enters the ready state and no idle cores are available, the scheduler will interrupt the execution of a low-priority task, save its context, and immediately allocate computing core resources to the high-priority task. Simultaneously, the local scheduling layer and the global task scheduling layer work together. By monitoring CPU and GPU load in real time, when any computing unit load exceeds a preset load threshold, a resource protection mechanism is automatically triggered. This means that resource allocation and execution scheduling for all low-priority tasks are suspended, maintaining only the computing resource supply for high-priority tasks to ensure the satisfaction of critical task timing constraints and the overall real-time performance of the system.

[0029] Floating-point operation density quantifies the computational cost per unit memory access; branch prediction friendliness reflects the predictability of conditional jumps in the code; and data parallelism granularity characterizes the degree to which a task is naturally adapted to a single-instruction multi-threaded architecture. Slackness is defined as the difference between the task deadline and the estimated remaining execution time, used to dynamically adjust priorities; cache affinity refers to assigning tasks to CPU cores where data still resides in their caches to reduce access latency. This invention achieves efficient load balancing of computationally intensive tasks on the CPU and the convergence of computationally intensive tasks to the GPU through a two-layer heterogeneous scheduling mechanism; the global layer ensures the deadline compliance of real-time tasks, while the local layer maximizes CPU pipeline utilization and data locality benefits through preemption and cache affinity strategies, thereby improving the system's deterministic real-time response capability in multi-task concurrent scenarios.

[0030] Furthermore, the specific steps for dynamically adjusting the task allocation strategy based on real-time hardware load and resource utilization include: During system operation, the task allocation and load balancing unit collects the streaming multiprocessor utilization rate, memory bandwidth utilization rate, CPU core load, and cache hit rate of each GPU core in the GPU unit in real time at a preset sampling period. The collected raw indicators are filtered by moving average to remove instantaneous spikes and then concatenated into a heterogeneous resource state vector according to preset dimensions. Each dimension corresponds to the GPU load feature sub-vector and the CPU load feature sub-vector, respectively. This vector serves as a complete representation of the real-time utilization status of heterogeneous computing resources as the current resource snapshot, which is used to trigger the state machine switching of the task allocation strategy; Based on the heterogeneous resource state vector, the collected GPU computing load features and CPU computing load features are concatenated into the current resource snapshot; Based on a preset load grading threshold table, the current resource snapshot is divided into three state intervals: light load, balanced, and heavy load; When the resource snapshot is in the light load state interval, the batch two-dimensional windowing and batch fast Fourier transform sub-tasks in the radar signal processing task are fixedly allocated to the preset main GPU core, and the multi-scale convolution operation sub-tasks in the video signal processing task are allocated to designated... GPU stream processor array; when the resource snapshot is in the heavy load state range, for GPU units, the remaining computing power estimate of each GPU core is calculated, and the newly added FFT batch calculation tasks in the radar signal processing task are migrated to the GPU core with the largest remaining computing power estimate and the memory bandwidth utilization is lower than the preset congestion threshold; for multi-threaded CPU units, if the length of the pending logic control task queue is detected to exceed the preset queue warning threshold, a task stealing strategy is enabled, allowing idle CPU cores to steal the task with the highest cache affinity from the tail of the task queue of busy cores for execution; when the resource snapshot is in the balanced state range, the task throughput ratio between GPU units and multi-threaded CPU units is calculated. If the computing throughput of GPU units is significantly higher than the scheduling throughput of CPU units and the transmission channel utilization of data interaction and synchronization modules is not saturated, then the lightweight auxiliary computing tasks originally executed by the CPU are migrated to GPU execution. Lightweight auxiliary computing tasks include, but are not limited to: constant false alarm rate threshold calculation for moving target detection in radar signal processing, non-maximum suppression operation in target detection network post-processing in video processing, and coordinate transformation matrix operations in the data post-processing stage. These types of tasks have relatively regular computational logic. Executing them on a GPU can effectively utilize idle GPU computing arrays and reduce CPU scheduling load. If the CPU unit core utilization rate is lower than a preset lower threshold, it indicates that CPU resources are idle. In this case, some post-processing result verification tasks suitable for CPU serial or logic branch-intensive characteristics are migrated back from the GPU to the CPU for execution. Specific tasks include: point-track association verification after radar target detection point aggregation, temporal consistency verification in video target re-identification results, and rule legality verification of target identity identifiers and behavior tags in fused data packets.Such tasks involve a lot of conditional judgments, state machine maintenance, and data structure traversal. Executing them on the CPU can make full use of its branch prediction and out-of-order execution capabilities, while freeing up GPU computing resources to focus on high-throughput parallel computing core tasks.

[0031] The heterogeneous resource state vector is a snapshot of multiple features, including GPU streaming multiprocessor utilization, memory bandwidth utilization, CPU load, and cache hit rate. The task-stealing strategy refers to idle CPU cores actively acquiring executable tasks from the tail of the busy core queue. Lightweight auxiliary computing tasks refer to post-processing operations with well-structured computations but few logical branches, such as constant false alarm rate threshold calculation and non-maximum suppression. This invention is based on hierarchical dynamic control of real-time load snapshots. Under light loads, fixed allocation reduces scheduling overhead; under heavy loads, task migration and stealing prevent overloading of a single device; and under balanced loads, bidirectional task migration between CPU and GPU is implemented to achieve optimal allocation of computing resources. This mechanism effectively reduces the average task latency and tail latency of heterogeneous systems, improving overall hardware utilization and energy efficiency.

[0032] Furthermore, the specific steps of the data interaction and synchronization module include: At the hardware level, during system initialization, the PCIe bus address space is enumerated, physical pages are allocated, memory is locked to construct a CPU-GPU shared circular buffer, and a zero-copy data channel is established through memory mapping; atomic synchronization locks are configured to achieve mutual exclusion access to shared data between the two ends; At the software level, the CPU issues task descriptors with sequence numbers and timestamps, and the GPU writes back the task status and data after completing the calculation; the CPU polls the status channel to verify data readiness and execution latency; a hardware interrupt is triggered through a synchronization barrier counter to achieve precise timing alignment of radar data and video data; the GPU generates a data cyclic redundancy check code, which is checked and compared by the CPU when reading, and data retransmission is triggered if the check fails.

[0033] Zero-copy circular buffers refer to a shared data queue between the CPU and GPU established through physical page locking memory and memory mapping technology, which can transfer descriptors and results without data copying. Synchronization barrier counters are used to wait for multiple data streams to reach the synchronization point before triggering subsequent processing. Cyclic redundancy check (CRC) detects transmission bit errors by generating checksums on the GPU and verifying them on the CPU. This invention, based on the PCIe bus, significantly reduces the overhead of data transfer between heterogeneous devices. Atomic synchronization locks and sequence number mechanisms ensure data consistency and operation mutual exclusion in multi-threaded environments. Synchronization barriers ensure sub-millisecond timing alignment accuracy between radar and video frames, while hardware verification and retransmission mechanisms eliminate silent data corruption that may occur during high-speed transmission. Overall, this constructs a high-bandwidth, low-latency, and robust heterogeneous data path.

[0034] like Figure 2The flowchart shown illustrates a parallel processing method for radar video signals based on GPU-CPU heterogeneity. This method is characterized by receiving raw radar echo signals and raw video image signals; performing preprocessing operations on the raw radar echo signals and raw video image signals respectively to dynamically generate radar signal processing tasks and video signal processing tasks; the heterogeneous computing processing module performs heterogeneous parallel processing: the GPU unit matches and schedules computing power and optimizes task order, the multi-threaded CPU unit performs two-layer heterogeneous scheduling, and the task allocation and load balancing unit dynamically adjusts the task allocation strategy; a zero-copy circular buffer is constructed to complete task synchronization, timing alignment, and data consistency verification, outputting radar signal data and video signal data after consistency verification; and outputting the radar signal data, video signal data, and their fusion result after consistency verification. The fusion result is the target multi-dimensional attribute representation information obtained by joint decision processing of the radar signal data and video signal data after consistency verification based on spatiotemporal alignment.

[0035] In an exemplary embodiment, a computer-readable storage medium is also provided, such as a memory including at least one computer program, which is executable by a processor to perform the data processing system described above. For example, the computer-readable storage medium can be a read-only memory (ROM), a random access memory (RAM), a compact disc read-only memory (CD-ROM), magnetic tape, floppy disk, and optical data storage device, etc.

[0036] The above description is only an optional embodiment of this application and is not intended to limit this application. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the protection scope of this application.

Claims

1. A parallel processing system for radar video signals based on GPU-CPU heterogeneity, characterized in that, The system includes a signal input module, a signal preprocessing module, a heterogeneous computing processing module, a data interaction and synchronization module, and a result output module. The signal input module is used to receive the original radar echo signal and the original video image signal; The signal preprocessing module is used to perform preprocessing operations on the original radar echo signal and the original video image signal respectively, and then dynamically generate radar signal processing tasks and video signal processing tasks. The heterogeneous computing processing module includes a GPU unit, a multi-threaded CPU unit, and a task allocation and load balancing unit. The GPU unit is used to match and schedule computing resources according to the computational intensity of radar signal processing tasks and optimize the task execution order according to the data parallelism scale of video signal processing tasks. The multi-threaded CPU unit is used to perform global and local two-layer heterogeneous scheduling based on normalized weighted evaluation of task priority parameters. The task allocation and load balancing unit is used to dynamically adjust the task allocation strategy according to the real-time hardware load and resource utilization. The data interaction and synchronization module is used to build a low-latency CPU-GPU data interaction channel to complete the timing alignment and data consistency verification of radar and video data. The result output module is used to output radar signal data, video signal data and the fusion result of the two after consistency verification. The fusion result is the target multi-dimensional attribute representation information obtained by joint decision-making of radar and video data after spatiotemporal alignment.

2. The parallel processing system for radar video signals based on GPU-CPU heterogeneity as described in claim 1, characterized in that, The signal preprocessing module includes a radar signal preprocessing submodule and a video signal preprocessing submodule; The radar signal preprocessing submodule is used to perform filtering, pulse compression, and moving target detection operations on the raw radar echo signal, specifically including: It receives the raw time-domain echo signal from each receiving channel, performs anti-aliasing low-pass filtering, and filters out out-of-band noise and high-frequency interference components that are higher than the Nyquist frequency of the analog-to-digital converter. The signal after the anti-aliasing low-pass filtering is then subjected to band-pass filtering to retain the echo energy within the effective working bandwidth corresponding to the radar transmitted waveform. Based on the modulation parameters of the radar transmitted waveform, the matched filter coefficients are generated. For the sampling point sequence corresponding to each Doppler pulse of each receiving channel, the filtered sampling point sequence is subjected to a fast frequency domain convolution operation with the matched filter coefficients to obtain the range-Doppler two-dimensional complex data matrix corresponding to each receiving channel. For each receiving channel's range-Doppler two-dimensional complex data matrix, a windowed fast Fourier transform operation is performed on the slow-time sampling sequence within the same range sampling point cell along the Doppler pulse dimension to generate the range-Doppler two-dimensional complex data matrix; The range-Doppler two-dimensional complex data matrices of each receiving channel are stacked according to the receiving channel index to form three-dimensional radar data in the channel-Doppler-range dimension. The video signal preprocessing submodule is used to perform adaptive noise reduction, grayscale enhancement, color space conversion, and resolution normalization preprocessing on the original video image signal to generate preprocessed video data.

3. The parallel processing system for radar video signals based on GPU-CPU heterogeneity as described in claim 2, characterized in that, The adaptive denoising operation of the preprocessing submodule is specifically as follows: calculate the statistical median of the gradient magnitude of the pixel neighborhood, adaptively adjust the filter kernel weight, and filter out Gaussian noise, salt-and-pepper noise and sensor noise through convolutional filtering, while preserving image edge and texture features. The grayscale enhancement operation specifically involves: performing grayscale remapping based on the average pixel brightness of a local area, expanding the grayscale dynamic range, improving low-light contrast, and suppressing illumination distortion. The color space conversion operation specifically involves separating the image's luminance and chrominance components based on a luminance-chrominance separation matrix to reduce data redundancy. The resolution normalization operation specifically involves scaling the image to a preset uniform resolution to generate standardized pre-processed video data.

4. The parallel processing system for radar video signals based on GPU-CPU heterogeneity as described in claim 1, characterized in that, The specific steps for matching and scheduling computing resources based on the computational intensity of the radar signal processing task include: Based on the two-dimensional window coefficients generated during compilation, batch parallel two-dimensional windowed matrix dot product operations are performed on the three-dimensional radar data in the channel-Doppler-range dimension. The GPU device is adaptively selected based on the number of FFT batches corresponding to the two-dimensional windowing operation: if the number of FFT batches required by the task is less than the first preset batch number threshold, then an available GPU device with a number of computing units lower than the preset first computing unit number threshold is selected; if the number of FFT batches required by the task is not less than the first preset batch number threshold but less than the second preset batch number threshold, then the device with the lowest load in the current list of available GPU devices is selected; if the number of FFT batches required by the task is greater than or equal to the second preset batch number threshold, then the device with the most computing units and a current load lower than the preset load threshold is selected from the available GPU devices. The batch two-dimensional FFT operator is called, with the number of FFT batches as the batch dimension, the number of sampling points in a single Doppler as the distance dimension transformation length, and the number of Doppler channels as the Doppler dimension transformation length. The batch Fourier transform is performed on the data after the two-dimensional windowing operation to generate channel-distance two-dimensional angle spectrum data. Read the radar sampling mode identifier, and determine whether the radar data is real sampled data based on the radar sampling mode identifier. If it is, perform conjugate symmetric pruning on the angle spectrum data to remove redundant components; otherwise, retain the complete channel-range two-dimensional angle spectrum data.

5. The parallel processing system for radar video signals based on GPU-CPU heterogeneity as described in claim 1, characterized in that, The GPU unit optimizes the task execution order based on the data parallelism of the video signal processing task, specifically including: The image feature extraction operation is based on a lightweight convolutional neural network architecture. It performs multi-scale convolution operations, pooling dimensionality reduction, and batch normalization on the preprocessed video signal data to extract global texture features, edge gradient features, and local key point feature vectors from the video frames and construct a high-dimensional feature map. The feature calculation blocks are divided according to the GPU memory bandwidth and the number of parallel computing cores, and a pipelined parallel strategy is used to complete the batch normalization and dimensionality compression of the feature vectors. The target detection and recognition operation inputs a high-dimensional feature map into a preset target detection network model, performs candidate box generation, feature matching and confidence filtering operations, locates the pixel coordinate bounding box of the target object in the video frame and classifies and identifies the target category attributes; and performs non-maximum suppression processing of multiple targets in batches based on the GPU multi-threaded parallel mechanism to remove duplicate and redundant detection boxes. The image segmentation operation takes the target detection bounding box as the region of interest, and uses a semantic segmentation algorithm to perform pixel-level classification operations on the feature map to distinguish the target foreground region and background environment region in the video frame, generating a binarized segmentation mask image. The image registration operation extracts the corresponding feature key points of the binarized segmented mask image, calculates the spatial transformation matrix parameters between feature points, and performs a rigid registration operation including inter-frame image translation, rotation, and scaling based on the transformation matrix; pixel grayscale filling and distortion correction of the registered image are completed by GPU parallel interpolation algorithm. The video encoding and decoding operations are performed using GPU hardware acceleration to perform video compression encoding and decoding reconstruction, and the encoding parameters are dynamically adjusted to reduce bandwidth usage.

6. The parallel processing system for radar video signals based on GPU-CPU heterogeneity as described in claim 1, characterized in that, The specific steps for performing global and local two-layer heterogeneous scheduling based on the normalized weighted evaluation of task priority parameters include: Using floating-point operation density, branch prediction friendliness, and data parallelism granularity as priority parameters, normalized weighted calculation is performed to generate a task heterogeneous execution tendency index; tasks whose task heterogeneous execution tendency index reaches the preset GPU scheduling threshold are assigned to the global task scheduling layer, and the remaining tasks are assigned to the local execution scheduling layer. The global task scheduling layer dynamically adjusts the priority based on the difference between the task execution time and the deadline, and dynamically divides the task levels based on the adjusted priority, generating high-priority tasks and low-priority tasks; it monitors the CPU load and GPU load in real time, and if the CPU load or GPU load is higher than the preset corresponding load threshold, it maintains the resource allocation of high-priority tasks and stops the resource allocation of low-priority tasks. The local execution scheduling layer adopts a preemptive minimum load priority scheduling algorithm combined with cache affinity, which supports high-priority tasks to preempt resources and assigns tasks that frequently access the same data to the CPU core that has recently processed the data, so as to reduce data read latency by utilizing the principle of CPU cache locality.

7. The parallel processing system for radar video signals based on GPU-CPU heterogeneity as described in claim 1, characterized in that, The specific steps for dynamically adjusting the task allocation strategy based on real-time hardware load and resource utilization include: During system operation, the task allocation and load balancing unit collects the streaming multiprocessor utilization rate, memory bandwidth utilization rate, CPU core load, and cache hit rate of each GPU core in the GPU unit in real time at a preset sampling period to construct a heterogeneous resource state vector. The heterogeneous resource state vector serves as a current resource snapshot to represent the real-time load of the GPU and CPU. Based on the heterogeneous resource state vector, the collected GPU computing load characteristics and CPU computing load characteristics are concatenated to form the current resource snapshot; based on the preset load classification threshold table, the current resource snapshot is divided into three state intervals: light load, balanced, and heavy load. When the resource snapshot is in a light-load state, the remaining computing power estimate of each GPU core is calculated for the GPU unit, and the newly added FFT batch calculation task in the radar signal processing task is migrated to the GPU core with the largest remaining computing power estimate and the memory bandwidth utilization is lower than the preset congestion threshold; for multi-threaded CPU units, if the length of the queue of pending logic control tasks is detected to exceed the preset queue warning threshold, the task stealing strategy is enabled, allowing idle CPU cores to steal the task with the highest cache affinity from the tail of the task queue of busy cores for execution; When the resource snapshot is in a balanced state range, the task throughput ratio between the GPU unit and the multi-threaded CPU unit is calculated. If the computing throughput of the GPU unit is higher than the scheduling throughput of the CPU unit and the transmission channel utilization of the data interaction and synchronization module does not reach the preset channel utilization threshold, then the preset lightweight auxiliary computing task is migrated to the GPU for execution. If the CPU unit core utilization is lower than the preset channel utilization threshold, then the preset post-processing result verification task is migrated back from the GPU to the CPU for execution.

8. The parallel processing system for radar video signals based on GPU-CPU heterogeneity as described in claim 1, characterized in that, The specific steps of the data interaction and synchronization module include: At the hardware level, during system initialization, the PCIe bus address space is enumerated, physical pages are allocated, memory is locked to build a CPU-GPU shared circular buffer, and a zero-copy data channel is established through memory mapping; atomic synchronization locks are configured to achieve mutual exclusion access to shared data between the two ends. At the software level, the CPU issues task descriptors with serial numbers and timestamps, and the GPU writes back the task status and data after completing the calculation; the CPU polls the status channel to verify data readiness and execution latency. A hardware interrupt is triggered by a synchronization barrier counter to achieve precise timing alignment between radar data and video data; The GPU generates a cyclic redundancy check (CRC) code for the data. The CPU reads the data and performs a check and comparison. If the check fails, the data is retransmitted.

9. A parallel processing method for radar video signals based on GPU-CPU heterogeneity, used to implement the parallel processing system for radar video signals based on GPU-CPU heterogeneity as described in any one of claims 1-8, comprising: Receive raw radar echo signals and raw video image signals; After performing preprocessing operations on the raw radar echo signal and the raw video image signal respectively, radar signal processing tasks and video signal processing tasks are dynamically generated. Heterogeneous parallel processing is performed using heterogeneous computing processing modules: GPU units match and schedule computing power and optimize task order, multi-threaded CPU units perform two-level heterogeneous scheduling, and task allocation and load balancing units dynamically adjust task allocation strategies. CPU-GPU data interaction is completed based on a zero-copy channel, enabling time-series alignment and consistency verification of radar and video data. Outputs radar signal data and video signal data after consistency verification, as well as multi-dimensional target attribute representation information after spatiotemporal fusion.

10. A non-transitory computer-readable storage medium storing computer instructions, wherein, The computer instructions are used to cause the computer to execute the parallel processing method for radar video signals based on GPU-CPU heterogeneity as described in claim 9.

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