Method and system for optimizing storage device transfer parameters

Abstract

The application discloses an optimization method and an optimization system for transmission parameters of a storage device, and belongs to the technical field of storage device optimization. The optimization method collects real-time running state parameters of the storage device through a fixed sampling period, and establishes quantitative mapping logic of transmission parameters and transmission performance and power consumption and device thermal dynamics logic. The junction temperature margin, transmission performance and power consumption are taken as optimization targets, and the optimal transmission parameter combination is solved and issued to a device host and a NAND controller for execution with the core constraint of not triggering thermal throttling. The optimization system comprises online monitoring, pre-calibration and mapping modeling, online optimization solving and parameter issuing and executing modules. The application can realize multi-dimensional transmission parameter collaborative optimization, actively prevent and control thermal risks, effectively improve the performance stability of the continuous operation of the storage device, and balance performance, thermal reliability and power consumption control.

Description

Technical Field

[0001] This invention relates to the field of storage device optimization technology, and more specifically, to a method and system for optimizing the transmission parameters of storage devices. Background Technology

[0002] With the rapid development of big data, cloud computing, edge computing, and high-performance storage technologies, solid-state storage devices (SSDs) have become the core storage carrier in data centers, industrial control, and high-end consumer electronics due to their advantages such as high read / write speeds, low access latency, and shock resistance. At the same time, various application scenarios have placed increasingly stringent requirements on the continuous transmission performance, operational stability, power consumption control capabilities, and thermal reliability of SSDs. Especially in high-load continuous read / write scenarios, how to maximize the performance potential of storage hardware while ensuring the safe and stable operation of the device has become one of the core research directions in the field of solid-state storage.

[0003] The transmission performance of solid-state storage devices is determined by several key transmission parameters, including IO queue depth, single IO block size, parallel NAND flash channel count, controller core clock frequency, and NAND interface operating frequency. These parameters not only directly determine the device's read / write bandwidth and IO response performance, but also have a strong coupling relationship with the device's power consumption, chip junction temperature, and thermal characteristics. During continuous high-load operation, improper transmission parameter configuration can easily lead to a surge in power consumption of the controller chip and NAND flash array, a rapid increase in junction temperature, and trigger the device's thermal throttling protection mechanism. Once thermal throttling is triggered, the device will forcibly reduce its operating frequency and transmission performance, directly causing a sharp drop in transmission rate and significant fluctuations in read / write latency, severely affecting the storage device's continuous service capability and operational stability.

[0004] Currently, existing technologies for configuring and optimizing transmission parameters for solid-state storage devices mainly suffer from the following technical shortcomings: Firstly, the transmission parameters of existing storage devices mostly adopt factory-fixed preset configuration schemes, or only perform segmented parameter switching based on simple load levels. They cannot perform fine-grained dynamic closed-loop adjustment according to the real-time operating status of the device, ambient temperature, junction temperature changes, and power consumption levels. The parameter configuration is seriously out of sync with the actual operating conditions, making it difficult to fully unleash the performance potential of storage hardware in different scenarios. Secondly, existing performance and power consumption optimization solutions mostly adopt single-dimensional adjustment methods, without establishing a full-quantitative mapping relationship between multi-dimensional transmission parameters and transmission performance and power consumption, and without fully considering the bottleneck effect of storage device transmission bandwidth. They cannot achieve coordinated optimization of multiple transmission parameters, and the optimization effect is very limited, making it difficult to meet the dual needs of performance improvement and power consumption control. Third, existing technologies all adopt a passive response mechanism for thermal risk prevention and control of storage devices. Only after the junction temperature of the main control chip or NAND flash array triggers the thermal throttling threshold can the temperature be controlled afterward by reducing the frequency and limiting the performance. It is impossible to predict the junction temperature in advance and actively avoid thermal risks through thermal characteristic modeling. Inevitably, performance fluctuations caused by thermal throttling will occur, and the stability of the device's continuous performance under high load scenarios cannot be guaranteed.

[0005] Therefore, a method and system for optimizing the transmission parameters of storage devices are proposed. Summary of the Invention

[0006] To overcome the above-mentioned deficiencies of the prior art, embodiments of the present invention provide a method and system for optimizing the transmission parameters of storage devices.

[0007] To achieve the above objectives, the present invention provides the following technical solution: Methods for optimizing storage device transfer parameters include: S1: Collect real-time operating status parameters of the storage device at a fixed sampling period, including the junction temperature of the main control chip, the average junction temperature of the NAND flash array, the ambient temperature, the real-time total power consumption of the device, the real-time transmission rate, and the duration of continuous high-load operation. S2: Establish the quantitative mapping logic between storage device transmission parameters and transmission performance, power consumption, and the device's thermodynamic logic; S3: Based on real-time operating status parameters and pre-established logic, the optimal combination of transmission parameters is solved by taking the combined temperature margin, transmission performance and power consumption as optimization objectives. S4: Send the optimal combination of transmission parameters to the master controller and NAND controller of the storage device for execution.

[0008] Specifically, the storage device transmission parameters include; Controllable transmission parameter set ;in For the depth of the IO queue, For single IO transfer block size, This refers to the number of parallel channels in NAND flash memory. The main control core clock frequency, This refers to the operating frequency of the NAND interface.

[0009] Specifically, the logic for quantizing and mapping transmission parameters to transmission performance; ; For transmission rate, This is the queue depth efficiency factor. The main control processing bandwidth. This represents the total bandwidth of the NAND interface. This refers to the read / write bandwidth of the NAND array.

[0010] Specifically, the quantization mapping logic between transmission parameters and power consumption; ; This refers to the device's static power consumption. Established based on the dynamic power consumption model of CMOS circuits For NAND interface and channel power consumption, This refers to the power consumption for reading and writing NAND arrays.

[0011] Specifically, the thermodynamic logic of the device includes the thermal balance equation of the main control chip and the thermal balance equation of the NAND flash memory array; Thermal balance equation of main control chip:

[0012] NAND flash memory array thermal balance equation: ; in The main control chip's thermal capacity, The thermal resistance from the main control chip to the environment. For the equivalent heat capacity of the NAND flash memory array, Thermal resistance of the NAND flash memory array to the environment; and The junction temperature of the main control chip and the ambient temperature at time t; Let t be the average junction temperature of the NAND flash memory array. The power consumption of the main control core at time t; Let t be the total power consumption of the NAND portion at time t.

[0013] Specifically, the calculation logic for junction temperature prediction; ; ; in and The initial controller and NAND junction temperatures; The controlling thermal time constant; , where is the thermal time constant of the NAND array.

[0014] Specifically, the logic for determining the optimal combination of transmission parameters; Based on pre-established logic, filter out A set of controllable transmission parameters that is lower than the device’s maximum permissible total continuous power consumption is used as candidate set K; The combinations of each item in candidate set K are arranged according to Sort the data from largest to smallest to obtain the sorted set Sorted. Take the top E groups of controllable transport parameter sets from the Sorted dataset, substitute them into the thermodynamic logic, and calculate t= The temperature at that time To predict the time window, controllable transmission parameter combinations in which the junction temperature at all time points does not exceed the set safety limit are selected as the transmission parameter combinations to be evaluated. Calculate the comprehensive evaluation coefficient of the transmission parameter combination to be evaluated, and select the transmission parameter combination with the largest comprehensive evaluation coefficient as the optimal transmission parameter combination.

[0015] Specifically, the logic behind obtaining the overall evaluation coefficient; For each combination of transmission parameters to be evaluated, the junction temperature margin, transmission performance, and power consumption are extracted, weighted and fused, and the comprehensive evaluation coefficient of each combination of transmission parameters is output.

[0016] Specifically, the formula for calculating the overall evaluation coefficient; For the combination of transmission parameters to be evaluated, after inputting the thermodynamic logic, the peak junction temperature of the chip within the prediction time window is calculated, i.e. Based on the "barrel effect," the smallest junction temperature margin between the controller and the NAND flash memory is taken as the effective junction temperature margin for the parameter combination: that is... ; For the transmission rate of the transmission parameter combination to be evaluated = Power consumption performance = and effective junction temperature margin Substitute into the formula A comprehensive evaluation coefficient is obtained through comprehensive calculation. ; The arithmetic mean of the transmission rates for each group of transmission parameter combinations to be evaluated; The power consumption performance of each group of transmission parameter combinations to be evaluated is the arithmetic mean. The effective junction temperature margin is the arithmetic mean of the combined transmission parameters to be evaluated for each group.

[0017] in , as well as These are preset weighting coefficients, and their sum is one.

[0018] A system for optimizing storage device transfer parameters, including: The online monitoring module is used to collect real-time operating status parameters of the storage device at a fixed sampling period and output the collected real-time operating status parameters to the online optimization solution module. The pre-calibration and mapping modeling module is used to pre-establish the quantitative mapping logic between the transmission parameters, transmission performance, and power consumption of the storage device, and to establish the thermodynamic logic of the storage device. The online optimization solution module is connected to the online monitoring module and the pre-calibration and mapping modeling module, respectively. It is used to solve for the optimal combination of transmission parameters based on real-time operating status parameters, pre-established quantization mapping logic and thermodynamic logic, with junction temperature margin, transmission performance and power consumption as optimization objectives. The parameter distribution and execution module is connected to the online optimization and solution module. It is used to distribute the optimal combination of transmission parameters obtained from the solution to the main control unit and NAND controller of the storage device for execution.

[0019] The technical effects and advantages of this invention are as follows: This invention constructs a full-link quantitative model of transmission parameters, performance, power consumption, and thermal characteristics, providing precise support for multi-dimensional parameter collaborative optimization. For five core controllable transmission parameters, including IO queue depth and master control clock frequency, it establishes a quantitative mapping of transmission performance based on the storage bandwidth bottleneck effect, establishes a power consumption calculation model based on CMOS circuit characteristics, and constructs a thermodynamic balance equation of dual heat sources of master control and NAND. It fully quantifies the influence of parameter changes on transmission rate, power consumption, and junction temperature, breaking the limitations of single-dimensional parameter adjustment in existing technologies and replacing the traditional empirical fixed parameter configuration. It can fully explore the performance potential of storage devices within hardware specification constraints. This invention achieves proactive prevention and control of thermal risks, fundamentally avoiding performance fluctuations caused by thermal throttling. With the core constraint of not triggering thermal throttling, the temperature safety constraint is first transformed into the maximum allowable power consumption constraint. Then, the junction temperature prediction model predicts the junction temperature changes within the prediction window, and the parameter combination for full-cycle thermal safety is selected in advance, rather than passive derating after thermal throttling is triggered, which greatly improves the performance stability of the storage device during continuous operation.

[0020] This invention achieves multi-objective collaborative optimization of transmission performance, junction temperature margin, and power consumption, taking into account both the real-time nature of the optimization solution and the adaptability to various scenarios. It first quickly narrows down the range of feasible parameters, and then calculates the comprehensive evaluation coefficient through refined verification and multi-dimensional weighted fusion to select the optimal combination of parameters. Attached Figure Description

[0021] Figure 1 This is a flowchart of the method for optimizing the transmission parameters of the storage device according to the present invention; Figure 2 This is a schematic diagram of the system for optimizing the transmission parameters of the storage device according to the present invention. Detailed Implementation

[0022] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0023] Example 1

[0024] like Figure 1 As shown, the optimization method for storage device transmission parameters is as follows: S1 - Online Monitoring Phase: Real-time operating status parameters of the storage device are collected at fixed sampling intervals, including main control chip junction temperature, NAND flash array average junction temperature, ambient temperature, device real-time total power consumption, real-time transfer rate, and continuous high-load operation duration. S2-Mapping Logic Establishment: Establish the quantitative mapping logic between storage device transmission parameters and transmission performance and power consumption, as well as the device's thermodynamic logic, and pre-calibrate the device's hardware constraint thresholds; Supplementary explanation of hardware constraint thresholds: inherent constraints of the device hardware, fixed after offline calibration. 1. Thermal throttling trigger temperature threshold; 2. Safe temperature upper limit; obtained by subtracting the preset temperature margin from the thermal throttling trigger temperature threshold; the temperature margin is limited to 5-10℃ to avoid triggering thermal throttling. 3. Device power consumption limit threshold; unit: W, the maximum continuous power consumption allowed by the hardware; 4. Device nominal peak transmission rate.

[0025] Specifically: Controllable transmission parameter set ;in For the depth of the IO queue, For single IO transfer block size, This refers to the number of parallel channels in NAND flash memory. The main control core clock frequency, The operating frequency of the NAND interface; Establish a quantitative mapping of the transmission rate of a controllable parameter set, based on the bottleneck effect of the transmission bandwidth of the storage device, and comprehensively consider the main control processing capability, NAND interface bandwidth, and NAND array read / write capability; The quantization mapping logic between transmission parameters and transmission performance is as follows: ; For transmission rate, This is the queue depth efficiency factor. The main control processing bandwidth. This represents the total bandwidth of the NAND interface. This refers to the read / write bandwidth of the NAND array. The calculation of each item in the quantization mapping logic between transmission parameters and transmission performance: The queue depth efficiency factor characterizes the impact of queue depth on I / O concurrency, and the formula is: ;in For the preset fitting coefficients, offline calibration is performed when... After reaching the saturation value, Approaching 1, further increasing the queue depth yields no performance gain.

[0026] The main control processing bandwidth indicates that the main control data processing capability is positively correlated with the clock frequency, and the formula is: ;in The amount of data that the main controller can process in a single clock cycle ( The calibration is performed by the main control hardware architecture. Main control processing efficiency, calibration value under high load steady state, value range High load refers to situations where both the main controller CPU utilization and IO load intensity exceed the corresponding preset thresholds, and the transmission rate is above the preset threshold for five consecutive sampling points. , The preset reference rate of change, and The maximum and minimum values ​​among the 5 sets of data. This is the mean of the 5 sets of data.

[0027] The total bandwidth of the NAND interface is determined by the number of parallel channels and the frequency of the single-channel interface, as shown in the formula: ; The amount of data that can be transmitted in a single clock cycle of a NAND channel ( (This is determined by the NAND interface standard;) To improve interface transmission efficiency, offline calibration is performed based on encoding overhead and transmission latency.

[0028] The read / write bandwidth of a NAND array is the actual read / write bandwidth of the NAND flash memory, which is strongly related to the block size and the number of parallel channels. The formula is: ;in NAND single page size (intrinsic parameter); The average time for reading / writing a single NAND page (an inherent parameter, calibrated separately for reading and writing). ;when for When it is an integer multiple of, =1, which results in the highest read and write efficiency.

[0029] The quantization mapping logic between transmission parameters and power consumption is as follows: ; This refers to the device's static power consumption. Established based on the dynamic power consumption model of CMOS circuits For NAND interface and channel power consumption, Power consumption for NAND array read / write; Calculation of each item in the quantization mapping logic of transmission parameters and power consumption: Static power consumption: The inherent power consumption of the device in standby mode, calibrated offline, in watts (W). Based on the classic dynamic power consumption model of CMOS circuits, the calculation formula is as follows: ;in The equivalent load capacitance of the main control core is calibrated offline, unit: F; The main control core power supply voltage and clock frequency Binding (DVFS mapping relationship, offline calibration); The main control core signal flipping factor is taken as the steady-state calibration value under high load, with a value range of (0,1]. The main control leakage current power consumption is statically calibrated.

[0030] NAND interface and channel power consumption are positively correlated with parallel channel and interface frequency, as shown in the formula: ;in The equivalent load capacitance for a single-channel NAND interface is calibrated offline. Power supply voltage (intrinsic value) for NAND interface; For interface signal toggle factor (offline calibration). This refers to the static power consumption of a single-channel interface (offline calibration).

[0031] The power consumption of NAND array read / write is positively correlated with the number of page operations per unit time, as shown in the formula: The number of page operations completed by the NAND array per unit time multiplied by the energy consumption of a single page operation ;in Average power consumption for NAND single-page read / write (unit: J / page, read / write are calibrated separately). This represents the current transmission rate (unit: Byte / s).

[0032] The device's thermodynamic logic specifically includes the thermal balance equations for the main control chip and the NAND flash memory array. Thermal balance equation of main control chip:

[0033] NAND flash memory array thermal balance equation: ; in This refers to the thermal capacity of the main control chip (offline calibration, characterizing the chip's ability to store heat). The thermal resistance from the main control chip to the environment (offline calibration, characterizing the resistance to heat dissipation). Equivalent thermal capacity of NAND flash memory array (offline calibration). Thermal resistance of NAND flash memory array to environment (offline calibration); and The junction temperature of the main control chip and the ambient temperature at time t; Let t be the average junction temperature of the NAND flash memory array. The power consumption of the main control core at time t; The total power consumption of the NAND portion at time t is obtained by summing the power consumption of the NAND interface and channels, and the read / write power consumption of the NAND array. Junction temperature prediction: When power consumption P is related to ambient temperature When kept constant, the analytical solution of the first-order linear nonhomogeneous differential equation is: ; ; in and The initial controller and NAND junction temperatures; The controlling heat time constant characterizes the rate of temperature rise in the junction. , where is the thermal time constant of the NAND array.

[0034] S3 - Online Optimization Phase: Based on real-time operating status parameters and pre-established logic, the optimal combination of transmission parameters is solved by taking the temperature margin, transmission performance and power consumption as optimization objectives and avoiding thermal throttling as the core constraint. Initial verification is completed by collecting real-time state variables of the device at a fixed sampling period. like All are above the upper limit of safe temperature. The system immediately enters emergency de-rating mode to bring the junction temperature back to a safe range before performing optimization. If the junction temperature is lower than the upper limit of the safe temperature, the system enters the optimization solution process. Core constraints: Within the prediction time window, the chip junction temperature must not exceed the safety limit, and the power consumption must not exceed the power limit. First, the temperature constraint is converted into a power consumption constraint. During long-term continuous operation, the steady-state junction temperature must meet the following requirements: all must be below the safe upper limit. Therefore: Maximum allowable power consumption of the main controller: ; Maximum allowable total power consumption of NAND: ; Maximum permissible total continuous power consumption of the device: ; like > Device power consumption wall threshold, then take The power consumption wall threshold is set as the priority to satisfy the power consumption wall constraint.

[0035] Under the following constraints: (1) (2) Controllable transmission parameter set All parameters within the range must be within their respective preset constraints; (3) The junction temperature is below the upper limit of the safe temperature.

[0036] Based on pre-established logic, filter out A set of controllable transmission parameters that is lower than the device’s maximum permissible total continuous power consumption is used as candidate set K; The combinations of each item in candidate set K are arranged according to Sort the data from largest to smallest to obtain the sorted set Sorted. Take the top E groups of controllable transport parameter sets from the Sorted dataset, substitute them into the thermodynamic logic, and calculate t= The temperature at that time To predict the time window, controllable transmission parameter combinations in which the junction temperature at all time points does not exceed the set safety limit are selected as the transmission parameter combinations to be evaluated. For the transmission parameter combination to be evaluated, the junction temperature margin, transmission performance and power consumption are extracted, weighted and fused, and the comprehensive evaluation coefficient of each transmission parameter combination is output. The specific calculation process is as follows: For the combination of transmission parameters to be evaluated, after inputting the thermodynamic logic, the peak junction temperature of the chip within the prediction time window is calculated, i.e. Based on the "barrel effect," the smallest junction temperature margin between the controller and the NAND flash memory is taken as the effective junction temperature margin for the parameter combination: that is... ; For the transmission rate of the transmission parameter combination to be evaluated = Power consumption performance = and effective junction temperature margin Substitute into the formula A comprehensive evaluation coefficient is obtained through comprehensive calculation. ; The arithmetic mean of the transmission rates for each group of transmission parameter combinations to be evaluated; The power consumption performance of each group of transmission parameter combinations to be evaluated is the arithmetic mean. The effective junction temperature margin is the arithmetic mean of the combined transmission parameters to be evaluated for each group. in , as well as These are preset weighting coefficients, and their sum is one.

[0037] The combination of transmission parameters with the highest comprehensive evaluation coefficient is taken as the optimal combination of transmission parameters.

[0038] S4 - Execution Phase: The optimal combination of transmission parameters is sent to the master controller and NAND controller of the storage device for execution.

[0039] Example 2

[0040] Please see Figure 2 As shown, based on the storage device transmission parameter optimization method provided in Embodiment 1 of this application, Embodiment 2 of this application proposes a storage device transmission parameter optimization system. Embodiment 2 is merely a preferred embodiment of Embodiment 1, and its implementation will not affect the individual implementation of Embodiment 1.

[0041] Specifically, the storage device transmission parameter optimization system provided in Embodiment 2 of this application includes: The online monitoring module is used to collect real-time operating status parameters of the storage device at a fixed sampling period and output the collected real-time operating status parameters to the online optimization solution module. The pre-calibration and mapping modeling module is used to pre-establish the quantitative mapping logic of the storage device's transmission parameters, transmission performance, and power consumption, establish the storage device's thermodynamic logic, and pre-calibrate and solidify the storage device's hardware constraint thresholds. The online optimization solution module is connected to the online monitoring module and the pre-calibration and mapping modeling module, respectively. It is used to solve the optimal combination of transmission parameters based on real-time operating status parameters, pre-established quantization mapping logic and thermodynamic logic, with junction temperature margin, transmission performance and power consumption as optimization objectives and non-triggering thermal throttling as the core constraint. The parameter distribution and execution module is connected to the online optimization and solution module. It is used to distribute the optimal combination of transmission parameters obtained from the solution to the main control unit and NAND controller of the storage device for execution.

[0042] The above formulas are all dimensionless calculations. Dimensionless calculations can be performed using various methods such as standardization, which will not be elaborated here. The formulas are derived from software simulations based on a large amount of collected data, and the preset parameters in the formulas can be set by those skilled in the art according to the actual situation.

[0043] The above embodiments can be implemented, in whole or in part, by software, hardware, firmware, or any other combination thereof. When implemented using software, the above embodiments can be implemented, in whole or in part, as a computer program product. The computer program product includes one or more computer instructions or computer programs. When the computer instructions or computer programs are loaded or executed on a computer, all or part of the processes or functions described in the embodiments of this application are generated. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another. For example, the computer instructions can be transmitted from one website, computer, server, or data center to another website, computer, server, or data center via wired or wireless (e.g., infrared, wireless, microwave, etc.) means. The computer-readable storage medium can be any available medium that a computer can access or a data storage device such as a server or data center that includes one or more sets of available media. The available medium can be a magnetic medium (e.g., floppy disk, ATA hard disk, magnetic tape), an optical medium (e.g., DVD), or a semiconductor medium. The semiconductor medium can be a solid-state ATA hard disk.

[0044] It should be understood that in the various embodiments of this application, the order of the above-mentioned processes does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this application.

[0045] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0046] In the several embodiments provided in this application, it should be understood that the disclosed systems, apparatuses, and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between apparatuses or units may be electrical, mechanical, or other forms.

[0047] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment, depending on actual needs.

[0048] In addition, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit.

[0049] If the aforementioned functions are implemented as software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or a portion of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable ATA hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0050] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A method for optimizing transmission parameters of a storage device, characterized in that, include: S1: Collect real-time operating status parameters of the storage device at a fixed sampling period, including the junction temperature of the main control chip, the average junction temperature of the NAND flash array, the ambient temperature, the real-time total power consumption of the device, the real-time transmission rate, and the duration of continuous high-load operation. S2: Establish the quantitative mapping logic between storage device transmission parameters and transmission performance, power consumption, and the device's thermodynamic logic; S3: Based on real-time operating status parameters and pre-established logic, the optimal combination of transmission parameters is solved by taking the combined temperature margin, transmission performance and power consumption as optimization objectives. S4: Send the optimal combination of transmission parameters to the master controller and NAND controller of the storage device for execution.

2. The method for optimizing storage device transmission parameters according to claim 1, characterized in that: Storage device transmission parameters include; Controllable transmission parameter set ;in For the depth of the IO queue, For single IO transfer block size, This refers to the number of parallel channels in NAND flash memory. The main control core clock frequency, This refers to the operating frequency of the NAND interface.

3. The method for optimizing storage device transmission parameters according to claim 2, characterized in that: Logic for quantizing and mapping transmission parameters to transmission performance; ； For transmission rate, This is the queue depth efficiency factor. The main control processing bandwidth. This represents the total bandwidth of the NAND interface. This refers to the read / write bandwidth of the NAND array.

4. The method for optimizing storage device transmission parameters according to claim 3, characterized in that: Quantization mapping logic between transmission parameters and power consumption; ； This refers to the device's static power consumption. Established based on the dynamic power consumption model of CMOS circuits For NAND interface and channel power consumption, This refers to the power consumption for reading and writing NAND arrays.

5. The method for optimizing storage device transmission parameters according to claim 4, characterized in that: The device's thermodynamic logic specifically includes the thermal balance equations for the main control chip and the NAND flash memory array. Thermal balance equation of main control chip: NAND flash memory array thermal balance equation: ; in The main control chip's thermal capacity, The thermal resistance from the main control chip to the environment. For the equivalent heat capacity of the NAND flash memory array, Thermal resistance of the NAND flash memory array to the environment; and The junction temperature of the main control chip and the ambient temperature at time t; Let t be the average junction temperature of the NAND flash memory array. The power consumption of the main control core at time t; Let t be the total power consumption of the NAND portion at time t.

6. The method for optimizing storage device transmission parameters according to claim 5, characterized in that: The specific calculation logic for junction temperature prediction; ； ； in and The initial controller and NAND junction temperatures; The controlling thermal time constant; , where is the thermal time constant of the NAND array.

7. The method for optimizing storage device transmission parameters according to claim 6, characterized in that: The logic for determining the optimal combination of transmission parameters; Based on pre-established logic, filter out A set of controllable transmission parameters that is lower than the device’s maximum permissible total continuous power consumption is used as candidate set K; The combinations of each item in candidate set K are arranged according to Sort the data from largest to smallest to obtain the sorted set Sorted. Take the top E groups of controllable transport parameter sets from the Sorted dataset, substitute them into the thermodynamic logic, and calculate t= The temperature at that time To predict the time window, controllable transmission parameter combinations in which the junction temperature at all time points does not exceed the set safety limit are selected as the transmission parameter combinations to be evaluated. Calculate the comprehensive evaluation coefficient of the transmission parameter combination to be evaluated, and select the transmission parameter combination with the largest comprehensive evaluation coefficient as the optimal transmission parameter combination.

8. The method for optimizing storage device transmission parameters according to claim 7, characterized in that: The logic behind obtaining the overall evaluation coefficient; For each combination of transmission parameters to be evaluated, the junction temperature margin, transmission performance, and power consumption are extracted, weighted and fused, and the comprehensive evaluation coefficient of each combination of transmission parameters is output.

9. The method for optimizing storage device transmission parameters according to claim 8, characterized in that: The formula for calculating the overall evaluation coefficient; For the combination of transmission parameters to be evaluated, after inputting the thermodynamic logic, the peak junction temperature of the chip within the prediction time window is calculated, i.e. Based on the "barrel effect," the smallest junction temperature margin between the controller and the NAND flash memory is taken as the effective junction temperature margin for the parameter combination: that is... ; For the transmission rate of the transmission parameter combination to be evaluated = Power consumption performance = and effective junction temperature margin Substitute into the formula A comprehensive evaluation coefficient is obtained through comprehensive calculation. ; The arithmetic mean of the transmission rates for each group of transmission parameter combinations to be evaluated; The power consumption performance of each group of transmission parameter combinations to be evaluated is the arithmetic mean. The effective junction temperature margin is the arithmetic mean of the combined transmission parameters to be evaluated for each group. in , as well as These are preset weighting coefficients, and their sum is one.

10. A system for optimizing transmission parameters of a storage device, applied to the method for optimizing transmission parameters of a storage device according to any one of claims 1-9, characterized in that, include: The online monitoring module is used to collect real-time operating status parameters of the storage device at a fixed sampling period and output the collected real-time operating status parameters to the online optimization solution module. The pre-calibration and mapping modeling module is used to pre-establish the quantitative mapping logic between the transmission parameters, transmission performance, and power consumption of the storage device, and to establish the thermodynamic logic of the storage device. The online optimization solution module is connected to the online monitoring module and the pre-calibration and mapping modeling module, respectively. It is used to solve for the optimal combination of transmission parameters based on real-time operating status parameters, pre-established quantization mapping logic and thermodynamic logic, with junction temperature margin, transmission performance and power consumption as optimization objectives. The parameter distribution and execution module is connected to the online optimization and solution module. It is used to distribute the optimal combination of transmission parameters obtained from the solution to the main control unit and NAND controller of the storage device for execution.

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