A method and system for suppressing fault cross-talk of a multi-branch DC system and verifying the scope boundary thereof
By employing multi-point synchronous sampling and signal processing techniques, the faulty branch and normal branch in a multi-branch DC system can be accurately distinguished, thus solving the signal crosstalk problem, improving the system's reliability and adaptability, and providing verification of the method's applicable boundaries.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- XIAN UNIV OF TECH
- Filing Date
- 2026-04-15
- Publication Date
- 2026-07-21
AI Technical Summary
In multi-branch DC systems, high-frequency harmonics and random noise from faulty arcs propagate to normal branches through parasitic capacitance and inductance, causing signal crosstalk. Existing technologies struggle to accurately distinguish between faulty and normal branches, posing a risk of misjudgment, and lack a systematic assessment of the applicability boundaries of the methods.
By synchronously sampling at multiple measurement points, a hybrid signal matrix is constructed, wavelet packet transform and fast independent component analysis are performed, and combined with a neural network model, the characteristics of faulty branches are accurately extracted and removed, and the applicable scope boundary verification is established.
It enables effective differentiation between faulty branches and normal branches, reduces the risk of circuit breaker maloperation or failure to operate, improves the reliability and adaptability of the system, and provides a clear direction for optimizing the failure mechanism of the method.
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Figure CN122432734A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of electrical fault detection, specifically to a method and system for suppressing crosstalk in multi-branch DC systems and verifying the boundary of its applicable scope. Background Technology
[0002] With the rapid development of DC power consumption scenarios such as new energy power generation, electric vehicles and energy storage systems, the number of power electronic devices connected to DC power distribution systems is constantly increasing. The system structure is characterized by multiple branches in parallel, complex topology and variable operating conditions, which puts forward higher requirements for the rapid and accurate detection and isolation of fault arcs.
[0003] In a multi-branch parallel system, the high-frequency harmonics and random noise generated by the fault arc can propagate to the normal branch through parasitic capacitance and parasitic inductance. This causes the electrical signals of the normal branch to be superimposed with characteristic components similar to those of the fault branch, forming crosstalk. This makes it difficult for detection methods based on a single branch or measurement point to accurately distinguish between the fault branch and the normal branch, which can easily lead to circuit breaker maloperation or failure to operate.
[0004] To suppress crosstalk between branches, existing technologies typically employ methods such as increasing the detection threshold, adding filtering stages, introducing multi-feature joint criteria, or machine learning-based classification methods. These methods enhance fault characteristics or reduce the impact of noise, thereby improving the robustness of detection to some extent.
[0005] However, existing technologies mostly focus on improving detection performance from the perspective of signal enhancement or noise suppression, making it difficult to distinguish the characteristics of fault arcs from crosstalk characteristics propagated from other branches, thus leading to the risk of misjudgment in complex multi-branch systems. Furthermore, existing fault detection methods typically only focus on diagnostic accuracy and speed in specific scenarios, while interference factors in actual operating environments are complex and diverse. It is difficult to exhaustively cover all operating conditions in the early stages of developing diagnostic methods, and there is a lack of systematic evaluation methods for the applicability boundaries of the methods, making it difficult to provide a clear direction for explaining and optimizing the failure mechanisms of the methods. Summary of the Invention
[0006] To address the problems mentioned in the prior art, this invention proposes a method and system for suppressing crosstalk during faults in multi-branch DC systems and verifying the boundary of its applicable scope, in order to solve the problems in the background art.
[0007] To achieve the above objectives, the present invention adopts the following technical solution: This invention discloses a method for suppressing crosstalk during faults in multi-branch DC systems and verifying the boundary of its applicability, comprising the following steps: S1. Collect current signals from each branch and the busbar side, and construct a hybrid signal matrix based on the current signals; S2. Perform wavelet packet transform on the mixed signal matrix to extract the electrical feature components of each branch and combine them into a feature matrix; preprocess the feature matrix to obtain the processed feature matrix. S3. Perform fast independent component analysis on the processed feature matrix, and iteratively optimize to maximize non-Gaussianity to obtain the unmixed matrix, and calculate the source signal matrix based on the unmixed matrix. S4. Input the source signal matrix into the neural network model for working condition identification, determine whether there are fault branch feature components, and if a fault is identified, disconnect the corresponding branch and issue a warning signal to realize the detection of fault branches.
[0008] As a further improvement of the present invention, in S1, the current sensor is placed at different locations in the multi-branch DC system, and sampling is started synchronously through the current sensor, with a minimum bandwidth greater than 100kHz; the sampling frequency ranges from 200 to 500kHz, and the number of sampling points ranges from 8000 to 12000.
[0009] As a further improvement of the present invention, the electrical feature component in S2 is a wavelet packet energy feature, and its calculation formula is as follows:
[0010] In the formula: This represents the summation of N points starting from t0; N represents the number of sampling points. i Indicates the branch number; l Indicates the first l Layer wavelet packet decomposition; k represents the k-th frequency band.
[0011] As a further improvement of the present invention, the preprocessing of S2 includes mean removal and whitening of the feature matrix; The mean removal process is calculated using the following formula:
[0012] In the formula: Indicates the i-th measurement point The mean estimate.
[0013] As a further improvement of the present invention, the nonlinear function of the rapid independent component analysis is g1(u)=u 3 The maximum number of iterations ranges from 950 to 1050, and the iteration accuracy ranges from 0.00006 to 0.00015. The neural network model is a one-dimensional convolutional neural network state recognition model.
[0014] As a further improvement to the present invention, a scope boundary verification step is also included: A multi-branch parallel electric arc experimental system was built. The multi-branch parallel electric arc experimental system is pre-set with a fault electric arc model. Simulation experimental data was extracted and S1 to S3 were repeated to obtain the source signal matrix, which was used to verify the effectiveness of the simulation system. A feature evaluation index is constructed, and the applicable scope boundary of the fault crosstalk suppression method for multi-branch DC system is analyzed by adjusting simulation parameters. The applicable scope boundary includes an inner boundary and an outer boundary. The inner boundary is achieved by adjusting the parameters of the fault arc model, which include the arc sustaining voltage, time constant, and initial conductance. The outer boundary is achieved by introducing external disturbance signals of different frequencies into the multi-branch parallel arc experimental system.
[0015] As a further improvement of the present invention, the feature evaluation index is the improvement ratio. It is used to quantify the degree of differentiation between faulty branches and normal branches.
[0016] This invention proposes a fault crosstalk suppression system for multi-branch DC systems and a boundary verification system for its applicable scope, comprising: The acquisition module is used to acquire the current signals of each branch and / or busbar side, and construct a hybrid signal matrix based on the current signals; The transformation module is used to perform wavelet packet transformation on the mixed signal matrix, extract the electrical feature components of each branch and combine them into a feature matrix; the feature matrix is preprocessed to obtain the processed feature matrix. The analysis module is used to perform fast independent component analysis on the processed feature matrix, and iteratively optimizes the model with the goal of maximizing non-Gaussianity to obtain the unmixed matrix, and calculates the source signal matrix based on the unmixed matrix. The judgment output module is used to input the source signal matrix into the neural network model for working condition identification, determine whether there are fault branch feature components, and if a fault is determined, disconnect the corresponding branch and issue a warning signal to realize the detection of fault branches.
[0017] This invention proposes a device for suppressing crosstalk in multi-branch DC systems and verifying the boundary of its applicable scope, comprising a processor and a memory, wherein the processor executes a computer program stored in the memory to implement the method for suppressing crosstalk in multi-branch DC systems and verifying the boundary of its applicable scope as described above.
[0018] This invention proposes a computer-readable storage medium for storing a computer program, wherein the computer program, when executed by a processor, implements the method described above for suppressing crosstalk in multi-branch DC system faults and verifying the boundary of its applicability.
[0019] Compared with the prior art, the present invention achieves the following technical effects: This invention separates independent source components in a mixed electrical signal by using multi-point synchronous sampling combined with FastICA separation technology. This separates the arc characteristic components of the faulty branch from the characteristic components of the normal branch, thereby suppressing crosstalk propagation of the fault arc signal between branches from the signal's fundamental nature. Compared with existing technologies, this invention does not rely on empirical threshold settings and can accurately extract fault features in complex crosstalk environments. By establishing the correspondence between each independent component in the source signal matrix and the branch, this invention directly identifies the branch where the fault occurred while detecting the fault, achieving integrated detection and line selection. This avoids circuit breaker maloperation caused by misjudging normal branches as faults due to crosstalk, and also prevents failure to operate due to the overwhelming of fault features, significantly improving the reliability of DC system operation.
[0020] This invention is based on electrical signal processing and does not rely on specific load types or fixed operating parameters. It has good adaptability to different branch numbers, current combinations, and load forms in multi-branch parallel systems, and is particularly suitable for complex DC application scenarios with many power electronic loads and large system fluctuations. Furthermore, this invention… Through quantitative simulation studies and characteristic evaluation indicators, a standardized evaluation method for the applicability boundary of detection methods was established. This provides a clear direction for explaining and optimizing the failure mechanisms of the methods, and enhances the feasibility of the technical solutions. Attached Figure Description
[0021] Figure 1 This is a flowchart of the multi-branch DC system fault arc detection and line selection method of the present invention; Figure 2 This is an experimental platform for a multi-branch DC system, as described in an embodiment of the present invention. Figure 3a This represents the current waveform at multiple points of operation in a multi-branch DC system. Figure 3b Wavelet packet characteristics of current at multiple measurement points in a multi-branch DC system; Figure 4 A scatter plot of wavelet packet characteristics of current at multiple measurement points when arcing occurs on the busbar of a multi-branch DC system. Figure 5 A scatter plot showing the FastICA characteristics of multi-branch DC systems at multiple measurement points to suppress fault crosstalk; Figure 6 A simulation model for simulating crosstalk propagation in multi-branch DC systems. Detailed Implementation
[0022] The present invention will now be described in further detail with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and not intended to limit it. Furthermore, it should be noted that, for ease of description, the accompanying drawings show only the parts relevant to the present invention, and not all of the structures.
[0023] like Figure 1 As shown in the figure, this embodiment proposes a method for suppressing crosstalk during faults in a multi-branch DC system and verifying its applicable scope boundary, including the following steps: S1. Collect current signals from each branch and the busbar side, and construct a hybrid signal matrix based on the current signals; S2. Perform wavelet packet transform on the mixed signal matrix to extract the electrical feature components of each branch and combine them into a feature matrix; preprocess the feature matrix to obtain the processed feature matrix. S3. Perform fast independent component analysis on the processed feature matrix, and iteratively optimize to maximize non-Gaussianity to obtain the unmixed matrix, and calculate the source signal matrix based on the unmixed matrix. S4. Input the source signal matrix into the neural network model for working condition identification, determine whether there are fault branch feature components, and if a fault is identified, disconnect the corresponding branch and issue a warning signal to realize the detection of fault branches.
[0024] The present invention will be further explained below with reference to the accompanying drawings and specific embodiments: Step 1: In this embodiment, the sampling frequency f of the current sensor is set. s The analysis includes the number of sampling points N during the analysis period, the judgment accuracy p, and various parameters within the rapid independent component analysis and fault arc characteristic analysis system; specifically, the current sensor operates at a predetermined sampling frequency f. s Collect multiple output current signals from various points in a multi-branch parallel system and convert them into a mixed signal matrix I. mn Where m is the current sensor number and n is the sampling point number, when the number of sampling points reaches N, proceed to step two to extract the feature matrix.
[0025] As a specific embodiment, the current sensors used are not limited to the same model or type, but should meet the following basic technical requirements: the effective bandwidth of each current sensor is greater than 100kHz, their sampling frequency is set to the same value, and they can start current signal acquisition synchronously at the same time to ensure the consistency of current signals at multiple measurement points on the time axis.
[0026] Current sensors are installed at different locations in the multi-branch parallel system to collect current signals at the corresponding branches or buses, providing multi-source observation data for subsequent independent component separation. In this embodiment, four current sensors are selected, and the number of sampling points N is determined to be 1,000,000.
[0027] Step 2: Extract the mixed signal matrix I obtained in Step 1 mnThe current components of each branch are processed by wavelet packet transform, and the squares of the reconstructed wavelet packet coefficients are calculated as the wavelet packet energy features.
[0028] In the formula: This represents the summation of N points starting from t0; N represents the number of sampling points. i Indicates the branch number; l Indicates the first l Layer wavelet packet decomposition; k represents the k-th frequency band.
[0029] This embodiment uses four current sensors to collect the current of the bus and three branches, thus forming a characteristic matrix X=[x 1j ,x 2j ,x 3j ,x 4j ] T Where the numbers represent the sampling point indices, and j represents the sampling time period, the resulting feature matrix is subjected to mean-removal processing, i.e.:
[0030] in, Indicates the i-th measurement point The mean is estimated; then, the zero-mean feature matrix is whitened, and proceed to step three.
[0031] In this embodiment, rbio3.1 is preferably used as the mother wavelet, and a 4-level decomposition is performed. The data of node 4.1 is selected for feature analysis. A sliding window is used to perform wavelet packet transformation on the current data of each segment. The window sampling point is 2000 and the sliding step size is 1000.
[0032] Step 3: After processing with the FastICA (Fast Independent Component Analysis) algorithm based on the maximum non-Gaussianity optimization objective, the unmixing matrix W is obtained, and the source signal matrix S = WX = [s 1j ,s 2j ,s 3j ,s 4j ] T s ij The current characteristics of the i-th path are separated through decoupling. In this embodiment, an arc fault generator (AFG) is used to induce a fault arc in the first path (bus). Based on the characteristics of the fault arc signal, which is highly random, has obvious impact, and has a large fluctuation amplitude, after processing by the FastICA algorithm, the fault characteristic component of the first path is significantly separated from the normal component, while the abnormal characteristic changes caused by crosstalk interference propagating in the system are suppressed in the normal branch where no fault arc has occurred.
[0033] This embodiment of the Fast Independent Component Analysis (FICA) is based on maximum non-Gaussianity (MNC), requiring simultaneous measurement of current signals at different measurement points. The FastICA algorithm optimizes for a suitable unmixing matrix W through MNC optimization, ultimately obtaining the independent main source signals of the current. To quickly find a suitable unmixing matrix to accelerate the fault arc detection process in multi-branch parallel systems, this embodiment selects the nonlinear function g1(u) = u 3 The maximum number of iterations to end the iteration process is determined to be 1000, and the iteration precision is set to 0.0001.
[0034] Step 4: Divide the source signal matrix S into four one-dimensional time series matrices, representing the branches where the four signal acquisition points are located. Input these matrices into a neural network model for identification to synchronously determine the operating status of each branch in the multi-branch system. When the statistical state is detected, ... 1j When the fault characteristic signal is detected, the first branch is disconnected from the multi-branch system and a warning signal is issued. The system returns to step one to analyze the current signals of the other branches in the next analysis period. Then, it proceeds to step five to build a multi-branch parallel arc experimental system based on simulation.
[0035] In this embodiment, since a fault arc occurs on the busbar, the power supply to the entire multi-branch system will be cut off. It will not return to step one to continue reading the current signal for the next time period. However, if the arc occurs in a branch unit, only the power supply to that branch will be cut off, a warning signal will be issued, and the system will return to step one to read the current signal of other normal branches and monitor their safe operation.
[0036] In this embodiment, the neural network model is preferably a one-dimensional convolutional neural network state identification model, where the feature components of the four branches are simultaneously identified through the convolutional model. The initial training parameters of the one-dimensional convolutional neural network include: 20 iterations, 100 batch size, 0.001 learning rate, a first momentum decay factor beta1 of 0.9, and an infinity norm decay factor beta2 of 0.999. The first convolutional layer of the one-dimensional convolutional neural network has a 1-dimensional input channel and a 32-dimensional output channel, with a kernel size of 20*1 and a stride of 1. The second convolutional layer has a 32-dimensional input channel and a 48-dimensional output channel, with a kernel size of 20*1 and a stride of 1. Batch normalization layers are followed by each convolutional layer. The final output data of the convolutional layers is 49*985*1. Pooling layers are then used to reduce the dimensionality of the data. Finally, a fully connected layer is added to transform the dimensionality-reduced data output into a one-dimensional vector, i.e., the output judgment result 0 / 1, where 0 represents a phone call without a fault and 1 represents a faulty arc. The result is stored in the state judgment matrix out[S]. t The four input signals are judged independently, with a judgment precision of 5. The state of the multi-branch system is judged once every 5 time periods: the statistical state judgment matrix out starts from the Sth time period. t–15 elements up to the Sth t –5 elements, starting from the Sth element t –10 elements up to the Sth t The number of elements that are 1 is counted. If all the counted values are greater than 5, then it is confirmed that the element is at the S-th position. t –10 to the S t – If a fault arc occurs within 5 time periods, corresponding fault arc protection measures shall be taken; otherwise, it is considered that the fault arc occurred within the S-th time period. t –10 to the S t If the branch is in normal operation for 5 time periods, return to step 1 to analyze the current signal in the next analysis period.
[0037] Step 5: Based on the source signal matrix S, construct a simulation-based multi-branch parallel arc test system. This embodiment uses three parallel branches, including: a simulated DC power supply, a normal branch 1 containing a DC-DC converter and a resistive load, a faulty branch 2 containing a resistive load, and a normal branch 3 containing a resistive load. Based on the simulation model built in Simulink, the fault arc occurrence point is set at the input end of the faulty branch 2, the arc initiation time is 2s, the simulation duration is 5s, and the simulation experimental data source signal matrix S is extracted. im The effectiveness of the simulation system is verified by comparing wavelet packet transforms of normal branches, faulty branches, and the bus with the FastICA algorithm. Proceed to step six to explore the applicability of the detection method based on simulation.
[0038] Step Six: Propose characteristic indicators to explore the applicable scope of the detection method. The applicable scope is divided into two boundaries: inner and outer. The inner boundary considers the arc intensity factor, and the outer boundary is the external circuit noise frequency. The applicable inner and outer boundaries of this detection method are analyzed by adjusting simulation parameters. The inner boundary mainly considers the arc intensity factor. By adjusting the arc model parameters (including arc sustaining voltage, time constant, and initial conductance, etc.), the changes in the characteristics of faulty branches and normal branches under different arc intensity conditions are analyzed. When the arc intensity is low and the arc signal propagation in the system is limited, the characteristics of faulty branches and non-faulty branches are clearly distinguishable, and conventional detection methods can complete the detection. When the arc intensity increases, the fault arc signal propagates more strongly in the multi-branch system, and the characteristics of normal branches are significantly affected by crosstalk. The method of this invention can effectively suppress the interference of faulty branches on normal branches through independent component separation, while still maintaining good detection and line selection performance. The outer boundary mainly considers the external circuit noise frequency factor. By introducing external disturbance signals of different frequencies into the simulation system, the influence of changes in external noise frequency on the crosstalk intensity between branches and the detection results is analyzed. Simulation results show that when the external circuit noise frequency is close to the system's equivalent resonant frequency, the propagation effect of the fault arc signal in the non-faulty branch is weakened, and the crosstalk between branches is not obvious. However, when the external noise frequency deviates from this range, the crosstalk phenomenon is enhanced. Under these circumstances, the method of the present invention can still effectively distinguish between the faulty branch and the non-faulty branch.
[0039] See Figure 2 This embodiment proposes a specific implementation method in which each fault arc generator is controlled by a switch connected in parallel to it, enabling fault arcs to occur at different locations. Switch K4 directly controls the bus, realizing the energization and de-energization of the entire system. The inverter branch and the purely resistive branch are controlled by switches K2, K6, and K8, respectively. Three current sensors are installed at different locations on the bus and branches to collect current signals at a sampling frequency of 1MHz.
[0040] See Figure 3a The current signals at measuring points 2 and 3 are shown. Figure 3b Wavelet packet characteristic signals at measuring points 2 and 3. When a fault arc occurs on the inverter side at 1.7s, the current in the faulty branch decreases and oscillates. Similarly, the characteristic signal of the normal branch after wavelet packet transformation also shows the same characteristic change trend as the faulty branch. The fault arc signal propagates to the non-faulty branch through the system coupling path, causing the electrical signal of the normal branch to be superimposed with similar change characteristics to the faulty branch. This makes it difficult to accurately distinguish between the faulty and non-faulty branches based solely on the amplitude change of the electrical quantity of a single branch, easily leading to misjudgment.
[0041] See Figure 4When the busbar arcs, the current of the busbar, normal branch 1 and normal branch 2 are measured simultaneously and then processed by wavelet packet transform. The overall index of wavelet packet characteristics in different frequency bands is compared. It can be seen that due to the influence of crosstalk signal, the characteristic enhancement ratio of normal branch is close to that of faulty branch, which increases the difficulty of fault detection and line selection.
[0042] See Figure 5 After analysis using wavelet packet transform combined with the FastICA algorithm, compared to Figure 4 The faulty branch and the normal branch do not have the same extreme point. The faulty branch has obvious characteristics. After processing, the faulty state characteristics of the normal branch basically overlap with the normal state characteristics. The fault noise signal of the faulty branch can be preserved. The interference of the normal branch affected by crosstalk can be suppressed. Thus, the normal characteristic signal can be extracted, and the interference signal can be suppressed in the fault detection process.
[0043] See Figure 6 In this embodiment, a multi-branch parallel arc experimental system is built based on Simulink. The fault arc occurrence point is set at the input end of the fault branch 2, and the two current measurement points are located on the normal branch 1 and the normal branch 2, respectively.
[0044] Table 1. Characteristic Indicators of Different Time Constants and Branches
[0045] Referring to Table 1, as the arc time constant increases, the characteristic boost ratio of branches without arcing decreases, and crosstalk is weakened. The time constant reflects how quickly the arc conductance changes over time. When the time constant is small, the rapid change in arc conductance leads to a rapid response in the system voltage. Since the voltages of each branch are the same and are connected in parallel, rapid voltage fluctuations will cause rapid changes in the current of each branch, resulting in significant crosstalk.
[0046] As the time constant increases, the arc conductance changes slowly, and the system voltage fluctuations are relatively gentle. This allows the internal circuitry of the power electronic load in normal branch 1 sufficient time to adjust the current through the control loop and maintain the current stability of that branch. Meanwhile, the current in the purely resistive branch 3 is proportional to the voltage, and the system voltage changes gently. Consequently, the current in normal branch 3 also changes slowly, thus reducing the amplitude of crosstalk.
[0047] Based on the above analysis, it was found that the time constant affects the strength of crosstalk between branches. This is because the time constant reflects the change of arc conductance over time. Rapid changes in arc conductance cause a rapid system response, resulting in the control loop being unable to quickly adjust voltage changes, leading to more pronounced crosstalk.
[0048] Table 2 AC power supply frequency parameters and characteristic indicators
[0049] Referring to Table 2, the crosstalk phenomenon between branches caused by fault arcs in multi-branch parallel systems has a direct impact on the noise frequency of the external circuit. When the system's input power supply is a superimposed AC component on the rectified output voltage, under a fault arc with fixed parameters in fault branch 2, the current waveforms and wavelet packet characteristics of the non-fault branches, namely normal branches 1 and 3, show a regular change with the AC power supply frequency: In the low-frequency range of 50-170Hz, the current in the normal branch after the fault is higher than the level before the fault, and the wavelet packet characteristic index Z1 decreases with increasing frequency, gradually weakening the crosstalk effect; when the frequency exceeds 170Hz, the current after the fault is lower than the level before the fault, and the wavelet packet characteristic index Z1 increases with increasing frequency.
[0050] The 170Hz cutoff frequency is not a fixed value but is determined by system parameters. When the disturbance frequency of external noise coincides with the resonant frequency of the system, the propagation path of the arc energy will be a closed path formed by the faulty branch, capacitor, power supply, and faulty branch, rather than being coupled to other branches through parasitic parameters. Therefore, the arc energy transmitted to other non-faulty branches is reduced. Thus, the above specific implementation verifies that, compared with the prior art, this method suppresses the crosstalk interference between branches caused by the propagation of arc signals and avoids the influence of crosstalk characteristics on fault judgment.
[0051] Based on the same inventive concept, this invention also provides a multi-branch DC system fault crosstalk suppression and its applicable scope boundary verification system. Since the principle of this multi-branch DC system fault crosstalk suppression and its applicable scope boundary verification system is similar to the aforementioned multi-branch DC system fault crosstalk suppression and its applicable scope boundary verification method, the implementation of this multi-branch DC system fault crosstalk suppression and its applicable scope boundary verification system can refer to the implementation of the multi-branch DC system fault crosstalk suppression and its applicable scope boundary verification method, and the repeated parts will not be described again.
[0052] In specific implementation, the multi-branch DC system fault crosstalk suppression and its applicable scope boundary verification system provided in this embodiment of the invention specifically includes: S1. Collect the current signals of each branch or bus, and construct a mixed signal matrix based on the current signals; S2. Perform wavelet packet transform on the mixed signal matrix to extract the electrical feature components of each branch and combine them into a feature matrix; preprocess the feature matrix to obtain the processed feature matrix. S3. Perform fast independent component analysis on the processed feature matrix, and iteratively optimize to maximize non-Gaussianity to obtain the unmixed matrix, and calculate the source signal matrix based on the unmixed matrix. S4. Input the source signal matrix into the neural network model for working condition identification, determine whether there are fault branch feature components, and if a fault is identified, disconnect the corresponding branch and issue a warning signal to realize the detection of fault branches.
[0053] Accordingly, embodiments of the present invention also provide a device for suppressing crosstalk in multi-branch DC system faults and verifying the boundary of its applicable scope, including a processor and a memory, wherein the processor executes a computer program stored in the memory to implement the method for suppressing crosstalk in multi-branch DC system faults and verifying the boundary of its applicable scope as provided in embodiments of the present invention.
[0054] For more detailed information on the above methods, please refer to the relevant content disclosed in the foregoing embodiments, which will not be repeated here.
[0055] Accordingly, embodiments of the present invention also provide a computer-readable storage medium for storing a computer program, wherein the computer program, when executed by a processor, implements the above-described method for suppressing crosstalk in multi-branch DC system faults and verifying the boundary of its applicability as provided in embodiments of the present invention.
[0056] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on its differences from other embodiments. Similar or identical parts between embodiments can be referred to interchangeably. For the systems, devices, and storage media disclosed in the embodiments, since they correspond to the methods disclosed in the embodiments, the descriptions are relatively simple; relevant parts can be referred to the method section.
[0057] Those skilled in the art will further recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the components and steps of the various examples have been generally described in terms of functionality in the foregoing description. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.
[0058] The steps of the methods or algorithms described in conjunction with the embodiments disclosed herein can be implemented directly by hardware, a software module executed by a processor, or a combination of both. The software module can be located in random access memory (RAM), main memory, read-only memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disk, removable disk, CD-ROM, or any other form of storage medium known in the art.
[0059] Finally, it should be noted that in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.
[0060] The foregoing has provided a detailed description of the method, system, equipment, and storage medium for crosstalk suppression of multi-branch DC systems and its applicable scope boundary verification provided by the present invention. Specific examples have been used to illustrate the principles and implementation methods of the present invention. The descriptions of the above embodiments are only for the purpose of helping to understand the method and core ideas of the present invention. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of the present invention. Therefore, the content of this specification should not be construed as a limitation of the present invention.
Claims
1. A method for suppressing crosstalk during faults in a multi-branch DC system and verifying its applicable scope boundary, characterized in that, Includes the following steps: S1. Collect current signals from each branch and the busbar side, and construct a hybrid signal matrix based on the current signals; S2. Perform wavelet packet transform on the mixed signal matrix to extract the electrical feature components of each branch and combine them into a feature matrix; The feature matrix is preprocessed to obtain the processed feature matrix; S3. Perform fast independent component analysis on the processed feature matrix, and iteratively optimize to maximize non-Gaussianity to obtain the unmixed matrix, and calculate the source signal matrix based on the unmixed matrix. S4. Input the source signal matrix into the neural network model for working condition identification, determine whether there are fault branch feature components, and if a fault is identified, disconnect the corresponding branch and issue a warning signal to realize the detection of fault branches.
2. The method for suppressing crosstalk in a multi-branch DC system according to claim 1, and for verifying its applicable scope boundary, is characterized in that, In S1, the current sensor is placed at different locations in the multi-branch DC system, and sampling is started synchronously through the current sensor, with a minimum bandwidth greater than 100kHz; the sampling frequency ranges from 200 to 500kHz, and the number of sampling points ranges from 8000 to 12000.
3. The method for suppressing crosstalk in a multi-branch DC system and verifying its applicable scope boundary as described in claim 1, characterized in that, The electrical feature component in S2 is the wavelet packet energy feature, and its calculation formula is as follows: In the formula: This represents the summation of N points starting from t0; N represents the number of sampling points. i Indicates the branch number; l Indicates the first l Layer wavelet packet decomposition; k represents the k-th frequency band.
4. The method for suppressing crosstalk in a multi-branch DC system according to claim 1, and for verifying its applicable scope boundary, is characterized in that, The preprocessing of S2 includes mean removal and whitening of the feature matrix; The mean removal process is calculated using the following formula: In the formula: Indicates the i-th measurement point The mean estimate.
5. The method for suppressing crosstalk in a multi-branch DC system according to claim 1, and for verifying its applicable scope boundary, is characterized in that, The nonlinear function of the rapid independent component analysis is g1(u) = u 3 The maximum number of iterations ranges from 950 to 1050, and the iteration accuracy ranges from 0.00006 to 0.00015. The neural network model is a one-dimensional convolutional neural network state recognition model.
6. The method for suppressing crosstalk in a multi-branch DC system according to claim 1, and for verifying its applicable scope boundary, is characterized in that, It also includes a scope boundary verification step: A multi-branch parallel electric arc experimental system was built. The multi-branch parallel electric arc experimental system is pre-set with a fault electric arc model. Simulation experimental data was extracted and S1 to S3 were repeated to obtain the source signal matrix, which was used to verify the effectiveness of the simulation system. A feature evaluation index is constructed, and the applicable scope boundary of the fault crosstalk suppression method for multi-branch DC system is analyzed by adjusting simulation parameters. The applicable scope boundary includes an inner boundary and an outer boundary. The inner boundary is achieved by adjusting the parameters of the fault arc model, which include the arc sustaining voltage, time constant, and initial conductance. The outer boundary is achieved by introducing external disturbance signals of different frequencies into the multi-branch parallel arc experimental system.
7. The method for suppressing crosstalk in a multi-branch DC system according to claim 6, and for verifying its applicable scope boundary, is characterized in that, The feature evaluation index is the improvement ratio. It is used to quantify the degree of differentiation between faulty branches and normal branches.
8. A fault crosstalk suppression system for multi-branch DC systems and its applicable scope boundary verification system, characterized in that, include: The acquisition module is used to acquire current signals from each branch and the busbar side, and construct a hybrid signal matrix based on the current signals; The transformation module is used to perform wavelet packet transformation on the mixed signal matrix, extract the electrical feature components of each branch and combine them into a feature matrix; The feature matrix is preprocessed to obtain the processed feature matrix; The analysis module is used to perform fast independent component analysis on the processed feature matrix, and iteratively optimizes the unmixing matrix with the goal of maximizing non-Gaussianity to obtain the unmixing matrix. The source signal matrix is then calculated based on the unmixing matrix. The judgment output module is used to input the source signal matrix into the neural network model for working condition identification, determine whether there are fault branch feature components, and if a fault is determined, disconnect the corresponding branch and issue a warning signal to realize the detection of fault branches.
9. A fault crosstalk suppression and application scope boundary verification device for a multi-branch DC system, characterized in that, It includes a processor and a memory, wherein when the processor executes a computer program stored in the memory, it implements the method for suppressing crosstalk in multi-branch DC system faults and verifying the scope of application as described in any one of claims 1 to 7.
10. A computer-readable storage medium, characterized in that, Used to store a computer program, wherein the computer program, when executed by a processor, implements the method for suppressing crosstalk in multi-branch DC system faults and verifying the scope of application as described in any one of claims 1 to 7.