A dual-model verification method based on sysML and GCKontrol and related products

Abstract

The application discloses a double-model verification method based on SysML and GCKontrol and related products, and the method comprises the following steps: acquiring a test case library, wherein the test case library is constructed based on a target system to be verified; constructing a function logic model through SysML and constructing a simulation model through GCKontrol based on the requirements of the target system to be verified; driving the function logic model and the simulation model to run respectively based on the test case library, obtaining logic verification data output by the function logic model and dynamic response data output by the simulation model; comparing and analyzing the logic verification data and the dynamic response data to determine a consistency verification result of the function logic model and the simulation model, and the consistency verification result is used to reflect the design accuracy of the target system to be verified. In this way, the test case library is used as a unified benchmark, and the function logic model and the simulation model are synchronously driven to run, so that the core problem that the double-model verification process is relatively independent and lacks a data comparison mechanism taking the unified test case as a benchmark is effectively solved.

Description

Technical Field

[0001] This application relates to the field of computer technology, and in particular to a dual-model verification method based on SysML and GCKontrol, and related products. Background Technology

[0002] In the design and verification of complex systems, cross-validation using dual models is a key means to ensure design reliability and improve product development quality, thereby guaranteeing the accuracy of system design. By constructing different types of models to verify the system from multiple dimensions, the system's operational logic and dynamic response characteristics can be comprehensively verified, effectively avoiding the one-sidedness of single-model verification. This provides strong support for the rationality and reliability of the system design and is an indispensable and important part of the complex system development process.

[0003] However, in practical applications, the functionality or dynamic response of a single model is usually verified separately, lacking a comparison mechanism based on unified data. This results in a lack of correlation and comparability in the verification results of different models, making it difficult to fully guarantee the accuracy of the system design through multi-model cross-validation. Summary of the Invention

[0004] This application provides a dual-model verification method and related products based on SysML and GCKontrol. By using a test case library as a unified benchmark, it synchronously drives the functional logic model built by SysML and the simulation model built by GCKontrol, effectively solving the core problems of the existing dual-model verification process being relatively independent and lacking a data comparison mechanism based on a unified test case.

[0005] In a first aspect, embodiments of this application provide a dual-model validation method based on SysML and GCKontrol, the method comprising: Obtain a test case library, which is built based on the target system to be verified; Based on the requirements of the target system to be verified, a functional logic model is constructed using SysML, and a simulation model is constructed using GCKontrol. Based on the test case library, the functional logic model and the simulation model are driven to run respectively, and the logic verification data output by the functional logic model and the dynamic response data output by the simulation model are obtained. The logic verification data and the dynamic response data are compared and analyzed to determine the consistency verification result between the functional logic model and the simulation model. The consistency verification result is used to reflect the design accuracy of the target system to be verified.

[0006] One feasible implementation, wherein the construction of a functional logic model using SysML and a simulation model using GCKontrol, based on the requirements of the target system to be verified, includes: Based on the functional and logical architecture requirements of the target system to be verified, a functional logic model is constructed using SysML. The functional logic model is used to characterize the logical relationships of the target system to be verified. Based on the dynamic operation and simulation characteristics requirements of the target system to be verified, a simulation model is constructed using GCKontrol. The simulation model is used to simulate the dynamic behavior response of the target system to be verified.

[0007] In one feasible implementation, before comparing and analyzing the logical verification data with the dynamic response data, the method further includes: The logical verification data and the dynamic response data are time-aligned respectively to obtain the target logical verification data and the target dynamic response data.

[0008] One feasible implementation, wherein comparing and analyzing the logic verification data with the dynamic response data to determine the consistency verification result between the functional logic model and the simulation model, includes: The consistency verification results of the functional logic model and the simulation model are determined by comparing the logical state transitions in the target logic verification data with the dynamic response changes in the target dynamic response data.

[0009] One feasible implementation, wherein comparing the logic state transitions in the target logic verification data with the dynamic response changes in the target dynamic response data to determine the consistency verification result between the functional logic model and the simulation model, includes: If the deviation between the logical state transition and the dynamic response change is less than or equal to a preset deviation threshold, the verification results of the functional logic model and the simulation model are determined to be consistent.

[0010] One feasible implementation, wherein comparing the logic state transitions in the target logic verification data with the dynamic response changes in the target dynamic response data to determine the consistency verification result between the functional logic model and the simulation model, includes: If the deviation between the logical state transition and the dynamic response change is greater than a preset deviation threshold, it is determined that the verification results of the functional logic model and the simulation model are inconsistent.

[0011] One feasible implementation is that the test case library includes multiple test cases, each of which includes a test scenario, input conditions, and parameter configuration.

[0012] Secondly, embodiments of this application provide a dual-model verification device based on SysML and GCKontrol, comprising: The test case acquisition module is used to acquire a test case library, which is built based on the target system to be verified. The model building module is used to build a functional logic model using SysML and a simulation model using GCKontrol based on the requirements of the target system to be verified. The test case driving module is used to drive the functional logic model and the simulation model to run based on the test case library, respectively, to obtain the logic verification data output by the functional logic model and the dynamic response data output by the simulation model. The data comparison module is used to compare and analyze the logic verification data with the dynamic response data to determine the consistency verification result between the functional logic model and the simulation model. The consistency verification result is used to reflect the design accuracy of the target system to be verified.

[0013] Thirdly, embodiments of this application provide an electronic device, the device including: a processor, a memory, and a system bus; The processor and the memory are connected via the system bus; The memory is used to store a program, which includes instructions that, when executed by the processor, cause the processor to perform any of the implementation steps of the dual-model verification method based on SysML and GCKontrol described above.

[0014] Fourthly, embodiments of this application provide a computer-readable storage medium for storing a computer program, which, when executed by a terminal device, implements any of the implementation steps of the dual-model verification method based on SysML and GCKontrol described above.

[0015] As can be seen from the above technical solutions, the embodiments of this application have the following advantages: As can be seen from the above technical solution, this application provides a dual-model verification method and related products based on SysML and GCKontrol. The method includes: First, obtaining a test case library, wherein the test case library is constructed based on the target system to be verified. Then, based on the requirements of the target system to be verified, a functional logic model is constructed using SysML, and a simulation model is constructed using GCKontrol. Next, based on the test case library, the functional logic model and the simulation model are driven to run respectively, obtaining logical verification data output by the functional logic model and dynamic response data output by the simulation model. Finally, the logical verification data and the dynamic response data are compared and analyzed to determine the consistency verification result between the functional logic model and the simulation model, wherein the consistency verification result is used to reflect the design accuracy of the target system to be verified.

[0016] As can be seen, this solution effectively solves the core problems of existing technologies, such as the relatively independent dual-model verification process and the lack of a data comparison mechanism based on unified test cases, by constructing a test case library based on the target system to be verified and using this test case library as a unified benchmark to synchronously drive the functional logic model built by SysML and the simulation model built by GCKontrol. Furthermore, this solution compares and analyzes the logical verification data output by the functional logic model and the dynamic response data output by the simulation model to determine the consistency verification results of the two types of models. This allows for dual verification of the target system to be verified from both the logical and dynamic operation levels, effectively avoiding the one-sidedness of single-model verification and significantly improving the design accuracy of the target system to be verified. Attached Figure Description

[0017] Figure 1 A flowchart illustrating a dual-model verification method based on SysML and GCKontrol provided for embodiments of this application; Figure 2 A flowchart illustrating the overall framework of a dual-model verification method based on SysML and GCKontrol, provided for embodiments of this application; Figure 3 This is a schematic diagram of a dual-model verification device based on SysML and GCKontrol, provided for an embodiment of this application. Detailed Implementation

[0018] As mentioned earlier, complex systems (such as flight control systems) have a rapid iteration cycle and frequent changes in requirements and designs. This necessitates that each iteration cycle quickly verify the fulfillment of requirements, logical correctness, and dynamic performance, providing traceable verification evidence. However, in actual R&D, it is usually necessary to maintain functional logic models and simulation models simultaneously. For example, in flight control system development, engineering teams use SysML models to describe system requirements, module interactions, and state machine logic, while simultaneously relying on simulation software such as GCKontrol to build control algorithms, actuators, and dynamic models to verify the system's dynamic response characteristics under various operating conditions.

[0019] However, in the traditional verification process, the two types of models are usually verified independently by different teams. The verification processes are independent of each other and lack a unified data comparison mechanism. The outputs of different models differ in format, timing, units and labels, resulting in a lack of correlation and comparability in the verification results of the two types of models. It is difficult to ensure the accuracy of the system design through multi-model cross-verification.

[0020] Therefore, in practical applications, the functionality or dynamic response of a single model is usually verified separately, and there is a lack of a comparison mechanism based on unified data. This results in a lack of correlation and comparability in the verification results of different models, making it difficult to fully ensure the accuracy of the system design through multi-model cross-validation.

[0021] To address the aforementioned issues, this application provides a dual-model verification method and related products based on SysML and GCKontrol. The method includes: First, acquiring a test case library, which is constructed based on the target system to be verified. Then, based on the requirements of the target system, constructing a functional logic model using SysML and a simulation model using GCKontrol. Next, using the test case library, driving the functional logic model and the simulation model to run respectively, obtaining logical verification data output by the functional logic model and dynamic response data output by the simulation model. Finally, comparing and analyzing the logical verification data and the dynamic response data to determine the consistency verification result between the functional logic model and the simulation model, wherein the consistency verification result reflects the design accuracy of the target system to be verified.

[0022] As can be seen, this solution effectively solves the core problems of existing technologies, such as the relatively independent dual-model verification process and the lack of a data comparison mechanism based on unified test cases, by constructing a test case library based on the target system to be verified and using this test case library as a unified benchmark to synchronously drive the functional logic model built by SysML and the simulation model built by GCKontrol. Furthermore, this solution compares and analyzes the logical verification data output by the functional logic model and the dynamic response data output by the simulation model to determine the consistency verification results of the two types of models. This allows for dual verification of the target system to be verified from both the logical and dynamic operation levels, effectively avoiding the one-sidedness of single-model verification and significantly improving the design accuracy of the target system to be verified.

[0023] It should be noted that the embodiments of this application are not limited to the executing entity of the dual-model verification method based on SysML and GCKontrol. For example, the dual-model verification method based on SysML and GCKontrol in the embodiments of this application can be applied to information processing devices such as servers or terminal devices. The server can be a standalone server, a cluster server, or a cloud server. The terminal device can be an electronic device such as a smartphone, computer, personal digital assistant (PDA), or tablet computer.

[0024] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of this application.

[0025] Figure 1 A flowchart illustrating a dual-model verification method based on SysML and GCKontrol provided for embodiments of this application. (Combined with...) Figure 1 As shown, it may include steps S101-S104.

[0026] S101: Obtain the test case library, which is built based on the target system to be verified.

[0027] In this embodiment, a test case library is constructed based on the target system to be verified. This library includes multiple test cases, each with corresponding information such as test scenario, input conditions, parameter configuration, simulation duration, and triggering events. In other words, the test cases comprehensively characterize the verification conditions and operating scenarios of the target system under different operating conditions.

[0028] When the target system to be verified is a flight control system, test cases can cover scenarios such as switching between different control modes, different flight state inputs, and boundary conditions. Furthermore, this application's embodiments use a unified format to describe test cases, enabling them to simultaneously drive the SysML functional logic model and the GCKontrol simulation model. This allows both models to perform verification under the same input conditions, effectively improving the design accuracy of the target system to be verified.

[0029] It should be noted that the embodiments of this application can also perform statistical analysis on the execution status of test cases. By statistically analyzing the actual execution and hit rate of test cases, the coverage rate of the test case library can be calculated to determine whether the test case library adequately covers the verification of various operating conditions of the target system to be verified. For example, it can determine whether there are any uncovered operating conditions, unverified test scenarios, or unexecuted test cases. When insufficient coverage is found, new test cases can be added to expand the test case library based on the coverage analysis results.

[0030] Therefore, the embodiments of this application effectively solve the technical problems of existing verification methods lacking quantitative coverage evaluation indicators, making it difficult to intuitively judge the coverage of test cases in dimensions such as state machine logic and interface scenarios, and relying on subjective experience to judge the sufficiency of test cases, thus failing to objectively identify the uncovered verification scope.

[0031] S102: Based on the requirements of the target system to be verified, construct a functional logic model using SysML and a simulation model using GCKontrol.

[0032] In this embodiment of the application, based on the functional and logical architecture requirements of the target system to be verified, a functional logic model is constructed using the SysML modeling tool. This functional logic model is used to describe the logical relationships of the target system to be verified, including the system requirements, the structure of each module, and the state machine behavior of the system to be verified. The functional logic model mainly represents the logical processing flow under different input conditions and the interface relationships between each module.

[0033] Based on the dynamic operation and simulation characteristics requirements of the target system to be verified, a simulation model is constructed using GCKontrol simulation software. This simulation model is used to simulate the dynamic behavior response of the target system under different input conditions, such as control algorithm output, actuator actions, and changes in the system state of the target system.

[0034] It should be noted that the functional logic model in this application focuses on expressing the structure and logical relationship of the target system to be verified, while the simulation model focuses on reflecting the dynamic operation behavior of the target system to be verified. The two types of models describe the same target system to be verified from different dimensions.

[0035] S103: Based on the test case library, drive the functional logic model and the simulation model to run respectively, and obtain the logic verification data output by the functional logic model and the dynamic response data output by the simulation model.

[0036] In this embodiment, the functional logic model is driven by a test case library to obtain logic verification data output by the functional logic model. The logic verification data records the state transitions, logic judgment results, and key variable output information during the operation of the functional logic model. At the same time, the simulation model is driven by the test case library to obtain dynamic response data output by the simulation model. The dynamic response data records the changes in key control variables, dynamic response curves, and simulation state information during the operation of the simulation model.

[0037] Next, since the logical verification data and dynamic response data output by the two types of models may differ in data structure and expression, it is necessary to unify and organize the logical verification data and dynamic response data before conducting comparative analysis. For example, the logical verification data and dynamic response data can be time-series aligned separately to obtain target logical verification data and target dynamic response data. Simultaneously, the logical verification data and dynamic response data can be standardized by unifying data formats or key event identifiers, enabling them to be compared within the same analytical framework and providing support for subsequent comparisons.

[0038] S104: Compare and analyze the logic verification data with the dynamic response data to determine the consistency verification result between the functional logic model and the simulation model. The consistency verification result is used to reflect the design accuracy of the target system to be verified.

[0039] In this embodiment, logical verification data and dynamic response data are compared and analyzed to determine the consistency verification result between the functional logic model and the simulation model. This consistency verification result reflects the design accuracy of the target system to be verified. Specifically, the logical state transitions in the target logical verification data are compared with the dynamic response changes in the target dynamic response data, and the consistency verification result between the functional logic model and the simulation model is determined based on the deviation between the two.

[0040] It should be noted that when the deviation between the logical state transition and the dynamic response change is less than or equal to a preset deviation threshold, the verification results of the functional logic model and the simulation model are considered consistent. Conversely, when the deviation between the logical state transition and the dynamic response change is greater than the preset deviation threshold, the verification results of the functional logic model and the simulation model are considered inconsistent. In this case, the corresponding difference information can be recorded, and the locations of the corresponding functional logic model and simulation model can be indicated, facilitating engineers to quickly pinpoint the source of the problem.

[0041] Therefore, the embodiments of this application can form a dual-track verification process of a functional logic model built based on SysML and a simulation model built based on GCKontrol. In this process, the two types of models are driven to run by a test case library, and the output results are compared for consistency. This allows for the timely detection of potential differences or insufficient test coverage between the two types of models, and the adjustment and optimization of test cases or the target system to be verified accordingly, so that the verification process gradually forms a continuously iterative closed loop.

[0042] Based on the above steps S101-S104, the process involves several steps: First, a test case library is acquired, which is built based on the target system to be verified. Then, based on the requirements of the target system, a functional logic model is constructed using SysML, and a simulation model is constructed using GCKontrol. Next, based on the test case library, the functional logic model and the simulation model are run respectively, yielding logical verification data output by the functional logic model and dynamic response data output by the simulation model. Finally, the logical verification data and dynamic response data are compared and analyzed to determine the consistency verification result between the functional logic model and the simulation model. This consistency verification result reflects the design accuracy of the target system to be verified.

[0043] As can be seen, this solution effectively solves the core problems of existing technologies, such as the relatively independent dual-model verification process and the lack of a data comparison mechanism based on unified test cases, by constructing a test case library based on the target system to be verified and using this test case library as a unified benchmark to synchronously drive the functional logic model built by SysML and the simulation model built by GCKontrol. Furthermore, this solution compares and analyzes the logical verification data output by the functional logic model and the dynamic response data output by the simulation model to determine the consistency verification results of the two types of models. This allows for dual verification of the target system to be verified from both the logical and dynamic operation levels, effectively avoiding the one-sidedness of single-model verification and significantly improving the design accuracy of the target system to be verified.

[0044] Furthermore, Figure 2 This application provides an overall framework flowchart for a dual-model verification method based on SysML and GCKontrol, combined with... Figure 2As can be seen, this application embodiment uses the functional logic model constructed by SysML and the simulation model constructed by GCKontrol as the core. By constructing a unified test case library, it drives the above two types of models to perform dual-track parallel verification, realizing the consistency verification of the logical design and dynamic behavior of the target system to be verified. The specific process is as follows: First, the SysML functional logic model and the GCCornrol system simulation model (i.e., the simulation model in the above embodiments) corresponding to the target system to be verified are obtained. Then, a test case set (i.e., the test case library in the above embodiments) is constructed based on the target system to be verified, generating test cases in a unified format. Next, a dual-track test case execution is performed, running the functional logic model via the SysML track and the system simulation model via the GCCornrol track respectively, simultaneously obtaining logical verification data and dynamic response data output by both models. A consistency comparison is performed on the two types of output data, and a difference list is output to determine the consistency verification result between the functional logic model and the system simulation model, reflecting the design accuracy of the target system to be verified.

[0045] Based on this, coverage analysis is conducted based on the execution status of test cases, covering dimensions including system requirements, state machine transitions, and interface scenarios. Iterative optimization is performed based on the consistency verification results and coverage, including supplementing test cases, adjusting parameters of the two models, and correcting model logic. After iterative optimization, it is determined whether the target conditions have been met, i.e., test coverage is achieved and the output differences between the two models converge. If the target conditions are not met, the dual-track execution test case steps are returned to be repeated for verification. If the target conditions are met, the verification completion result and verification report are output, completing the collaborative verification of the target system.

[0046] Furthermore, Figure 3 This is a schematic diagram of a dual-model verification device based on SysML and GCKontrol, provided as an embodiment of this application. (Combined with...) Figure 3 As shown in the embodiments of this application, the dual-model verification device 300 based on SysML and GCKontrol may include: The test case acquisition module 301 is used to acquire a test case library, which is built based on the target system to be verified; The model building module 302 is used to build a functional logic model using SysML and a simulation model using GCKontrol based on the requirements of the target system to be verified. The test case driving module 303 is used to drive the functional logic model and the simulation model to run based on the test case library, respectively, to obtain the logic verification data output by the functional logic model and the dynamic response data output by the simulation model. The data comparison module 304 is used to compare and analyze the logic verification data with the dynamic response data to determine the consistency verification result between the functional logic model and the simulation model. The consistency verification result is used to reflect the design accuracy of the target system to be verified.

[0047] Optionally, the model building module 302 is specifically used for: Based on the functional and logical architecture requirements of the target system to be verified, a functional logic model is constructed using SysML. The functional logic model is used to characterize the logical relationships of the target system to be verified. Based on the dynamic operation and simulation characteristics requirements of the target system to be verified, a simulation model is constructed using GCKontrol. The simulation model is used to simulate the dynamic behavior response of the target system to be verified.

[0048] Optionally, the dual-model verification device 300 based on SysML and GCKontrol may include: The timing processing module is used to perform timing alignment processing on the logical verification data and the dynamic response data respectively to obtain target logical verification data and target dynamic response data.

[0049] Optionally, the data comparison module 304 may include: The consistency verification module is used to compare the logical state transitions in the target logic verification data with the dynamic response changes in the target dynamic response data to determine the consistency verification result between the functional logic model and the simulation model.

[0050] Optionally, the consistency verification module is specifically used for: If the deviation between the logical state transition and the dynamic response change is less than or equal to a preset deviation threshold, the verification results of the functional logic model and the simulation model are determined to be consistent.

[0051] Optionally, the consistency verification module is specifically used for: If the deviation between the logical state transition and the dynamic response change is greater than a preset deviation threshold, it is determined that the verification results of the functional logic model and the simulation model are inconsistent.

[0052] Optionally, the test case library includes multiple test cases, and each of the multiple test cases includes a test scenario, input conditions, and parameter configuration.

[0053] Furthermore, embodiments of this application also provide an electronic device, including: a processor, a memory, and a system bus; The processor and the memory are connected via the system bus; The memory is used to store one or more programs, the one or more programs including instructions that, when executed by the processor, cause the processor to perform any of the implementation steps of the dual-model verification method based on SysML and GCKontrol described above.

[0054] Furthermore, embodiments of this application also provide a computer-readable storage medium for storing a computer program, which, when executed by a terminal device, implements any of the implementation steps of the dual-model verification method based on SysML and GCKontrol described above.

[0055] As can be seen from the above description of the embodiments, those skilled in the art can clearly understand that all or part of the steps in the methods of the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product can be stored in a storage medium, such as ROM / RAM, magnetic disk, optical disk, etc., and includes several instructions to cause a computer device (which may be a personal computer, a server, or a network communication device such as a media gateway, etc.) to execute the methods described in various embodiments or some parts of the embodiments of this application. It should be noted that the various embodiments in this specification are described in a progressive manner, and each embodiment focuses on describing the differences from other embodiments. The same or similar parts between the various embodiments can be referred to mutually.

[0056] The system disclosed in the embodiments is described in a relatively simple manner because it corresponds to the method disclosed in the embodiments. For relevant details, please refer to the method section.

[0057] It should also be noted that, in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0058] The above description of the disclosed embodiments enables those skilled in the art to make or use this application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of this application. Therefore, this application is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A dual-model validation method based on SysML and GCKontrol, characterized in that, The method includes: Obtain a test case library, which is built based on the target system to be verified; Based on the requirements of the target system to be verified, a functional logic model is constructed using SysML, and a simulation model is constructed using GCKontrol. Based on the test case library, the functional logic model and the simulation model are driven to run respectively, and the logic verification data output by the functional logic model and the dynamic response data output by the simulation model are obtained. The logic verification data and the dynamic response data are compared and analyzed to determine the consistency verification result between the functional logic model and the simulation model. The consistency verification result is used to reflect the design accuracy of the target system to be verified.

2. The method according to claim 1, characterized in that, Based on the requirements of the target system to be verified, the construction of a functional logic model using SysML and a simulation model using GCKontrol includes: Based on the functional and logical architecture requirements of the target system to be verified, a functional logic model is constructed using SysML. The functional logic model is used to characterize the logical relationships of the target system to be verified. Based on the dynamic operation and simulation characteristics requirements of the target system to be verified, a simulation model is constructed using GCKontrol. The simulation model is used to simulate the dynamic behavior response of the target system to be verified.

3. The method according to claim 1, characterized in that, Before comparing and analyzing the logical verification data with the dynamic response data, the method further includes: The logical verification data and the dynamic response data are time-aligned respectively to obtain the target logical verification data and the target dynamic response data.

4. The method according to claim 3, characterized in that, The step of comparing and analyzing the logic verification data with the dynamic response data to determine the consistency verification result between the functional logic model and the simulation model includes: The consistency verification results of the functional logic model and the simulation model are determined by comparing the logical state transitions in the target logic verification data with the dynamic response changes in the target dynamic response data.

5. The method according to claim 4, characterized in that, The step of comparing the logic state transitions in the target logic verification data with the dynamic response changes in the target dynamic response data to determine the consistency verification result between the functional logic model and the simulation model includes: If the deviation between the logical state transition and the dynamic response change is less than or equal to a preset deviation threshold, the verification results of the functional logic model and the simulation model are determined to be consistent.

6. The method according to claim 4, characterized in that, The step of comparing the logic state transitions in the target logic verification data with the dynamic response changes in the target dynamic response data to determine the consistency verification result between the functional logic model and the simulation model includes: If the deviation between the logical state transition and the dynamic response change is greater than a preset deviation threshold, it is determined that the verification results of the functional logic model and the simulation model are inconsistent.

7. The method according to claim 1, characterized in that, The test case library includes multiple test cases, and each test case includes a test scenario, input conditions, and parameter configuration.

8. A dual-model verification device based on SysML and GCKontrol, characterized in that, include: The test case acquisition module is used to acquire a test case library, which is built based on the target system to be verified. The model building module is used to build a functional logic model using SysML and a simulation model using GCKontrol based on the requirements of the target system to be verified. The test case driving module is used to drive the functional logic model and the simulation model to run based on the test case library, respectively, to obtain the logic verification data output by the functional logic model and the dynamic response data output by the simulation model. The data comparison module is used to compare and analyze the logic verification data with the dynamic response data to determine the consistency verification result between the functional logic model and the simulation model. The consistency verification result is used to reflect the design accuracy of the target system to be verified.

9. An electronic device, characterized in that, The device includes: a processor, a memory, and a system bus; The processor and the memory are connected via the system bus; The memory is used to store a program, the program including instructions that, when executed by the processor, cause the processor to perform the steps of the dual-model verification method based on SysML and GCKontrol as described in any one of claims 1-7.

10. A computer-readable storage medium, characterized in that, The computer-readable storage medium is used to store a computer program, which, when executed by a terminal device, implements the steps of the dual-model verification method based on SysML and GCKontrol as described in any one of claims 1-7.

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