Image rendering method and apparatus, vehicle, storage medium, and program product

Abstract

The present application relates to the technical field of image processing, and discloses an image rendering method and device, a vehicle, a storage medium and a program product. The present application generates a rendering topology graph including a plurality of rendering nodes and their dependency relations in advance by a central processing unit, and generates command blocks of the rendering nodes based on the rendering topology graph by a graphics processing unit. When rendering each frame, the graphics processing unit determines a plurality of target rendering nodes of the current rendering frame, and generates a node execution index table. Then, the target rendering path is generated based on the node execution index table and the rendering topology graph, the command blocks corresponding to the target rendering nodes are called according to the target rendering path to perform rendering, and the rendering result is obtained. The central processing unit does not need to generate and send rendering instructions to the graphics processing unit in real time every frame, the instruction round-trip delay between the central processing unit and the graphics processing unit is reduced, the rendering performance bottleneck caused by frequent communication is eliminated, and the rendering performance and rendering display effect are improved.

Description

Technical Field

[0001] This invention relates to the field of image processing technology, and more specifically to image rendering methods, apparatus, vehicles, storage media, and program products. Background Technology

[0002] As the complexity of in-vehicle intelligence and human-machine interfaces (HMIs) continues to increase, the graphics rendering architecture used in traditional in-vehicle systems is gradually revealing its efficiency bottlenecks and insufficient scalability.

[0003] Most mainstream technologies currently rely on the Central Processing Unit (CPU) to generate command buffers, which are then executed by the Graphics Processing Unit (GPU). In other words, the CPU generates instructions to drive the GPU to perform the rendering process. However, when faced with highly dynamic graphical interfaces, complex traffic information displays, and advanced lighting and shadow effects, this architecture, due to its heavy reliance on the CPU, often suffers from latency issues caused by frequent communication between the CPU and GPU, making rendering performance prone to bottlenecks. Summary of the Invention

[0004] This invention provides an image rendering method, apparatus, vehicle, storage medium, and program product to solve the problem of high rendering latency in the prior art, where the CPU needs to frequently send rendering commands to the GPU.

[0005] In a first aspect, the present invention provides an image rendering method applied to a graphics processor, the method comprising: Obtain the rendering topology graph constructed by the central processing unit; wherein, the rendering topology graph includes multiple rendering nodes and the dependencies between multiple rendering nodes; Based on the rendering topology graph, a command block corresponding to each rendering node is generated; the command block is used to represent the rendering instructions required to execute the rendering node. Determine the multiple target rendering nodes that need to be executed in the current rendering frame, and generate a node execution index table; Based on the node execution index table and rendering topology graph, the target rendering path is obtained. Based on the target rendering path, the command blocks corresponding to each target rendering node are called to perform rendering and obtain the rendering result.

[0006] This invention pre-generates a rendering topology map, including multiple rendering nodes and their dependencies, using the central processing unit (CPU). The graphics processing unit (GPU) then generates command blocks for each rendering node based on this topology map. During each frame rendering, the GPU determines multiple target rendering nodes for the current frame and generates a node execution index table. Based on the node execution index table and the rendering topology map, a target rendering path is generated. The rendering is then executed by calling the command blocks corresponding to each target rendering node according to the target rendering path, resulting in the rendering result. This eliminates the need for the CPU to generate and send rendering commands to the GPU in real-time each frame, reducing the instruction round-trip latency between the CPU and GPU, eliminating rendering performance bottlenecks caused by frequent communication, and improving rendering performance and display quality.

[0007] In some optional implementations, a command block corresponding to each rendering node is generated based on the rendering topology graph, including: Identify the multiple rendering resources associated with each rendering node in the rendering topology graph; For each rendering node, based on the multiple rendering resources associated with the rendering node, rendering instructions for calling each rendering resource are generated, resulting in the command block corresponding to the rendering node.

[0008] This invention identifies the rendering resources associated with each rendering node and generates rendering instructions to invoke these resources, forming command blocks. These command blocks are pre-generated and stored in the graphics processor (GPU) during the initialization phase. Consequently, during subsequent frame rendering, the GPU can directly invoke the pre-stored command blocks to complete the rendering operation without real-time intervention from the central processing unit (CPU), significantly reducing the frequency of instruction interaction between the CPU and GPU, and lowering communication latency and performance overhead during rendering.

[0009] In some optional implementations, based on multiple rendering resources associated with a rendering node, rendering instructions for invoking each rendering resource are generated to obtain a command block corresponding to the rendering node, including: Based on the input resources, shaders, and output buffers associated with the rendering node, input resource binding instructions, shader binding instructions, and output buffer write instructions are generated. The input resource binding instructions, shader binding instructions, and output buffer write instructions are arranged in sequence to obtain the command block corresponding to the rendering node.

[0010] This invention arranges input resource binding instructions, shader binding instructions, and output buffer write instructions in sequence to form a complete command block, and associates the command block with the corresponding rendering node. This allows the graphics processor to execute rendering according to the command block without the central processing unit's real-time intervention, ensuring the integrity of the rendering process and eliminating the communication delay caused by the central processing unit generating and sending rendering instructions every frame, thereby improving the rendering execution efficiency in complex scenes.

[0011] In some optional implementations, rendering is performed by calling the command blocks corresponding to each target rendering node based on the target rendering path, resulting in the following rendering results: Based on the target rendering path, determine the current target rendering node and the target rendering frame corresponding to the current target rendering node; If the current rendering frame is detected as the target rendering frame, the command block corresponding to the current target rendering node is called to render it, and the output result corresponding to the current target rendering node is obtained; If it is detected that the current rendering frame is not the target rendering frame, skip the execution of the current target rendering node and return to the step of determining the current target rendering node based on the target rendering path; The rendering result is obtained based on the output results corresponding to each target rendering node.

[0012] This invention uses the graphics processing unit (GPU) to determine whether the current rendering frame corresponds to the target rendering node. If so, rendering is performed on the target rendering node; otherwise, the rendering process of the target rendering node is skipped. By configuring the execution frequency of each rendering node, redundant rendering processes are skipped while ensuring rendering quality, thus reducing the power consumption of the GPU. Furthermore, rendering scheduling and execution are completed by the GPU, eliminating the need for real-time intervention from the central processing unit (CPU), thus eliminating instruction round-trip latency between the CPU and GPU and improving the rendering efficiency of the vehicle-mounted system.

[0013] In some optional implementations, the command block corresponding to the current target rendering node is invoked to perform rendering, and the output result corresponding to the current target rendering node is obtained, including: Invoke the input resource binding instructions and shader binding instructions corresponding to the current target rendering node, perform rendering on the current target rendering node, and obtain the output result; Call the output buffer write command corresponding to the current target rendering node to write the output result to the output buffer corresponding to the current target rendering node.

[0014] This invention pre-encapsulates input resource binding, shader binding, and output buffer writing instructions into a command block, enabling the graphics processor to directly call these rendering instructions in sequence during rendering. This completes the rendering process without real-time intervention from the central processing unit, thereby reducing rendering communication latency between the graphics processor and the central processing unit and ensuring the execution efficiency of rendering operations.

[0015] In some optional implementations, determining the target rendering frame corresponding to the current target rendering node includes: Based on the rendering topology graph, the execution frequency of the current target rendering node is obtained; Based on the execution frequency, determine the target rendering frame for the current target rendering node.

[0016] This invention configures an independent execution frequency for each rendering node and determines whether the current target rendering node should be executed in the current rendering frame based on the execution frequency, thereby achieving rendering frame rate control for each rendering node. By adjusting the execution frequency of each rendering node, redundant rendering is reduced and rendering power consumption is lowered.

[0017] In some optional implementations, the target rendering path is obtained by executing an index table and rendering a topology graph based on nodes, including: The node execution index table is used to traverse the rendering topology graph to obtain the dependencies between multiple target rendering nodes; The target rendering path is generated based on the dependencies between multiple target rendering nodes.

[0018] This invention utilizes a node execution index table to traverse the rendering topology graph and generate target rendering paths. This allows the graphics processor to autonomously resolve the dependencies between target rendering nodes without requiring the central processing unit to determine the rendering order, thus reducing rendering latency. At the same time, it ensures the logical correctness of the rendering process and can generate matching target rendering paths based on the current rendering frame, improving scene adaptability.

[0019] In some alternative implementations, determining multiple target rendering nodes that need to be executed in the current rendering frame includes: Get the list of objects to be rendered in the current rendering frame; Based on the list of objects to be rendered, determine the multiple target rendering nodes that need to be executed in the current rendering frame.

[0020] This invention obtains the list of objects to be rendered in the current rendering frame and dynamically determines the target rendering node, enabling the graphics processor to dynamically generate rendering tasks based on the actual rendering content of the current scene. This achieves scene adaptability in the rendering process and eliminates the need for the central processing unit to configure rendering instructions for each frame, thereby improving rendering efficiency.

[0021] In a second aspect, the present invention provides an image rendering apparatus applied to a graphics processor, the apparatus comprising: The first processing module is used to obtain the rendering topology graph constructed by the central processing unit; wherein, the rendering topology graph includes multiple rendering nodes and the dependencies between the multiple rendering nodes; The second processing module is used to generate a command block corresponding to each rendering node based on the rendering topology graph; wherein, the command block is used to represent the rendering instructions required to execute the rendering node; The third processing module is used to determine the multiple target rendering nodes that need to be executed in the current rendering frame and generate a node execution index table. The fourth processing module is used to execute the index table and render the topology map based on the nodes to obtain the target rendering path, and then call the command blocks corresponding to each target rendering node based on the target rendering path to perform rendering and obtain the rendering result.

[0022] Thirdly, the present invention provides a vehicle including a graphics processor for performing the image rendering method described in the first aspect or any corresponding embodiment thereof.

[0023] Fourthly, the present invention provides a computer-readable storage medium storing computer instructions for causing a computer to perform the image rendering method described in the first aspect or any corresponding embodiment thereof.

[0024] Fifthly, the present invention provides a computer program product, including computer instructions for causing a computer to execute the image rendering method described in the first aspect or any corresponding embodiment thereof.

[0025] The beneficial effects of this invention are as follows: This invention pre-generates a rendering topology map, including multiple rendering nodes and their dependencies, using the central processing unit (CPU). The graphics processing unit (GPU) then generates command blocks for each rendering node based on this topology map. During each frame rendering, the GPU determines multiple target rendering nodes for the current frame and generates a node execution index table. Based on the node execution index table and the rendering topology map, a target rendering path is generated. The rendering is then executed by calling the command blocks corresponding to each target rendering node according to the target rendering path, resulting in the rendering result. This eliminates the need for the CPU to generate and send rendering commands to the GPU in real-time each frame, reducing the instruction round-trip latency between the CPU and GPU, eliminating rendering performance bottlenecks caused by frequent communication, and improving rendering performance and display quality. Attached Figure Description

[0026] To more clearly illustrate the specific embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0027] Figure 1 This is a structural block diagram of a vehicle according to an embodiment of the present invention; Figure 2 This is a schematic diagram of the first process of an image rendering method according to an embodiment of the present invention; Figure 3 This is a schematic diagram of a second process of an image rendering method according to an embodiment of the present invention; Figure 4 This is a schematic diagram of the structure of the rendered topology graph according to an embodiment of the present invention; Figure 5 This is a schematic diagram of the rendering engine framework of a graphics processor according to an embodiment of the present invention; Figure 6 This is a schematic diagram of command block generation according to an embodiment of the present invention; Figure 7 This is a schematic diagram of the architecture of an image rendering system according to an embodiment of the present invention; Figure 8 This is a schematic diagram of the third process of the image rendering method according to an embodiment of the present invention; Figure 9 This is a structural block diagram of an image rendering apparatus according to an embodiment of the present invention. Detailed Implementation

[0028] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0029] It is understood that before using the technical solutions disclosed in the various embodiments of the present invention, users should be informed of the types, scope of use, and usage scenarios of the personal information involved in the present invention and their authorization should be obtained in accordance with relevant laws and regulations through appropriate means.

[0030] The terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this invention, "a plurality of" means two or more, unless otherwise explicitly specified.

[0031] Most related technologies rely on the central processing unit (CPU) generating command buffers and then having the graphics processing unit (GPU) execute them. This architecture often suffers from latency issues due to frequent communication between the CPU and GPU when dealing with highly dynamic graphical interfaces, complex traffic information displays, and advanced lighting effects. Furthermore, its fixed pipeline structure makes it difficult for the rendering process to adapt to the dynamic scheduling requirements of different display scenarios (such as switching between day and night modes, and mixing map, navigation, and instrument panel effects). The rendering process in these technologies depends on the central processing unit, making it difficult to eliminate the performance bottleneck caused by this dependency.

[0032] To address the aforementioned issues, this invention provides an image rendering scheme. The central processing unit (CPU) pre-generates a rendering topology map including multiple rendering nodes and their dependencies. The graphics processing unit (GPU) then generates command blocks for each rendering node based on this topology map. During each frame rendering, the GPU determines multiple target rendering nodes for the current frame and generates a node execution index table. Based on the node execution index table and the rendering topology map, a target rendering path is generated. The command blocks corresponding to each target rendering node are then invoked according to the target rendering path to execute the rendering, resulting in the rendering result. This eliminates the need for the CPU to generate and send rendering commands to the GPU in real-time each frame, reducing the instruction round-trip latency between the CPU and GPU, eliminating rendering performance bottlenecks caused by frequent communication, and improving rendering performance and display quality.

[0033] According to embodiments of the present invention, a vehicle is provided, such as Figure 1 As shown, the vehicle includes a graphics processing unit (GPU) 101 and a central processing unit (CPU) 102. The CPU 102 constructs a rendering topology graph and then sends this graph to the GPU 101. The rendering topology graph includes multiple rendering nodes and the dependencies between these nodes. Specifically, the GPU 101 is used for: Obtain the rendered topology map constructed by the central processing unit 102; Based on the rendering topology graph, a command block corresponding to each rendering node is generated; the command block is used to represent the rendering instructions required to execute the rendering node. Determine the multiple target rendering nodes that need to be executed in the current rendering frame, and generate a node execution index table; Based on the node execution index table and rendering topology graph, the target rendering path is obtained. Based on the target rendering path, the command blocks corresponding to each target rendering node are called to perform rendering and obtain the rendering result.

[0034] The vehicle provided in this embodiment of the invention utilizes a central processing unit 102 to pre-generate a rendering topology map including multiple rendering nodes and their dependencies. A graphics processing unit 101 then generates command blocks for each rendering node based on the rendering topology map. During each frame rendering, the graphics processing unit 101 determines multiple target rendering nodes for the current rendering frame and generates a node execution index table. Then, based on the node execution index table and the rendering topology map, a target rendering path is generated. The command blocks corresponding to each target rendering node are called according to the target rendering path to execute the rendering and obtain the rendering result. This eliminates the need for the central processing unit 102 to generate and send rendering instructions to the graphics processing unit 101 in real time each frame, reducing the instruction round-trip latency between the central processing unit 102 and the graphics processing unit 101, eliminating rendering performance bottlenecks caused by frequent communication, and improving rendering performance and display effects.

[0035] For a detailed description of the specific working principle and rendering process of the graphics processor 101, please refer to the method embodiment below, which will not be repeated here.

[0036] According to an embodiment of the present invention, an image rendering method embodiment is provided. It should be noted that the steps shown in the flowchart in the accompanying drawings can be executed in a computer system such as a set of computer-executable instructions. Furthermore, although a logical order is shown in the flowchart, in some cases, the steps shown or described may be executed in a different order than that shown here.

[0037] This embodiment provides an image rendering method that can be used for, for example Figure 1 The graphics processor shown, Figure 2 This is a flowchart of an image rendering method according to an embodiment of the present invention, such as... Figure 2 As shown, the process includes the following steps: Step S201: Obtain the rendering topology graph constructed by the central processing unit; wherein, the rendering topology graph includes multiple rendering nodes and the dependencies between the multiple rendering nodes.

[0038] Specifically, during the system initialization phase, such as when the vehicle is first powered on, the central processing unit (CPU) first loads a predefined node configuration file, parses the rendering nodes and their dependencies described in the configuration file, and constructs a directed acyclic graph (DAG) rendering topology. After the CPU completes the construction of the rendering topology, it uploads it to the memory of the graphics processing unit (GPU) so that the GPU can execute the rendering process based on the rendering topology. Once the CPU sends the rendering topology to the GPU, the graph structure remains stable during GPU rendering, eliminating the need for the CPU to resend it for each frame.

[0039] It should be noted that the rendering topology graph contains multiple rendering nodes, each representing an independent rendering process (such as drawing a map, drawing 3D arrows, etc.). The directed edges between rendering nodes represent dependencies. For example, if the output of rendering node A is the input texture of rendering node B, then there is an edge in the rendering topology graph pointing from rendering node A to rendering node B.

[0040] Step S202: Based on the rendering topology graph, generate a command block corresponding to each rendering node; wherein, the command block is used to represent the rendering instructions required to execute the rendering node.

[0041] Specifically, after the CPU sends the rendering topology map to the GPU, the GPU determines the shaders, input resources, output buffers, etc., used by each rendering node based on the node attribute information in the rendering topology map, and pre-generates a corresponding command block for each rendering node. For each rendering node, this command block encapsulates all the rendering instructions required to execute that rendering node. After the command block is generated, it is stored in the GPU memory and remains unchanged during GPU rendering, without needing to be regenerated by the GPU every frame.

[0042] Step S203: Determine the multiple target rendering nodes that need to be executed in the current rendering frame and generate a node execution index table.

[0043] Specifically, at the start of each frame rendering, the GPU combines the list of objects to be rendered in the current rendering frame to dynamically calculate the multiple target rendering nodes that need to be executed in the current rendering frame and generate a node execution index table.

[0044] Step S204: Based on the node execution index table and rendering topology map, obtain the target rendering path, and call the command block corresponding to each target rendering node based on the target rendering path to perform rendering and obtain the rendering result.

[0045] Specifically, during each frame rendering, the GPU obtains multiple target rendering nodes to be executed by reading the node execution index table of the current rendering frame. Then, based on the dependencies defined in the rendering topology graph, the GPU determines the target rendering path and executes the multiple target rendering nodes sequentially. When executing each target rendering node, the GPU directly calls the pre-generated command block corresponding to that target rendering node from memory. After all target rendering nodes have been executed, the GPU synthesizes the final rendering result based on the output results of all target rendering nodes.

[0046] In this embodiment of the invention, the GPU autonomously completes rendering scheduling, execution and data transfer in each frame of rendering. The CPU only builds the rendering topology map during the initialization phase. The CPU does not need to send corresponding rendering instructions to the GPU in each frame of rendering, which effectively reduces the communication frequency between the CPU and the GPU during rendering, thereby reducing rendering latency consumption and improving rendering performance and rendering display effect.

[0047] The image rendering method provided in this embodiment pre-generates a rendering topology map including multiple rendering nodes and their dependencies through the central processing unit (CPU). The graphics processing unit (GPU) then generates command blocks for each rendering node based on the rendering topology map. During rendering of each frame, the GPU determines multiple target rendering nodes for the current frame and generates a node execution index table. Then, based on the node execution index table and the rendering topology map, a target rendering path is generated. The rendering is then executed by calling the command blocks corresponding to each target rendering node according to the target rendering path, resulting in the rendering result. This eliminates the need for the CPU to generate and send rendering commands to the GPU in real time each frame, reducing the instruction round-trip latency between the CPU and GPU, eliminating rendering performance bottlenecks caused by frequent communication, and improving rendering performance and display effects.

[0048] This embodiment provides an image rendering method that can be used for, for example Figure 1 The graphics processor shown, Figure 3 This is a flowchart of an image rendering method according to an embodiment of the present invention, such as... Figure 3 As shown, the process includes the following steps: Step S301: Obtain the rendering topology graph constructed by the central processing unit; wherein, the rendering topology graph includes multiple rendering nodes and the dependencies between the multiple rendering nodes.

[0049] Specifically, during system initialization, the central processing unit first loads the node configuration file, which can be in JSON or YAML format. For example... Figure 4 As shown, based on the node configuration file, all rendering nodes (PipelineNode) are registered, and the node attribute information for each rendering node is configured. This node attribute information includes the node ID (NodeID) associated with the rendering node, the node name (Name), the enabled status (Enabled), the execution frequency (ExecFrequency), the list of dependent nodes (Inputs), the shader program (ShaderProgram), the input resources (InputBindings), and the output buffer (OutputTarget). Then, the central processing unit (CPU) uploads the generated rendering topology graph (RenderGraph) to the graphics processor's memory.

[0050] It should be noted that each type of input resource is registered with a unique resource ID, and the rendering node input is bound to the corresponding resource ID. Before rendering starts, the resource binding of each node can be completed in a table-driven manner. Input resources can support formats such as Vulkan and OpenGLES. The ShaderProgram is used to bind shaders to the rendering node, such as Vertex Shader and Fragment Shader. The InputBindings is used to bind input resources to the rendering node, such as textureID, Uniform Buffer Object (UBO) handle, and Sampler.

[0051] In some embodiments, the IRenderGraph interface is uniformly configured on the upper layer of the vehicle system, allowing the middle layer of various platforms (such as Linux, QNX, Android Automotive, etc.) to call the rendering topology graph, and providing a JSON and YAML graph structure import mechanism, and supporting OTA updates of the rendering topology graph.

[0052] Step S302: Based on the rendering topology graph, generate a command block corresponding to each rendering node; wherein, the command block is used to represent the rendering instructions required to execute the rendering node.

[0053] Specifically, step S302 includes: Step S3021: Determine the multiple rendering resources associated with each rendering node in the rendering topology graph.

[0054] Specifically, the graphics processor first performs initialization, such as... Figure 5 As shown, first, a dispatch buffer and a command block sequence buffer are allocated in memory. See again. Figure 3 After the graphics processing unit (GPU) receives the rendering topology map uploaded by the central processing unit, it first parses each rendering node in the rendering topology map. The GPU reads the node attribute information of all rendering nodes in the rendering topology map by traversing and identifies all rendering resources required for the execution of each rendering node, including but not limited to: input resources (textures, UBOs, texture samplers, etc.), shaders (vertex shaders, fragment shaders, compute shaders, etc.) and output buffers (output targets, frame buffers or intermediate buffers written after node execution).

[0055] Step S3022: For each rendering node, based on the multiple rendering resources associated with the rendering node, generate rendering instructions for calling each rendering resource to obtain the command block corresponding to the rendering node.

[0056] Specifically, after determining the rendering resources associated with each rendering node, the GPU generates corresponding rendering instructions one by one based on the rendering resources associated with the rendering node, thus generating the command block corresponding to each rendering node.

[0057] This invention identifies the rendering resources associated with each rendering node and generates rendering instructions to invoke these resources, forming command blocks. These command blocks are pre-generated and stored in the graphics processor (GPU) during the initialization phase. Consequently, during subsequent frame rendering, the GPU can directly invoke the pre-stored command blocks to complete the rendering operation without real-time intervention from the central processing unit (CPU), significantly reducing the frequency of instruction interaction between the CPU and GPU, and lowering communication latency and performance overhead during rendering.

[0058] In some optional implementations, step S3022 above includes: Step a1: Based on the input resources, shaders, and output buffers associated with the rendering node, generate input resource binding instructions, shader binding instructions, and output buffer write instructions.

[0059] Specifically, such as Figure 6 As shown, for each rendering node, the GPU inputs its associated rendering resources to the command block builder via the IcommandBuffer interface. The command block builder first constructs a Begin() instruction to begin rendering. Then, based on its associated input resource identifier, it generates an input resource binding instruction BindPipeline() to bind input resources such as textures and buffers to a specified pipeline. For example, for a map layer rendering node, it generates an instruction to bind a map texture to a sampler slot.

[0060] See you again Figure 6 Based on the shaders associated with the rendering node, a shader binding instruction is generated to activate the corresponding shader program. For example, for a map layer rendering node, an instruction to activate the map shader program MapShader is generated, thereby binding the corresponding shader program. Furthermore, based on the output buffer associated with the rendering node, an output buffer write instruction BindBuffer() is generated to write the output result to the specified frame buffer or intermediate buffer. For example, for a map layer rendering node, an instruction to write the output result to the frame buffer MapTarget is generated. It should be noted that the output result cached in the output buffer can also be the input resource of other rendering nodes.

[0061] In some embodiments, in addition to the instructions above, see again Figure 6 It can also generate drawing instructions (Draw()) that set drawing parameters, such as rendering instructions that set primitive type and number of vertices. The specific settings can be adjusted according to the actual rendering requirements of the nodes, and this invention is not limited thereto.

[0062] Step a2: Arrange the input resource binding instructions, shader binding instructions, and output buffer write instructions in sequence to obtain the command block corresponding to the rendering node.

[0063] Specifically, see again Figure 6 After generating the above rendering instructions, the rendering instructions are stored in the command buffer. Then, according to the logical order of instruction execution, the above rendering instructions are arranged into command blocks through the submission queue to ensure that the rendering process of the rendering node is consistent with the logical order.

[0064] Specifically, see again Figure 3 After generating the command block, the node attribute information of the rendered nodes is updated in the rendered topology graph, and the command block (CommandBlock) referenced by them is added. See again. Figure 5 The command blocks of all the above rendering nodes can be compiled and packaged into a continuous sequence of command blocks, which is stored in the command block sequence buffer in the GPU memory. Each rendering node corresponds to one command block.

[0065] This invention arranges input resource binding instructions, shader binding instructions, and output buffer write instructions in sequence to form a complete command block, and associates the command block with the corresponding rendering node. This allows the graphics processor to execute rendering according to the command block without the central processing unit's real-time intervention, ensuring the integrity of the rendering process and eliminating the communication delay caused by the central processing unit generating and sending rendering instructions every frame, thereby improving the rendering execution efficiency in complex scenes.

[0066] Step S303: Determine the multiple target rendering nodes that need to be executed in the current rendering frame and generate a node execution index table.

[0067] In this embodiment, a list of objects to be rendered in the current rendering frame is obtained. Then, based on the list of objects to be rendered, multiple target rendering nodes that need to be executed in the current rendering frame are determined.

[0068] Specifically, the GPU reads the scheduling buffer, which stores information about all objects in the current rendering frame, including their position, pose, bounding box, and material identifier. Based on the camera's view frustum parameters (e.g., position, viewpoint), the GPU performs intersection and collision calculations on all objects in the scene, determining whether the camera's view frustum intersects with an object's bounding box. If they intersect, the object is marked as a to-be-rendered object, and its object identifier is written to the to-be-rendered object list. This list also contains the association information between the to-be-rendered object and its corresponding rendering node. For example, a navigation arrow object is associated with a 3D arrow rendering node. The specific process of intersection and collision calculation can be found in the descriptions of relevant technologies and will not be elaborated upon here.

[0069] Furthermore, the GPU traverses the list of objects to be rendered. For each object in the list, based on its associated rendering node identifier, it updates the enabled status of the corresponding rendering node to enabled. Rendering nodes with an enabled status in the rendering topology graph are the target rendering nodes. The GPU writes the information of the target rendering node into the node execution index table and stores it in the index buffer (Continuous memory), recording the index of the target rendering node to be executed, without requiring real-time intervention from the central processing unit. The index buffer is shown in Table 1 below: Table 1 Index Buffer

[0070] In this embodiment of the invention, the graphics processor can dynamically determine the target rendering node to be executed based on the actual scene content of the current rendering frame, thereby achieving scene matching and rendering task matching. For example, during day / night mode switching, HUD overlay, and multi-screen rendering, the dynamic generation of the node execution index table enables the GPU to autonomously decide which rendering node to activate based on the real-time scene data of the current rendering frame, achieving scene adaptability of the rendering process and improving the real-time response capability of the vehicle platform under multi-scene switching.

[0071] This invention obtains the list of objects to be rendered in the current rendering frame and dynamically determines the target rendering node, enabling the graphics processor to dynamically generate rendering tasks based on the actual rendering content of the current scene. This achieves scene adaptability in the rendering process and eliminates the need for the central processing unit to configure rendering instructions for each frame, thereby improving rendering efficiency.

[0072] Step S304: Based on the node execution index table and rendering topology map, obtain the target rendering path, and call the command block corresponding to each target rendering node based on the target rendering path to perform rendering and obtain the rendering result.

[0073] Specifically, step S304 includes: Step S3041: Use the node execution index table to traverse the rendering topology graph to obtain the dependency relationships between multiple target rendering nodes; generate the target rendering path based on the dependency relationships between multiple target rendering nodes.

[0074] Specifically, at the start of each frame's rendering, the GPU first reads the node execution index table and uses it to traverse the rendering topology graph. Based on the edges defined in the rendering topology graph, the GPU identifies the dependencies between target rendering nodes and determines the predecessor and successor nodes of each target rendering node. Then, based on the dependencies between the target rendering nodes, an ordered target rendering path is generated.

[0075] It's important to note that the target rendering path is a sequence of nodes arranged in execution order, ensuring that the resources dependent on each rendering node are completed during the rendering process. For example, if rendering node A depends on rendering node B, then rendering node B will be listed before rendering node A in the rendering path.

[0076] This invention utilizes a node execution index table to traverse the rendering topology graph and generate target rendering paths. This allows the graphics processor to autonomously resolve the dependencies between target rendering nodes without requiring the central processing unit to determine the rendering order, thus reducing rendering latency. At the same time, it ensures the logical correctness of the rendering process and can generate matching target rendering paths based on the current rendering frame, improving scene adaptability.

[0077] Step S3042: Based on the target rendering path, determine the current target rendering node and the target rendering frame corresponding to the current target rendering node.

[0078] Specifically, the execution frequency of the current target rendering node is obtained based on the rendering topology graph. Then, based on the execution frequency, the target rendering frame for executing the current target rendering node is determined.

[0079] Specifically, the GPU sequentially traverses the nodes in the target rendering path, determines the current target rendering node to be rendered, and further determines whether the node should be executed in the current rendering frame. It reads the execution frequency configured for the current target rendering node in the rendering topology graph, which instructs the rendering node to execute once every N frames.

[0080] Furthermore, based on the execution frequency of the current target rendering node and in conjunction with the frame counter of the current rendering frame (maintained internally by the GPU and automatically incremented by 1 for each rendered frame), it is calculated whether the current rendering frame belongs to the target rendering frame within the execution cycle of that node. For example, if the remainder when the frame count of the current rendering frame is divided by N is 0, then the current rendering frame is the target rendering frame of the current target rendering node.

[0081] This invention configures an independent execution frequency for each rendering node and determines whether the current target rendering node should be executed in the current rendering frame based on the execution frequency, thereby achieving rendering frame rate control for each rendering node. By adjusting the execution frequency of each rendering node, redundant rendering is reduced and rendering power consumption is lowered.

[0082] Step S3043: If the current rendering frame is detected as the target rendering frame, the command block corresponding to the current target rendering node is called to render the frame and the output result corresponding to the current target rendering node is obtained.

[0083] Specifically, if the current rendering frame is the target rendering frame, the input resource binding instruction and shader binding instruction corresponding to the current target rendering node are called to perform rendering on the current target rendering node and obtain the output result. Then, the output buffer write instruction corresponding to the current target rendering node is called to write the output result to the output buffer corresponding to the current target rendering node.

[0084] In this embodiment of the invention, the GPU first loads the rendering instructions in the command block into the graphics pipeline, and then executes these rendering instructions sequentially to complete the binding of input resources, activation of shaders, and drawing calls, ultimately generating the output result of the target rendering node. This output result is written to the output buffer (such as an intermediate buffer or frame buffer) associated with the target rendering node.

[0085] This invention pre-encapsulates input resource binding, shader binding, and output buffer writing instructions into a command block, enabling the graphics processor to directly call these rendering instructions in sequence during rendering. This completes the rendering process without real-time intervention from the central processing unit, thereby reducing rendering communication latency between the graphics processor and the central processing unit and ensuring the execution efficiency of rendering operations.

[0086] Step S3044: If it is detected that the current rendering frame is not the target rendering frame, skip the execution of the current target rendering node and return to the step of determining the current target rendering node based on the target rendering path.

[0087] Specifically, if the current rendering frame is not the target rendering frame of the current target rendering node, the GPU skips the execution of that current target rendering node and does not perform any rendering operations on it in the current rendering frame. Subsequently, the GPU returns to step S3042 according to the order of the target rendering path to determine the next current target rendering node. This method achieves rendering frame rate control of rendering nodes, thereby reducing GPU power consumption while maintaining visual quality.

[0088] It should be noted that if there are unexecuted target rendering nodes in the current rendering frame (target rendering nodes skipped due to execution frequency control), their corresponding output buffers cache the output results of the previous rendering frame. That is, the content cached in the corresponding output buffer of each rendering node is the output result of the latest rendering.

[0089] Step S3045: Obtain the rendering result based on the output results corresponding to each target rendering node.

[0090] Specifically, after all nodes in the target rendering path have been executed, the output results corresponding to all target rendering nodes are integrated into the final rendered screen and displayed to obtain the rendering result.

[0091] In some embodiments, if the output of the previous node in the target rendering path is the input resource of the next node, the final rendering result is the output of the output buffer cache of the last rendering node in the target rendering node.

[0092] In this embodiment of the invention, the GPU can autonomously determine the target rendering path based on the node execution index table and the rendering topology map, and control the rendering frame rate according to the execution frequency of each target rendering node. This optimizes system power consumption while ensuring rendering effect, and eliminates the need for the central processing unit to control the rendering process of each frame.

[0093] This invention uses the graphics processing unit (GPU) to determine whether the current rendering frame corresponds to the target rendering node. If so, rendering is performed on the target rendering node; otherwise, the rendering process of the target rendering node is skipped. By configuring the execution frequency of each rendering node, redundant rendering processes are skipped while ensuring rendering quality, thus reducing the power consumption of the GPU. Furthermore, rendering scheduling and execution are completed by the GPU, eliminating the need for real-time intervention from the central processing unit (CPU), thus eliminating instruction round-trip latency between the CPU and GPU and improving the rendering efficiency of the vehicle-mounted system.

[0094] The image rendering scheme of the present invention will be described in detail below with reference to a specific application example.

[0095] like Figure 7 As shown, the World Renderer is the main body responsible for rendering the scene. It serves as the overall container for all rendered content, managing the scene and collecting resource information. The World Renderer obtains RenderFeatures by statistically analyzing the rendering characteristics of all objects to be rendered in the scene; and it obtains DataFeatures by statistically analyzing the types, sizes, and categories of resources required by all objects to be rendered in the scene.

[0096] Then, the RenderFeatures of the objects to be rendered and the DataFeatures of the resources are input into the rendering flow. The rendering topology interacts bidirectionally with the transient resources and the shading system within the frame, and utilizes the Render Context (environmental information for rendering generated based on hardware device information) to construct the rendering pipeline. This rendering pipeline can be called by other modules through the API interface of the graphics card driver layer.

[0097] Specifically, such as Figure 8As shown, during the CPU initialization phase, the CPU loads the configuration file, constructs a RenderGraph structure containing multiple PipelineNodes, binds resources and shaders to each node, and sets parameters such as execution frequency. Then, the complete RenderGraph is uploaded to the GPU.

[0098] Next, the GPU performs initialization. After receiving the rendering topology map, the GPU allocates a dispatch buffer (DispatchBuffer), generates and caches command blocks for each node, and builds an initial node execution index table.

[0099] Then, during each frame rendering, the GPU reads the Dispatch Buffer to determine the information of the object to be rendered, obtains the target rendering node, updates the initial node execution index table, and generates the node execution index table for the current rendering frame. It traverses the RenderGraph, checks the dependencies between nodes, activates command blocks matching the target rendering node, executes rendering, and writes the output to the corresponding frame buffer or intermediate buffer. Simultaneously, during rendering, the execution frequency is controlled according to node configuration parameters (e.g., low-frequency frame skipping).

[0100] This embodiment also establishes a resource template and automatic binding mechanism. By mapping resource IDs and node inputs, batch resource binding is completed before rendering starts, and an interface layer compatible with Vulkan and OpenGL is encapsulated.

[0101] This embodiment also establishes a platform deployment and graph structure update mechanism, supports deployment on multiple platforms such as Android, Linux, and QNX through the unified interface IRenderGraph, and realizes online hot updates of the rendering process by using JSON, YAML graph import and OTA update mechanisms.

[0102] This invention introduces a rendering pipeline architecture centered on active scheduling by the graphics processor, constructs a rendering topology graph (RenderGraph) using a graph structure, uses modular rendering nodes (PipelineNode) as basic units, and combines an automatic resource template binding mechanism with a command buffer control method to achieve a configurable, freely combinable, and customizable rendering process. It is also compatible with existing graphics API interfaces (such as Vulkan and OpenGL ES) and can be deployed in various in-vehicle system platforms.

[0103] The rendering scheduling of this invention is controlled by the graphics processor, significantly reducing central processing unit intervention and lowering instruction round-trip latency; the rendering pipeline is organized in a graph structure, supporting dynamic topology adjustment and hot node updates; nodes encapsulate complete rendering instructions, possessing high modularity and independence; it supports automatic resource binding and inter-node dependency resolution, simplifying the development process; it can be extended to multi-channel rendering, day / night mode switching, HUD / map overlay and other automotive scenarios, with higher scene adaptability; it provides a unified interface layer to realize cross-system deployment of unified rendering logic, and has wide application value in vehicle systems that require high-performance graphics rendering, such as smart cockpits, HMIs, dashboards and AR HUDs.

[0104] This invention proposes an architecture that completely delegates the organization and execution of graphics rendering tasks to the graphics processor (GPU). It introduces a rendering topology graph structure that can be autonomously parsed and scheduled by the GPU, combined with a lightweight command block mechanism and a structured resource binding strategy. This allows for the construction of the rendering workflow, resource management, and task execution without real-time intervention from the central processing unit (CPU). Furthermore, rendering nodes possess independent execution logic within the graph, supporting differentiated execution frequencies and hot node replacement, overcoming the problems of rigid workflows, inflexible execution paths, and complex resource binding in traditional graphics pipelines. In addition, through standardized interface encapsulation and platform-independent graph structure description, it enables consistent deployment and online topology updates of the vehicle's infotainment system across multiple operating system environments, forming a novel graphics pipeline solution with versatility, customizability, and dynamic evolution capabilities.

[0105] This invention proposes a programmable pipeline rendering solution for vehicle-mounted platforms driven by graphics processors. This solution can solve problems such as performance bottlenecks, low resource scheduling efficiency, and fixed pipeline structures caused by the central processing unit in traditional graphics rendering processes, thereby improving the real-time performance, modularity, and power management capabilities of the graphics rendering platform on the vehicle system.

[0106] This embodiment also provides an image rendering apparatus for implementing the above embodiments and preferred embodiments; details already described will not be repeated. As used below, the term "module" can refer to a combination of software and / or hardware that performs a predetermined function. Although the apparatus described in the following embodiments is preferably implemented in software, hardware implementation, or a combination of software and hardware, is also possible and contemplated.

[0107] This embodiment provides an image rendering device, such as... Figure 9 As shown, it includes: The first processing module 901 is used to obtain the rendering topology graph constructed by the central processing unit; wherein, the rendering topology graph includes multiple rendering nodes and the dependencies between the multiple rendering nodes; The second processing module 902 is used to generate a command block corresponding to each rendering node based on the rendering topology graph; wherein, the command block is used to represent the rendering instructions required to execute the rendering node; The third processing module 903 is used to determine the multiple target rendering nodes that need to be executed in the current rendering frame and generate a node execution index table. The fourth processing module 904 is used to execute the index table and render the topology map based on the node to obtain the target rendering path, and to call the command block corresponding to each target rendering node based on the target rendering path to perform rendering and obtain the rendering result.

[0108] In some optional implementations, the second processing module 902 is further configured to: Identify the multiple rendering resources associated with each rendering node in the rendering topology graph; For each rendering node, based on the multiple rendering resources associated with the rendering node, rendering instructions for calling each rendering resource are generated, resulting in the command block corresponding to the rendering node.

[0109] In some optional implementations, the second processing module 902 is further configured to: Based on the input resources, shaders, and output buffers associated with the rendering node, input resource binding instructions, shader binding instructions, and output buffer write instructions are generated. The input resource binding instructions, shader binding instructions, and output buffer write instructions are arranged in sequence to obtain the command block corresponding to the rendering node.

[0110] In some optional implementations, the third processing module 903 is further configured to: Get the list of objects to be rendered in the current rendering frame; Based on the list of objects to be rendered, determine the multiple target rendering nodes that need to be executed in the current rendering frame.

[0111] In some optional implementations, the fourth processing module 904 is further configured to: Based on the target rendering path, determine the current target rendering node and the target rendering frame corresponding to the current target rendering node; If the current rendering frame is detected as the target rendering frame, the command block corresponding to the current target rendering node is called to render it, and the output result corresponding to the current target rendering node is obtained; If it is detected that the current rendering frame is not the target rendering frame, skip the execution of the current target rendering node and return to the step of determining the current target rendering node based on the target rendering path; The rendering result is obtained based on the output results corresponding to each target rendering node.

[0112] In some optional implementations, the fourth processing module 904 is further configured to: Invoke the input resource binding instructions and shader binding instructions corresponding to the current target rendering node, perform rendering on the current target rendering node, and obtain the output result; Call the output buffer write command corresponding to the current target rendering node to write the output result to the output buffer corresponding to the current target rendering node.

[0113] In some optional implementations, the fourth processing module 904 is further configured to: Based on the rendering topology graph, the execution frequency of the current target rendering node is obtained; Based on the execution frequency, determine the target rendering frame for the current target rendering node.

[0114] In some optional implementations, the fourth processing module 904 is further configured to: The node execution index table is used to traverse the rendering topology graph to obtain the dependencies between multiple target rendering nodes; The target rendering path is generated based on the dependencies between multiple target rendering nodes.

[0115] The image rendering apparatus provided in this embodiment of the invention can execute the image rendering method provided in any embodiment of the invention, and has the corresponding functional modules and beneficial effects for executing the method. Further functional descriptions of the various modules and units described above are the same as in the corresponding embodiments described above, and will not be repeated here.

[0116] This invention also provides a computer-readable storage medium. The methods described above according to embodiments of the invention can be implemented in hardware or firmware, or implemented as computer code that can be recorded on a storage medium, or implemented as computer code downloaded via a network and originally stored on a remote storage medium or a non-transitory machine-readable storage medium and then stored on a local storage medium. Thus, the methods described herein can be processed by software stored on a storage medium using a general-purpose computer, a dedicated processor, or programmable or dedicated hardware. The storage medium can be a magnetic disk, optical disk, read-only memory, random access memory, flash memory, hard disk, or solid-state drive, etc.; further, the storage medium can also include combinations of the above types of memory. It is understood that computers, processors, microprocessor controllers, or programmable hardware include storage components capable of storing or receiving software or computer code. When the software or computer code is accessed and executed by the computer, processor, or hardware, the image rendering method shown in the above embodiments is implemented.

[0117] A portion of this invention can be applied as a computer program product, such as computer program instructions, which, when executed by a computer, can invoke or provide the methods and / or technical solutions according to the invention through the operation of the computer. Those skilled in the art will understand that the forms in which computer program instructions exist in a computer-readable medium include, but are not limited to, source files, executable files, installation package files, etc. Correspondingly, the ways in which computer program instructions are executed by a computer include, but are not limited to: the computer directly executing the instructions, or the computer compiling the instructions and then executing the corresponding compiled program, or the computer reading and executing the instructions, or the computer reading and installing the instructions and then executing the corresponding installed program. Here, the computer-readable medium can be any available computer-readable storage medium or communication medium accessible to a computer.

[0118] Although embodiments of the invention have been described in conjunction with the accompanying drawings, those skilled in the art can make various modifications and variations without departing from the spirit and scope of the invention, and such modifications and variations all fall within the scope defined by the appended claims.

Claims

1. An image rendering method, characterized in that, Applied to a graphics processor, the method includes: Obtain the rendering topology graph constructed by the central processing unit; wherein, the rendering topology graph includes multiple rendering nodes and the dependencies between the multiple rendering nodes; Based on the rendering topology graph, a command block corresponding to each rendering node is generated; wherein, the command block is used to represent the rendering instructions required to execute the rendering node; Determine the multiple target rendering nodes that need to be executed in the current rendering frame, and generate a node execution index table; Based on the node execution index table and the rendering topology graph, the target rendering path is obtained. Based on the target rendering path, the command blocks corresponding to each target rendering node are called to perform rendering and obtain the rendering result.

2. The image rendering method according to claim 1, characterized in that, The step of generating a command block corresponding to each rendering node based on the rendering topology graph includes: Identify the multiple rendering resources associated with each rendering node in the rendering topology graph; For each rendering node, based on the multiple rendering resources associated with the rendering node, rendering instructions for calling each rendering resource are generated to obtain the command block corresponding to the rendering node.

3. The image rendering method according to claim 2, characterized in that, The process of generating rendering instructions for each rendering resource based on the multiple rendering resources associated with the rendering node, and obtaining the command block corresponding to the rendering node, includes: Based on the input resources, shaders, and output buffers associated with the rendering node, input resource binding instructions, shader binding instructions, and output buffer write instructions are generated. The input resource binding instructions, shader binding instructions, and output buffer write instructions are arranged in sequence to obtain the command block corresponding to the rendering node.

4. The image rendering method according to claim 3, characterized in that, The rendering process, which involves calling the command blocks corresponding to each target rendering node based on the target rendering path to obtain the rendering result, includes: Based on the target rendering path, determine the current target rendering node and the target rendering frame corresponding to the current target rendering node; If the current rendering frame is detected as the target rendering frame, the command block corresponding to the current target rendering node is invoked to perform rendering, and the output result corresponding to the current target rendering node is obtained; If it is detected that the current rendering frame is not the target rendering frame, skip the execution of the current target rendering node and return to the step of determining the current target rendering node based on the target rendering path; The rendering result is obtained based on the output results corresponding to each target rendering node.

5. The image rendering method according to claim 4, characterized in that, The step of invoking the command block corresponding to the current target rendering node to perform rendering and obtain the output result corresponding to the current target rendering node includes: The input resource binding instructions and shader binding instructions corresponding to the current target rendering node are invoked to perform rendering on the current target rendering node and obtain the output result; The output result is written to the output buffer corresponding to the current target rendering node by calling the output buffer write instruction corresponding to the current target rendering node.

6. The image rendering method according to claim 4, characterized in that, Determining the target rendering frame corresponding to the current target rendering node includes: Based on the rendering topology graph, the execution frequency of the current target rendering node is obtained; Based on the execution frequency, the target rendering frame for executing the current target rendering node is determined.

7. The image rendering method according to any one of claims 1-6, characterized in that, The step of obtaining the target rendering path based on the node execution index table and the rendering topology map includes: The node execution index table is used to traverse the rendering topology graph to obtain the dependency relationships between the multiple target rendering nodes; Based on the dependencies between the multiple target rendering nodes, a target rendering path is generated.

8. The image rendering method according to any one of claims 1-6, characterized in that, The process of determining the multiple target rendering nodes to be executed for the current rendering frame includes: Get the list of objects to be rendered in the current rendering frame; Based on the list of objects to be rendered, determine the multiple target rendering nodes that need to be executed in the current rendering frame.

9. An image rendering apparatus, characterized in that, The device, applied to a graphics processor, includes: The first processing module is used to obtain a rendering topology graph constructed by the central processing unit; wherein, the rendering topology graph includes multiple rendering nodes and the dependencies between the multiple rendering nodes; The second processing module is used to generate a command block corresponding to each rendering node based on the rendering topology graph; wherein the command block is used to represent the rendering instructions required to execute the rendering node; The third processing module is used to determine the multiple target rendering nodes that need to be executed in the current rendering frame and generate a node execution index table. The fourth processing module is used to obtain the target rendering path based on the node execution index table and the rendering topology map, and to call the command blocks corresponding to each target rendering node based on the target rendering path to perform rendering and obtain the rendering result.

10. A vehicle, characterized in that, The vehicle includes a graphics processor for performing the image rendering method according to any one of claims 1 to 8.

11. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores computer instructions for causing a computer to perform the image rendering method according to any one of claims 1 to 8.

12. A computer program product, characterized in that, Includes computer instructions for causing a computer to perform the image rendering method according to any one of claims 1 to 8.

Images