A precision mainboard defect detection method and system based on image detection

By employing a non-reflective inspection platform, multi-source image acquisition, and layered preprocessing technology, combined with a standard component library and self-learning optimization algorithm, the problems of reflective interference and mechanical error calibration in high-precision inspection of precision motherboards have been solved. This has enabled efficient and accurate defect detection and classification, reduced false positive and false negative rates, and improved the standardization and adaptability of the inspection process.

CN122434816APending Publication Date: 2026-07-21SHENZHEN HUANAN SANXIAN TECH CO LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
SHENZHEN HUANAN SANXIAN TECH CO LTD
Filing Date
2026-03-06
Publication Date
2026-07-21

AI Technical Summary

Technical Problem

Existing technologies are insufficient to meet the high-precision and high-efficiency defect detection requirements of precision motherboards. They suffer from problems such as reflective interference, difficulty in calibrating mechanical errors, limited feature extraction dimensions, and lack of self-learning optimization capabilities, resulting in high false detection and false negative rates. Furthermore, the labeling and storage of detection results lack standardization, making it difficult to achieve traceability of detection data.

Method used

A non-reflective inspection platform was built, which uses a combination of multiple light sources to acquire images and calibrate benchmark points. The images were preprocessed in layers, and feature matching and multi-dimensional defect feature extraction were performed in combination with a standard component library. Through secondary verification and self-learning to optimize algorithm parameters, accurate identification and classification of defects were achieved.

Benefits of technology

Significantly reduces false positive and false negative rates, enables accurate defect identification and classification, generates and stores standardized test reports, adapts to new motherboard models, eliminates the need for frequent adjustments to the test plan, and improves the stability and flexibility of the test process.

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Abstract

The application discloses a kind of precision mainboard defect detection method and system based on image detection, it is related to image processing field, including: through multi-light source cooperation and acquisition mainboard image, stratified processing surface element, solder joint, circuit information, after denoising and enhancement segmented function area, standard library is positioned element and extraction morphological parameter in combination;Defects are identified using multi-dimensional feature analysis, false positives are reduced by image magnification, neighborhood comparison and multi-light source cross-validation, and finally defects are graded and a report is generated.The application has the advantages that: by non-reflective multi-light source acquisition, stratified preprocessing, and accurate feature recognition and secondary verification, high-precision defect detection and grading are achieved, the process is standardized and self-learning adaptable, and the traditional detection pain points can be efficiently solved to meet the needs of precision mainboard mass production and high-precision detection.
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Description

Technical Field

[0001] This invention relates to the field of image processing, and in particular to a precision motherboard defect detection method and system based on image detection. Background Technology

[0002] As electronic products evolve towards higher performance and miniaturization, the integration and complexity of motherboards continue to increase. Traditional manual visual inspection and simple optical testing are no longer sufficient to meet the demands for high-precision and high-efficiency testing. Especially in high-density interconnect boards, multilayer boards, and advanced packaging processes, micron-level defects can lead to product failure, while emerging applications such as 5G and AI chips place even more stringent requirements on motherboard reliability.

[0003] Current market-based testing methods suffer from numerous significant drawbacks, failing to meet the demands of large-scale, high-precision testing of precision motherboards. Most methods lack dedicated, non-reflective testing platforms, relying on single or fixed-angle light sources for image acquisition. This makes them susceptible to interference from motherboard material reflections, leading to overexposure and loss of detail. Furthermore, the lack of precise benchmark calibration hinders compensation for mechanical errors and placement deviations, impacting fundamental testing accuracy. Preprocessing lacks layered processing, often employing fixed-threshold noise reduction algorithms that fail to adapt to varying noise levels across different regions, making it difficult to effectively distinguish noise from minor defects. It also fails to adequately enhance the difference between defects and normal areas, interfering with subsequent testing. Feature extraction is limited in scope, lacking precise matching with standard component libraries and a robust secondary verification mechanism, resulting in high false positive and false negative rates, with an industry average of 3%-5%. Moreover, most methods lack self-learning optimization capabilities, unable to update feature libraries and algorithm parameters based on testing data. Adapting to new motherboard models requires frequent manual adjustments, resulting in a cumbersome and inefficient process. The labeling and storage of test results lack standardization, hindering data traceability. Summary of the Invention

[0004] To improve existing methods and systems, this paper presents a precision motherboard defect detection method and system based on image detection. This method achieves high-precision defect detection and classification through non-reflective multi-source acquisition, layered preprocessing, and accurate feature recognition and secondary verification. It combines process standardization with self-learning adaptability, effectively solves the pain points of traditional detection, and meets the needs of large-scale and high-precision precision motherboard detection.

[0005] To achieve the above objectives, the technical solution adopted by the present invention is as follows: A precision motherboard defect detection method based on image detection, comprising: A non-reflective testing platform was built, the coordinates of the motherboard reference point were collected and the deviation was calibrated, and multiple sets of light sources, including ring shadowless, side-emitting, and coaxial light sources, were activated according to the motherboard positioning coordinates to collect multiple sets of motherboard images. The acquired images are divided into three layers according to the motherboard structure: surface components, solder joints, and circuits. An adaptive noise reduction algorithm is used to remove noise, and the difference between defects and normal areas is enhanced through contrast adjustment and edge sharpening. Based on the contour segmentation algorithm, background interference is eliminated and each functional area is segmented. Combined with the standard component library, feature matching is used to locate motherboard components, pins, and solder joints, and their position and shape parameters are recorded. Based on the location results of each layer region and component, defect features are extracted for each detection unit to construct a multi-dimensional defect feature set. At the same time, texture and grayscale features are extracted to form a multi-dimensional defect feature vector. The defect features are compared with the standard feature library to identify suspected defects. Secondary verification is performed through three methods: image magnification, neighborhood comparison, and multi-source cross-verification. False detection signals are eliminated by combining historical data. The defects are classified into three levels: critical, severe, and general. Defect information is marked on the images and a detailed inspection report is generated. The inspection results and defect-marked images are stored synchronously in the database. Collect data from each detection, supplement the standard feature library with real defect data, and optimize algorithm parameters using false detection and missed detection data as samples.

[0006] Preferably, the process of building a reflective detection platform, acquiring the coordinates of the motherboard reference point and calibrating the deviation, and activating multiple sets of light sources (ring-shaped, side-emitting, and coaxial) based on the motherboard positioning coordinates to acquire multiple sets of motherboard images specifically includes: A non-reflective testing platform is set up, and the precision motherboard to be tested is fixed to the preset position on the testing table using a vacuum adsorption device; Collect the coordinates of the motherboard edge reference point and compare them with the preset standard motherboard reference coordinates to automatically compensate for the mechanical error of the testing station and the motherboard placement deviation. The ring-shaped shadowless light source, side-emitting light source, and coaxial light source on the reflective inspection platform are activated. The light intensity is increased for chip, pin, and solder joint areas, and the light intensity is reduced for blank areas. Multiple sets of high-definition motherboard images under different light source illumination are acquired.

[0007] Preferably, the step of dividing the acquired image into three layers according to the motherboard structure—surface components, solder joints, and circuits—and using an adaptive noise reduction algorithm to remove noise, and enhancing the difference between defective and normal areas through contrast adjustment and edge sharpening, specifically includes: Based on the acquired motherboard image, layer processing is performed to divide the image into three independent layers: surface component layer, solder joint layer, and circuit layer. Each layer corresponds to a different structural area of ​​the motherboard. Denoising is performed on each layer separately, using an adaptive median noise reduction algorithm that automatically adjusts the noise reduction threshold based on the noise intensity of different areas within the layer, removing random noise, light source noise, and electronic noise generated during image acquisition. After noise reduction, the outlines of components, the direction of circuits, and the shape of solder joints within the layer are highlighted through adaptive contrast adjustment and edge sharpening, thereby enhancing the grayscale and texture differences between defective and normal areas.

[0008] Preferably, the contour segmentation algorithm, which eliminates background interference and segments each functional area, combined with a standard component library, locates motherboard components, pins, and solder joints through feature matching, and records their position and shape parameters, specifically includes: Based on the preprocessed layered image, according to the preset standard motherboard structure parameters, the contour segmentation algorithm is used to segment each layer into regions, and obtain the surface component region, solder joint region, and circuit region. Each region corresponds to an independent detection unit. After segmentation, key components in each layer are located using feature matching, based on a pre-defined standard motherboard component library. These components include chips, resistors, capacitors, inductors, as well as the pins, solder joints, and circuit nodes of each component. The component library contains the size, shape, and position coordinate parameters of various components for different models of precision motherboards; During the positioning process, each key component is matched through coordinate calibration, and the actual position coordinates and morphological parameters of each key component are recorded.

[0009] Preferably, the step of extracting defect features for each detection unit based on the positioning results of each layer region and component, constructing a multi-dimensional defect feature set, and simultaneously extracting texture and grayscale features to form a multi-dimensional defect feature vector specifically includes: Based on the location results of each layer region and key component, defect features are extracted for each detection unit to construct a multi-dimensional defect feature set. An adaptive feature extraction algorithm is used during the extraction process to adjust the dimension and weight of feature extraction according to the type of detection unit; Extract the texture features, grayscale features, and spatial location features of each defect region to form a multi-dimensional defect feature vector.

[0010] Preferably, the step of comparing defect features with a standard feature library to identify suspected defects, and then performing secondary verification through three methods—image magnification, neighborhood comparison, and multi-source cross-validation—combined with historical data to eliminate false detection signals specifically includes: Based on the extracted multi-dimensional defect feature vectors, they are matched with a preset standard feature library, which contains feature vectors, defect types, and severity levels of common defects in various precision motherboards; By comparing feature similarity, suspected defects in each detection unit are initially identified, and the type, location and characteristic parameters of the suspected defects are marked. Three methods were used to perform secondary verification on all suspected defects: local image magnification, neighborhood feature comparison, and cross-verification of multi-source images. By combining historical detection data, the probability of suspected defects is judged, and false detection signals with a probability lower than a preset threshold are eliminated.

[0011] Preferably, the process of classifying confirmed defects into three levels—critical, severe, and general—annotating defect information on the image, generating a detailed inspection report, and synchronously storing the inspection results and defect-annotated images in the database specifically includes: Based on the defect identification and verification results, the defects are classified into three levels according to their type and severity: fatal defects, serious defects, and general defects. During the annotation process, the specific location, defect type, severity level, and feature parameters of each defect are marked on the layered image to form a defect annotation image; Generate a detailed test result report, which includes the model of the motherboard to be tested, the test time, the test environment parameters, the total number of defects, the number of each type of defect, the coordinates of the defect location, the severity of the defect, and the handling suggestions. The detection results and defect-annotated images are stored synchronously in the database.

[0012] Preferably, the step of collecting data from each detection, supplementing the standard feature library with real defect data, and optimizing algorithm parameters using false positive and false negative data as samples specifically includes: After each inspection is completed, all data from this inspection are collected, including the acquired image data, preprocessed data, defect feature data, and recognition result data, and the defect data is added to the standard feature library. Using false positive and false negative data as optimization samples, the noise reduction threshold and enhancement parameters of image preprocessing are adjusted through sample learning, the parameters of the region segmentation algorithm and the defect feature extraction algorithm are optimized, and the matching threshold and probability judgment criteria for defect identification are updated. When testing a new model of precision motherboard, import the standard parameters and sample images of that model of motherboard, and automatically update the component library and standard feature library.

[0013] Furthermore, a precision motherboard defect detection system based on image detection is proposed, comprising: Image acquisition module: Acquires high-definition motherboard images through a combination of multiple light sources on a reflective detection platform, and calibrates the coordinates of the reference point to eliminate mechanical errors; Image preprocessing module: The image is divided into three layers: components, solder joints, and circuits. Adaptive noise reduction, contrast enhancement, and edge sharpening algorithms are used to optimize image quality. Region segmentation and localization module: Based on contour segmentation algorithm, functional regions are divided, and component positions are matched with standard component library, and coordinates and morphological parameters are recorded; Defect feature extraction module: Extracts texture, grayscale and spatial features for each detection unit to construct a multi-dimensional defect feature vector; Defect identification and verification module: Initially identifies defects by comparing with a standard feature library, and eliminates false detections by using image magnification, neighborhood comparison and multi-source cross-verification; Output and storage module: Classifies and labels defect levels, generates inspection reports, and synchronously stores images and data to the database; Self-learning optimization module: Collects detection data to update the standard feature library, optimizes algorithm parameters using false detection and missed detection samples, and adapts to new motherboard models; Processor: The processor is used to handle the calculation process of each formula and the construction calculation process of each model.

[0014] Compared with the prior art, the advantages of the present invention are: By constructing a reflective-free inspection platform and combining it with multi-light source image acquisition, along with benchmark calibration, the effects of mechanical deviation and reflection are eliminated at the source, ensuring the clarity and accuracy of image acquisition. Layered preprocessing, adaptive noise reduction, and feature enhancement technologies are employed to accurately segment each functional area of ​​the motherboard, highlighting the differences between defective and normal areas, laying the foundation for subsequent inspection. Utilizing standard component library matching and positioning, and multi-dimensional defect feature extraction, combined with triple secondary verification and historical data-assisted judgment, the false positive and false negative rates are significantly reduced, achieving accurate defect identification and classification. Simultaneously, inspection results can be automatically labeled, standardized reports generated, and stored synchronously, improving the standardization and traceability of the inspection process. A self-learning optimization mechanism continuously updates the feature library and optimizes algorithm parameters to adapt to new motherboard models, eliminating the need for frequent adjustments to the inspection scheme. Balancing inspection stability and flexibility, it can efficiently meet the large-scale, high-precision inspection needs of precision motherboards. Attached Figure Description

[0015] Figure 1 This is a schematic diagram of the method proposed in this invention; Figure 2 This is a schematic diagram of motherboard image acquisition proposed in this invention; Figure 3 This is a schematic diagram of the image layered noise reduction and enhancement preprocessing proposed in this invention; Figure 4 This is a schematic diagram of the motherboard area segmentation and component positioning proposed in this invention; Figure 5 This is a schematic diagram of the defect feature extraction proposed in this invention; Figure 6 This is a schematic diagram illustrating the defect identification and false detection elimination method proposed in this invention; Figure 7 This is a schematic diagram of the defect classification and labeling proposed in this invention; Figure 8 This is a schematic diagram illustrating the optimization and updating of the detection model proposed in this invention. Detailed Implementation

[0016] The following description is intended to disclose the invention and enable those skilled in the art to implement it. The preferred embodiments described below are merely examples, and other obvious variations will occur to those skilled in the art.

[0017] A precision motherboard defect detection system based on image detection, comprising: Image acquisition module: Acquires high-definition motherboard images through a combination of multiple light sources on a reflective detection platform, and calibrates the coordinates of the reference point to eliminate mechanical errors; Image preprocessing module: The image is divided into three layers: components, solder joints, and circuits. Adaptive noise reduction, contrast enhancement, and edge sharpening algorithms are used to optimize image quality. Region segmentation and localization module: Based on contour segmentation algorithm, functional regions are divided, and component positions are matched with standard component library, and coordinates and morphological parameters are recorded; Defect feature extraction module: Extracts texture, grayscale and spatial features for each detection unit to construct a multi-dimensional defect feature vector; Defect identification and verification module: Initially identifies defects by comparing with a standard feature library, and eliminates false detections by using image magnification, neighborhood comparison and multi-source cross-verification; Output and storage module: Classifies and labels defect levels, generates inspection reports, and synchronously stores images and data to the database; Self-learning optimization module: Collects detection data to update the standard feature library, optimizes algorithm parameters using false detection and missed detection samples, and adapts to new motherboard models; Processor: The processor is used to handle the calculation process of each formula and the construction calculation process of each model.

[0018] See Figure 1 As shown, a precision motherboard defect detection method based on image detection includes: Step 1: Set up a non-reflective testing platform, collect the coordinates of the motherboard reference point and calibrate the deviation. Based on the motherboard positioning coordinates, start multiple sets of light sources, including ring-shaped shadowless, side-emitting, and coaxial light sources, and collect multiple sets of motherboard images. Step 2: Divide the acquired images into three layers according to the motherboard structure: surface components, solder joints, and circuits. Use an adaptive noise reduction algorithm to remove noise, and enhance the difference between defects and normal areas through contrast adjustment and edge sharpening. Step 3: Based on the contour segmentation algorithm, background interference is eliminated and each functional area is segmented. Combined with the standard component library, feature matching is used to locate the motherboard components, pins, and solder joints, and their position and shape parameters are recorded. Step 4: Based on the location results of each layer region and component, extract defect features for each detection unit, construct a multi-dimensional defect feature set, and extract texture and grayscale features to form a multi-dimensional defect feature vector. Step 5: Compare the defect features with the standard feature library to identify suspected defects. Perform secondary verification through three methods: image magnification, neighborhood comparison, and multi-source cross-verification. Combine historical data to eliminate false detection signals. Step 6: Classify the confirmed defects into three levels: fatal, severe, and general. Mark the defect information on the image and generate a detailed inspection report. Synchronously store the inspection results and defect-marked images in the database. Step 7: Collect data from each detection, supplement the standard feature library with real defect data, and optimize the algorithm parameters using false detection and missed detection data as samples.

[0019] See Figure 2 As shown, a reflective testing platform was built, the coordinates of the motherboard reference point were collected and the deviation was calibrated, and multiple sets of light sources, including ring-shaped shadowless, side-lit, and coaxial light sources, were activated according to the motherboard positioning coordinates to collect multiple sets of motherboard images. Specifically, this included: A non-reflective testing platform is set up, and the precision motherboard to be tested is fixed to the preset position on the testing table using a vacuum adsorption device; Collect the coordinates of the motherboard edge reference point and compare them with the preset standard motherboard reference coordinates to automatically compensate for the mechanical error of the testing station and the motherboard placement deviation. The ring-shaped shadowless light source, side-emitting light source, and coaxial light source on the reflective inspection platform are activated. The light intensity is increased for chip, pin, and solder joint areas, and the light intensity is reduced for blank areas. Multiple sets of high-definition motherboard images under different light source illumination are acquired.

[0020] Specifically, the ring-shaped shadowless light source adopts a diffuse reflection light emission design to fully illuminate the entire surface area of ​​the motherboard, completely eliminating imaging blind spots caused by material reflection of various components on the motherboard surface; the side-emitting light source is used to highlight the edge contours and fine pin structures of motherboard components. For micro-components with pin pitch less than 0.1mm, the grayscale contrast between the pins and the substrate can be enhanced by finely adjusting the angle of the side-emitting light source; the coaxial light source adopts a parallel light emission mode to capture hidden defects such as fine scratches and tiny stains on the motherboard surface.

[0021] See Figure 3 As shown, the acquired images are divided into three layers according to the motherboard structure: surface components, solder joints, and circuits. An adaptive noise reduction algorithm is used to remove noise, and contrast adjustment and edge sharpening are used to enhance the difference between defective and normal areas. Specifically, this includes: Based on the acquired motherboard image, layer processing is performed to divide the image into three independent layers: surface component layer, solder joint layer, and circuit layer. Each layer corresponds to a different structural area of ​​the motherboard. Denoising is performed on each layer separately, using an adaptive median noise reduction algorithm that automatically adjusts the noise reduction threshold based on the noise intensity of different areas within the layer, removing random noise, light source noise, and electronic noise generated during image acquisition. After noise reduction, the outlines of components, the direction of circuits, and the shape of solder joints within the layer are highlighted through adaptive contrast adjustment and edge sharpening, thereby enhancing the grayscale and texture differences between defective and normal areas.

[0022] Specifically, by scanning the image grayscale, the differences in grayscale thresholds of different structural regions are identified. Surface components, due to their diverse materials, have grayscale values ​​distributed between 180 and 255, forming the surface component layer; solder joints, due to the characteristics of solder material, have grayscale values ​​concentrated between 120 and 180, forming the solder joint layer; circuits, mostly made of copper or gold-plated materials, have lower and more uniform grayscale values, concentrated between 50 and 120, forming the circuit layer; after layering, each layer is independently marked and saved to ensure clear boundaries between layers, no overlap, and to preserve the spatial relationship between layers. The noise reduction process employs a layered adaptive noise reduction mode, adjusting the noise reduction strategy according to the noise characteristics of each of the three layers. For the surface component layer, the focus is on removing reflective noise from light sources and interference noise from component surface textures. Gray-scale variance analysis is used to automatically determine the noise intensity of each region, appropriately increasing the noise reduction intensity in areas with concentrated noise, and reducing the noise reduction intensity in areas with subtle features such as component pins and chip edges to ensure that the component shape and pin details are not destroyed. For the solder joint layer, the focus is on removing point noise from solder particles. Neighborhood gray-scale comparison is used to identify and remove point pixels with excessively large gray-scale differences from the normal gray-scale of the solder joint, while preserving the gray-scale gradient features of the solder joint edges. For the circuit layer, the focus is on removing sheet noise caused by circuit oxidation and electronic noise during image acquisition. Gray-scale uniformity detection is used to perform gentle noise reduction on gray-scale abnormal areas caused by oxidation. After noise reduction, gray-scale calibration is performed on each layer to ensure that the gray-scale values ​​of normal areas of the same type tend to be consistent.

[0023] See Figure 4 As shown, based on the contour segmentation algorithm, background interference is eliminated and each functional area is segmented. Combined with a standard component library, feature matching is used to locate motherboard components, pins, and solder joints, and their position and shape parameters are recorded. Specifically, this includes: Based on the preprocessed layered image, according to the preset standard motherboard structure parameters, the contour segmentation algorithm is used to segment each layer into regions, and obtain the surface component region, solder joint region, and circuit region. Each region corresponds to an independent detection unit. After segmentation, key components in each layer are located using feature matching, based on a pre-defined standard motherboard component library. These components include chips, resistors, capacitors, inductors, as well as the pins, solder joints, and circuit nodes of each component. The component library contains the size, shape, and position coordinate parameters of various components for different models of precision motherboards; During the positioning process, each key component is matched through coordinate calibration, and the actual position coordinates and morphological parameters of each key component are recorded.

[0024] Specifically, by comparing grayscale differences, areas in each layer where the grayscale value differs from that of the motherboard substrate by more than 30% are identified as the background of the detection platform. Background interference is automatically removed, retaining only the effective area of ​​the motherboard, thus avoiding the impact of background noise on the segmentation results. Subsequently, each layered image is segmented independently to accommodate the structural feature differences of each layer. For the surface component layer, the outer contour of each component is captured by combining the grayscale contrast and edge contour features between the component and the substrate. Through contour integrity screening, damaged and blurred pseudo-contours are removed, accurately segmenting individual surface component areas, distinguishing the gaps between components and the boundaries between components and the substrate, ensuring... No components were missed or incorrectly segmented. For the solder joint layer, individual solder joint regions were segmented based on the grayscale concentration range and circular or elliptical shape characteristics of the solder joints. Neighbor contour comparison was used to distinguish adjacent solder joints that were stuck together, avoiding misclassifying multiple adjacent solder joints as a single solder joint. For the circuit layer, circuit regions and circuit node regions were segmented based on the consistency of circuit width, continuity of direction, and uniformity of grayscale. The connection boundaries between circuits and the substrate, and between circuits and solder joints, were clearly defined to ensure that there were no breaks or omissions in the circuit segmentation. After segmentation, the segmentation results of each layer were cross-validated, and the coordinate consistency of corresponding areas in different layers was compared to correct segmentation deviations. After segmentation, key components are located and linked with a preset standard motherboard component library. The standard component library contains key component parameters for all models of mainstream precision motherboards, specifically covering the standard dimensions, outlines, pin counts and spacings, standard position coordinates, grayscale features, and texture features of various components such as microchips, resistors, capacitors, and inductors. It supports adaptive matching for multiple motherboard models. During positioning, feature parameters of the candidate regions of the segmented key components in each layer are first extracted, including the component's dimensions, edge outlines, grayscale distribution, and position coordinates. Then, these parameters are matched one by one with the features of similar components of the corresponding motherboard model in the standard component library.

[0025] See Figure 5 As shown, based on the location results of each layer region and component, defect features are extracted for each detection unit to construct a multi-dimensional defect feature set. Simultaneously, texture and grayscale features are extracted to form a multi-dimensional defect feature vector. Specifically, this includes: Based on the location results of each layer region and key component, defect features are extracted for each detection unit to construct a multi-dimensional defect feature set. An adaptive feature extraction algorithm is used during the extraction process to adjust the dimension and weight of feature extraction according to the type of detection unit; Extract the texture features, grayscale features, and spatial location features of each defect region to form a multi-dimensional defect feature vector.

[0026] Specifically, by identifying the type of detection unit and its layer, feature extraction weights are automatically assigned, with higher extraction weights for areas containing key components than for ordinary areas, focusing on parts prone to fatal or serious defects; at the same time, by combining the grayscale and texture features of the preprocessed image, the extraction threshold range is automatically set to adapt to the differences in components and materials of different models of precision motherboards; For the surface component area, for each key component after positioning, three core features are extracted: external dimensions, position coordinates, and morphological integrity. By comparing the actual dimensions of the components with the parameters in the standard component library, the dimensional deviation value is calculated to determine whether there is component damage. Through contour integrity analysis, the component edge contour is scanned to identify whether there are defects such as missing edges or deformation. For component pins, features such as the number, length, spacing, and bending angle of each pin are extracted. The deviation between the actual position of the pin and the positioning coordinates is compared to determine whether there are missing, bent, or offset pins. The connection between the pin and the component body is inspected in particular, and the grayscale features at the connection point are extracted to eliminate the potential risk of the pin separating from the body. For each segmented solder joint area, four main categories of features are extracted: shape, grayscale, area, and edge smoothness. By collecting the actual grayscale value of the solder joint and comparing it with the grayscale range of the standard solder joint, it is determined whether there is a cold solder joint or a false solder joint. The difference between the actual area of ​​the solder joint and the standard area is measured to distinguish between defects of too much or too little solder. By fitting the edge contour, the edge smoothness of the solder joint is analyzed to determine whether there is a solder joint offset or a short circuit between adjacent solder joints. At the same time, the surface texture features of the solder joint are extracted to identify minor defects such as solder bubbles and pinholes. For the line area, the focus is on four main characteristics: line width, direction, grayscale uniformity, and integrity. The difference between the actual width and the standard width of the line is measured segment by segment to determine if there is any narrowing of the line or minor scratches. The continuity of the line direction is analyzed and compared with the standard line direction parameters to identify line open circuits and short circuits. The grayscale uniformity of the line is detected to capture areas with abnormally low or high grayscale to determine the oxidation status of the line. The connection features of the line nodes are extracted and the grayscale distribution at the nodes is analyzed to determine if there are any loose connections or poor contact caused by oxidation.

[0027] See Figure 6As shown, suspected defects are identified by comparing defect features with a standard feature library. Secondary verification is performed using three methods: image magnification, neighborhood comparison, and multi-source cross-validation. False positives are eliminated by combining historical data. Specifically, this includes: Based on the extracted multi-dimensional defect feature vectors, they are matched with a preset standard feature library, which contains feature vectors, defect types, and severity levels of common defects in various precision motherboards; By comparing feature similarity, suspected defects in each detection unit are initially identified, and the type, location and characteristic parameters of the suspected defects are marked. Three methods were used to perform secondary verification on all suspected defects: local image magnification, neighborhood feature comparison, and cross-verification of multi-source images. By combining historical detection data, the probability of suspected defects is judged, and false detection signals with a probability lower than a preset threshold are eliminated.

[0028] Specifically, the formula for defect feature similarity is: ; in, This represents feature similarity, with values ​​ranging from [0,1]. A value closer to 1 indicates a higher degree of matching. This represents the multi-dimensional defect feature vector of the region to be detected. These are the standard feature vectors corresponding to the defect types in the standard feature library. For feature dimension, for The feature value of the j-th dimension. for The feature value of the j-th dimension; For suspected defects and pending defects, a collaborative verification method is used, employing three approaches: local image magnification, neighborhood feature comparison, and cross-verification of multi-source images, to comprehensively eliminate false detections. During local image magnification verification, the local magnification function of a high-definition industrial camera is utilized to magnify the suspected defect area by 5-10 times, clearly revealing the fine structure of the defect area. For example, when determining suspected cold solder joints, the contact area and grayscale distribution between the solder joint and the pin are magnified to confirm whether there is insufficient contact. When determining suspected circuit scratches, the depth, width, and continuity of the scratches are magnified to distinguish between real scratches and false defects caused by image noise. During the neighborhood feature comparison verification, the feature parameters of normal detection units within a 3-5mm radius around the suspected defect area are extracted and compared one by one with the features of the suspected defect area. The comparison focuses on core parameters such as grayscale uniformity, morphological integrity, and texture features. If the difference between the two is significant and conforms to the characteristic rules of standard defects, the defect is confirmed as a real defect. If the difference is slight and there is no essential difference from the features of normal areas, it is judged as a false detection and removed from the list of suspected defects. When cross-validating images from multiple light sources, high-definition images of the corresponding areas under different light sources are retrieved, including images of individual and combined illumination from a ring-shaped shadowless light source, a side-lit light source, and a coaxial light source. The appearance of suspected defects under different light sources is observed. The characteristics of real defects are highly stable under different light sources, and the differences in defect morphology and grayscale always exist. False detection signals will disappear or change significantly with the change of light source. Based on this, such false detections can be effectively eliminated.

[0029] See Figure 7 As shown, defects are classified into three levels: critical, severe, and minor. Defect information is annotated on the images, and a detailed inspection report is generated. The inspection results and defect-annotated images are synchronously stored in the database. Specifically, this includes: Based on the defect identification and verification results, the defects are classified into three levels according to their type and severity: fatal defects, serious defects, and general defects. During the annotation process, the specific location, defect type, severity level, and feature parameters of each defect are marked on the layered image to form a defect annotation image; Generate a detailed test result report, which includes the model of the motherboard to be tested, the test time, the test environment parameters, the total number of defects, the number of each type of defect, the coordinates of the defect location, the severity of the defect, and the handling suggestions. The detection results and defect-annotated images are stored synchronously in the database.

[0030] Specifically, the classification and labeling stage first completes the adaptive matching of classification standards, automatically identifies the model and specifications of the motherboard to be tested, calls the defect classification parameters of the corresponding motherboard model, and clarifies the specific judgment boundaries of fatal defects, serious defects, and general defects. Among them, fatal defects are defined as defects that directly cause the motherboard to fail to start or core functions to fail. In addition to short circuits and missing core chips, they also include power interface solder joint detachment, core circuit breakage, and main control chip damage. Serious defects are defects that affect the performance stability and lifespan of the motherboard but can be repaired through rework. In addition to poor solder joints and severe component misalignment, they also include severely bent component leads, short circuits between adjacent solder joints caused by excessive solder, and large-area oxidation of circuits. General defects are defects that do not affect the core functions and performance of the motherboard and can be put into use without rework. In addition to surface scratches and minor stains, they also include slight component misalignment, minor solder deviation, and minor scratches on circuits. After classification, each confirmed defect is precisely labeled. The specific location of the corresponding defect is marked on three layered images: the surface component layer, the solder joint layer, and the circuit layer. Different colors are used to distinguish the defect level. The labeling content includes the unique defect number, defect type, severity level, core feature parameters, and judgment criteria. At the same time, the specific coordinate values ​​of the detection unit where the defect is located are also marked to ensure that the defect location can be quickly located during subsequent rework. After the labeling is completed, a defect labeling summary image is generated, which integrates the defect labeling information from the three layered images, overlays the overall coordinates of the motherboard, clearly presents the distribution of all defects, and saves the labeling log simultaneously.

[0031] See Figure 8 As shown, data from each detection is collected, and real defect data is added to the standard feature library. The algorithm parameters are optimized using false positives and false negatives as samples. Specifically, this includes: After each inspection is completed, all data from this inspection are collected, including the acquired image data, preprocessed data, defect feature data, and recognition result data, and the defect data is added to the standard feature library. Using false positive and false negative data as optimization samples, the noise reduction threshold and enhancement parameters of image preprocessing are adjusted through sample learning, the parameters of the region segmentation algorithm and the defect feature extraction algorithm are optimized, and the matching threshold and probability judgment criteria for defect identification are updated. When testing a new model of precision motherboard, import the standard parameters and sample images of that model of motherboard, and automatically update the component library and standard feature library.

[0032] Specifically, to address missed or false detections caused by incomplete or excessive noise reduction, the system automatically adjusts the noise reduction threshold and noise reduction intensity allocation parameters for layered images, and optimizes the adaptive noise reduction algorithm to ensure better preservation of hidden defect features such as component pins and minor scratches while removing noise. To address issues of region segmentation deviation and inaccurate key component positioning, the system optimizes the segmentation parameters of the improved contour segmentation algorithm, adjusts the weights of key component feature matching, and optimizes the coordinate calibration mechanism to further improve segmentation and positioning accuracy. To address issues of incomplete defect feature extraction and unreasonable feature weights, the system adjusts the dimensionality allocation and weight parameters for multi-dimensional feature extraction and optimizes the adaptive extraction algorithm to ensure accurate extraction of various hidden defect features. Finally, to address the high false detection rate in defect identification, the system updates the feature similarity comparison threshold and probability judgment criteria for defect identification, optimizes the comparison parameters for multi-modal verification, and reduces the generation of false detection signals.

[0033] It should be noted that the order of the above embodiments of the present invention is merely for descriptive purposes and does not represent the superiority or inferiority of the embodiments. Furthermore, the above description focuses on specific embodiments of this specification. Additionally, the processes depicted in the accompanying drawings do not necessarily require a specific or sequential order to achieve the desired results. In some embodiments, multitasking and parallel processing are possible or may be advantageous.

[0034] The various embodiments in this specification are described in a progressive manner. The same or similar parts between the various embodiments can be referred to each other. Each embodiment focuses on describing the differences from other embodiments.

[0035] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A precision motherboard defect detection method based on image detection, characterized in that, include: A non-reflective testing platform was built, the coordinates of the motherboard reference point were collected and the deviation was calibrated, and multiple sets of light sources, including ring shadowless, side-emitting, and coaxial light sources, were activated according to the motherboard positioning coordinates to collect multiple sets of motherboard images. The acquired images are divided into three layers according to the motherboard structure: surface components, solder joints, and circuits. An adaptive noise reduction algorithm is used to remove noise, and the difference between defects and normal areas is enhanced through contrast adjustment and edge sharpening. Based on the contour segmentation algorithm, background interference is eliminated and each functional area is segmented. Combined with the standard component library, feature matching is used to locate motherboard components, pins, and solder joints, and their position and shape parameters are recorded. Based on the location results of each layer region and component, defect features are extracted for each detection unit to construct a multi-dimensional defect feature set. At the same time, texture and grayscale features are extracted to form a multi-dimensional defect feature vector. The defect features are compared with the standard feature library to identify suspected defects. Secondary verification is performed through three methods: image magnification, neighborhood comparison, and multi-source cross-verification. False detection signals are eliminated by combining historical data. The defects are classified into three levels: critical, severe, and general. Defect information is marked on the images and a detailed inspection report is generated. The inspection results and defect-marked images are stored synchronously in the database. Collect data from each detection, supplement the standard feature library with real defect data, and optimize algorithm parameters using false detection and missed detection data as samples.

2. The precision motherboard defect detection method based on image detection according to claim 1, characterized in that, The process of building a reflective-free detection platform, acquiring the coordinates of the motherboard reference point and calibrating the deviation, and activating multiple sets of light sources (ring-shaped, shadowless, side-emitting, and coaxial) based on the motherboard positioning coordinates to acquire multiple sets of motherboard images specifically includes: A non-reflective testing platform is set up, and the precision motherboard to be tested is fixed to the preset position on the testing table using a vacuum adsorption device; Collect the coordinates of the motherboard edge reference point and compare them with the preset standard motherboard reference coordinates to automatically compensate for the mechanical error of the testing station and the motherboard placement deviation. The ring-shaped shadowless light source, side-emitting light source, and coaxial light source on the reflective inspection platform are activated. The light intensity is increased for chip, pin, and solder joint areas, and the light intensity is reduced for blank areas. Multiple sets of high-definition motherboard images under different light source illumination are acquired.

3. The precision motherboard defect detection method based on image detection according to claim 1, characterized in that, The process of dividing the acquired images into three layers according to the motherboard structure—surface components, solder joints, and circuitry—and using an adaptive noise reduction algorithm to remove noise, while enhancing the difference between defective and normal areas through contrast adjustment and edge sharpening, specifically includes: Based on the acquired motherboard image, layer processing is performed to divide the image into three independent layers: surface component layer, solder joint layer, and circuit layer. Each layer corresponds to a different structural area of ​​the motherboard. Denoising is performed on each layer separately, using an adaptive median noise reduction algorithm that automatically adjusts the noise reduction threshold based on the noise intensity of different areas within the layer, removing random noise, light source noise, and electronic noise generated during image acquisition. After noise reduction, the outlines of components, the direction of circuits, and the shape of solder joints within the layer are highlighted through adaptive contrast adjustment and edge sharpening, thereby enhancing the grayscale and texture differences between defective and normal areas.

4. The precision motherboard defect detection method based on image detection according to claim 1, characterized in that, The contour segmentation algorithm eliminates background interference and segments each functional area. Combined with a standard component library, feature matching is used to locate motherboard components, pins, and solder joints, recording their position and shape parameters. Specifically, this includes: Based on the preprocessed layered image, according to the preset standard motherboard structure parameters, the contour segmentation algorithm is used to segment each layer into regions, and obtain the surface component region, solder joint region, and circuit region. Each region corresponds to an independent detection unit. After segmentation, key components in each layer are located using feature matching, based on a pre-defined standard motherboard component library. These components include chips, resistors, capacitors, inductors, as well as the pins, solder joints, and circuit nodes of each component. The component library contains the size, shape, and position coordinate parameters of various components for different models of precision motherboards; During the positioning process, each key component is matched through coordinate calibration, and the actual position coordinates and morphological parameters of each key component are recorded.

5. The precision motherboard defect detection method based on image detection according to claim 1, characterized in that, Based on the location results of each layer region and component, the defect feature extraction is performed on each detection unit to construct a multi-dimensional defect feature set. Simultaneously, texture and grayscale features are extracted to form a multi-dimensional defect feature vector. Specifically, this includes: Based on the location results of each layer region and key component, defect features are extracted for each detection unit to construct a multi-dimensional defect feature set. An adaptive feature extraction algorithm is used during the extraction process to adjust the dimension and weight of feature extraction according to the type of detection unit; Extract the texture features, grayscale features, and spatial location features of each defect region to form a multi-dimensional defect feature vector.

6. The precision motherboard defect detection method based on image detection according to claim 1, characterized in that, The process of comparing defect features with a standard feature library to identify suspected defects, and then performing secondary verification through three methods—image magnification, neighborhood comparison, and multi-source cross-validation—combined with historical data to eliminate false detection signals, specifically includes: Based on the extracted multi-dimensional defect feature vectors, they are matched with a preset standard feature library, which contains feature vectors, defect types, and severity levels of common defects in various precision motherboards; By comparing feature similarity, suspected defects in each detection unit are initially identified, and the type, location and characteristic parameters of the suspected defects are marked. Three methods were used to perform secondary verification on all suspected defects: local image magnification, neighborhood feature comparison, and cross-verification of multi-source images. By combining historical detection data, the probability of suspected defects is judged, and false detection signals with a probability lower than a preset threshold are eliminated.

7. The precision motherboard defect detection method based on image detection according to claim 1, characterized in that, The process of classifying confirmed defects into three levels—critical, severe, and general—annotating defect information on images and generating detailed inspection reports, and synchronously storing the inspection results and defect-annotated images in the database specifically includes: Based on the defect identification and verification results, the defects are classified into three levels according to their type and severity: fatal defects, serious defects, and general defects. During the annotation process, the specific location, defect type, severity level, and feature parameters of each defect are marked on the layered image to form a defect annotation image; Generate a detailed test result report, which includes the model of the motherboard to be tested, the test time, the test environment parameters, the total number of defects, the number of each type of defect, the coordinates of the defect location, the severity of the defect, and the handling suggestions. The detection results and defect-annotated images are stored synchronously in the database.

8. The precision motherboard defect detection method based on image detection according to claim 1, characterized in that, The process of collecting data from each detection, supplementing the standard feature library with real defect data, and optimizing algorithm parameters using false positive and false negative data as samples specifically includes: After each inspection is completed, all data from this inspection are collected, including the acquired image data, preprocessed data, defect feature data, and recognition result data, and the defect data is added to the standard feature library. Using false positive and false negative data as optimization samples, the noise reduction threshold and enhancement parameters of image preprocessing are adjusted through sample learning, the parameters of the region segmentation algorithm and the defect feature extraction algorithm are optimized, and the matching threshold and probability judgment criteria for defect identification are updated. When testing a new model of precision motherboard, import the standard parameters and sample images of that model of motherboard, and automatically update the component library and standard feature library.

9. A precision motherboard defect detection system based on image detection, used to implement the precision motherboard defect detection method based on image detection as described in any one of claims 1-8, characterized in that, include: Image acquisition module: Acquires high-definition motherboard images through a combination of multiple light sources on a reflective detection platform, and calibrates the coordinates of the reference point to eliminate mechanical errors; Image preprocessing module: The image is divided into three layers: components, solder joints, and circuits. Adaptive noise reduction, contrast enhancement, and edge sharpening algorithms are used to optimize image quality. Region segmentation and localization module: Based on contour segmentation algorithm, functional regions are divided, and component positions are matched with standard component library, and coordinates and morphological parameters are recorded; Defect feature extraction module: Extracts texture, grayscale and spatial features for each detection unit to construct a multi-dimensional defect feature vector; Defect identification and verification module: Initially identifies defects by comparing with a standard feature library, and eliminates false detections by using image magnification, neighborhood comparison and multi-source cross-verification; Output and storage module: Classifies and labels defect levels, generates inspection reports, and synchronously stores images and data to the database; Self-learning optimization module: Collects detection data to update the standard feature library, optimizes algorithm parameters using false detection and missed detection samples, and adapts to new motherboard models; Processor: The processor is used to handle the calculation process of each formula and the construction calculation process of each model.