Controllable constant current discharge circuit

Abstract

The application relates to a controllable constant-current discharging circuit which comprises an oscillation circuit unit with a 555 timer as a core, a charge pump circuit unit and a discharging circuit unit with a depletion-mode MOS tube as a core. The output end of the oscillation circuit unit with the 555 timer as the core is connected with the charge pump circuit unit, and the output end of the charge pump circuit unit is connected with the gate of the depletion-mode MOS tube of the discharging circuit unit. The oscillation circuit unit provides an oscillation square wave for the charge pump circuit unit, and the charge pump provides a negative voltage required by the depletion-mode MOS tube in the discharging circuit unit to make the depletion-mode MOS tube conduct, so that the constant-current discharging with a controllable discharging rate is realized.

Description

Technical Field

[0001] This invention relates to the field of electronic equipment technology, and more specifically to a controllable constant current discharge circuit. Background Technology

[0002] As the demands on power supplies from complete systems become increasingly stringent, power supplies need to possess greater output power and superior electromagnetic compatibility characteristics. To accommodate these power supplies, the input capacitor of the corresponding secondary power supply typically increases accordingly. This leads to a problem: when power is off, the input capacitor continues to supply power to the power module for a period of time, making it impossible to shut down the output in a timely manner, and the rate at which the power is shut down is difficult to control.

[0003] Currently, solutions to this problem include connecting current-limiting resistors in series and adding charge discharge resistors. However, these solutions generally suffer from severe circuit overheating, low efficiency, and uncontrollable discharge rate. Therefore, there is an urgent need to implement a controllable constant current discharge circuit unit to achieve constant current discharge with low power consumption and controllable discharge rate by adjusting circuit parameters. Summary of the Invention

[0004] To address the shortcomings of existing technologies, the present invention aims to provide a controllable constant current discharge circuit suitable for large capacitor discharge scenarios. This circuit can achieve constant current discharge with low power consumption and controllable discharge rate by adjusting circuit parameters.

[0005] To achieve the above objectives, the present invention adopts the following technical solution: A controllable constant current discharge circuit includes an oscillation circuit unit, a charge pump circuit unit, and a discharge circuit unit; the output terminal of the oscillation circuit unit is connected to the input terminal of the charge pump circuit unit, and the output terminal of the charge pump circuit unit is connected to the input terminal of the discharge circuit unit. The oscillation circuit unit is used to provide an oscillation signal; the charge pump circuit unit is used to convert the oscillation signal and output a driving voltage; the discharge circuit unit receives the driving voltage and realizes a constant current discharge with a controllable rate.

[0006] As a further improvement to the above technical solution, the oscillation circuit unit includes a 555 timer, capacitors C1, C2, and C3, and a resistor R1. The Vcc pin of the 555 timer is connected to the power supply voltage V+, and the Vcc pin is grounded through capacitor C3; the TRIG pin of the 555 timer is connected to the THRES pin and then grounded through capacitor C2; the resistor R1 is connected in series between the OUTPUT pin and the THRES pin of the 555 timer, and the OUTPUT pin is connected to the charge pump circuit unit through the resistor R1.

[0007] As a further improvement to the above technical solution, the charge pump circuit unit includes resistor R2, resistor R3, capacitor C4, capacitor C5, diode V1, and diode V2. One end of resistor R2 is connected to the OUTPUT pin of the 555 timer, and the other end of resistor R2 is connected to one end of capacitor C4; the other end of capacitor C4 is connected to the cathode of diode V1 and the anode of diode V2 respectively; the cathode of diode V2 is grounded; the anode of diode V1 is connected to one end of resistor R3, one end of capacitor C5 and the input terminal of the discharge circuit unit respectively; the other ends of resistor R3 and capacitor C5 are both grounded.

[0008] As a further improvement to the above technical solution, the discharge circuit unit includes a diode V4, a MOSFET V3, a resistor R4, and a capacitor C6; The gate of the MOS transistor V3 is connected to the anode of the diode V1, the drain of the MOS transistor V3 is connected to the cathode of the diode V4, and the source of the MOS transistor V3 is connected to one end of the resistor R4; the other end of the resistor R4 is grounded; the anode of the diode V4 is connected to the output terminal Vout; one end of the capacitor C6 is connected to the output terminal Vout, and the other end is grounded.

[0009] As a further improvement to the above technical solution, the MOS transistor V3 is a depletion-type MOS transistor.

[0010] As a further improvement to the above technical solution, the timer adopts a CMOS 555 timer.

[0011] Compared with the prior art, the advantages of the present invention are: The controllable constant current discharge circuit described in this invention can be implemented using only common and readily available components such as a 555 timer, resistors, capacitors, diodes, and MOSFETs, without relying on dedicated chips. This effectively reduces the implementation cost and procurement difficulty of the circuit. At the same time, this circuit solves the problems of severe heat generation, low efficiency, and uncontrollable discharge rate in existing circuits, and is suitable for various discharge scenarios such as large capacitors. Attached Figure Description

[0012] Figure 1 This is a circuit diagram of the controllable constant current discharge circuit in this invention.

[0013] Figure 2 This is a measured waveform diagram of capacitor C6 discharging in the controllable constant current discharge circuit of this invention. Detailed Implementation

[0014] The following description, with reference to the accompanying drawings, further describes specific embodiments of the present invention to enable those skilled in the art to further understand the present invention, without constituting a limitation on its rights.

[0015] like Figure 1 The circuit shown is a controllable constant current discharge circuit, comprising an oscillation circuit unit, a charge pump circuit unit, and a discharge circuit unit. The output terminal of the oscillation circuit unit is connected to the input terminal of the charge pump circuit unit, and the output terminal of the charge pump circuit unit is connected to the gate of the depletion-type MOSFET V3 in the discharge circuit unit. A 555 timer generates a periodic square wave. This square wave signal is input to the reverse-polarity charge pump circuit unit, which consists of resistors, capacitors, and diodes. Through voltage conversion by the charge pump, a negative voltage is formed between the gate of the depletion-type MOSFET and ground to drive the MOSFET, achieving precise control over the MOSFET's on / off state.

[0016] The oscillation circuit unit includes a 555 timer, capacitors C1, C2, and C3, and a resistor R1. The Vcc pin of the 555 timer is connected to the power supply voltage V+, and the Vcc pin is also grounded through capacitor C3. The TRIG pin and THRES pin of the 555 timer are shorted and then grounded through capacitor C2. The OUTPUT pin and THRES pin of the 555 timer are connected in series with resistor R1, and a connection is established with resistor R2 in the charge pump circuit unit through resistor R1 to form a transmission path for the oscillation signal.

[0017] The charge pump circuit unit includes resistors R2 and R3, capacitors C4 and C5, diode V1, and diode V2. The input terminal of resistor R2 is connected to the OUTPUT pin of the 555 timer, and the output terminal of resistor R2 is connected to one end of capacitor C4. The other end of capacitor C4 is connected to both the cathode of diode V1 and the anode of diode V2. The cathode of diode V2 is grounded. The anode of diode V1 is connected to one end of resistor R3, one end of capacitor C5, and the gate of MOS transistor V3 in the discharge circuit unit. The other ends of resistor R3 and capacitor C5 are both grounded, forming a negative voltage stabilization and discharge circuit.

[0018] The discharge circuit unit includes a diode V4, a depletion-type MOSFET V3, a resistor R4, and a capacitor C6. The gate of the depletion-type MOSFET V3 is connected to the output terminal of the charge pump circuit unit to receive the driving negative voltage; the drain of the depletion-type MOSFET V3 is connected to the cathode of the diode V4, and the source is connected to one end of the resistor R4; the other end of the resistor R4 is grounded, forming a loop path for the discharge current; the anode of the diode V4 is connected to the circuit output terminal Vout, which serves to reverse block the voltage; one end of the capacitor C6 is connected to the circuit output terminal Vout, and the other end is grounded, which is used to stabilize the output voltage and buffer voltage fluctuations during the discharge process.

[0019] The basic principle of the controllable constant current discharge circuit described in this invention is as follows: The oscillation circuit unit, with a 555 timer as its core, outputs a periodic square wave signal. The amplitude of this square wave is determined by the supply voltage V+, while the frequency of the periodic square wave signal is determined by resistor R1 and capacitor C2. To achieve low power consumption, the 555 timer in this embodiment is a CMOS device, whose normal operating current is only a few milliamps. A commonly used voltage regulator circuit can meet the power supply requirements, and the overall circuit loss is extremely small.

[0020] The square wave signal output by the oscillation circuit unit with the 555 timer as its core is input to the reverse polarity charge pump circuit unit composed of resistor R2, resistor R3, capacitor C4, capacitor C5, diode V1 and diode V2. Through the periodic charging and discharging and voltage conversion of the charge pump, a driving voltage of approximately -V+ can be generated between the gate and source of the depletion-type MOSFET V3, providing the basic conditions for the conduction and cutoff control of the MOSFET.

[0021] The operating state of the depletion-mode MOSFET V3 is precisely controlled by the gate-source voltage. When the gate-source voltage is 0V, MOSFET V3 is turned on; when the gate-source voltage is negative and below the threshold voltage, MOSFET V3 is turned off. Upon power-down, the charge pump circuit stops working, the gate-source voltage of MOSFET V3 is 0V, and MOSFET V3 is turned on. At this time, the electrical energy stored in capacitor C6 is discharged through the circuit formed by MOSFET V3 and resistor R4. Upon power-up, the charge pump circuit outputs a negative voltage, the gate-source voltage of MOSFET V3 is negative, and MOSFET V3 is turned off, ensuring that the normal operation of subsequent circuits is not affected.

[0022] Without considering the downstream load, most of the energy released by the large capacitor C6 during discharge will be dissipated by the depletion-mode MOSFET V3 as heat. Therefore, to prevent MOSFET V3 from overheating and failing, when selecting a depletion-mode MOSFET V3, it is preferable to choose a model with a larger package size to improve heat dissipation, prevent the MOSFET from overheating and failing, and ensure stable circuit operation.

[0023] As the performance requirements of power supplies in complete systems become increasingly demanding, power supplies need to possess greater output power and superior electromagnetic compatibility characteristics. To accommodate these power supplies, the input capacitor of the corresponding secondary power supply typically increases. This leads to a problem: when power is off, the input capacitor continues to output power to the power module for a period of time, causing the output to fail to shut down promptly, and the rate of power-off is difficult to control. Existing solutions to this problem (such as series current-limiting resistors and adding charge discharge resistors) generally suffer from severe circuit overheating, low efficiency, and uncontrollable discharge rate. The controllable constant current discharge circuit proposed in this invention achieves low power consumption and precisely controllable discharge rate through circuit parameter adjustment. Furthermore, the components used in the circuit are all conventional, requiring no dedicated chips, making it easy to achieve complete domestic production.

[0024] Figure 1 In the controllable constant current discharge circuit shown, the specific parameters of each resistor and capacitor are as follows: the values ​​of resistors R1, R2, R3, and R4 are 6.49kΩ, 100Ω, 100kΩ, and 49.9Ω, respectively; the values ​​of capacitors C1, C2, C3, C4, C5, and C6 are 1000pF, 330pF, 0.1uF, 820pF, 1000pF, and 1000μF, respectively. After building the circuit based on these parameters, the discharge process of capacitor C6 during power-off was measured, and the measured waveform is shown below. Figure 2 As shown, Figure 2 Channel 1 shows the voltage waveform across capacitor C6, and channel 2 shows the gate-source voltage waveform of depletion-type MOSFET V3.

[0025] from Figure 2 The measured waveforms show that when the gate-source voltage of the depletion-type MOSFET V3 drops to 0V, capacitor C6 begins to discharge. During the entire discharge phase, the voltage across capacitor C6 decreases linearly with time. This linear voltage decrease is a typical characteristic of constant current discharge. This measured result directly verifies that the controllable constant current discharge circuit proposed in this invention can effectively achieve a constant current discharge effect with a controllable discharge rate, which is completely consistent with the design expectations.

[0026] The above description is only a preferred embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any equivalent substitutions or modifications made by those skilled in the art within the scope of the technology disclosed in the present invention, based on the technical solution and inventive concept of the present invention, should be covered within the scope of protection of the present invention.

Claims

1. A controllable constant current discharge circuit, characterized in that, The circuit includes an oscillation circuit unit, a charge pump circuit unit, and a discharge circuit unit; the output terminal of the oscillation circuit unit is connected to the input terminal of the charge pump circuit unit, and the output terminal of the charge pump circuit unit is connected to the input terminal of the discharge circuit unit. The oscillation circuit unit is used to provide an oscillation signal; The charge pump circuit unit is used to convert the oscillation signal and output a driving voltage; the discharge circuit unit receives the driving voltage and realizes a constant current discharge with a controllable rate.

2. The controllable constant current discharge circuit according to claim 1, characterized in that, The oscillation circuit unit includes a 555 timer, capacitor C1, capacitor C2, capacitor C3, and resistor R1. The Vcc pin of the 555 timer is connected to the power supply voltage V+, and the Vcc pin is grounded through capacitor C3; the TRIG pin of the 555 timer is connected to the THRES pin and then grounded through capacitor C2; the resistor R1 is connected in series between the OUTPUT pin and the THRES pin of the 555 timer, and the OUTPUT pin is connected to the charge pump circuit unit through the resistor R1.

3. The controllable constant current discharge circuit according to claim 2, characterized in that, The charge pump circuit unit includes resistor R2, resistor R3, capacitor C4, capacitor C5, diode V1, and diode V2. One end of resistor R2 is connected to the OUTPUT pin of the 555 timer, and the other end of resistor R2 is connected to one end of capacitor C4; the other end of capacitor C4 is connected to the cathode of diode V1 and the anode of diode V2 respectively; the cathode of diode V2 is grounded; the anode of diode V1 is connected to one end of resistor R3, one end of capacitor C5 and the input terminal of the discharge circuit unit respectively; the other ends of resistor R3 and capacitor C5 are both grounded.

4. The controllable constant current discharge circuit according to claim 3, characterized in that, The discharge circuit unit includes a diode V4, a MOSFET V3, a resistor R4, and a capacitor C6; The gate of the MOS transistor V3 is connected to the anode of the diode V1, the drain of the MOS transistor V3 is connected to the cathode of the diode V4, and the source of the MOS transistor V3 is connected to one end of the resistor R4; the other end of the resistor R4 is grounded; the anode of the diode V4 is connected to the output terminal Vout; one end of the capacitor C6 is connected to the output terminal Vout, and the other end is grounded.

5. The controllable constant current discharge circuit according to claim 4, characterized in that, The MOS transistor V3 is a depletion-type MOS transistor.

6. The controllable constant current discharge circuit according to claim 2, characterized in that, The timer is a CMOS 555 timer.

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