IGBT full-bridge series inverter power supply control method with fault self-checking function

Abstract

The application discloses an IGBT full-bridge series inverter power supply control method with a fault self-checking function, and comprises the following steps: sending a test pulse sequence to obtain electrical characteristic parameters; high-frequency sampling is performed to obtain a sampling data sequence; a digital representation of an operating state is constructed and an alarm is triggered; current distortion and voltage fluctuation characteristics are extracted, a fault characteristic library is established, and a fault type is determined; phase difference and duty cycle are adjusted, and voltage equalization control is performed; bus voltage fluctuation is monitored, and a stable waveform is obtained by using feedforward compensation to suppress ripple; parameters are iteratively adjusted; the fault characteristic library and the digital model are updated, and the output precision of the inverter power supply is controlled in real time. The application finally realizes high-precision control and fault self-diagnosis of the inverter power supply under complex loads, and significantly improves the stability and reliability of the system.

Description

Technical Field

[0001] This invention belongs to the field of IGBT inverter technology, and in particular relates to an IGBT full-bridge series inverter power supply control method with fault self-diagnosis function. Background Technology

[0002] Currently, IGBT full-bridge series inverters are widely used in high-voltage, high-frequency, and high-power power conversion scenarios, such as induction heating, high-voltage direct current transmission, and new energy grid connection. Existing control methods mostly employ analog circuits or basic digital control strategies, maintaining stable system operation by monitoring output voltage and current and adjusting switching frequency or duty cycle. Some solutions also introduce fault detection circuits to trigger protection actions under extreme conditions such as overcurrent and overvoltage. However, these methods have limited real-time control and adaptability when dealing with complex load changes, uneven voltage distribution across multi-stage modules, and aging drive links, making it difficult to achieve system-level fault self-diagnosis and dynamic compensation while ensuring output accuracy.

[0003] Existing technologies still have the following problems: First, there is a lack of proactive fault self-checking mechanisms for power switches and drive links. Most solutions only provide passive protection after a fault occurs, failing to identify potential problems such as drive delay and device aging in advance. Second, in multi-level IGBT full-bridge series topologies, uneven voltage distribution in each bridge arm can easily lead to overvoltage damage to local devices, while traditional voltage equalization control has a lagging response. Third, DC bus ripple interference has a significant impact on the output voltage waveform quality, and existing filtering or compensation methods are unable to adaptively suppress wideband ripple. Finally, the digital model of the system remains fixed under complex loads, making it impossible to iteratively update the fault feature library and control parameters based on operating data, resulting in a decrease in output accuracy as operating conditions drift. Summary of the Invention

[0004] To solve the above-mentioned technical problems, the present invention provides a control method for an IGBT full-bridge series inverter power supply with fault self-diagnosis function, comprising: The microcontroller sends a test pulse sequence to the IGBT drive circuit, monitors the response feedback data of the full-bridge circuit, and obtains the electrical characteristic parameters of the power switch and drive link based on the response feedback data. Based on the electrical characteristic parameters, a digital signal processor is used to perform high-frequency sampling of the IGBT drive signal and output current waveform, and a sampling data sequence is obtained based on the high-frequency sampling results. Based on the sampled data sequence, a digital representation of the operating status of the full-bridge series inverter is constructed using a digital algorithm model. Based on the digital representation of the operating status, it is determined whether the operating status meets the preset threshold range. If it exceeds the threshold, an abnormal alarm signal is triggered. Based on the digital representation of the operating status, current distortion and voltage fluctuation features are extracted. Based on the current distortion and voltage fluctuation features, a fault feature library is established using a feature extraction algorithm to determine the specific fault type of overcurrent, overvoltage, or drive abnormality. Based on the specific fault type, the multi-stage IGBT full-bridge module of the series resonant inverter topology is adjusted to obtain the phase difference and duty cycle data of each bridge arm. Based on the phase difference and duty cycle data, the voltage of each power device is balanced through voltage equalization control technology. Based on the equalized voltage data, the DC bus voltage fluctuation is monitored. Based on the DC bus voltage fluctuation, a feedforward compensation algorithm is used to calculate the compensation value, suppress bus ripple interference, and obtain a stable output voltage waveform. Based on the output voltage waveform, the full-bridge circuit response feedback is resampled. Based on the resampling result, it is determined whether the system has eliminated fluctuations after compensation. If fluctuations still exist, the phase difference and duty cycle parameters are iteratively adjusted. Based on the iteratively adjusted parameters, the voltage fluctuation identification standard in the fault feature library is updated. Based on the updated identification standard, an updated digital model is obtained, and the output accuracy of the inverter power supply under complex loads is controlled in real time.

[0005] Preferably, the process of obtaining the electrical characteristic parameters includes: The microcontroller generates and sends a test pulse sequence to the drive circuit, triggering the full-bridge circuit to respond and recording the initial response feedback signal. Based on the response feedback signal, the feedback data output by the full-bridge circuit is collected, and the feedback data is filtered to obtain the pre-processed electrical signal data. Based on the pre-processed electrical signal data, key electrical parameters of the power switch are extracted, and the key electrical parameters are classified using a support vector machine algorithm to determine whether the key electrical parameters are within the normal range. If the key electrical parameters exceed the preset threshold range, it is determined that there is an abnormal state in the drive link, and corresponding abnormal identification information is generated; By using the anomaly identification information, the specific link in the drive chain that may have a problem can be located, and fault location data can be obtained. Based on the fault location data and combined with the preset diagnostic rule base, the operating status of the drive link is analyzed in depth to determine whether the link is in normal operating condition. Based on the results of in-depth analysis, a status assessment record of the drive link is generated, and a comprehensive test of the full-bridge circuit and power switches is completed.

[0006] Preferably, the process of obtaining the sampled data sequence includes: The initial sampling data sequence is obtained by frequently sampling the waveforms of the drive signal and the output current; The initial sampled data sequence is preprocessed using a digital signal processor to filter out noise interference and obtain a purified data sequence. Based on the purified data sequence, key waveform feature parameters are extracted to determine the waveform change trend; Based on the waveform change trend, a digital algorithm model is constructed, and the analog control logic is mapped to obtain a preliminary digital control model. If the matching degree between the preliminary digital control model and the electrical characteristics is lower than a preset threshold, the model parameters are iteratively adjusted to obtain an optimized digital control model. The optimized digital control model is used to process the subsequent input drive signals and output current data in real time to determine the execution effect of the control logic. Based on the real-time processing results, the internal parameters of the digital algorithm model are updated to obtain the final adapted control logic model.

[0007] Preferably, the process of constructing the digital representation of the operating status and triggering the abnormal alarm signal includes: The operation process of the full-bridge series inverter is acquired in real time by the acquisition equipment to obtain the original sampled data sequence; Based on the original sampled data sequence, a digital filtering method is used for preprocessing to remove noise interference and obtain a cleaned data sequence. Based on the purification data sequence, a digital representation model of the operating state is constructed using the support vector machine algorithm to determine the quantitative representation of the state characteristics; The quantified state characteristics are compared with a preset threshold range. If the characteristic value exceeds the preset threshold range, it is determined to be an abnormal state. If an abnormal state is determined, an abnormal alarm message is generated, a trigger signal is output through the system interface, and the time point of the abnormality is recorded. Based on the triggered abnormal alarm information, the relevant data sequences and status characteristics are automatically stored to form a complete log of the abnormal event; By using the complete logs of the aforementioned abnormal events, the status monitoring database is updated, and the focus of subsequent data collection is adjusted accordingly.

[0008] Preferably, the process of extracting the current distortion and voltage fluctuation features and establishing a fault feature library includes: By digitally representing the data, the original signals of current distortion and voltage fluctuation are obtained. The original signals are then decomposed using signal processing methods to obtain a preliminary feature set. Based on the preliminary feature set, the support vector machine algorithm is applied to classify current distortion and voltage fluctuation and determine their respective abnormal modes. Based on the classified abnormal patterns, the comparison results with the preset overcurrent judgment criteria and overvoltage identification criteria in the fault feature library are obtained to determine whether there is a matching abnormal type. If the comparison results show that there is a matching abnormality type, then further extract the relevant signal features of the driving abnormality to determine the specific fault type classification; Based on the determined fault type classification, obtain detailed records of relevant signal characteristics and save the characteristic analysis results; By using the saved feature analysis results, the anomaly detection rules in the fault feature library are automatically updated to obtain accurate type classification criteria. Based on the updated and more precise classification criteria, the focus of subsequent signal acquisition is automatically adjusted to obtain signal data that better meets the needs of anomaly detection.

[0009] Preferably, the process of obtaining the phase difference and duty cycle data and performing voltage equalization control includes: The system acquires the operating data of the multi-stage IGBT full-bridge module in the series resonant inverter topology, and uses sensors to collect the current and voltage signals of each bridge arm to determine the real-time operating status of each power device. Based on the collected current and voltage signals, signal processing techniques are used to filter and extract features from the current and voltage signals to obtain the initial distribution of the phase difference and duty cycle of each bridge arm. Based on the initial distribution of the phase difference and duty cycle values, and in conjunction with a pre-established fault type database, if the phase difference of a certain bridge arm exceeds the preset threshold range, it is determined to be a potential fault point. Based on the potential fault points, the parameters of the multi-stage IGBT full-bridge module are dynamically adjusted using voltage equalization control technology to obtain the adjusted bridge arm phase and duty cycle data. Based on the adjusted bridge arm phase and duty cycle data, the voltage distribution of each power device is calculated. If the voltage value of a certain device deviates from the average value by more than a preset threshold, the secondary adjustment mechanism is triggered. The control signal of the full-bridge module is fine-tuned through the secondary adjustment mechanism, and the voltage balance effect is optimized by using a proportional-integral control algorithm to ensure that the voltage distribution of each power device reaches a balanced state.

[0010] Preferably, the process of monitoring the DC bus voltage fluctuation and obtaining a stable output voltage waveform includes: The real-time voltage signal of the DC bus is extracted from the collected voltage data, and the abnormal points in the real-time voltage signal are preliminarily filtered to obtain smoothed voltage signal data. Based on the smoothed voltage signal data, a time-domain analysis method is used to detect voltage fluctuations and determine whether the fluctuation amplitude exceeds a preset threshold range. If it does, it is marked as an abnormal fluctuation point, and the fluctuation range that needs to be processed is determined. Based on the marked abnormal fluctuation points and fluctuation ranges, the corresponding compensation value is calculated using a feedforward compensation algorithm. By adjusting the voltage signal in the fluctuation range point by point, the voltage signal after preliminary compensation is obtained. Frequency domain analysis is performed on the voltage signal after preliminary compensation to detect whether there is residual ripple interference. If ripple interference is detected, the interference frequency component is extracted to obtain interference characteristic data. Based on the interference characteristic data, the parameters of the feedforward compensation algorithm are adjusted to perform secondary compensation processing on the residual ripple interference and obtain a further optimized voltage signal. Based on the optimized voltage signal, an output voltage waveform is generated. By comparing the deviation between the output waveform and the target waveform, it is determined whether the stability standard has been met, and the final output result is obtained.

[0011] Preferably, the process of determining whether the compensated system has eliminated fluctuations and iteratively adjusting the phase difference and duty cycle parameters includes: Based on the acquired output voltage data, the response feedback of the full-bridge circuit is collected in real time to obtain the initial system response signal and determine whether there are any abnormal fluctuation points. If there are abnormal fluctuation points in the collected system response signal, the location and amplitude of the fluctuation points are determined by comparing them with the preset threshold range, and the fluctuation range data that needs to be processed is obtained. Based on the fluctuation range data, the phase difference is successively corrected by an iterative adjustment method to obtain the adjusted phase control signal. Based on the adjusted phase control signal, the duty cycle value is further synchronously corrected, and the parameters are matched using a pre-established mapping table to obtain the optimized combination of control parameters. Based on the optimized combination of control parameters, the drive signal of the full-bridge circuit is updated to obtain the updated system response waveform. The updated system response waveform is subjected to secondary sampling verification to determine whether there are residual fluctuations. If fluctuations still exist, the fluctuation frequency components are extracted to obtain the corresponding frequency feature data. Based on the frequency characteristic data and combined with the preset frequency suppression rules, the driving signal is fine-tuned to obtain the final stable output voltage signal.

[0012] Preferably, the process of updating the voltage fluctuation identification criteria in the fault feature library and obtaining the updated digital model includes: Based on the iteratively adjusted parameters, the voltage fluctuation data in the fault feature library is reorganized to obtain an updated identification standard dataset. Based on the updated identification standard dataset, a new digital control model is constructed, and a dynamic response framework suitable for inverter power supplies is determined. Based on the dynamic response framework and combined with operating data under complex load environments, parameter calibration is performed using a preset threshold range to obtain optimized control model parameters. The output signal of the inverter power supply is adjusted in real time by using the optimized control model parameters. If the voltage fluctuation exceeds the preset threshold, the control model is dynamically corrected to obtain stable output signal data. Based on the stable output signal data, key operating characteristics under complex load conditions are extracted, and the range of influence of the load environment on the output accuracy is determined. Based on the key operating characteristics, update the relevant records in the fault characteristic database to determine the adaptability parameters of the inverter power supply under different load environments; The control model is continuously optimized using the adaptive parameters to obtain a final control strategy applicable to various complex load scenarios.

[0013] Compared with the prior art, the present invention has the following advantages and technical effects: This invention achieves proactive fault self-checking of power switches and drive links by sending test pulse sequences to the IGBT drive circuit and analyzing the response feedback. It can identify potential problems such as drive delay and device aging in advance, avoiding the downtime risk caused by passive protection. For multi-stage IGBT full-bridge series topology, it adopts dynamic adjustment of phase difference and duty cycle combined with voltage equalization control technology to effectively balance the voltage distribution of each bridge arm, prevent local device overvoltage damage, and improve the voltage withstand consistency of the system. By monitoring DC bus voltage fluctuations and using a feedforward compensation algorithm, it can adaptively suppress wideband bus ripple interference, significantly improving the output voltage waveform quality. In addition, by updating the fault feature library and digital model with iteratively adjusted parameters, the control strategy can be dynamically optimized according to complex load conditions, maintaining long-term stable output accuracy. This comprehensively solves the problems of fault warning lag, slow voltage equalization response, insufficient ripple suppression capability, and accuracy drift caused by model solidification in the prior art. Attached Figure Description

[0014] The accompanying drawings, which form part of this application, are used to provide a further understanding of this application. The illustrative embodiments and descriptions of this application are used to explain this application and do not constitute an undue limitation of this application. In the drawings: Figure 1 This is a schematic diagram of the method flow according to an embodiment of the present invention. Detailed Implementation

[0015] It should be noted that, unless otherwise specified, the embodiments and features described in this application can be combined with each other. This application will now be described in detail with reference to the accompanying drawings and embodiments.

[0016] It should be noted that the steps shown in the flowchart in the accompanying drawings can be executed in a computer system such as a set of computer-executable instructions, and although a logical order is shown in the flowchart, in some cases the steps shown or described may be executed in a different order than that shown here.

[0017] like Figure 1 As shown, this embodiment provides a control method for an IGBT full-bridge series inverter power supply with fault self-detection function, including: The microcontroller sends a test pulse sequence to the IGBT drive circuit, monitors the response feedback data of the full-bridge circuit, and obtains the electrical characteristic parameters of the power switch and drive link based on the response feedback data. Based on the electrical characteristic parameters, a digital signal processor is used to perform high-frequency sampling of the IGBT drive signal and output current waveform, and the sampling data sequence is obtained based on the high-frequency sampling results. Based on the sampled data sequence, a digital representation of the operating status of the full-bridge series inverter is constructed using a digital algorithm model. Based on the digital representation of the operating status, it is determined whether the operating status meets the preset threshold range. If it exceeds the threshold, an abnormal alarm signal is triggered. Based on the digital representation of the operating status, current distortion and voltage fluctuation characteristics are extracted. Based on the current distortion and voltage fluctuation characteristics, a fault feature library is established using a feature extraction algorithm to determine the specific fault type of overcurrent, overvoltage, or drive abnormality. Based on the specific fault type, the multi-stage IGBT full-bridge module of the series resonant inverter topology is adjusted to obtain the phase difference and duty cycle data of each bridge arm. Based on the phase difference and duty cycle data, the voltage of each power device is balanced through voltage equalization control technology. Based on the equalized voltage data, the DC bus voltage fluctuation is monitored. Based on the DC bus voltage fluctuation, a feedforward compensation algorithm is used to calculate the compensation value, suppress bus ripple interference, and obtain a stable output voltage waveform. Based on the output voltage waveform, the full-bridge circuit response feedback is resampled. Based on the resampling result, it is determined whether the system has eliminated fluctuations after compensation. If fluctuations still exist, the phase difference and duty cycle parameters are iteratively adjusted. Based on the iteratively adjusted parameters, the voltage fluctuation identification standard in the fault feature library is updated. Based on the updated identification standard, an updated digital model is obtained, and the output accuracy of the inverter power supply under complex loads is controlled in real time.

[0018] Furthermore, the process of obtaining electrical characteristic parameters includes: The microcontroller generates and sends a test pulse sequence to the drive circuit, triggering the full-bridge circuit to respond and recording the initial response feedback signal. Based on the response feedback signal, the feedback data output by the full-bridge circuit is collected, and the feedback data is filtered to obtain the pre-processed electrical signal data. Based on the pre-processed electrical signal data, the key electrical parameters of the power switch are extracted, and the support vector machine algorithm is used to classify the key electrical parameters to determine whether the key electrical parameters are within the normal range. If the key electrical parameters exceed the preset threshold range, the drive link is determined to be in an abnormal state, and corresponding abnormal identification information is generated. By using anomaly identification information, the specific link in the drive chain that may have a problem can be located, and fault location data can be obtained. Based on the fault location data and combined with the preset diagnostic rule base, the operating status of the drive link is analyzed in depth to determine whether the link is in normal operating condition. Based on the results of in-depth analysis, a status assessment record of the drive link is generated, and a comprehensive test of the full-bridge circuit and power switches is completed.

[0019] Furthermore, the microcontroller sends a 10kHz square wave pulse sequence through a general-purpose input / output interface to trigger the power switches in the full-bridge circuit to turn on and off.

[0020] In one possible implementation, this embodiment uses a high-precision current sensor to acquire the feedback voltage signal at the full-bridge output, which includes the transient response at the moment of switch switching. For the acquired raw data, a moving average filtering algorithm is used to remove high-frequency noise; the smoothed signal more accurately reflects the on-state voltage drop and off-state time of the power switch.

[0021] For example, this embodiment extracts key electrical parameters of the power switch, including turn-on delay time, turn-off delay time, and peak current. These parameters are input into a support vector machine model, which is pre-trained using sample data under normal operating conditions. The turn-on delay threshold is set to 500 nanoseconds, and the turn-off delay threshold is set to 600 nanoseconds. If the measured turn-on delay is 750 nanoseconds, the model outputs an anomaly flag, indicating that there is a signal transmission delay in the drive link or insufficient gate drive capability.

[0022] Specifically, the drive link is located based on the anomaly identifier. If the fault location data points to the gate drive resistor, a deep analysis is performed using a diagnostic rule base. The rule base is set so that if the conduction delay exceeds the standard and is accompanied by an abnormal current rise slope, it is determined that the drive resistor value has drifted. Through comparative analysis, if the measured value deviates from the standard value by more than 20%, a drive link status assessment record is output, clearly indicating that the aging of the drive resistor is causing the response hysteresis.

[0023] In one embodiment, this embodiment achieves non-intrusive online monitoring of the power switches in a full-bridge circuit through the above process. This method effectively distinguishes between transient interference and hardware aging faults by quantifying deviations in electrical parameters, avoiding false alarms. Through real-time classification and processing of key parameters, the failure trend of the power switches can be predicted in advance, allowing for maintenance before faults occur, significantly improving the operational reliability and service life of the full-bridge drive system. This solution, through the mutual support of multi-dimensional parameters, ensures the accuracy of fault location and provides data support for the intelligent operation and maintenance of power electronic equipment.

[0024] Furthermore, the process of obtaining the sampled data sequence includes: The initial sampling data sequence is obtained by frequently sampling the waveforms of the drive signal and the output current; A digital signal processor is used to preprocess the initial sampled data sequence to filter out noise interference and obtain a purified data sequence. Based on the purified data sequence, key waveform feature parameters are extracted to determine the waveform change trend; Based on the waveform change trend, a digital algorithm model is constructed, and the analog control logic is mapped to obtain a preliminary digital control model. If the initial digital control model's matching degree with the electrical characteristics is lower than a preset threshold, the model parameters are iteratively adjusted to obtain an optimized digital control model. The optimized digital control model is used to process the subsequent input drive signals and output current data in real time to determine the execution effect of the control logic. Based on the real-time processing results, the internal parameters of the digital algorithm model are updated to obtain the final adapted control logic model.

[0025] Furthermore, this embodiment employs an analog-to-digital converter with a sampling frequency of 100kHz to synchronously acquire the gate drive voltage and load current of the full-bridge circuit for high-frequency sampling of the drive signal and output current, thereby obtaining the original timing data.

[0026] In one possible implementation, this embodiment uses a digital signal processor to execute a moving average filtering algorithm, sets the sampling window to 10 sampling points, and eliminates high-frequency switching noise through smoothing processing to output stable current waveform data.

[0027] Specifically, in this embodiment, the rising edge slope, peak current, and turn-off delay time are extracted as key feature parameters for the purified data sequence.

[0028] For example, the upward trend of the current waveform can be determined by calculating the rate of change of the current waveform within 5 microseconds after the drive signal is triggered.

[0029] In one embodiment, this embodiment constructs a digital control model based on state-space equations, using the extracted feature parameters as input vectors to map the switching logic of the full-bridge circuit. If the deviation between the predicted current output by the model and the actual sampled current exceeds 5%, a parameter iteration mechanism is triggered.

[0030] Preferably, the least squares method is used to correct the model parameters online, and the deviation value is used as the objective function. By adjusting the gain coefficient inside the model, the predicted model is made to be consistent with the actual electrical characteristics.

[0031] For example, when the deviation value decreases from 8% to 1%, the iteration is stopped and the model parameters are locked.

[0032] In one embodiment, this embodiment utilizes an optimized model to perform closed-loop monitoring of the real-time current. If abnormal distortion occurs in the current waveform, the model will automatically update its internal weights to adapt to characteristic drift caused by the aging of the power switching transistors. In this way, dynamic adaptation of the full-bridge circuit control logic is achieved, ensuring that the drive signal and output current always maintain the expected phase relationship, thereby maintaining the stable operation of the power conversion link.

[0033] Furthermore, the process of constructing a digital representation of operational status and triggering abnormal alarm signals includes: The operation process of the full-bridge series inverter is acquired in real time by the acquisition equipment to obtain the original sampled data sequence; Based on the original sampled data sequence, a digital filtering method is used for preprocessing to remove noise interference and obtain a cleaned data sequence; Based on the purification data sequence, a digital representation model of the operating state is constructed using the support vector machine algorithm to determine the quantitative representation of the state characteristics; The quantified state characteristics are compared with a preset threshold range. If the characteristic value exceeds the preset threshold range, it is determined to be an abnormal state. If an abnormal state is determined, an abnormal alarm message is generated, a trigger signal is output through the system interface, and the time point of the abnormality is recorded. Based on the triggered abnormal alarm information, the relevant data sequences and status characteristics are automatically stored to form a complete log of the abnormal event; By updating the status monitoring database with complete logs of abnormal events, the focus of subsequent data collection is adjusted accordingly.

[0034] Furthermore, in this embodiment, the acquisition of the original sampled data sequence in the operation monitoring of the full-bridge series inverter power supply relies on the synchronous capture of voltage and current signals by a high-frequency sensor. The sampling frequency is set to 50kHz to ensure a complete reconstruction of the switching transient process of the inverter bridge arm. To address electromagnetic interference mixed in the original data, a moving average filtering algorithm is used for preprocessing. By setting the window length to 10 sampling points, the smoothed data sequence effectively filters out high-frequency glitches while retaining the fundamental characteristics of the inverter output waveform. When constructing the digital representation model of the operating status, a support vector machine algorithm is applied to perform feature space mapping on the purified data.

[0035] Specifically, this embodiment uses the phase difference of voltage and current, harmonic distortion rate, and peak fluctuation as input vectors. A radial basis function (RBF) is used to map the low-dimensional features to a high-dimensional space, thereby achieving linear separability between normal operating conditions and potential fault states. During model training, 1000 samples under normal operating conditions are selected as the training set, and the weight coefficients of the support vectors are determined to ensure the model can accurately quantify the feature values ​​of the current operating state. For anomaly detection of state features, the real-time calculated feature values ​​are compared with a preset threshold range.

[0036] For example, when the harmonic distortion rate of the output current exceeds 5.5% or the voltage fluctuation amplitude deviates from the rated value by more than 3%, it is judged as an abnormal state.

[0037] In one embodiment, the generation process of the abnormal alarm information includes recording a millisecond-level timestamp of the moment the abnormality occurs and automatically storing a 500-millisecond data sequence before and after the trigger moment in a buffer. The formation process of the abnormal event log involves the structured storage of state characteristics. By associating the abnormality type code, the degree of characteristic deviation, and the corresponding inverter operating frequency, the log is updated to the state monitoring database. During subsequent data acquisition, the monitoring system automatically increases the sampling frequency to 100kHz based on the updated database and focuses on monitoring the drive pulse width of the inverter bridge arm, thereby achieving accurate location of the abnormality source. This closed-loop monitoring mechanism ensures that the inverter power supply can maintain a deep understanding of key electrical parameters by dynamically adjusting the monitoring strategy under complex load fluctuations, thus improving the level of refined management of the operating status of the full-bridge series inverter power supply.

[0038] Furthermore, the process of extracting current distortion and voltage fluctuation features and establishing a fault feature library includes: By digitally representing the data, the original signals of current distortion and voltage fluctuation are obtained. Signal processing methods are then used to decompose the original signals to obtain a preliminary feature set. Based on the preliminary feature set, the support vector machine algorithm is applied to classify current distortion and voltage fluctuation and determine their respective abnormal modes. Based on the classified abnormal patterns, the comparison results with the preset overcurrent judgment criteria and overvoltage identification criteria in the fault feature library are obtained to determine whether there is a matching abnormal type. If the comparison results show that there is a matching abnormality type, then further extract the relevant signal features of the driving abnormality to determine the specific fault type classification; Based on the determined fault type classification, obtain detailed records of relevant signal characteristics and save the characteristic analysis results; By using the saved feature analysis results, the anomaly detection rules in the fault feature library are automatically updated to obtain accurate type classification criteria. Based on the updated and more precise classification criteria, the focus of subsequent signal acquisition is automatically adjusted to obtain signal data that better meets the needs of anomaly detection.

[0039] In one possible implementation, this embodiment uses a wavelet packet decomposition algorithm to process the current distortion and voltage fluctuation signals of a full-bridge series inverter power supply. This process decomposes the original signal into multiple frequency band components and extracts the energy proportion of each frequency band as a preliminary feature set.

[0040] For example, when the energy proportion of a current signal in the 500Hz to 1000Hz frequency band exceeds 0.8, it is marked as a high-frequency harmonic feature and used as the input vector for subsequent classification.

[0041] Specifically, this embodiment applies the Support Vector Machine (SVM) algorithm to perform pattern recognition on the aforementioned features. This algorithm divides the feature space into normal, overcurrent, and overvoltage regions by constructing a hyperplane.

[0042] For example, setting the kernel function to a radial basis function, after inputting the feature vector, the model outputs the corresponding category label. If the output label points to an overcurrent mode, the fault matching logic is triggered. At this time, the extracted feature vector is compared with the standard values ​​in the fault feature library. If the peak current exceeds 150A and the duration is greater than 10ms, it is determined to be an overcurrent fault.

[0043] In one embodiment, for a given fault type, the pulse width and dead time characteristics of the drive circuit are extracted. By analyzing the duty cycle of the drive signal, if the duty cycle deviates from a preset range of 0.45 to 0.55, the fault classification is further refined.

[0044] For example, faults can be categorized as drive logic errors or power device short circuits. These feature records are stored in a database as samples for subsequent model training.

[0045] Preferably, this embodiment utilizes an updated fault feature library to optimize detection rules. By introducing a weight adjustment mechanism, the sensitivity threshold for overcurrent identification is dynamically adjusted from 150A to 145A to improve the ability to detect minute current anomalies. Simultaneously, based on the fault type classification results, the sampling frequency of the data acquisition module is automatically adjusted, for example, increasing the sampling rate from 10kHz to 20kHz to obtain finer waveform details. This closed-loop feedback mechanism ensures that the monitoring strategy always adapts to the current operating environment, and through continuous iteration of the feature library, precise control over the inverter power supply's operating status is achieved.

[0046] Furthermore, the process of obtaining phase difference and duty cycle data and performing voltage equalization control includes: The system acquires the operating data of the multi-stage IGBT full-bridge module in the series resonant inverter topology, and uses sensors to collect the current and voltage signals of each bridge arm to determine the real-time operating status of each power device. Based on the collected current and voltage signals, signal processing techniques are used to filter and extract features from the current and voltage signals to obtain the initial distribution of the phase difference and duty cycle of each bridge arm. Based on the initial distribution of phase difference and duty cycle values, and in conjunction with a pre-established fault type database, if the phase difference of a certain bridge arm exceeds the preset threshold range, it is determined to be a potential fault point. Based on potential fault points, the parameters of the multi-stage IGBT full-bridge module are dynamically adjusted using voltage equalization control technology to obtain the adjusted bridge arm phase and duty cycle data. Based on the adjusted bridge arm phase and duty cycle data, the voltage distribution of each power device is calculated. If the voltage value of a certain device deviates from the average value by more than a preset threshold, the secondary adjustment mechanism is triggered. The control signal of the full-bridge module is fine-tuned through a secondary adjustment mechanism, and the voltage balance effect is optimized by using a proportional-integral control algorithm to ensure that the voltage distribution of each power device reaches a balanced state.

[0047] In one embodiment, for the acquisition of operating data of the multi-stage IGBT full-bridge module in the series resonant inverter topology, the instantaneous current and voltage waveforms of each bridge arm are acquired in real time through a high-frequency current transformer and a differential voltage probe.

[0048] For example, in this embodiment, the acquired raw signal is input into a wavelet transform filter. By setting the decomposition level to 3 layers, high-frequency noise interference is removed, and the fundamental phase difference and pulse width modulation duty cycle of each bridge arm are extracted. If the phase difference of a bridge arm deviates from the reference value by more than 5 degrees, it is determined that the bridge arm has a drive delay or degraded switching characteristics.

[0049] Specifically, for voltage equalization control at potential fault points, this embodiment employs a dynamic gate voltage regulation strategy. When an imbalance in bridge arm voltage is detected, the real-time voltage values ​​of each device are input to the voltage equalization controller. The controller uses the arithmetic mean of the voltages of each device as the target reference value and adjusts the dead time of the drive signal to achieve dynamic compensation for the voltage distribution of each power device.

[0050] For example, if the voltage of a device is 10% higher than the average value, the voltage stress it bears can be reduced by increasing the on-time percentage of the device's drive signal until the voltage deviation is controlled within 2%.

[0051] In one possible implementation, the secondary adjustment mechanism involved in this embodiment employs a proportional-integral control algorithm, using voltage deviation as the input variable and performing closed-loop adjustment through a proportional gain coefficient of 0.8 and an integral time constant of 0.5. This process uses the voltage distribution of each bridge arm as feedback to correct the control pulse sequence of the full-bridge module in real time.

[0052] For example, when the voltage of a certain bridge arm is detected to be still at the critical threshold, the controller automatically increases the weight of the integral term to eliminate steady-state error and ensure that the voltage distribution of each power device tends to be consistent during the resonant period. Through this multi-level adjustment logic, voltage stress concentration caused by device parameter dispersion can be effectively suppressed, maintaining the stable operation of the inverter topology across the entire load range. Each stage forms a tight logical closed loop through phase monitoring, voltage equalization regulation, and closed-loop feedback, ensuring the reliability and consistency of the multi-level IGBT module under complex operating conditions.

[0053] Furthermore, the process of monitoring DC bus voltage fluctuations and obtaining a stable output voltage waveform includes: The real-time voltage signal of the DC bus is extracted from the collected voltage data. The abnormal points in the real-time voltage signal are preliminarily filtered to obtain smoothed voltage signal data. Based on the smoothed voltage signal data, a time-domain analysis method is used to detect voltage fluctuations and determine whether the fluctuation amplitude exceeds the preset threshold range. If it does, it is marked as an abnormal fluctuation point, and the fluctuation range that needs to be processed is determined. Based on the marked abnormal fluctuation points and fluctuation ranges, the corresponding compensation value is calculated using a feedforward compensation algorithm. By adjusting the voltage signal in the fluctuation range point by point, the voltage signal after preliminary compensation is obtained. Frequency domain analysis is performed on the voltage signal after preliminary compensation to detect whether there is residual ripple interference. If ripple interference is detected, the interference frequency component is extracted to obtain interference characteristic data. Based on the interference characteristic data, the parameters of the feedforward compensation algorithm are adjusted to perform secondary compensation processing on the residual ripple interference and obtain a further optimized voltage signal. Based on the optimized voltage signal, an output voltage waveform is generated. By comparing the deviation between the output waveform and the target waveform, it is determined whether the stability standard has been met, and the final output result is obtained.

[0054] In DC bus voltage management of a series resonant inverter topology, real-time voltage signal acquisition and processing are fundamental to ensuring system stability. For example, the DC bus voltage is acquired through a high-frequency sampling module with a sampling frequency set to 20kHz. The raw data is then processed using a moving average filtering algorithm to remove high-frequency noise interference, resulting in a smoothed voltage reference.

[0055] In one embodiment, this embodiment uses a time-domain analysis method to calculate the voltage change rate of 50 consecutive sampling points. If the change rate exceeds 5% of the rated voltage, it is determined to be an abnormal fluctuation point, and the voltage data sequence within that time period is locked.

[0056] Specifically, the implementation of the feedforward compensation algorithm relies on accurate modeling of the fluctuation range.

[0057] For example, when a voltage drop is detected, the voltage deviation value is multiplied by a gain factor of 0.8 according to a preset compensation coefficient table to generate a compensation voltage command, which is then superimposed on the inverter's drive control signal.

[0058] In one possible implementation, this embodiment performs frequency domain analysis on the compensated signal using Fast Fourier Transform. If residual ripple with an amplitude exceeding 0.5V is detected in the 100Hz to 500Hz frequency band, the frequency component is extracted as the input feature for secondary compensation.

[0059] Preferably, the secondary compensation process employs an adaptive notch filter, using the extracted interference frequency as the center frequency, and by adjusting the quality factor of the filter, the residual ripple is specifically suppressed.

[0060] For example, the quality factor is set to 10 to ensure that the dynamic response speed of the DC bus voltage is not affected while suppressing ripple.

[0061] In one embodiment, the deviation between the final output voltage waveform and the target waveform is assessed by calculating the root mean square error (RMSE) of the two waveforms over one cycle. If the error value is less than 0.2V, the output is considered to have reached a stable standard. This hierarchical processing mechanism ensures a closed-loop logic from initial filtering to fine compensation. Through quantitative analysis and dynamic compensation of voltage fluctuation characteristics, it achieves a stable output of the DC bus voltage, effectively reducing the risk of uneven stress on power devices caused by voltage fluctuations.

[0062] Furthermore, the process of determining whether the compensated system has eliminated fluctuations and iteratively adjusting the phase difference and duty cycle parameters includes: Based on the acquired output voltage data, the response feedback of the full-bridge circuit is collected in real time to obtain the initial system response signal and determine whether there are any abnormal fluctuation points. If there are abnormal fluctuation points in the collected system response signal, the location and amplitude of the fluctuation points are determined by comparing them with the preset threshold range, and the fluctuation range data that needs to be processed is obtained. Based on the fluctuation range data, the phase difference is successively corrected by an iterative adjustment method to obtain the adjusted phase control signal. Based on the adjusted phase control signal, the duty cycle value is further synchronously corrected, and the parameters are matched using a pre-established mapping table to obtain the optimized combination of control parameters. Based on the optimized combination of control parameters, the drive signal of the full-bridge circuit is updated to obtain the updated system response waveform. The updated system response waveform is subjected to secondary sampling verification to determine whether there are residual fluctuations. If fluctuations still exist, the fluctuation frequency components are extracted to obtain the corresponding frequency feature data. Based on the frequency characteristic data and combined with the preset frequency suppression rules, the drive signal is fine-tuned to obtain the final stable output voltage signal.

[0063] During the full-bridge circuit response feedback acquisition process, a high-frequency sampling tool is used to monitor the output voltage in real time to obtain the initial system response signal.

[0064] Specifically, this embodiment sets the sampling frequency to 100kHz and compares the collected voltage data with a preset 0.5V fluctuation threshold. If the instantaneous voltage value deviates from the target value by more than 0.5V, this time point is marked as an abnormal fluctuation point, and data within 5 milliseconds before and after it is extracted as the fluctuation interval to be processed. For phase difference correction, an iterative adjustment algorithm is applied to optimize the control signal. In practice, the phase difference is used as the input variable, and the phase deviation is calculated successively through iterative logic with a preset step size of 0.1 degrees. When the phase difference approaches zero, the iteration stops, and the corrected phase control signal is output. This process ensures the synchronization of the switching actions of each bridge arm of the full-bridge circuit by continuously approaching the ideal phase. For duty cycle synchronization correction, a mapping table matching method is used for parameter updates. This mapping table pre-stores the optimal duty cycle values ​​under different load currents; for example, when the load current is 10A, the corresponding duty cycle is 0.45. After obtaining the parameters by looking up the table, the drive signal is updated in real time, thereby achieving precise control of the output power of the full-bridge circuit. In the secondary sampling verification stage, if residual fluctuations still exist in the system response waveform, the fluctuation frequency components are extracted using Fast Fourier Transform.

[0065] For example, when an interference frequency of 500Hz is detected, it is input as frequency characteristic data into the frequency suppression rule base. This rule base automatically matches the corresponding notch filter parameters based on the interference frequency, fine-tuning the drive signal. In this way, specific frequency components in the drive signal are attenuated, thereby eliminating residual fluctuations.

[0066] In one embodiment, this embodiment can effectively reduce the response delay of the full-bridge circuit when the load changes suddenly by means of the synergistic effect of the phase correction and duty cycle synchronous adjustment described above.

[0067] Specifically, by combining phase adjustment with frequency suppression rules, the settling time of the output voltage can be reduced to less than 10 milliseconds. This multi-dimensional parameter optimization strategy ensures that the drive signal maintains high-precision output characteristics even under complex operating conditions, thereby achieving closed-loop control of the full-bridge circuit response.

[0068] Furthermore, the process of updating the voltage fluctuation identification criteria in the fault feature library and obtaining the updated digital model includes: Based on the iteratively adjusted parameters, the voltage fluctuation data in the fault feature library is reorganized to obtain an updated identification standard dataset. Based on the updated identification standard dataset, a brand-new digital control model is constructed, and a dynamic response framework suitable for inverter power supplies is determined. Based on the dynamic response framework and combined with operating data under complex load environments, parameter calibration is performed using a preset threshold range to obtain optimized control model parameters. By optimizing the control model parameters, the output signal of the inverter power supply is adjusted in real time. If the voltage fluctuation is detected to exceed the preset threshold, the control model is dynamically corrected to obtain stable output signal data. Based on stable output signal data, key operating characteristics under complex load conditions are extracted to determine the range of influence of the load environment on output accuracy. Based on key operating characteristics, update the relevant records in the fault characteristic database to determine the adaptability parameters of the inverter power supply under different load environments; By continuously optimizing the control model using adaptive parameters, a final control strategy suitable for various complex load scenarios can be obtained.

[0069] In one embodiment, the process of constructing a digital control model involves modeling the output characteristics of the inverter power supply. The inputs are historical operating data and voltage fluctuation samples from a fault feature library. A least squares fitting algorithm is used to map the voltage fluctuation amplitude and phase offset into input weights for the control model.

[0070] For example, when the output voltage is detected to deviate from the rated value by more than 0.5 volts, the model automatically triggers the parameter calibration process, takes the current load current and voltage response as input, uses the preset proportional-integral-derivative control logic to calculate the corrected duty cycle increment, and outputs it to the drive circuit to achieve voltage closed-loop regulation.

[0071] Specifically, for the dynamic response framework under complex load environments, this embodiment employs a piecewise linearization method. The load impedance is divided into multiple ranges from 0.1 ohms to 50 ohms, and a set of optimal control parameters is preset for each range. During operation, the harmonic content of the output current is monitored in real time to determine the current load characteristics, and the corresponding combination of control parameters is extracted from the mapping table. If the harmonic component exceeds 3%, a dynamic correction mechanism is activated, adjusting the phase difference to limit the output voltage fluctuation range to within 1% of the rated value.

[0072] For example, when updating the fault feature database, this embodiment uses a clustering analysis algorithm to classify voltage fluctuation data under different loads. Abnormal signals with fluctuation frequencies between 50 Hz and 100 Hz are marked as load mutation features, and their corresponding control parameters are updated in the database. In this way, when the inverter power supply re-enters a similar load environment, it can directly call the verified adaptive parameters, reducing model optimization time.

[0073] In one possible implementation, this embodiment establishes a correlation matrix between the load environment and output accuracy by extracting key operating characteristics. This matrix uses the load power factor as the horizontal axis and the voltage stabilization time as the vertical axis. The optimal response threshold for each load scenario is determined by weighted averaging of test data under different operating conditions.

[0074] For example, the voltage response threshold is set to 0.2 volts under inductive load conditions and adjusted to 0.3 volts under capacitive load conditions, thus ensuring that the control model maintains output stability under various complex scenarios. Through continuous parameter iteration and feature library updates, the inverter can achieve adaptive control of complex load environments, ensuring that the output signal is always within the preset accuracy range.

[0075] This embodiment addresses the problem of monitoring and controlling the operating status of a series resonant inverter under complex loads. It uses a microcontroller to send a test pulse sequence, monitors the response feedback of the full-bridge circuit, obtains electrical characteristic parameters, and uses a digital signal processor for high-frequency sampling to build a digital model to determine whether the operating status meets the threshold range and trigger an abnormal alarm. At the same time, it extracts current distortion and voltage fluctuation characteristics, establishes a fault feature library, and accurately identifies fault types such as overcurrent and overvoltage.

[0076] This embodiment suppresses bus ripple interference and achieves stable output voltage by adjusting the phase difference and duty cycle of the IGBT full-bridge module, combined with voltage equalization control and feedforward compensation algorithms. Furthermore, it iterative parameter adjustments update the fault feature database to improve output accuracy. Ultimately, this invention achieves high-precision control and fault self-diagnosis of the inverter power supply under complex loads, significantly improving system stability and reliability.

[0077] The above are merely preferred embodiments of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A control method for an IGBT full-bridge series inverter power supply with fault self-diagnosis function, characterized in that, include: The microcontroller sends a test pulse sequence to the IGBT drive circuit, monitors the response feedback data of the full-bridge circuit, and obtains the electrical characteristic parameters of the power switch and drive link based on the response feedback data. Based on the electrical characteristic parameters, a digital signal processor is used to perform high-frequency sampling of the IGBT drive signal and output current waveform, and a sampling data sequence is obtained based on the high-frequency sampling results. Based on the sampled data sequence, a digital representation of the operating status of the full-bridge series inverter is constructed using a digital algorithm model. Based on the digital representation of the operating status, it is determined whether the operating status meets the preset threshold range. If it exceeds the threshold, an abnormal alarm signal is triggered. Based on the digital representation of the operating status, current distortion and voltage fluctuation features are extracted. Based on the current distortion and voltage fluctuation features, a fault feature library is established using a feature extraction algorithm to determine the specific fault type of overcurrent, overvoltage, or drive abnormality. Based on the specific fault type, the multi-stage IGBT full-bridge module of the series resonant inverter topology is adjusted to obtain the phase difference and duty cycle data of each bridge arm. Based on the phase difference and duty cycle data, the voltage of each power device is balanced through voltage equalization control technology. Based on the equalized voltage data, the DC bus voltage fluctuation is monitored. Based on the DC bus voltage fluctuation, a feedforward compensation algorithm is used to calculate the compensation value, suppress bus ripple interference, and obtain a stable output voltage waveform. Based on the output voltage waveform, the full-bridge circuit response feedback is resampled. Based on the resampling result, it is determined whether the system has eliminated fluctuations after compensation. If fluctuations still exist, the phase difference and duty cycle parameters are iteratively adjusted. Based on the iteratively adjusted parameters, the voltage fluctuation identification standard in the fault feature library is updated. Based on the updated identification standard, an updated digital model is obtained, and the output accuracy of the inverter power supply under complex loads is controlled in real time.

2. The method according to claim 1, characterized in that, The process of obtaining the electrical characteristic parameters includes: The microcontroller generates and sends a test pulse sequence to the drive circuit, triggering the full-bridge circuit to respond and recording the initial response feedback signal. Based on the response feedback signal, the feedback data output by the full-bridge circuit is collected, and the feedback data is filtered to obtain the pre-processed electrical signal data. Based on the pre-processed electrical signal data, key electrical parameters of the power switch are extracted, and the key electrical parameters are classified using a support vector machine algorithm to determine whether the key electrical parameters are within the normal range. If the key electrical parameters exceed the preset threshold range, it is determined that there is an abnormal state in the drive link, and corresponding abnormal identification information is generated; By using the anomaly identification information, the specific link in the drive chain that may have a problem can be located, and fault location data can be obtained. Based on the fault location data and combined with the preset diagnostic rule base, the operating status of the drive link is analyzed in depth to determine whether the link is in normal operating condition. Based on the results of in-depth analysis, a status assessment record of the drive link is generated, and a comprehensive test of the full-bridge circuit and power switches is completed.

3. The method according to claim 1, characterized in that, The process of obtaining the sampled data sequence includes: The initial sampling data sequence is obtained by frequently sampling the waveforms of the drive signal and the output current; The initial sampled data sequence is preprocessed using a digital signal processor to filter out noise interference and obtain a purified data sequence. Based on the purified data sequence, key waveform feature parameters are extracted to determine the waveform change trend; Based on the waveform change trend, a digital algorithm model is constructed, and the analog control logic is mapped to obtain a preliminary digital control model. If the matching degree between the preliminary digital control model and the electrical characteristics is lower than a preset threshold, the model parameters are iteratively adjusted to obtain an optimized digital control model. The optimized digital control model is used to process the subsequent input drive signals and output current data in real time to determine the execution effect of the control logic. Based on the real-time processing results, the internal parameters of the digital algorithm model are updated to obtain the final adapted control logic model.

4. The method according to claim 1, characterized in that, The process of constructing the digital representation of the operating status and triggering abnormal alarm signals includes: The operation process of the full-bridge series inverter is acquired in real time by the acquisition equipment to obtain the original sampled data sequence; Based on the original sampled data sequence, a digital filtering method is used for preprocessing to remove noise interference and obtain a cleaned data sequence. Based on the purification data sequence, a digital representation model of the operating state is constructed using the support vector machine algorithm to determine the quantitative representation of the state characteristics; The quantified state characteristics are compared with a preset threshold range. If the characteristic value exceeds the preset threshold range, it is determined to be an abnormal state. If an abnormal state is determined, an abnormal alarm message is generated, a trigger signal is output through the system interface, and the time point of the abnormality is recorded. Based on the triggered abnormal alarm information, the relevant data sequences and status characteristics are automatically stored to form a complete log of the abnormal event; By using the complete logs of the aforementioned abnormal events, the status monitoring database is updated, and the focus of subsequent data collection is adjusted accordingly.

5. The method according to claim 1, characterized in that, The process of extracting the current distortion and voltage fluctuation features and establishing a fault feature library includes: By digitally representing the data, the original signals of current distortion and voltage fluctuation are obtained. The original signals are then decomposed using signal processing methods to obtain a preliminary feature set. Based on the preliminary feature set, the support vector machine algorithm is applied to classify current distortion and voltage fluctuation and determine their respective abnormal modes. Based on the classified abnormal patterns, the comparison results with the preset overcurrent judgment criteria and overvoltage identification criteria in the fault feature library are obtained to determine whether there is a matching abnormal type. If the comparison results show that there is a matching abnormal type, then further extract the relevant signal features of the driving abnormality to determine the specific fault type classification; Based on the determined fault type classification, obtain detailed records of relevant signal characteristics and save the characteristic analysis results; By using the saved feature analysis results, the anomaly detection rules in the fault feature library are automatically updated to obtain accurate type classification criteria. Based on the updated and more precise classification criteria, the focus of subsequent signal acquisition is automatically adjusted to obtain signal data that better meets the needs of anomaly detection.

6. The method according to claim 1, characterized in that, The process of obtaining the phase difference and duty cycle data and performing voltage equalization control includes: The system acquires the operating data of the multi-stage IGBT full-bridge module in the series resonant inverter topology, and uses sensors to collect the current and voltage signals of each bridge arm to determine the real-time operating status of each power device. Based on the collected current and voltage signals, signal processing techniques are used to filter and extract features from the current and voltage signals to obtain the initial distribution of the phase difference and duty cycle of each bridge arm. Based on the initial distribution of the phase difference and duty cycle values, and in conjunction with a pre-established fault type database, if the phase difference of a certain bridge arm exceeds the preset threshold range, it is determined to be a potential fault point. Based on the potential fault points, the parameters of the multi-stage IGBT full-bridge module are dynamically adjusted using voltage equalization control technology to obtain the adjusted bridge arm phase and duty cycle data. Based on the adjusted bridge arm phase and duty cycle data, the voltage distribution of each power device is calculated. If the voltage value of a certain device deviates from the average value by more than a preset threshold, the secondary adjustment mechanism is triggered. The control signal of the full-bridge module is fine-tuned through the secondary adjustment mechanism, and the voltage balance effect is optimized by using a proportional-integral control algorithm to ensure that the voltage distribution of each power device reaches a balanced state.

7. The method according to claim 1, characterized in that, The process of monitoring the DC bus voltage fluctuation and obtaining a stable output voltage waveform includes: The real-time voltage signal of the DC bus is extracted from the collected voltage data, and the abnormal points in the real-time voltage signal are preliminarily filtered to obtain smoothed voltage signal data. Based on the smoothed voltage signal data, a time-domain analysis method is used to detect voltage fluctuations and determine whether the fluctuation amplitude exceeds a preset threshold range. If it does, it is marked as an abnormal fluctuation point, and the fluctuation range that needs to be processed is determined. Based on the marked abnormal fluctuation points and fluctuation ranges, the corresponding compensation value is calculated using a feedforward compensation algorithm. By adjusting the voltage signal in the fluctuation range point by point, the voltage signal after preliminary compensation is obtained. Frequency domain analysis is performed on the voltage signal after preliminary compensation to detect whether there is residual ripple interference. If ripple interference is detected, the interference frequency component is extracted to obtain interference characteristic data. Based on the interference characteristic data, the parameters of the feedforward compensation algorithm are adjusted to perform secondary compensation processing on the residual ripple interference and obtain a further optimized voltage signal. Based on the optimized voltage signal, an output voltage waveform is generated. By comparing the deviation between the output waveform and the target waveform, it is determined whether the stability standard has been met, and the final output result is obtained.

8. The method according to claim 1, characterized in that, The process of determining whether the system has eliminated fluctuations after compensation and iteratively adjusting the phase difference and duty cycle parameters includes: Based on the acquired output voltage data, the response feedback of the full-bridge circuit is collected in real time to obtain the initial system response signal and determine whether there are any abnormal fluctuation points. If there are abnormal fluctuation points in the collected system response signal, the location and amplitude of the fluctuation points are determined by comparing them with the preset threshold range, and the fluctuation range data that needs to be processed is obtained. Based on the fluctuation range data, the phase difference is successively corrected by an iterative adjustment method to obtain the adjusted phase control signal. Based on the adjusted phase control signal, the duty cycle value is further synchronously corrected, and the parameters are matched using a pre-established mapping table to obtain the optimized combination of control parameters. Based on the optimized combination of control parameters, the drive signal of the full-bridge circuit is updated to obtain the updated system response waveform. The updated system response waveform is subjected to secondary sampling verification to determine whether there are residual fluctuations. If fluctuations still exist, the fluctuation frequency components are extracted to obtain the corresponding frequency feature data. Based on the frequency characteristic data and combined with the preset frequency suppression rules, the driving signal is fine-tuned to obtain the final stable output voltage signal.

9. The method according to claim 1, characterized in that, The process of updating the voltage fluctuation identification criteria in the fault feature library and obtaining the updated digital model includes: Based on the iteratively adjusted parameters, the voltage fluctuation data in the fault feature library is reorganized to obtain an updated identification standard dataset. Based on the updated identification standard dataset, a new digital control model is constructed, and a dynamic response framework suitable for inverter power supplies is determined. Based on the dynamic response framework and combined with operating data under complex load environments, parameter calibration is performed using a preset threshold range to obtain optimized control model parameters. The output signal of the inverter power supply is adjusted in real time by using the optimized control model parameters. If the voltage fluctuation exceeds the preset threshold, the control model is dynamically corrected to obtain stable output signal data. Based on the stable output signal data, key operating characteristics under complex load conditions are extracted, and the range of influence of the load environment on the output accuracy is determined. Based on the key operating characteristics, update the relevant records in the fault characteristic database to determine the adaptability parameters of the inverter power supply under different load environments; The control model is continuously optimized using the adaptive parameters to obtain a final control strategy applicable to various complex load scenarios.

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