A capacitor-based LDO circuit, package module and device

Abstract

The application relates to the technical field of circuits, and provides an LDO type circuit based on capacitor voltage reduction, a packaging module and equipment.The circuit comprises a rectifying module, a logic control module, a power conversion module, a pulse width modulation module and an LDO module, wherein one end of the rectifying module is connected with high-voltage alternating current voltage, and the other end outputs pulsating direct current voltage; the logic control module and the internal sampling, comparison and timing function circuits of the power conversion module realize logic control of charging and discharging of an energy capacitor in a set and controllable voltage range, output a stabilized low-voltage direct current voltage after voltage stabilization processing; the LDO module receives the stabilized low-voltage direct current voltage from the pulse width modulation module and further stabilizes the voltage to output a target direct current voltage.The application provides a lower input voltage for a non-isolated voltage reduction stage by controlling the charge of an energy storage capacitor, reduces the requirements on the LDO device and circuit design of the non-isolated voltage reduction stage, and realizes a large ratio of input and output voltage reduction.

Description

Technical Field

[0001] This invention relates to the field of circuits, and more particularly to an LDO-type circuit, package module, and device based on capacitor step-down. Background Technology

[0002] AC to DC power conversion circuits are widely used in home appliances, communications, power electronics, and various embedded devices. Existing AC / DC step-down conversion technologies mainly employ two methods: transformer-isolated and non-isolated. In scenarios with a large input-output voltage conversion ratio, a low-frequency transformer typically steps down the high-voltage AC to the required range, then converts it to DC via bridge rectification and capacitor filtering. Alternatively, when high-precision voltage conversion (e.g., 220V AC to 5V DC) is required, rectification and capacitor filtering typically yield a 310V DC voltage, which is then stepped down using a high-ratio transformer for isolation, and further regulated by a voltage regulator circuit. While these solutions are mature, they suffer from large size, high cost, and complex design. The bulky transformers also pose challenges for modular circuit packaging, especially in applications requiring low power and low voltage output (e.g., below 3.3VDC). This not only results in low efficiency but also necessitates numerous external components, hindering circuit miniaturization and integration.

[0003] In existing AC / DC conversion schemes, the rectified and filtered DC voltage is approximately √2 times the effective value of the input AC voltage. This necessitates a high switching frequency and an extremely low duty cycle when operating at high voltage input and low voltage output, resulting in complex circuit design, reduced efficiency, limited component selection, and decreased reliability. Therefore, how to achieve a low-power AC-DC conversion circuit with high efficiency and low cost over a wide input voltage range has become an urgent problem to be solved. Summary of the Invention

[0004] In view of this, embodiments of the present invention provide an LDO-type circuit, package module and device based on capacitor step-down, which solves the problems of traditional AC / DC step-down circuits requiring low duty cycle and high switching frequency, resulting in reduced circuit efficiency and limited device type by controlling the charge of the energy storage capacitor. At the same time, it makes it possible to realize modular packaging of AC-DC high transformation ratio circuits, realizing direct and efficient conversion and stable power supply from AC power to low voltage DC power.

[0005] In a first aspect, embodiments of the present invention provide an LDO-type circuit based on capacitor-based voltage reduction. The circuit includes a rectifier module, a logic control module, a power conversion module, a pulse width modulation module, and an LDO module. One end of the rectifier module is connected to a high-voltage AC voltage, and the other end outputs a pulsating DC voltage; The logic control module receives a pulsating DC voltage from the rectifier module at one end and is connected to a capacitor at the other end. The logic control module is used to control the circuit to charge the capacitor when the pulsating DC voltage is within a preset voltage range. One end of the power conversion module is connected to a capacitor, and the other end outputs a low-voltage DC voltage. The pulse width modulation module is a pulse width modulator. The input terminal of the pulse width modulation module receives a low-voltage DC voltage from the power conversion module and outputs a regulated low-voltage DC voltage after voltage regulation. The LDO module is a low-dropout linear regulator. The LDO module receives the regulated low-voltage DC voltage from the pulse width modulation module and further regulates it to output the target DC voltage.

[0006] Preferably, the logic control module includes a voltage divider module, a comparison and detection module, a timing module, a logic module, a controlled switch module, and a protection module, wherein... The voltage divider module includes a voltage divider resistor, which is used to divide the high-voltage pulsating DC current into a low-voltage sampling signal; The comparison and detection module includes a comparator, which outputs a high / low level based on the comparison result of the low-voltage sampled signal, providing the original level signal for logic control; The timing module includes a D flip-flop for receiving transient raw level signals from the comparison and detection module and latching the transient raw level signals. The logic module includes XOR gates and XNOR gates, which are used to perform logical operations on the original level signals from the comparison and detection module and output control signals to control the controlled switch module. The controlled switch module includes a transistor and a switch S1, which is used to switch the charging control circuit on and off after receiving a control signal from the logic module. The protection module includes a protection resistor to prevent current from flowing back into the capacitor, thus protecting the device.

[0007] Preferably, the voltage divider resistors in the voltage divider module include resistors R1, R2, R4, R5, R6, R7, and R9, which divide the high-voltage pulsating DC voltage into low-voltage sampling signals. The low-voltage sampling signals are then sent to the input terminals of the comparators in the comparison and detection module.

[0008] Preferably, the comparison and detection module includes several comparators, with a first input terminal receiving a low-voltage sampling signal from the voltage divider module, a second input terminal receiving a reference voltage signal, and an output terminal connected to the timing module to provide the original level signal.

[0009] Preferably, logic gate U4A in the logic module is an XOR gate and logic gate U5A is an XNOR gate. The XOR gate U4A and the XNOR gate U5A receive the signals output by the D flip-flop, perform logical operations, and output a drive signal for controlling the on / off state of transistor Q2 in the controlled switch module.

[0010] Preferably, the power conversion module includes a power switching module, a filtering and energy transfer module, and a current detection module, wherein, The power switch module includes switches S2 and S4, which are used to control the discharge path of the capacitor, receive the pulsating DC signal from capacitor C7 and perform pulse modulation, and output modulated pulsating current. The filtering and energy transfer module includes an inductor L2 and a capacitor C4. The filtering and energy transfer module receives the modulated pulsating current output from the power switch module and outputs a filtered pulsating current. The current detection module includes a sampling resistor R14, a test probe U7, and a load resistor, and is used for current detection.

[0011] Preferably, the pulse width modulation module includes a PWM drive module, an error amplification and feedback module, and a compensation and stabilization module, wherein, The PWM drive module includes a signal source V8, a signal source V6, a NOT gate U6A, a flip-flop U5, a comparator U2A, and a reference voltage source V5. The PWM drive module is used to generate PWM signals and drive the power switch module. The error amplification and feedback module includes resistors R17, R18, and R19, a reference voltage source V9, and a comparator U2B, which are used to sample the output voltage and compare it with the reference voltage, and output an error signal to adjust the duty cycle of the PWM signal. The compensation and stabilization module includes capacitors C6, C8, and C9, and resistors R20 and R21.

[0012] Preferably, the LDO module is a low-dropout linear regulator, comprising a variable resistor RP, a reference voltage source, and an error amplifier, wherein, The error amplifier receives a regulated low-voltage DC voltage from the pulse width modulation module and outputs a control signal to drive RP. The resistance value of the variable resistor RP changes according to the control signal.

[0013] Secondly, embodiments of the present invention provide a packaging module, the packaging module including a packaging shell, and the packaging shell encapsulates the LDO type circuit based on capacitor step-down as described in the first aspect.

[0014] Thirdly, embodiments of the present invention provide an electronic device, the device including the packaging module described in the second aspect.

[0015] In summary, the beneficial effects of the present invention are as follows: The LDO type circuit, packaging module and device based on capacitive buck provided by the embodiments of the present invention solve the technical problems existing in the traditional AC / DC buck circuit under wide input voltage conditions: the DC voltage obtained after full-bridge rectification and capacitive filtering is √2 times the effective value of the AC voltage, which results in extremely low duty cycle and extremely high switching frequency for the circuit to operate stably when the input voltage is high and the output voltage is low, causing reduced circuit efficiency, limited device selection and decreased reliability. The present invention controls the charge of the energy storage capacitor to provide a relatively low input voltage for the subsequent non-isolated buck, so as to achieve the purpose of buck with a large input-output voltage ratio without using a transformer. At the same time, it makes it possible to modularize the AC-DC large ratio circuit. Through the control of switches by functional circuits such as internal sampling, comparison and timing, the logical control of charging and discharging the energy capacitor is realized within a set and controllable voltage range (for example: 70 < VC < 100V), so as to provide a relatively low input voltage for the subsequent stage, improve the duty cycle of the non-isolated BUCK circuit, and fundamentally improve the contradiction between high-voltage input and low-voltage output. On the one hand, the adaptability and application range of the circuit are significantly improved; on the other hand, due to the reduced harsh requirements for the withstand voltage and switching frequency of the switching device, the overall efficiency of the circuit is improved, the production and application costs are reduced, and the design implementation is more simplified, which is suitable for scenarios with low power requirements but high efficiency and low cost. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required to be used in the embodiments of the present invention will be briefly introduced below. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts, and all of these are within the protection scope of the present invention.

[0017] Figure 1 It is a schematic diagram of the overall design of the LDO type circuit based on capacitive buck of the present invention; Figure 2 It is a schematic diagram of the rectification module and logic control module of the LDO type circuit based on capacitive buck of the present invention; Figure 3 It is a schematic diagram of the rectification module of the LDO type circuit based on capacitive buck of the present invention; Figure 4 It is a schematic diagram of the voltage division module of the LDO type circuit based on capacitive buck of the present invention; Figure 5 It is a schematic diagram of the voltage division module and the comparison and detection module of the LDO type circuit based on capacitive buck of the present invention; Figure 6This is a schematic diagram of the comparison and detection module, timing module, and logic module of the LDO type circuit based on capacitor voltage reduction of the present invention; Figure 7 This is a schematic diagram of the power conversion module and pulse width modulation module of the LDO type circuit based on capacitor step-down in this invention; Figure 8 This is a schematic diagram of the LDO module of the LDO-type circuit based on capacitor voltage reduction of the present invention. Figure 9 This is a schematic diagram of the pulsating DC current and drive signal waveforms obtained after rectification by the rectifier module of the LDO circuit based on capacitor step-down in this invention. Figure 10 This is a schematic diagram of the output result of the LDO circuit based on capacitor voltage reduction of the present invention when the input AC is 85V; Figure 11 This is a schematic diagram of the output result of the LDO circuit based on capacitor voltage reduction of the present invention when the input AC is 220V; Figure 12 This is a schematic diagram of the output result of the LDO type circuit based on capacitor voltage reduction of the present invention when the input AC is 305V. Detailed Implementation

[0018] The features and exemplary embodiments of various aspects of the present invention will now be described in detail. To make the objectives, technical solutions, and advantages of the present invention clearer, the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only configured to explain the present invention and are not configured to limit the present invention. For those skilled in the art, the present invention can be practiced without some of these specific details. The following description of the embodiments is merely intended to provide a better understanding of the present invention by illustrating examples of the invention.

[0019] It should be noted that, in this document, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising..." does not exclude the presence of additional identical elements in the process, method, article, or apparatus that includes said element.

[0020] It should be noted that all actions involving the acquisition of signals, information, or data in this invention are carried out in compliance with the relevant data protection laws and regulations of the locality and with authorization from the owner of the relevant device. Example 1

[0021] Please see Figure 1 This invention provides an LDO-type circuit based on capacitor-based voltage reduction. The circuit includes a rectifier module, a logic control module, a power conversion module, a pulse width modulation module, and an LDO module. One end of the rectifier module is connected to a high-voltage AC voltage, and the other end outputs a pulsating DC voltage; The logic control module receives a pulsating DC voltage from the rectifier module at one end and is connected to a capacitor at the other end. The logic control module is used to control the circuit to charge the capacitor when the pulsating DC voltage is within a preset voltage range. One end of the power conversion module is connected to a capacitor, and the other end outputs a low-voltage DC voltage. The pulse width modulation module is a pulse width modulator. The input terminal of the pulse width modulation module receives a low-voltage DC voltage from the power conversion module and outputs a regulated low-voltage DC voltage after voltage regulation. The LDO module is a low-dropout linear regulator. The LDO module receives the regulated low-voltage DC voltage from the pulse width modulation module and further regulates it to output the target DC voltage.

[0022] For details, see Figure 2 The output of the rectifier module is connected to the input of the logic control module. After rectification, instead of directly connecting a large electrolytic capacitor for smoothing and filtering, the pulsating DC is sent directly to the logic control module. The logic control within the module then selects an appropriate voltage range to charge the capacitor. The rectifier module is a full-bridge rectifier; the high-voltage AC output from the power supply is rectified by the full-bridge rectifier to obtain a pulsating DC voltage, which then enters the logic control module. See also... Figure 3 The rectifier module includes diodes D1, D2, D5, and D6, all of which are D1N4007 type. High-voltage AC voltage is rectified by the four diodes in a full-bridge rectifier to obtain pulsating DC voltage, providing the input voltage for the subsequent logic control module. The four diodes form a rhombus structure, with only two diodes on opposite sides of the rhombus conducting at any given time; that is, diodes D1 and D5 conduct simultaneously, and diodes D2 and D6 conduct simultaneously. The full-bridge rectifier converts the AC voltage into pulsating DC voltage Vin. Figure 9As shown in the diagram. The pulsating DC voltage then passes through the voltage divider resistors in the logic control module, obtaining a voltage threshold range of 30V~70V. After passing through the two comparators in U1 and the subsequent D flip-flop, a corresponding pulse square wave signal is obtained. This signal is then converted to a drive control signal by Q2 to drive S1, causing the subsequent capacitor C7 to charge and filter. Capacitor C7 is an energy storage capacitor. The power conversion module, through switching devices and a filter network, converts the DC voltage obtained by discharging capacitor C7 into a stable low-voltage DC voltage. The pulse width modulation module regulates and controls the low-voltage DC voltage after power conversion, ensuring a regulated low-voltage DC output. The regulated low-voltage DC voltage then passes through an LDO module, i.e., a low-dropout linear regulator (LDO). Based on the low-voltage DC voltage output from the pulse width modulation module, the LDO achieves secondary voltage regulation through error amplification, power transistor adjustment, and feedback control, filtering out high-frequency noise and ripple, thereby providing a low-noise, high-precision, and highly adaptable target DC voltage.

[0023] In one embodiment, the logic control module includes a voltage divider module, a comparison and detection module, a timing module, a logic module, a controlled switch module, and a protection module, wherein, The voltage divider module includes a voltage divider resistor, which is used to divide the high-voltage pulsating DC current into a low-voltage sampling signal; The comparison and detection module includes a comparator, which outputs a high / low level based on the comparison result of the low-voltage sampled signal, providing the original level signal for logic control; The timing module includes a D flip-flop for receiving transient raw level signals from the comparison and detection module and latching the transient raw level signals. The logic module includes XOR gates and XNOR gates, which are used to perform logical operations on the original level signals from the comparison and detection module and output control signals to control the controlled switch module. The controlled switch module includes a transistor and a switch S1, which is used to switch the charging control circuit on and off after receiving a control signal from the logic module. The protection module includes a protection resistor to prevent current from flowing back into the capacitor, thus protecting the device.

[0024] Specifically, the voltage divider module, comparison and detection module, timing module, logic module, controlled switch module, and protection module work together to achieve safe sampling, comparison, logic processing, and controlled switch control of high-voltage pulsating DC signals. The voltage divider module divides the high voltage into a safe low level for comparison by the subsequent comparison and detection module. The comparison and detection module consists of a comparator and a reference voltage source, used to compare the low-voltage sampled signal with the reference voltage source to obtain the original level signal. The timing module includes a D flip-flop, used to receive the transient original level signal output by the comparator and latch it on the clock edge to ensure the output signal is stable and has a minimum pulse width. The logic module includes XOR gates and XNOR gates, used to perform logical operations on multiple original level signals and the reference voltage source to form a control signal that conforms to the control strategy. The controlled switch module includes a transistor and switch S1, which realizes the circuit on / off switching after receiving the control signal output by the logic module. When S1 is closed, capacitor C7 charges; when S1 is open, capacitor C7 stops charging. The protection module includes a protection resistor, used to prevent capacitor energy from flowing back into the preceding circuit, thereby protecting the logic gates, comparator, voltage divider resistors, and rectifier bridge from damage. It can also be used with current limiting, diodes, or TVS suppression devices to achieve surge protection and safe discharge. The overall design achieves safe conversion of high-voltage signals to low-voltage logic and controlled energy management through the organic combination of voltage division, comparison, latching, logic operation and power switch control. It features fast response, strong anti-interference ability and safety and reliability.

[0025] In one embodiment, the voltage divider module includes resistors R1, R2, R4, R5, R6, R7, and R9, which divide the high-voltage pulsating DC voltage into low-voltage sampling signals. The low-voltage sampling signals are then sent to the input terminals of the comparators in the comparison and detection module.

[0026] For details, see Figure 2 and Figure 4 The voltage divider module includes resistors R11, R2, R4, R9, R1, R5, R6, and R7. One end of resistor R11 is connected to the output terminal of the rectifier module, and the other end is connected to resistor R2. Resistors R2, R4, and R9 are connected in series between resistor R11 and ground. One end of resistor R2 is connected to resistor R11, and the other end is connected to the positive input terminal of comparator U1A in the comparison and detection module. The node between resistors R4 and R9 is connected to the positive input terminal of comparator U1B in the comparison and detection module. One end of capacitor C2 is connected to the positive terminal of the reference voltage source V7, and the other end is grounded. Similarly, one end of capacitor C3 is connected to the positive terminal of the reference voltage source V7, and the other end is grounded.

[0027] Resistor R1 and resistor R5 are connected in series between the reference voltage source V7 and ground. One end of resistor R1 is connected to the positive terminal of the reference voltage source V7, and the other end is connected to one end of resistor R5 and the negative input terminal of comparator U1A. The other end of resistor R5 is grounded. Resistor R7 and resistor R6 are connected in series between the reference voltage source V7 and ground. One end of resistor R7 is connected to the positive terminal of the reference voltage source V7, and the other end is connected to one end of resistor R6 and the negative input terminal of comparator U1B. The other end of resistor R6 is grounded. Comparators U1A and U1B are both LM358. One end of resistor R3 is connected to the positive terminal of the reference voltage source V7, and the other end is grounded after passing through capacitor C5.

[0028] In one embodiment, the comparison and detection module includes several comparators, a first input terminal receiving a low-voltage sampling signal from the voltage divider module, a second input terminal receiving a reference voltage signal, and an output terminal connected to the timing module to provide the original level signal.

[0029] Specifically, the output of comparator U1A is connected to the CLK pin of D flip-flop U3A in the timing module. The D pin of D flip-flop U3A is connected to the QN pin. The Q pin of D flip-flop U3A is connected to the first input of XOR gate U4A and the first input of XNOR gate U9A in the logic module. The output of comparator U1B is connected to the CLK pin of D flip-flop U3B in the timing module. The D pin of D flip-flop U3B is connected to the QN pin, and then connected to the second input of XOR gate U4A and the second input of XNOR gate U9A in the logic module. Both D flip-flops U3A and U3B are model 74HC74, XOR gate U4A is model CD4070B, and XNOR gate U9A is model CD4077B.

[0030] In one embodiment, logic gate U4A in the logic module is an XOR gate and logic gate U5A is an XNOR gate. The XOR gate U4A and the XNOR gate U5A receive the signals output by the D flip-flop, perform logical operations, and output a drive signal for controlling the on / off state of transistor Q2 in the controlled switch module.

[0031] For details, see Figure 2 and Figure 6The output of either XOR gate U4A or XNOR gate U5A is connected to the base of transistor Q2. The emitter of transistor Q2 is grounded, and its collector is connected to one end of resistor R8 and switch S1. Transistor Q2 is a Q2N6059, and XOR gate U4A is a CD4070B, used to receive the latch signal from the D flip-flop in the timing module. It outputs a high level when the two input signals are different and a low level when the two input signals are the same. XNOR gate U5A is a CD4077B, receiving the latch signal from the timing module. Its logic is the opposite of the XOR gate; it outputs a high level when the two input signals are the same and a low level when the two input signals are different. The XOR gate performs a logical XOR operation, generating a control signal that controls the actions of subsequent controlled switching modules, adjusting the switching on and off timings, and thus affecting the charging and discharging process of the capacitor. The XOR gate generates another control signal by performing an XOR logic operation on these two types of signals. This signal, together with the signal output by the XOR gate, enables more complex and precise logic control of each module in the circuit, ensuring the orderly operation of functions such as capacitor voltage reduction and PWM voltage regulation.

[0032] In one embodiment, the power conversion module includes a power switching module, a filtering and energy transfer module, and a current detection module, wherein, The power switch module includes switches S2 and S4, which are used to control the discharge path of the capacitor, receive the pulsating DC signal from capacitor C7 and perform pulse modulation, and output modulated pulsating current. The filtering and energy transfer module includes an inductor L2 and a capacitor C4. The filtering and energy transfer module receives the modulated pulsating current output from the power switch module and outputs a filtered pulsating current. The current detection module includes a sampling resistor R14, a test probe U7, and a load resistor, and is used for current detection.

[0033] For details, see Figure 7V_cap is a relatively smooth DC voltage of approximately 70V, which is used as the input voltage and stepped down through the main switch S2, synchronous switch S4, and inductor L2. The clock and triangular wave are provided by a signal generator at a frequency of 700kHz. The power switch module includes the main switch S2 and the synchronous switch S4. The main switch S2 is periodically turned on and off under the action of the PWM control signal, and the synchronous switch S4 is turned on when the main switch S2 is off. When the PWM signal is high, the main switch S2 is on, connecting the input voltage to the inductor L2, which then flows through the capacitor C4 into the subsequent load circuit. When the main switch S2 is off, the synchronous switch S4 is closed, and the inductor current freewheels through the S4 loop. The sampling resistor R14 has a resistance of 0.0001Ω, generating a very small voltage drop when current flows through it. This voltage is collected by the subsequent detection circuit for current detection / overcurrent protection. The test probe U7 is used for current measurement, and resistors R12 and R24 are grounded as the load of the detection node.

[0034] In one embodiment, the pulse width modulation module includes a PWM drive module, an error amplification and feedback module, and a compensation and stabilization module, wherein, The PWM drive module includes a signal source V8, a signal source V6, a NOT gate U6A, a flip-flop U5, a comparator U2A, and a reference voltage source V5. The PWM drive module is used to generate PWM signals and drive the power switch module. The error amplification and feedback module includes resistors R17, R18, and R19, a reference voltage source V9, and a comparator U2B, which are used to sample the output voltage and compare it with the reference voltage, and output an error signal to adjust the duty cycle of the PWM signal. The compensation and stabilization module includes capacitors C6, C8, and C9, and resistors R20 and R21.

[0035] Specifically, the triangular wave signal source V8 generates a periodic triangular wave at a fixed frequency, serving as the carrier reference for PWM modulation. The square wave clock signal source V6 outputs a clock pulse consistent with the system switching frequency. After level shaping by the NOT gate U6A, it is sent to the flip-flop U5. The flip-flop latches the input pulse and suppresses glitches, ensuring stable timing for subsequent comparison and driving processes. One end of the comparator U2A receives the error signal from the voltage feedback and error amplification module, while the other end receives the triangular wave signal. When the error signal is higher than the instantaneous voltage of the triangular wave, the comparator U2A outputs a high level; when the error signal is lower than the instantaneous voltage of the triangular wave, the comparator U2A outputs a low level, thus obtaining a PWM square wave with a duty cycle that continuously varies with the amplitude of the error signal. The PWM square wave is shaped and isolated by the driver stage and then sent to the main switch S2 to complete the duty cycle modulation of the power stage. The DC voltage at the output terminal is divided into a low-voltage sampling signal by voltage divider resistors R17 and R19. The sampling signal is input to one end of the comparator U2B, and the other end is connected to the reference voltage source V9. Comparator U2B compares and amplifies the difference between the sampled voltage and the reference voltage, generating an error signal reflecting the direction and amplitude of the output deviation. To ensure closed-loop stability and set the system's low-frequency gain and high-frequency roll-off, a compensation network consisting of R18, R20, R21, C6, C8, and C9 is connected between the output and input of U2B. This network provides sufficient integration in the low-frequency range to eliminate steady-state errors and provides phase margin in the mid-to-high-frequency range to suppress oscillations. The compensated error signal is output to comparator U2A in the PWM generation and drive module to adjust the PWM duty cycle. Components such as capacitors C6, C8, and C9, and resistors R20 and R21 form a compensation network to improve the phase margin of the closed-loop system, preventing oscillations during load changes or when the loop gain is high. When capacitors and resistors are connected in series and parallel, the error signal can be low-pass filtered or integrated, making the system sensitive to low-frequency errors and ensuring voltage regulation accuracy, while being insensitive to high-frequency interference and suppressing noise. This prevents the PWM duty cycle from jittering when the error is small, ensuring a stable voltage output. Capacitors C6 and C8 are loop compensation capacitors, which play a role in stabilizing the system in the error amplification and PWM control stages.

[0036] In one embodiment, the LDO module is a low-dropout linear regulator, including a variable resistor RP, a reference voltage source, and an error amplifier, wherein, The error amplifier receives a regulated low-voltage DC voltage from the pulse width modulation module and outputs a control signal to drive RP. The resistance value of the variable resistor RP changes according to the control signal.

[0037] For details, see Figure 8The LDO module is a low-dropout linear regulator, including resistor R22, a variable resistor RP, voltage divider resistors R23 and R24, an error amplifier, and a reference voltage source. The LDO adjusts the resistance of RP through the error amplifier, ensuring the output voltage, after voltage division, equals the reference voltage, thus maintaining output voltage stability. The regulated low-voltage DC from the pulse-width modulation module passes through R22 and enters the variable resistor RP, then outputs to the load. Simultaneously, the output voltage is divided by resistors R23 and R24, and the divided sampled voltage is sent to the inverting input of the error amplifier. The reference voltage source provides a stable reference voltage to the non-inverting input of the error amplifier. The error amplifier compares the difference between the sampled voltage and the reference voltage, amplifies the result, and outputs it to the variable resistor RP, thereby dynamically adjusting the equivalent resistance of RP to change the current transfer capability and maintain output voltage stability. When the output voltage is higher than the target value, the error amplifier increases the equivalent resistance of RP to reduce the output current; conversely, it decreases the resistance to increase the output current. Through this closed-loop regulation process, the output voltage can still be kept constant even when the input voltage or load fluctuates. Through error amplification, feedback control and dynamic adjustment mechanisms, precise voltage regulation of the output voltage under low voltage drop conditions is achieved, providing a higher quality target DC voltage for the downstream load. Example 2

[0038] This invention provides a packaging module, which includes a packaging shell, and the LDO type circuit based on capacitor step-down described in Embodiment 1 is encapsulated inside the packaging shell. Example 3

[0039] This invention provides an electronic device, which includes the packaging module described in embodiment 2.

[0040] In summary, the beneficial effects of the capacitor-based PWM circuit, package module, and device provided in this embodiment are as follows: The LDO circuit, packaged module, and device based on capacitor-based voltage reduction provided by this invention solve the technical problem of traditional AC / DC step-down circuits under wide input voltage conditions: the DC voltage obtained after full-bridge rectification and capacitor filtering is √2 times the effective value of the AC voltage. This results in the circuit requiring extremely low duty cycles and extremely high switching frequencies to operate stably under high-voltage input and low-voltage output, leading to reduced circuit efficiency, limited component selection, and decreased reliability. This invention avoids excessively high DC bus voltage by sampling the pulsating DC voltage in segments and performing capacitor filtering only within the 30V~70V voltage range, fundamentally improving the contradiction between high-voltage input and low-voltage output. On the one hand, it significantly improves the adaptability and application range of the circuit; on the other hand, by reducing the stringent requirements on the withstand voltage and switching frequency of the switching devices, the overall circuit efficiency is improved, production and application costs are reduced, and the design implementation is simplified, making it suitable for scenarios with low power requirements but high efficiency and low cost.

[0041] The above description is merely a specific embodiment of the present invention. Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the specific working processes of the systems, modules, and units described above can be referred to the corresponding processes in the foregoing method embodiments, and will not be repeated here. It should be understood that the protection scope of the present invention is not limited thereto. Any person skilled in the art can easily conceive of various equivalent modifications or substitutions within the technical scope disclosed in the present invention, and these modifications or substitutions should all be covered within the protection scope of the present invention.

Claims

1. An LDO-type circuit based on capacitor-based voltage reduction, characterized in that, The circuit includes a rectifier module, a logic control module, a power conversion module, a pulse width modulation module, and an LDO module, wherein... One end of the rectifier module is connected to a high-voltage AC voltage, and the other end outputs a pulsating DC voltage; The logic control module receives a pulsating DC voltage from the rectifier module at one end and is connected to a capacitor at the other end. The logic control module is used to control the circuit to charge the capacitor when the pulsating DC voltage is within a preset voltage range. One end of the power conversion module is connected to a capacitor, and the other end outputs a low-voltage DC voltage. The pulse width modulation module is a pulse width modulator. The input terminal of the pulse width modulation module receives a low-voltage DC voltage from the power conversion module and outputs a regulated low-voltage DC voltage after voltage regulation. The LDO module is a low-dropout linear regulator. The LDO module receives the regulated low-voltage DC voltage from the pulse width modulation module and further regulates it to output the target DC voltage.

2. The LDO-type circuit based on capacitor voltage reduction according to claim 1, characterized in that, The logic control module includes a voltage divider module, a comparison and detection module, a timing module, a logic module, a controlled switch module, and a protection module, wherein... The voltage divider module includes a voltage divider resistor, which is used to divide the high-voltage pulsating DC current into a low-voltage sampling signal; The comparison and detection module includes a comparator, which outputs a high / low level based on the comparison result of the low-voltage sampled signal, providing the original level signal for logic control; The timing module includes a D flip-flop for receiving transient raw level signals from the comparison and detection module and latching the transient raw level signals. The logic module includes XOR gates and XNOR gates, which are used to perform logical operations on the original level signals from the comparison and detection module and output control signals to control the controlled switch module. The controlled switch module includes a transistor and a switch S1, which is used to switch the charging control circuit on and off after receiving a control signal from the logic module. The protection module includes a protection resistor to prevent current from flowing back into the capacitor, thus protecting the device.

3. The LDO-type circuit based on capacitor voltage reduction according to claim 2, characterized in that, The voltage divider module includes resistors R1, R2, R4, R5, R6, R7, and R9, which divide the high-voltage pulsating DC voltage into low-voltage sampling signals. The low-voltage sampling signals are then sent to the input terminals of the comparators in the comparison and detection module.

4. The LDO-type circuit based on capacitor voltage reduction according to claim 2, characterized in that, The comparison and detection module includes several comparators. The first input terminal receives the low-voltage sampling signal from the voltage divider module, the second input terminal receives the reference voltage signal, and the output terminal is connected to the timing module to provide the original level signal.

5. The LDO-type circuit based on capacitor voltage reduction according to claim 2, characterized in that, The logic gate U4A in the logic module is an XOR gate, and the logic gate U5A is an XNOR gate. The XOR gate U4A and the XNOR gate U5A receive the signals output by the D flip-flop, perform logical operations, and output a drive signal to control the on / off state of the transistor Q2 in the controlled switch module.

6. The LDO circuit based on capacitor voltage reduction according to claim 1, characterized in that, The power conversion module includes a power switching module, a filtering and energy transfer module, and a current detection module, wherein... The power switch module includes switches S2 and S4, which are used to control the discharge path of the capacitor, receive the pulsating DC signal from capacitor C7 and perform pulse modulation, and output modulated pulsating current. The filtering and energy transfer module includes an inductor L2 and a capacitor C4. The filtering and energy transfer module receives the modulated pulsating current output from the power switch module and outputs a filtered pulsating current. The current detection module includes a sampling resistor R14, a test probe U7, and a load resistor, and is used for current detection.

7. The LDO-type circuit based on capacitor voltage reduction according to claim 1, characterized in that, The pulse width modulation module includes a PWM drive module, an error amplification and feedback module, and a compensation and stabilization module, wherein... The PWM drive module includes a signal source V8, a signal source V6, a NOT gate U6A, a flip-flop U5, a comparator U2A, and a reference voltage source V5. The PWM drive module is used to generate PWM signals and drive the power switch module. The error amplification and feedback module includes resistors R17, R18, and R19, a reference voltage source V9, and a comparator U2B, which are used to sample the output voltage and compare it with the reference voltage, and output an error signal to adjust the duty cycle of the PWM signal. The compensation and stabilization module includes capacitors C6, C8, and C9, and resistors R20 and R21.

8. The LDO-type circuit based on capacitor voltage reduction according to claim 1, characterized in that, The LDO module is a low-dropout linear regulator, comprising a variable resistor RP, a reference voltage source, and an error amplifier. The error amplifier receives a regulated low-voltage DC voltage from the pulse width modulation module and outputs a control signal to drive RP. The resistance value of the variable resistor RP changes according to the control signal.

9. A packaging module, characterized in that, The packaging module includes a packaging shell, and the packaging shell encapsulates an LDO-type circuit based on capacitor step-down as described in any one of claims 1-8.

10. An electronic device, characterized in that, Includes the encapsulation module as described in claim 9.

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