A floating buck step-down system control circuit

Abstract

The present application relates to the technical field of step-down converter system, and discloses a floating ground buck step-down system control circuit, which comprises a floating ground buck step-down control chip U1, a main power switch, an energy storage inductor, a peak current sampling module, an input and output filter module and a feedback compensation module; the main power switch conversion module, the peak current sampling module and the input and output filter module are connected with the floating ground buck step-down control chip U1 respectively. The feedback loop is constructed by TL431 and optocoupler, the output voltage is accurately fed back to the COMP pin of the floating ground control chip, and high-precision stable control of the output voltage is realized. The maximum input voltage of the scheme can reach 500V, the core pain points such as low sampling precision, high no-load standby power consumption and slow dynamic response of the traditional floating ground buck step-down system are solved, the chip production cost is lower than that of the ground buck step-down scheme, the advanced process platform is not needed, and the advantages of high performance and high cost performance are combined.

Description

Technical Field

[0001] This invention relates to the field of buck converter system technology, and more particularly to a control circuit for a floating buck buck converter system. Background Technology

[0002] Typical DC-DC power management chips are basically based on a real buck converter architecture, with the chip's GND connected to the input GND. Currently, the maximum input voltage is around 100V, mainly due to the limitations of high-voltage BCD process platforms. Developing process platforms with higher voltage withstand capabilities is difficult and costly.

[0003] A floating-ground buck converter is a buck converter topology where the input GND is not directly connected to the chip's GND. The chip's VSS (i.e., the chip's GND) voltage changes with the switching of the MOSFET. Its core feature is that the chip's VSS is placed at the source of the switching transistor. The biggest advantage of this structure is its simple driving, eliminating the need for high-low level conversion circuits and bootstrap circuits, and allowing direct driving of the switching transistor. Furthermore, it is naturally suitable for the following scenarios: firstly, meeting high-voltage inputs, up to 500V; secondly, achieving low standby power consumption; and thirdly, high output voltage accuracy and fast loop response. Therefore, it is widely used in non-isolated switching power supply circuits.

[0004] Floating buck converters are widely used in industrial control and consumer electronics due to their high input voltage and lower cost compared to isolated solutions. However, existing floating buck converters still have several technical shortcomings: First, the output voltage sampling accuracy is insufficient. Traditional sampling schemes are affected by factors such as poor matching between the sampling capacitor and the output capacitor and limited sampling time, resulting in the sampled voltage failing to accurately reflect the true value of the output voltage, leading to insufficient system voltage regulation accuracy. Second, the system stability and dynamic response performance are poor. Sampling can only be performed during the inductor freewheeling phase, making it impossible to capture transient fluctuations in the output voltage in real time. This makes it difficult to respond quickly to load changes and easily leads to problems such as output voltage overshoot and oscillation. Third, the no-load standby power consumption is relatively high. To ensure sampling continuity, the main power transistor needs to switch continuously at high frequency, resulting in unnecessary energy loss under no-load conditions, which cannot meet the requirements of low-power applications. These shortcomings severely limit the application scenarios and performance limits of floating buck converters. Summary of the Invention

[0005] The purpose of this invention is to solve the problems of poor stability, low output voltage sampling accuracy, high idle standby power consumption, and slow dynamic response of existing floating buck buck systems. At the same time, it also enables the maximum input voltage of the entire floating system to reach 500V, and the control chip does not need to rely on advanced manufacturing process platforms, thus reducing the chip production cost. Therefore, a floating buck buck system control circuit is proposed.

[0006] To achieve the above objectives, the present invention adopts the following technical solution:

[0007] A floating buck step-down system control circuit includes a floating buck step-down control chip U1, a main power switch conversion module, a peak current sampling module, an input filtering module, and an output filtering module. The main power switch conversion module, the peak current sampling module, the input filtering module, and the output filtering module are respectively connected to the floating buck step-down control chip U1.

[0008] It also includes a feedback compensation module for real-time sampling of output voltage, accelerating the system's response speed to load changes, and reducing the system's no-load standby power consumption. The feedback compensation module is mainly composed of an optocoupler U2 and a controllable precision voltage regulator U3. One end of the feedback compensation module is connected to the loop compensation pin of the floating-ground buck step-down control chip U1 to transmit voltage data to the floating-ground buck step-down control chip U1 for subsequent compensation. The other end of the feedback compensation module is connected to the voltage output terminal.

[0009] As a preferred embodiment of the present invention, the feedback compensation module further includes a voltage divider resistor R1, a voltage divider resistor R2, a low-frequency gain resistor R3, a dead-zone compensation resistor R4 for the optocoupler, a linear operating range setting resistor R5 for the optocoupler, a compensation capacitor C6, and a low-frequency gain capacitor C7; the optocoupler U2 is composed of a light-emitting diode U2-A and a phototransistor U2-B, and the optocoupler U2 is used to provide feedback on the output voltage and adjust the loop compensation pin voltage of the floating-ground buck control chip U1;

[0010] One end of the voltage divider resistor R1 is connected to the voltage output terminal and one end of the linear operating range setting resistor R5 of the optocoupler. The other end of the voltage divider resistor R1, together with one end of the voltage divider resistor R2 and the low-frequency gain resistor R3, forms a voltage divider sampling node. The other end of the voltage divider resistor R2 is connected to GND. The reference terminal of the controllable voltage regulator U3 is connected to the voltage divider sampling node. The anode of the controllable voltage regulator U3 is connected to GND. The cathode of the controllable voltage regulator U3 is connected to the cathode of the light-emitting diode U2-A, one end of the dead zone compensation resistor R4 of the optocoupler, and one end of the low-frequency gain capacitor C7. The controllable voltage regulator U3 integrates a 2.5V reference voltage. The voltage of the voltage divider sampling node is compared with the internal reference in real time and fed back to the floating ground buck step-down control chip U1 through the optocoupler U2.

[0011] As a preferred embodiment of the present invention, in the feedback compensation module, the other end of the linear operating range setting resistor R5 of the optocoupler is connected to the other end of the dead zone compensation resistor R4 of the optocoupler and the anode of the light-emitting diode U2-A, the other end of the low-frequency gain resistor R3 is connected to the other end of the low-frequency gain capacitor C7, the collector of the phototransistor U2-B is connected to the loop compensation pin of the floating-ground buck control chip U1, the emitter of the phototransistor U2-B is connected to the reference ground pin of the floating-ground buck control chip U1, and the compensation capacitor C6 is connected in parallel between the collector and emitter of the phototransistor U2-B.

[0012] As a preferred embodiment of the present invention, the main power switching conversion module includes a main switch M1, a freewheeling diode D1, and an energy storage inductor L1. The main switch M1 is an N-type MOSFET. The gate of the main switch M1 is connected to the gate drive pin of the floating-ground buck control chip U1. The drain of the main switch M1 is connected to the positive input terminal VIN. The source of the main switch M1 is connected to the cathode of the freewheeling diode D1 through a peak current sampling module. The anode of the freewheeling diode D1 is connected to GND. One end of the energy storage inductor L1 is connected to the cathode of the freewheeling diode D1, and the other end of the energy storage inductor L1 is connected to the voltage output terminal.

[0013] As a preferred embodiment of the present invention, the floating buck buck control chip U1 charges the capacitor of the main power supply pin to the start-up voltage through the internal high-voltage self-powered circuit. Under the internal pull-up action, the voltage of the loop compensation pin of the floating buck buck control chip U1 gradually rises, and the gate drive pin starts to output the drive signal normally. The floating buck buck control chip U1 adopts the peak current control mode. In each switching cycle, the voltage of the peak current detection pin of the floating buck buck control chip U1 is sampled in real time and compared with the internal voltage divider signal of the loop compensation pin through the internal PWM comparator. When the voltage of the peak current detection pin is higher than the internal voltage divider signal of the loop compensation pin, the main switch M1 is immediately turned off.

[0014] As a preferred embodiment of the present invention, the floating buck control chip U1 automatically switches its operating mode according to the loop compensation pin voltage: when the loop compensation pin voltage is less than the COMP1 threshold voltage, the chip stops driving the output and the system enters standby mode; when the COMP1 threshold voltage is less than the loop compensation pin voltage and less than the COMP2 threshold voltage, the system enters a light load frequency reduction or hiccup operating mode to reduce the switching frequency and switching losses, thereby achieving low-power standby; when the COMP2 threshold voltage is less than the loop compensation pin voltage and less than the COMP3 threshold voltage, the system is in the normal voltage regulation operating range.

[0015] As a preferred technical solution of the present invention, when the output is overloaded or short-circuited, the output voltage drops, the loop compensation pin voltage rises rapidly to the COMP4 threshold voltage, and the floating buck buck control chip U1 determines that the fault is valid after a preset delay time and immediately shuts off the drive signal output to achieve overload and short-circuit protection.

[0016] As a preferred embodiment of the present invention, the input filtering module includes an input filtering electrolytic capacitor C1 and an input filtering ceramic capacitor C2. The input filtering electrolytic capacitor C1 and the input filtering ceramic capacitor C2 are connected in parallel, and one end of the input filtering electrolytic capacitor C1 and the input filtering ceramic capacitor C2 are connected to the positive terminal VIN of the input terminal, and the other end is connected to GND.

[0017] As a preferred embodiment of the present invention, the peak current sampling module is composed of a sampling resistor R6 and a peak current detection pin of a floating buck control chip U1; the sampling resistor R6 is connected in series between the source of the main switch M1 and the energy storage inductor L1, and the peak current detection pin is connected to the end of the sampling resistor R6 closest to the main switch M1, for collecting the peak current on the main switch M1.

[0018] As a preferred embodiment of the present invention, the output filtering module includes an output filtering electrolytic capacitor C3 and an output filtering ceramic capacitor C4 connected in parallel. One end of the parallel connection of the output filtering electrolytic capacitor C3 and the output filtering ceramic capacitor C4 is connected to the energy storage inductor L1 and the voltage output terminal, respectively, and the other end of the parallel connection of the output filtering capacitor C3 and the output filtering capacitor C4 is connected to GND.

[0019] The present invention has the following beneficial effects:

[0020] This invention employs a floating-ground buck converter architecture to design the control circuit, which can increase the input voltage support range to 500V, broadening the application scenarios of buck converter circuits and improving the limitations of traditional ground-based buck converter circuits in terms of input voltage levels. This solution uses an output voltage feedback circuit composed of a TL431 and an optocoupler to sample the output voltage in real time, improving the operational stability of the floating-ground buck converter system, increasing the accuracy of the output voltage, and accelerating the system's response to load changes. It also optimizes the no-load operation, reducing the system's no-load standby power consumption. Compared with traditional ground-based buck converter solutions, the floating-ground buck converter control chip of this invention has advantages in cost and input voltage withstand capability. The overall chip production cost is relatively lower, and it does not rely on high-end high-voltage semiconductor process platforms; chip design and manufacturing can be completed using only conventional BCD20V manufacturing processes. While achieving 500V high input voltage applications, it lowers the R&D and production threshold of the chip. The overall solution balances high input voltage withstand capability, stable output, low power consumption, and low cost, making it well-suited for high-voltage power supply applications and improving the overall performance and practicality of the floating-ground buck converter system. Attached Figure Description

[0021] Figure 1 This is a schematic diagram of a floating-ground buck converter circuit that uses capacitor sampling in the prior art.

[0022] Figure 2 This is a schematic diagram of a floating-ground buck converter circuit that uses a freewheeling resistance sampling method in the prior art.

[0023] Figure 3 This is a schematic diagram of the control circuit of a floating buck step-down system proposed in this invention;

[0024] Figure 4 This is a schematic diagram of the working timing of the high-voltage self-powered module of the chip of the present invention;

[0025] Figure 5 This is a schematic diagram of the system without self-powered function according to the present invention;

[0026] Figure 6 This is an internal functional block diagram of the control chip for the floating buck step-down system of the present invention;

[0027] Figure 7 This is a schematic diagram showing the correspondence between the COMP pin voltage and the drive signal in this invention;

[0028] Figure 8 This is a waveform diagram of the overload and short circuit protection mechanism of the present invention. Detailed Implementation

[0029] The technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments.

[0030] Before introducing the technical solutions described in this manual, a brief introduction will be given to the conventional output voltage sampling method of floating buck converters in the prior art:

[0031] There are two common methods for sampling the output voltage of a floating-ground buck converter. A simplified circuit diagram for the first sampling method can be found here. Figure 1 The specific connection relationship of this sampling method is as follows: one end of resistor R1 is connected to the FB feedback pin of the control chip U1, and the other end is connected to the sampling capacitor C6 and the cathode of diode D2; the other end of sampling capacitor C6 is connected to the VSS pin of the chip, and the anode of diode D2 is connected to the VOUT output terminal; one end of resistor R2 is connected to the FB pin, and the other end is connected to the VSS pin of the chip, and the VSS pin of the chip is connected to the freewheeling terminal of inductor L1 and the cathode of freewheeling diode D1; its working principle is as follows: during the freewheeling stage of inductor L1, diode D2 is turned on, feeding the output voltage VOUT back to sampling capacitor C6, and then the voltage of C6 is divided by the voltage divider network composed of R1 and R2, and the sampling signal is sent to the FB pin, which is compared with the internal reference voltage of the chip to complete the closed-loop voltage regulation control; in this scheme, the capacitance matching design of sampling capacitor C6 and output side filter capacitors C3 and C4 is extremely difficult. The charging and discharging timing and capacitance deviation of the two will directly cause the sampling voltage to fail to accurately reflect the true value of the output voltage, and the sampling accuracy is difficult to guarantee. At the same time, the debugging process of capacitor matching also greatly increases the complexity of research and development;

[0032] A simplified circuit diagram for the second sampling method is available for reference. Figure 2 The specific connection relationship of this sampling method is as follows: one end of resistor R1 is connected to the FB feedback pin of the control chip U1, and the other end is directly connected to the VOUT output terminal; one end of resistor R2 is connected to the FB pin, and the other end is connected to the VSS pin of the chip; the VSS pin of the chip is connected to the freewheeling terminal of inductor L1 and the cathode of freewheeling diode D1, and R1 and R2 form a series voltage divider network; its working principle is: only when MOSFET M1 is switched on and inductor L1 is in freewheeling mode can the voltage divider network collect the output voltage VOUT signal, which is sent to the FB pin and compared with the internal reference voltage of the chip, thereby adjusting the PWM duty cycle to achieve voltage regulation; this scheme has two major drawbacks: first, the system standby power consumption is relatively large. In order to ensure the continuity of sampling, the MOSFET needs to be in a high-frequency switching state continuously. Even when the load is in standby mode, the switching action cannot be stopped, which will cause unnecessary energy loss; second, the dynamic response performance is poor. Sampling can only be performed during the specific period of inductor freewheeling, which cannot capture the transient fluctuations of the output voltage in real time and is difficult to respond quickly to sudden load changes, resulting in insufficient dynamic adjustment capability of the system and large fluctuations in output voltage.

[0033] Therefore, please refer to the appendix. Figure 3 This invention provides a floating buck buck system control circuit, including a floating buck buck control chip U1, wherein the pins of the floating buck buck control chip U1 include:

[0034] HV: High-voltage self-powered input pin, directly connected to the converter input terminal VIN, integrates an internal high-voltage self-powered module, provides working power to the internal circuit of the chip without the need for an additional startup circuit, and realizes stable self-powered operation of the chip;

[0035] GATE: Gate drive pin, outputs PWM drive signal, used to directly drive the gate of main switch M1, and realizes power conversion and voltage regulation of buck converter by controlling the conduction and turn-off of main switch M1;

[0036] CS: Peak current detection pin, used to acquire the peak current of the main switch M1, realize cycle-by-cycle peak current limiting and overcurrent protection functions, and support current-mode PWM modulation to improve the system's transient response speed and loop stability;

[0037] VDD: The main power supply pin of the chip, which provides a stable power supply for all functional modules such as the PWM modulation circuit, comparator, and drive circuit inside the chip. Together with the high-voltage self-power supply module of the HV pin, it enables the chip to be powered independently.

[0038] VSS: Chip reference ground pin, which provides a potential reference for all circuits inside the chip.

[0039] COMP: Loop Compensation Pin. As the output of the error amplifier, it is used to connect an external compensation network to perform loop compensation on the control loop, optimize the system loop stability, suppress output oscillation and overshoot, and improve dynamic response performance.

[0040] The buck step-down control chip U1 adopts a hysteresis high-voltage self-powered control logic, eliminating the need for an additional high-voltage start-up power supply circuit. The floating buck step-down system control circuit proposed in this invention also includes an energy storage capacitor C5. The HV pin of the floating buck step-down control chip U1 is directly connected to the circuit input terminal VIN. The VDD pin of the floating buck step-down control chip is connected to the VSS pin after placing the ceramic energy storage capacitor C5. The VSS pin provides a potential reference for all circuits inside the chip.

[0041] Please refer to the appendix. Figure 4When the chip's VDD voltage is lower than the reset threshold VDD1, the chip resets and restarts, and the internal high-voltage self-powered module turns on, replenishing energy to VDD through the HV pin. When the VDD voltage rises to the start-up threshold VDD3, the chip completes startup, the self-powered module turns off, and the ceramic energy storage capacitor C5 continuously supplies power to the chip. When the VDD voltage drops to the hysteresis start-up threshold VDD2, the self-powered module turns on again to replenish energy to VDD. This cycle repeats, avoiding frequent switching of the self-powered module, reducing the chip's static power consumption, and ensuring stable power supply under full load conditions.

[0042] In addition, this solution also includes an input filtering module, which includes an input filtering electrolytic capacitor C1 and an input filtering ceramic capacitor C2. The input filtering electrolytic capacitor C1 and the input filtering ceramic capacitor C2 are connected in parallel, with one end connected to the input terminal VIN and the other end connected to the system ground GND. C1 is a large-capacity electrolytic capacitor and C2 is a high-frequency ceramic capacitor. Together, they form an input-side filtering network. After the circuit is powered on, the input voltage VIN passes through the filtering network formed by C1 and C2, which filters out high-frequency noise, voltage spikes, and low-frequency fluctuations on the input side, making the voltage input to the subsequent main power circuit and self-powered circuit smoother and more stable. This module can effectively suppress crosstalk from the input side to the subsequent circuits, improve the anti-interference capability of the entire system, and reduce the feedback noise of the switching action to the front-end power supply, ensuring that the main power conversion and chip power supply circuits operate in a more stable voltage environment.

[0043] It is worth mentioning that, please refer to the appendix. Figure 5 For general-purpose buck converter control chips without a high-voltage self-powered pin, this invention includes a high-voltage startup and auxiliary power supply module. This module includes diode D2, current-limiting resistor R7, and diode D3. The anode of diode D2 is connected to the input terminal VIN, and the cathode of diode D2 is connected to the VDD pin of buck converter control chip U1 via current-limiting resistor R7. The cathode of diode D3 is connected to the VDD pin of buck converter control chip U1, and the anode of diode D3 is connected to the output terminal. The two ends of energy storage capacitor C5 are connected to the VDD pin and VSS pin of buck converter control chip U1, respectively. This circuit provides a stable power supply to the control chip through a dual-path architecture of high-voltage startup on the input side and freewheeling power replenishment on the output side.

[0044] Furthermore, the floating buck bucking system control circuit of the present invention also includes:

[0045] The main power switching converter module consists of a floating-ground buck converter control chip U1, a main switch M1, a freewheeling diode D1, and an energy storage inductor L1. The main switch M1 is an N-type MOSFET, which can be externally mounted in the system or integrated into the control chip. The GATE drive pin of the floating-ground buck converter control chip U1 is connected to the gate of the main switch M1. The drain of the main switch M1 is connected to the input terminal VIN. The source of the main switch M1 is connected to one end of the sampling resistor R6 in the peak current sampling module; the other end of R6 is also connected to the freewheeling diode D1. The cathode of the circuit 1 is connected to one end of the energy storage inductor L1, and the anode of the freewheeling diode D1 is connected to GND. The other end of the energy storage inductor L1 is connected to the output terminal VOUT and the output filter module. The floating ground buck control chip U1 outputs a PWM drive signal through the GATE pin to control the main switch M1 to turn on and off. When the main switch M1 is on, the input energy is transferred to the energy storage inductor L1 and stored through the main switch M1 and the sampling resistor R6. When the main switch M1 is off, the energy storage inductor L1 continues to supply current to the output side through the freewheeling diode D1, realizing buck power conversion.

[0046] The peak current sampling module consists of a sampling resistor R6 and the CS current detection pin of the control chip U1. The sampling resistor R6 is connected in series between the source of the main switch M1 and the common node of the energy storage inductor L1 and the freewheeling diode D1. The CS pin of the floating buck control chip U1 is directly connected to the end of the sampling resistor R6 closest to the source of the main switch M1. This module is used to collect the peak current signal of the main power circuit. When the main switch M1 is turned on, the current flowing through the main power circuit generates a voltage drop across the sampling resistor R6. This voltage signal is sent to the CS pin. The chip detects the magnitude of the peak current based on this signal, realizing cycle-by-cycle current limiting protection and overcurrent protection. At the same time, the current signal is used to participate in the internal PWM modulation to form current mode control. This module can quickly respond to overcurrent and short-circuit faults, and promptly shut down the drive to protect the power devices, while improving the dynamic response speed and loop stability of the system.

[0047] The output filtering module includes an output filtering electrolytic capacitor C3 and an output filtering ceramic capacitor C4. The output filtering electrolytic capacitor C3 and the output filtering ceramic capacitor C4 are connected in parallel, with one end connected to the output terminal of the energy storage inductor L1 and the output terminal VOUT in the main power conversion module, and the other end connected to GND. During operation, C3, as a large-capacity electrolytic capacitor, realizes low-frequency energy storage and ripple suppression, while C4, as a high-frequency ceramic capacitor, filters out high-frequency ripple from the switch. The two work together to achieve full-band output ripple suppression. This module can effectively smooth the output voltage, reduce output noise, improve load capacity, and keep the output voltage stable under light and heavy load changes, further improving the overall voltage regulation accuracy of the system.

[0048] The feedback compensation module includes an optocoupler U2, a controllable voltage regulator U3 (TL431), voltage divider resistors R1 and R2, a low-frequency gain resistor R3, a dead-zone compensation resistor R4 for the optocoupler, a linear operating range setting resistor R5 for the optocoupler, a compensation capacitor C6, and a low-frequency gain capacitor C7. The optocoupler U2 includes an LED U2-A and a transistor U2-B, specifically divided as follows:

[0049] The output voltage divider sampling submodule consists of voltage divider resistors R1 and R2. One end of voltage divider resistor R1 is directly connected to the output terminal VOUT and is also connected to one end of the linear operating range setting resistor R5 of the optocoupler. The other end of R1 and one end of R2 are connected together to form a voltage divider sampling node. The other end of R2 is connected to the VSS pin of the chip. R1 and R2 divide the output voltage VOUT according to a set ratio to obtain a sampling voltage that is proportional to the output voltage. This sampling voltage is compared with the reference of the controllable voltage regulator U3 (TL431) and fed back to the control chip through the optocoupler. This submodule adopts a direct resistor voltage divider sampling method, which does not rely on the matching relationship between the sampling capacitor and the output capacitor. The sampling structure is simple and highly accurate, avoiding the sampling deviation problem caused by poor capacitor matching in traditional floating ground sampling.

[0050] The reference terminal of the controllable voltage regulator U3 (TL431) is connected to the common voltage divider sampling node of voltage divider resistors R1 and R2. The anode of U3 is directly connected to GND, and the cathode of U3 is connected to the cathode of optocoupler U2-A, one end of the dead-zone compensation resistor R4 of the optocoupler, and one end of the low-frequency gain capacitor C7. The TL431 integrates a 2.5V high-precision reference voltage, comparing the voltage of the voltage divider sampling node with the internal reference in real time. When the output voltage is too high, the sampling voltage is greater than 2.5V, and the cathode current of U3 increases; when the output voltage is too low, the cathode current decreases, thus converting the output voltage error into a linearly changing current error signal. This module has high reference accuracy and sensitive error response, enabling it to quickly capture minute fluctuations in the output voltage and provide accurate and stable error signals for closed-loop regulation.

[0051] The optocoupler transmission submodule consists of optocoupler U2, optocoupler dead-zone compensation resistor R4, and optocoupler linear operating range setting resistor R5. One end of the optocoupler linear operating range setting resistor R5 is connected to the output terminal VOUT, and the other end is connected to one end of the optocoupler dead-zone compensation resistor R4 and the anode of U2-A. The other end of R4 is connected to the cathode of U2-A and the cathode of U3. The collector of U2-B is connected to the COMP pin of the floating-ground buck control chip U1, and the emitter is connected to the VSS pin of the chip. The compensation capacitor C6 is connected in parallel between the collector and emitter of U2-B. The COMP pin is pulled up to the internal power supply by an internal resistor. The error current drives U2-A to emit light, causing U2-B to conduct accordingly and pull down the COMP pin voltage, realizing the voltage signal transmission between the output-side sampling circuit and the input-side control chip. This module fully realizes output voltage sampling and transmission, adapts to the floating-ground buck structure, solves the problem that the floating-ground buck architecture cannot sample the output voltage in real time, and improves the electrical safety and stability of the system.

[0052] The loop compensation submodule consists of a low-frequency gain resistor R3, a compensation capacitor C6, and a low-frequency gain capacitor C7. One end of the low-frequency gain resistor R3 is connected to the common voltage divider sampling node of R1 and R2, and the other end is connected to the low-frequency gain capacitor C7. The other end of C7 is connected to the cathode of U2-A, the common terminal of R4 and the cathode of U3, respectively. The capacitor C6 is connected in parallel across the optocoupler U2-B. This RC low-frequency gain network compensates for the phase and amplitude of the error signal and the feedback signal, optimizes the phase margin and gain margin of the system loop, suppresses oscillation, overshoot and high-frequency interference, and improves the dynamic response speed and stability of the system under sudden load changes. The compensation network has a simple structure and adjustable parameters, which can significantly improve the loop control characteristics, making the output voltage regulation smoother and the response faster.

[0053] The internal control and drive module of the chip contains all the functional units inside the floating-ground buck step-down control chip U1, including the internal reference, oscillator, PWM comparator unit, logic control unit, drive stage and COMP feedback processing unit. The chip receives feedback signals from the optocoupler through the COMP pin and peak current signals through the CS pin. Internally, the two signals are compared and combined with the oscillator clock to generate a PWM drive signal, which is output from the GATE pin to control the switching action of the main switch M1. At the same time, it implements self-powered start-stop control and overcurrent protection logic based on the VDD voltage. This module uniformly implements signal conditioning, PWM modulation, drive output and various protection functions to ensure the stable, reliable and efficient operation of the entire closed-loop system.

[0054] More specifically, the floating buck step-down control chip U1 charges the capacitor on the VDD pin to the startup voltage VDD3 through its internal high-voltage self-powered circuit. The voltage on the COMP pin gradually rises under the internal pull-up action, and the GATE pin begins to output the drive signal normally. The control chip adopts the peak current control mode. The voltage on the CS pin is sampled in real time during each switching cycle and compared with the internal voltage divider signal on the COMP pin through the internal PWM comparator. When the CS voltage is higher than the internal voltage divider signal on the COMP pin, the main switch M1 is immediately turned off.

[0055] The feedback pin COMP is pulled up to the internal power supply pin LVDD of the chip through an internal resistor. The output voltage is compared with the reference 2.5V of TL431 by voltage divider resistors R1 and R2. When the output voltage exceeds the design value, optocoupler U2-A will conduct, which will cause U2-B to pull down the feedback pin COMP voltage of the control chip, thereby adjusting the duty cycle, peak current and switching frequency to ensure the stability of the output voltage.

[0056] refer to Figure 7 The control chip automatically switches its operating mode based on the COMP pin voltage: when COMP voltage < COMP1, the chip stops driving the output and the system enters standby mode; when COMP1 < COMP < COMP2, the system enters a light-load frequency reduction or hiccup operating mode to reduce the switching frequency and switching losses, achieving low-power standby; when COMP2 < COMP < COMP3, the system is in the normal voltage regulation operating range, ensuring rapid stabilization and high-precision adjustment of the output voltage.

[0057] refer to Figure 8 When the output is overloaded or short-circuited, the output voltage will drop, and the COMP pin voltage will rise rapidly to the COMP4 threshold. After a preset delay, the chip will determine that the fault is valid and immediately shut off the drive signal output to achieve overload and short-circuit protection, avoid damage to power devices, and improve the reliability of system operation.

[0058] The above description is only a preferred embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any equivalent substitutions or modifications made by those skilled in the art within the scope of the technology disclosed in the present invention, based on the technical solution and inventive concept of the present invention, should be covered within the scope of protection of the present invention.

Claims

1. A floating buck step-down system control circuit, comprising a floating buck step-down control chip U1, a main power switching conversion module, a peak current sampling module, an input filtering module, and an output filtering module, wherein the main power switching conversion module, the peak current sampling module, the input filtering module, and the output filtering module are respectively connected to the floating buck step-down control chip U1, characterized in that, It also includes a feedback compensation module for real-time sampling of output voltage, accelerating the system's response speed to load changes, and reducing the system's no-load standby power consumption. The feedback compensation module is mainly composed of an optocoupler U2 and a controllable precision voltage regulator U3. One end of the feedback compensation module is connected to the loop compensation pin of the floating-ground buck step-down control chip U1 to transmit voltage data to the floating-ground buck step-down control chip U1 for subsequent compensation. The other end of the feedback compensation module is connected to the voltage output terminal.

2. The control circuit for a floating buck step-down system according to claim 1, characterized in that, The feedback compensation module also includes voltage divider resistor R1, voltage divider resistor R2, low-frequency gain resistor R3, optocoupler dead zone compensation resistor R4, optocoupler linear operating range setting resistor R5, compensation capacitor C6, and low-frequency gain capacitor C7. The optocoupler U2 consists of a light-emitting diode U2-A and a phototransistor U2-B. The optocoupler U2 is used to provide feedback on the output voltage and adjust the loop compensation pin voltage of the floating buck control chip U1. One end of the voltage divider resistor R1 is connected to the voltage output terminal and one end of the linear operating range setting resistor R5 of the optocoupler. The other end of the voltage divider resistor R1, together with one end of the voltage divider resistor R2 and the low-frequency gain resistor R3, forms a voltage divider sampling node. The other end of the voltage divider resistor R2 is connected to GND. The reference terminal of the controllable voltage regulator U3 is connected to the voltage divider sampling node. The anode of the controllable voltage regulator U3 is connected to GND. The cathode of the controllable voltage regulator U3 is connected to the cathode of the light-emitting diode U2-A, one end of the dead zone compensation resistor R4 of the optocoupler, and one end of the low-frequency gain capacitor C7. The controllable voltage regulator U3 integrates a 2.5V reference voltage. The voltage of the voltage divider sampling node is compared with the internal reference in real time and fed back to the floating ground buck step-down control chip U1 through the optocoupler U2.

3. The control circuit for a floating buck step-down system according to claim 2, characterized in that, In the feedback compensation module, the other end of the linear operating range setting resistor R5 of the optocoupler is connected to the other end of the dead zone compensation resistor R4 of the optocoupler and the anode of the light-emitting diode U2-A, the other end of the low-frequency gain resistor R3 is connected to the other end of the low-frequency gain capacitor C7, the collector of the phototransistor U2-B is connected to the loop compensation pin of the floating-ground buck control chip U1, the emitter of the phototransistor U2-B is connected to the reference ground pin of the floating-ground buck control chip U1, and the compensation capacitor C6 is connected in parallel between the collector and emitter of the phototransistor U2-B.

4. The control circuit for a floating buck step-down system according to claim 3, characterized in that, The main power switching converter module includes a main switch M1, a freewheeling diode D1, and an energy storage inductor L1. The main switch M1 is an N-type MOSFET. The gate of the main switch M1 is connected to the gate drive pin of the floating-ground buck control chip U1. The drain of the main switch M1 is connected to the positive input terminal VIN. The source of the main switch M1 is connected to the cathode of the freewheeling diode D1 through a peak current sampling module. The anode of the freewheeling diode D1 is connected to GND. One end of the energy storage inductor L1 is connected to the cathode of the freewheeling diode D1, and the other end of the energy storage inductor L1 is connected to the voltage output terminal.

5. The control circuit for a floating buck step-down system according to claim 4, characterized in that, The floating buck converter control chip U1 charges the capacitor of the main power supply pin to the startup voltage through the internal high-voltage self-powered circuit. Under the internal pull-up action, the voltage of the loop compensation pin of the floating buck converter control chip U1 gradually rises, and the gate drive pin starts to output the drive signal normally. The floating buck converter control chip U1 adopts the peak current control mode. In each switching cycle, the voltage of the peak current detection pin of the floating buck converter control chip U1 is sampled in real time and compared with the internal voltage divider signal of the loop compensation pin through the internal PWM comparator. When the voltage of the peak current detection pin is higher than the internal voltage divider signal of the loop compensation pin, the main switch M1 is immediately turned off.

6. The control circuit for a floating buck step-down system according to claim 5, characterized in that, The floating buck step-down control chip U1 automatically switches its operating mode based on the loop compensation pin voltage: when the loop compensation pin voltage is less than the COMP1 threshold voltage, the chip stops driving the output and the system enters standby mode. When the COMP1 threshold voltage is less than the loop compensation pin voltage and the COMP2 threshold voltage, the system enters a light-load frequency reduction or hiccup mode to reduce the switching frequency and switching losses, thereby achieving low-power standby. When the COMP2 threshold voltage is less than the loop compensation pin voltage and the COMP3 threshold voltage, the system is in the normal voltage regulation range.

7. The control circuit for a floating buck step-down system according to claim 6, characterized in that, When the output is overloaded or short-circuited, the output voltage drops, and the voltage of the loop compensation pin rises rapidly to the COMP4 threshold voltage. After a preset delay, the floating buck control chip U1 determines that the fault is valid and immediately shuts off the drive signal output to achieve overload and short-circuit protection.

8. The control circuit for a floating buck step-down system according to claim 7, characterized in that, The input filtering module includes an input filtering electrolytic capacitor C1 and an input filtering ceramic capacitor C2. The input filtering electrolytic capacitor C1 and the input filtering ceramic capacitor C2 are connected in parallel, and one end of the input filtering electrolytic capacitor C1 and the input filtering ceramic capacitor C2 are connected to the positive terminal VIN, and the other end is connected to GND.

9. The control circuit for a floating buck step-down system according to claim 8, characterized in that, The peak current sampling module consists of a sampling resistor R6 and a peak current detection pin of a floating buck control chip U1; The sampling resistor R6 is connected in series between the source of the main switch M1 and the energy storage inductor L1. The peak current detection pin is connected to the end of the sampling resistor R6 closest to the main switch M1 to collect the peak current on the main switch M1.

10. The control circuit for a floating buck step-down system according to claim 9, characterized in that, The output filtering module includes an output filtering electrolytic capacitor C3 and an output filtering ceramic capacitor C4 connected in parallel. One end of the parallel connection of the output filtering electrolytic capacitor C3 and the output filtering ceramic capacitor C4 is connected to the energy storage inductor L1 and the voltage output terminal, respectively, and the other end of the parallel connection of the output filtering capacitor C3 and the output filtering capacitor C4 is connected to GND.

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