Method of plsc decoder compatible with dvb-s2 / s2x

By using differential correlation and Hadamard matrix operations, PLSC decoding before carrier recovery is achieved, which solves the problems of high computational complexity and standard compatibility of existing methods, reduces hardware resource consumption, and achieves DVB-S2 and DVB-S2X compatible decoding.

CN122437751APending Publication Date: 2026-07-21NEBULA SATCOM TECH CO LTD
View PDF 0 Cites 0 Cited by

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
NEBULA SATCOM TECH CO LTD
Filing Date
2026-04-10
Publication Date
2026-07-21

AI Technical Summary

Technical Problem

Existing PLSC decoding methods have high computational complexity and consume a lot of hardware resources. They are incompatible with DVB-S2 and DVB-S2X standards and are sensitive to carrier phase, which causes the system to fail to start normally.

Method used

The differential correlation algorithm is used to eliminate static phase deviation, and the Hadamard matrix is ​​used to replace the Euclidean distance calculation. Compatible decoding of DVB-S2 and DVB-S2X is achieved through two parallel paths. The differential correlation and Hadamard matrix operations are used to reduce hardware resource consumption and realize frame start position detection.

Benefits of technology

Performing PLSC decoding independently before carrier recovery reduces hardware resource consumption, achieves compatible decoding for DVB-S2 and DVB-S2X standards, and breaks the circular dependency of carrier recovery.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN122437751A_ABST
    Figure CN122437751A_ABST
Patent Text Reader

Abstract

The application discloses a PLSC decoding method compatible with DVB-S2 / S2X, comprising the following steps: performing differential correlation processing on a baseband symbol sequence, and obtaining a frame starting position and a bit b7; performing descrambling processing on a PLSC segment; obtaining 32 complex symbols according to the b7 and the descrambled symbol preprocessing; multiplying the complex symbols by a Hadamard matrix through two parallel paths respectively, searching for a global maximum value, and obtaining MODCOD bits b5 to b1 and a standard identification bit b0; obtaining a bit b6 by using a SOF segment phase estimation, and generating a complete PLSC decoding result. The decoding process of the application does not need a multiplier and a square root operation, can be executed before carrier recovery, and is compatible with two standards of DVB-S2 and DVB-S2X under the same architecture.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] This invention relates to the field of satellite communication signal processing technology, and more specifically, to a method for a PLSC decoder compatible with DVB-S2 / S2X. Background Technology

[0002] DVB-S2 / S2X is a physical layer transmission standard for broadband satellite applications, widely used in satellite broadcasting, digital news gathering, and internet access. In the Adaptive Coding and Modulation (ACM) mode of DVB-S2 / S2X, the receiver needs to obtain parameter information such as modulation scheme, coding rate, frame length, and pilot signals by decoding the physical layer signaling PLSC before demodulating and decoding user data.

[0003] Existing PLSC decoding methods typically employ the minimum Euclidean distance criterion, calculating the Euclidean distance between the received symbol and each possible RM codeword, and selecting the codeword with the smallest distance as the decoding result. This method has the following drawbacks: First, calculating the Euclidean distance involves numerous multiplication and square root operations, resulting in significant computational delays and high hardware resource consumption, making efficient deployment in FPGAs or ASICs difficult. Second, existing methods are sensitive to carrier phase, requiring PLSC decoding to be performed only after carrier recovery is complete. Carrier recovery itself depends on the MODCOD and frame length information provided by the PLSC decoding result, creating a circular dependency that prevents the system from starting normally. Third, DVB-S2 and DVB-S2X differ in MODCOD bit width and RM encoding generation matrix; currently available PLSC decoding methods only support the DVB-S2 standard and are not compatible with the DVB-S2X standard. Summary of the Invention

[0004] This invention provides a physical layer signaling PLSC decoding method compatible with DVB-S2 / S2X, solving the technical problems in related technologies such as the inability to simultaneously support DVB-S2 and DVB-S2X standards, the influence of carrier phase error on the decoding process, and the inability to effectively determine the frame start position and complete PLSC bit information.

[0005] This invention discloses a physical layer signaling PLSC decoding method compatible with DVB-S2 / S2X, comprising: Differential operation is performed on the baseband symbol sequence after timing synchronization to eliminate static phase deviation in the received signal. The differential signal is correlated with the correlation coefficient of SOF segment and the correlation coefficient of PLSC segment respectively. The two correlation outputs are combined by addition and subtraction. The physical layer frame start position is determined according to the absolute value of the combination result. The 7th bit of MODCOD is obtained according to the relationship between the absolute values ​​of the addition and subtraction results. Based on the frame start position, physical layer frame header symbols are extracted from the baseband symbol sequence. The physical layer frame header is descrambled using the standard M sequence to extract 64 symbols of the PLSC segment. The 64 symbols of the descrambled PLSC segment are divided into odd-indexed symbol groups and even-indexed symbol groups according to their parity index. Based on the value of the 7th bit, the in-phase and quadrature components of the even-indexed symbol group are swapped and the symbols are inverted. The transformed even-indexed symbol group is merged with the odd-indexed symbol group to obtain 32 complex symbols. The 32 complex symbols are copied into two groups. For one group, the symbols at the corresponding index positions are inverted according to the first row element of the matrix generated by DVB-S2X. The other group is not processed. The real and imaginary parts of the two groups of symbols are independently multiplied by a 32-order Hadamard matrix to obtain four sets of transformation results. The absolute value of each element of the four sets of transformation results is calculated, and the global maximum value and its index are searched. Based on the index, the 5 bits of MODCOD are obtained through RM code inverse mapping. The standard identifier bits are obtained according to the path where the global maximum value is located. The initial phase deviation is estimated using SOF segment symbols and phase compensation is performed on the received symbols of PLSC segment. Based on the acquired bits, the 6th bit is assumed to be 0 to generate a test PLSC symbol sequence. The phase-compensated received symbols are multiplied symbol by symbol by symbol conjugate with the test sequence, and the real and imaginary parts are accumulated respectively. The 6th bit is determined according to the relationship between the real part accumulation value and the imaginary part accumulation value, and a complete 8-bit PLSC decoding result is generated.

[0006] Furthermore, the differential operation on the baseband symbol sequence after timing synchronization includes: performing conjugate multiplication on adjacent symbols, eliminating the static phase deviation term in the resulting differential signal, and retaining the phase term caused by the frequency deviation in the differential signal; the correlation coefficient of the SOF segment is a sequence of 25 coefficients, and the correlation coefficient of the PLSC segment is a sequence of 32 coefficients. The position corresponding to the larger absolute value of the summation and subtraction results is the frame start position.

[0007] Furthermore, the transformation rule for the even-numbered index symbol group is as follows: when the 7th bit is 0, the in-phase component and the quadrature component of the even-numbered index symbol are interchanged and the in-phase component is inverted; when the 7th bit is 1, the in-phase component and the quadrature component of the even-numbered index symbol are interchanged and the quadrature component is inverted. The above transformation restores the alternating phase rotation introduced by π / 2 BPSK modulation and uses the information of the 7th bit to complete the phase normalization compensation.

[0008] Furthermore, the elements of the 32nd order Hadamard matrix contain only 0 and 1. Multiplication of the matrix with the real or imaginary part of the symbol is achieved only through addition and subtraction operations, without using multipliers, dividers or square root operators. Multiplying the real and imaginary parts independently with the Hadamard matrix ensures that the unknown phase deviation only affects the energy distribution of each transform coefficient between the real and imaginary parts, without changing the index position corresponding to the global maximum value, thus making the decoding result unaffected by carrier phase error.

[0009] Furthermore, an unprocessed path is equivalent to decoding according to the 5-bit RM code of DVB-S2, and a path preprocessed by the first row of the DVB-S2X generator matrix is ​​equivalent to decoding according to the case where the extended bit of the 6-bit RM code of DVB-S2X is 1; when the global maximum value falls on the unprocessed path, the standard identifier bit is 0, indicating the DVB-S2 standard; when the global maximum value falls on the preprocessed path, the standard identifier bit is 1, indicating the DVB-S2X standard.

[0010] Furthermore, the inverse mapping relationship of the RM code is uniquely determined by the column structure of the RM encoding generation matrix in the DVB-S2 / S2X standard. The index input is the column index where the global maximum value is located, and the output is the corresponding 5-bit information sequence. This 5-bit information sequence, together with the 7th bit, the 6th bit, and the standard identifier bit, constitutes the complete 8-bit PLSC decoding result.

[0011] Furthermore, after the 6th bit decision is completed, the complete 8-bit PLSC decoding result is substituted into the RM encoding process to generate a complete PLSC reference symbol sequence. The correlation value of this reference sequence and the received symbol is calculated. When the correlation value is lower than the preset confidence threshold, the 6th bit is flipped and the correlation value is recalculated. The set with the larger correlation value is selected as the final 6th bit decision result.

[0012] Furthermore, the M-sequence is a 64-bit binary sequence, and the descrambling rules are as follows: the frame header symbol corresponding to the index position with a value of 0 in the M-sequence remains unchanged, and the frame header symbol corresponding to the index position with a value of 1 in the M-sequence is inverted; after descrambling, 64 symbols of the PLSC segment are extracted from the physical layer frame header as input for subsequent processing.

[0013] Furthermore, in the complete 8-bit PLSC decoding result, the standard identifier bit identifies the standard to which the signal belongs, and the remaining 7 bits contain MODCOD and TYPE information, thereby determining the signal's modulation method, LDPC coding rate, frame length, and pilot configuration, and providing the above information to the subsequent carrier recovery module and data demodulation and decoding module.

[0014] This invention discloses a physical layer signaling PLSC decoding system compatible with DVB-S2 / S2X, comprising: The differential correlation module is used to perform differential operations and correlation peak detection on the baseband symbol sequence, determine the physical layer frame start position and obtain the 7th bit of MODCOD; The descrambling module is used to extract physical layer frame header symbols based on the frame start position and complete descrambling using the M-sequence, extracting 64 symbols of the PLSC segment; The preprocessing module is used to perform parity grouping, transformation and merging of the descrambled PLSC segment symbols according to the 7th bit to obtain 32 complex symbols; The Hadamard transform decoding module is used to copy 32 complex symbols into two groups and perform inversion preprocessing or no processing on each group. The real and imaginary parts of the two groups of symbols are multiplied independently by the Hadamard matrix. The global maximum value of the four transform results is searched. The 5 bits of MODCOD and the standard identifier bits are obtained through RM code inverse mapping. The 6th bit decision module is used to estimate the phase deviation and compensate for the PLSC segment symbols using the SOF segment, generate a test PLSC symbol sequence, multiply it with the conjugate of the received symbol, accumulate the real and imaginary parts respectively, determine the 6th bit according to the size relationship of the accumulation results, and output the complete 8-bit PLSC decoding result.

[0015] The beneficial effects of this invention are as follows: This invention provides a method for a DVB-S2 / S2X compatible PLSC decoder, solving the technical problems of high computational complexity, circular dependency with carrier recovery, and incompatibility with the DVB-S2X standard in existing PLSC decoding methods. The method achieves the following technical effects: It employs a differential correlation frame synchronization algorithm to eliminate the influence of static phase deviation, enabling PLSC decoding to be executed independently before carrier recovery, breaking the circular dependency between the two; it uses a Hadamard matrix instead of Euclidean distance calculation, with matrix operations involving only addition and subtraction, eliminating the need for multipliers, dividers, or square root operators, thus reducing hardware resource consumption; and it uses two parallel paths combined with DVB-S2X generator matrix preprocessing, achieving compatible decoding and automatic identification of both DVB-S2 and DVB-S2X standards under the same decoding architecture. Attached Figure Description

[0016] Figure 1 This is a flowchart of a PLSC decoding method compatible with DVB-S2 / S2X provided in an embodiment of the present invention; Figure 2 This is a sub-flowchart of the DVB-S2 / S2X compatible PLSC decoding method provided in this embodiment of the invention, which multiplies the preprocessed complex symbol data with the Hadamard matrix through a parallel path and searches for the maximum value. Figure 3 This is a diagram of the signal processing structure of the present invention. Detailed Implementation

[0017] DVB-S2 / S2X is a physical layer transmission standard for broadband satellite applications, widely used in satellite broadcasting, digital news gathering, and internet access. In the Adaptive Coding and Modulation (ACM) mode of DVB-S2 / S2X, the transmitter dynamically adjusts the modulation scheme, coding rate, frame length, and pilot signals based on channel conditions. Before demodulating and decoding user data, the receiver needs to obtain these parameters by decoding the Physical Layer Signaling System (PLSC). The PLSC consists of MODCOD and TYPE, and after RM coding, data repetition, physical layer scrambling, and π / 2 BPSK modulation, it forms 64 symbols, which are included in the physical layer frame header.

[0018] Existing PLSC decoding methods suffer from the following technical problems: First, they require calculating the Euclidean distance between the received symbol and all possible RM codewords, selecting the codeword with the smallest distance as the decoding result. This process involves numerous multiplication and square root operations, resulting in significant computational delays and high hardware resource consumption, making efficient deployment in FPGAs or ASICs difficult. Second, existing PLSC decoding methods are sensitive to carrier phase, requiring PLSC decoding only after carrier recovery is complete. However, carrier recovery itself requires prior knowledge of the signal's MODCOD and frame length, information derived precisely from the PLSC decoding result, creating a circular dependency and preventing the system from starting normally. Third, DVB-S2 and DVB-S2X PLSC differ in MODCOD bit width and RM encoding generation matrix; DVB-S2 uses a 5-bit MODCOD, while DVB-S2X uses a 6-bit MODCOD. Currently, publicly available PLSC decoding methods only support the DVB-S2 standard and are not compatible with the DVB-S2X standard.

[0019] According to an embodiment of this implementation, a PLSC decoding method compatible with DVB-S2 / S2X is provided. This method is applied inside the demodulator of a satellite communication receiver and completes PLSC decoding before carrier recovery, providing the required modulation scheme, coding rate, frame length, and pilot information for subsequent carrier recovery and data demodulation decoding.

[0020] It should be understood that the method of this embodiment operates in the signal processing link of the satellite communication receiver. Before executing the method of this embodiment, the receiver has completed the following signal preprocessing: analog acquisition and conversion of the satellite radio frequency signal into a digital signal, shifting the digital signal to baseband via a digital downconverter (DDC), and adjusting the sampling rate to the symbol rate after downsampling and resampling processing. times ( (The value is a positive integer greater than 1). Furthermore, the receiver has completed timing synchronization using a timing offset estimation algorithm and an interpolation algorithm to obtain the IQ data at the optimal symbol sampling point, with a data rate equal to the symbol rate. This preprocessing provides the baseband symbol sequence for subsequent frame synchronization and PLSC decoding.

[0021] The steps of this implementation method are as follows: Step 1: Perform differential correlation processing on the baseband symbol sequence to obtain the physical layer frame start position and the 7th bit of MODCOD. Differential operations and correlation peak detection are performed on the baseband symbol sequence after timing synchronization to determine the start position of the DVB-S2 / S2X physical layer frame, and the high-order bits of MODCOD are extracted from the correlation results. .

[0022] The received signal after recovery is set as follows: in, For symbolic time index, To send symbols, For frequency deviation, For phase deviation, For channel noise, It is a natural constant. It is the imaginary unit.

[0023] Perform a difference operation on adjacent symbols to obtain the difference signal: in, The noise term after differentiation. This represents the conjugate operation. Differential operations eliminate static phase deviation. The influence of this makes subsequent processing insensitive to carrier phase.

[0024] The differential signal is correlated with the correlation coefficients of the SOF segment and the PLSC segment, respectively. The 25 correlation coefficients of the SOF segment are as follows: The 32 correlation coefficients for the PLSC segment are: The differential signal is output after passing through the SOF segment correlator: The differential signal is output after passing through the PLSC segment correlator: in, and This is the noise term. The correlation outputs of the SOF segment and the PLSC segment are added and subtracted respectively to obtain two combined results. The one with the larger absolute value is selected as the correlation peak value of frame synchronization. The position of this peak value is the physical layer frame start position.

[0025] By comparing the magnitudes of the two combined results above, the 7th bit of MODCOD is obtained. When the absolute value of the addition is greater than the absolute value of the subtraction, ;otherwise .

[0026] It should be noted that the phase insensitivity of the differential correlation processing described above refers to the fact that the differential operation eliminates the common-mode phase after multiplying adjacent symbols. To enable frame synchronization and The acquisition of [the data] does not depend on the completion of carrier recovery. Therefore, this step can be performed before carrier recovery.

[0027] Step 2: Based on the physical layer frame start position, descramble the PLSC segment of the physical layer frame header to obtain the descrambled PLSC baseband symbol. Based on the physical layer frame start position obtained in step 1, extract the symbol data corresponding to the physical layer frame header from the baseband symbol sequence. Descramble the physical layer frame header using the M-sequence specified in the DVB-S2 / S2X standard to obtain the descrambled physical layer frame header baseband symbols.

[0028] The M-sequence is a 64-bit binary sequence: The descrambling rules are as follows: for index positions in the M-sequence with a value of 0, the corresponding physical layer frame header symbol remains unchanged; for index positions in the M-sequence with a value of 1, the corresponding physical layer frame header symbol is inverted. After descrambling, 64 symbols of the PLSC segment are extracted from the physical layer frame header as input for subsequent processing.

[0029] Step 3: According to The descrambled PLSC baseband symbols are preprocessed to obtain 32 complex symbol data. The 64 symbols of the descrambled PLSC segment are divided into odd-indexed symbol groups according to their parity. and even index symbol group ,according to The values ​​are then transformed on the even-indexed symbol group, and the transformed even-indexed symbol group is merged with the odd-indexed symbol group to obtain 32 complex symbol data. .

[0030] The specific transformation rules are as follows: in, For even-indexed symbols, the in-phase component. These are the orthogonal components of even-indexed symbols. After merging, 32 complex symbols are obtained: It should be noted that the purpose of the above preprocessing is to restore the alternating phase rotation introduced by π / 2 BPSK modulation, and to utilize... The information is normalized and phase-compensated to the symbols, enabling subsequent Hadamard matrix operations to correctly extract the encoded information. This transformation compresses 64 real-valued symbols into 32 complex symbols, halving the dimension of subsequent matrix operations without loss of information.

[0031] Step 4: Multiply the preprocessed complex symbolic data with the Hadamard matrix through two parallel paths and search for the maximum value to obtain MODCOD. to and standard identifier bits The 32 complex number symbol data obtained in step 3 Copy into two groups, and denote them as follows: and .right No additional processing is required. According to the DVB-S2X generator matrix Process the first row of elements digit by digit: The index of the element that is 1 in the first row will be... Invert the sign at the corresponding index position; The index of the element that is 0 in the first row. The corresponding symbols remain unchanged.

[0032] It should be noted that, This is a 6×32 generator matrix for RM encoding in the DVB-S2X standard, where the first row is the DVB-S2X extended encoding row compared to DVB-S2. The above processing is equivalent to performing decoding preprocessing on the received symbols using the DVB-S2X extended encoding row, enabling the same set of Hadamard matrix operations to simultaneously cover PLSC decoding of both DVB-S2 and DVB-S2X standards.

[0033] Step 4 includes the following sub-steps: Step 401: Separately and The real and imaginary parts of the matrix are independent of the 32nd order Hadamard matrix. Multiply to obtain four sets of transformation results. , , , 32nd order Hadamard matrix Given a 32×32 binary matrix whose elements contain only 0 and 1. Let [the matrix be...] The real part (in-phase component) and the imaginary part (quadrature component) are related to... Multiply to obtain the transformation result and ; respectively The real and imaginary parts and Multiply to obtain the transformation result and Each transformation result is a vector of length 32.

[0034] It should be noted that, Since the elements of a matrix are only 0 and 1, matrix multiplication can be replaced by adders and subtractors in hardware: The position of an element equal to 1 corresponds to a subtraction operation, and the position of an element equal to 0 corresponds to an addition operation. This operation process does not require the use of multipliers, dividers, or square root operators. Furthermore, the real and imaginary parts are independently ANDed... Multiplication, rather than operating on the complex number as a whole, is a key processing method to make the decoding process insensitive to carrier phase. This is especially important when the received symbol has an unknown phase offset. When the phase deviation is distributed across the transformation results of the real and imaginary parts, the index position corresponding to the maximum value will not change due to the phase deviation, so the decoding result is not affected by the phase error.

[0035] Step 402: Calculate the absolute value of each element in the four sets of transformation results, and search for the global maximum value and its corresponding index among the four sets of absolute values. And the group identifier, to obtain MODCOD to and standard identifier bits To each , , , Take the absolute value of each element in the array and obtain the result. , , , Search for the global maximum value among the 128 elements in the four sets of absolute values. Record the index where the maximum value is located. ( This is the column index of the maximum value after Hadamard transformation (with a value range of 0 to 31) and the group it belongs to.

[0036] According to the index The 5 bits of MODCOD are obtained through the inverse mapping relationship of RM code. : in, This is the inverse mapping function from RM-encoded column indexes to information bits, with the index as its input. The output is the corresponding 5-bit information sequence. This inverse mapping relationship is uniquely determined by the column structure of the generator matrix of the RM encoding in the DVB-S2 / S2X standard.

[0037] Obtain the standard identifier bit based on the group containing the global maximum value. If the maximum value is located at or China (i.e.) (path), then This indicates that the received signal is the DVB-S2 standard; if the maximum value is at... or China (i.e.) (path), then This indicates that the received signal is the DVB-S2X standard.

[0038] It should be noted that the meanings of the two parallel paths mentioned above are as follows: Path not performed The preprocessing of the first line is equivalent to decoding according to the 5-bit RM code of DVB-S2; The path was performed The preprocessing of the first line is equivalent to decoding according to the case where the extended bit in the 6-bit RM code of DVB-S2X is 1. The path where the global maximum value falls indicates which standard the received signal belongs to, thus automatically completing the identification and compatible decoding of DVB-S2 and DVB-S2X.

[0039] Step 5: Based on the obtained , to Phase estimation and symbol correlation operations of the PLSC segment are performed using the SOF segment signal to obtain the 6th bit of MODCOD. Generate complete PLSC decoding results The initial phase deviation of the physical layer frame header is estimated using the SOF segment symbol signal after frame synchronization, and phase compensation is performed on the received symbols of the PLSC segment. Assume... , will have acquired Substituting the RM encoding and physical layer scrambling processes, the experimental PLSC symbol sequence is generated. The original PLSC segment received symbols obtained after frame synchronization. (After phase compensation) and the experimental PLSC symbol sequence Perform sign-by-sign conjugate multiplication to obtain the relevant vector: in, This indicates the conjugate operation. (The following is a list of operations on...) The real and imaginary parts are summed, with a lower bound of 0 and an upper bound of 63. in, For the relevant vector The element index, with a value range from 0 to 63; This indicates the operation of taking the real part; This indicates the operation of taking the imaginary part. It is obtained based on the relationship between the summation results. : At this point, the complete 8-bit PLSC decoding result has been obtained. .in, Identify the standard to which the signal belongs (DVB-S2 or DVB-S2X). It contains MODCOD and TYPE information, which determines the signal modulation method, LDPC coding rate, frame length, and pilot configuration.

[0040] In this embodiment of the application, in step 5 The acquisition of [data / information] can be further optimized to improve the reliability of the judgment. After the decision is made, the final obtained complete 8-bit PLSC decoding result can be substituted back into the RM encoding process to generate a complete PLSC reference symbol sequence, and a correlation value can be calculated with the received symbol. If this correlation value is lower than a preset confidence threshold, then... The correlation values ​​are then flipped and recalculated, with the set of values ​​showing the largest correlation value selected as the final result. The judgment result. This optimization reduces the impact of low signal-to-noise ratio conditions by introducing a verification step. The probability of misjudgment.

[0041] Technical effects of this embodiment The DVB-S2 / S2X compatible PLSC decoding method provided in this embodiment uses a differential correlation frame synchronization algorithm in step 1. The differential operation eliminates the static phase deviation in the received signal, making the detection of the frame start position and... The acquisition of the phase does not depend on the completion of carrier phase recovery, thus overcoming the circular dependency problem between existing PLSC decoding methods and carrier recovery, enabling PLSC decoding to be performed independently before carrier recovery.

[0042] Because the real and imaginary parts of the received symbol are multiplied independently by the Hadamard matrix in step 4, the unknown phase deviation changes the energy distribution ratio between the real and imaginary parts of each transform coefficient, but does not change the index position corresponding to the maximum value. Therefore, the decoding result is not sensitive to the carrier phase, further eliminating the dependence of PLSC decoding on carrier recovery.

[0043] Because the Hadamard matrix is ​​a binary matrix, matrix multiplication only involves addition and subtraction operations, and does not require multipliers, dividers or square root operators. Therefore, it overcomes the problems of high computational complexity and large hardware resource consumption caused by calculating Euclidean distance in existing methods, and can be deployed in FPGA or ASIC with fewer logic resources.

[0044] Because step 4 uses two parallel paths corresponding to the RM encoding structures of DVB-S2 and DVB-S2X respectively, a DVB-S2X generator matrix is ​​generated for one of the paths. The first line of preprocessing automatically identifies the signal standard based on the path containing the global maximum value. Therefore, it is compatible with both DVB-S2 and DVB-S2X standards for PLSC decoding under the same decoding architecture, overcoming the limitation of existing methods that only support the DVB-S2 standard.

[0045] This invention provides a PLSC decoding method compatible with DVB-S2 / S2X. Applied within the demodulator, PLSC decoding is used before carrier recovery to obtain the signal's modulation scheme, frame length, bit rate, and pilot signals. Subsequent carrier recovery modules can then correctly demodulate and decode based on this information.

[0046] S1: Digital Preprocessing: The satellite signal is acquired analogally and converted into a digital signal. Then, digital signal processing algorithms are used to perform digital down-conversion, downsampling, and resampling on the digital signal, making the sampling rate N times the symbol rate.

[0047] S2: Timing synchronization: The timing deviation is estimated using a symbol error detection algorithm, and then the timing deviation is compensated using an interpolation algorithm to achieve the optimal symbol sampling point for the data.

[0048] S3: Frame synchronization: Differential correlation is performed on the symbol data after timing synchronization, and then the peak value of the correlation peak is searched. The physical frame start position of the DVB-S2 / S2X signal can be determined by finding the maximum value.

[0049] S4: Physical frame header descrambling: After frame synchronization, the physical frame header can be descrambled to restore the baseband signal of the original physical frame header sent.

[0050] S5: Baseband data preprocessing: After obtaining the baseband signal of the physical frame header, the maximum peak value during frame synchronization is determined, and different algorithms are selected to preprocess the signal, ultimately obtaining 32 symbol data (IQ data).

[0051] S6: PLSC Decoding: The preprocessed baseband data is decoded using a decoding algorithm to extract the PLSC.

[0052] Furthermore, step S6 specifically includes: S61: Copy the data obtained in step S5 into two identical sets of data. One set is left unprocessed to obtain data set A. The other set of data is processed according to the following rules: obtain the index of the first row of matrix G2 where the data is 1, and invert the original data at the corresponding index to obtain data set B.

[0053] S62: Multiply the real and imaginary parts of data set A by a 32nd order Hardamard matrix (Equation 3) respectively to obtain data sets A1 and A2.

[0054] (3) S63: Multiply the real and imaginary parts of data set B by a 32nd order Hardamard matrix (Equation 3) respectively to obtain data sets B1 and B2; S64: Calculate the absolute value of A1, A2, B1, and B2 respectively, and search for the maximum absolute value to obtain the maximum absolute value. and its corresponding index , S65: Comparison The size of the value indicates the PLSC decoding result.

[0055] Example 1 The purpose of this embodiment is to provide a method for PLSC decoding compatible with DVB-S2 / S2X, capable of PLSC decoding of the DVB-S2 / S2X standard. The overall flow of the proposed method is as follows: Figure 3 As shown, the specific steps include: Step 1: First, initialize the system by performing analog acquisition of satellite signals, then use digital signal processing algorithms, including digital down-conversion and resampling. Reduce the sampling rate to 2.5 times the symbol rate.

[0056] Step 2: Timing synchronization is completed using the Farrow interpolation algorithm and the Gardner timing bias estimation algorithm to obtain the optimal sampling time for the symbols. The IQ data rate equals the symbol rate. Detailed reference designs are provided in the DVB-S2 / S2X standard documentation.

[0057] Step 3: After timed synchronization is complete, frame synchronization is required to obtain the initial data for the PLLEADER. The frame synchronization algorithm uses a cross-correlation algorithm, as shown below: The DVB-S2 / S2X standard provides a frame header detection method that utilizes the differential correlation algorithm of SOF and PLSC. This algorithm is insensitive to frequency offset. Assume the signal recovered by the receiver after timing after passing through the channel is: (4) In the formula For the transmitted signal, For frequency deviation, For phase deviation, This is channel noise.

[0058] The differential signal is as follows: (5) In the formula It's noise. From Figure 3 As can be seen from the structure diagram, the signal is first differentially divided, and then the differential data is stored using two shift registers. Next, the data in each shift register is multiplied by its corresponding coefficient, and then the results of SOF and PLSC are summed. Finally, the two results are added and subtracted, and the larger value is used as the correlation peak value for frame header detection.

[0059] The 25 correlator coefficients after differential SOF signal are: (6) After the differential data passes through the correlator, the SOF segment data and output are as follows: (7) The coefficients of the 32 correlations after differential processing of the PLSC signal are as follows: (8) After the differential data passes through the correlator, the PLSC segment data and output are as follows: (9) As shown above, the final output of the differential correlation structure is as follows: (10) For noise, the output Z is used as the correlation peak for detection. The magnitude of the value in the above equation is compared to the value in MODCOD. information.

[0060] (11) Step 4: After frame synchronization is complete, the initial data of a physical frame is obtained. The transmitter scrambles the physical frame header using an M-sequence. The receiver needs to descramble the physical frame header. The M-sequence is shown below: (12) For indices where the M-sequence is 0, the corresponding physical frame header data remains unchanged; for indices where the M-sequence is 1, the corresponding physical frame header data is inverted.

[0061] Step 5: The results obtained in step 3 are as follows. ,use The PLSC data segment in the descrambled physical frame header is processed as follows: (13) After processing using the above formula, we obtain 32 complex number symbol data. .

[0062] Step 6: Make a copy of the complex number symbol obtained in Step 5 to obtain the complex number symbol. Then process it as follows: 1) The data is multiplied by the corresponding elements of the first row of matrix G2. Since G2 is a binary matrix, a multiplier is not needed in the hardware implementation. The elements of G2 are 1. Invert the corresponding data; otherwise, leave it unchanged.

[0063] 2) The real and imaginary parts are multiplied by the matrix H in Equation 3, respectively. Since matrix H is a binary matrix, matrix multiplication in hardware implementation does not require a multiplier; only adders and subtractors are needed. If an element of H is 1, it's a subtraction; otherwise, it's an addition. Finally, we obtain... .

[0064] 3) To Find the absolute value. Find the maximum value and its coordinates. From this coordinate, we obtain 5 bits in MODCOD ( ), .

[0065] 4) The maximum value is at In the middle, then =0, otherwise The value is 1.

[0066] 5) The above steps have yielded the results. Next, we need to find... The initial phase deviation of the physical frame header is estimated using the signal from the SOF segment, and then the phase deviation is compensated. Assume... =0, get Calculate the PLSC symbol to obtain Then calculate . The PLSC symbol obtained after frame synchronization. Yes Perform conjugate operations. Further, for each... By summing the real and imaginary parts and then comparing their values, we can obtain... .

[0067] (14) In summary, PLSC decoding can be completed, and the final result can be obtained. . A value of 0 indicates a DVB-S2 signal; otherwise, it indicates a DVB-S2X signal.

[0068] (1) The present invention uses the real and imaginary parts of the IQ data to multiply with the Hardamard matrix respectively, which has the characteristics of being phase insensitive and having a small computation delay.

[0069] (2) This invention does not calculate the Euclidean distance during PLSC decoding, and does not require complex square root, multiplication and other operations. The Hardamard matrix is ​​a binary matrix, and the operation of multiplying with the matrix is ​​just an addition operation. Therefore, a lot of hardware resources can be saved in hardware implementation.

[0070] (3) This invention is compatible with both DVB-S2 and S2X communication standards. Prior to this invention, no publicly available PLSC decoding technology for the DVB-S2X standard was found.

[0071] The key point of this invention is: 1) Using the difference correlation algorithm, we obtain... and .in, For frequency deviation, This is noise. The MODCOD can be obtained by comparing the magnitudes of X and Y. .

[0072] 2) The PLSC segment symbol in the physical frame header needs to be based on... Perform preprocessing.

[0073] 3) The real and imaginary parts of the PLSC segment symbol data of the receiver are multiplied by a 32-order Hardamard matrix (H) respectively. Since matrix (H) is a binary matrix, matrix multiplication can be implemented using addition and subtraction in hardware. The absolute value of the calculated result is used to search for the maximum value; the coordinates of the maximum value are the decoding result of the PLSC. Phase errors in the received symbols have no impact on the decoding result.

[0074] 4) The calculation processes used in the key points mentioned above only require addition and subtraction and some simple logic resources in hardware implementation. They do not require resource-intensive operations such as multiplication, division, or square root extraction. Therefore, FPGA or ASIC hardware implementations require fewer resources.

[0075] The embodiments of the present invention have been described above. However, the embodiments are not limited to the specific implementation methods described above. The specific implementation methods described above are merely illustrative and not restrictive. Those skilled in the art can make more equivalent embodiments under the guidance of the present embodiments, and all of them are within the protection scope of the present embodiments.

Claims

1. A physical layer signaling PLSC decoding method compatible with DVB-S2 / S2X, characterized in that, Includes the following steps: Differential operation is performed on the baseband symbol sequence after timing synchronization to eliminate static phase deviation in the received signal. The differential signal is correlated with the correlation coefficient of SOF segment and the correlation coefficient of PLSC segment respectively. The two correlation outputs are combined by addition and subtraction. The physical layer frame start position is determined according to the absolute value of the combination result. The 7th bit of MODCOD is obtained according to the relationship between the absolute values ​​of the addition and subtraction results. Based on the frame start position, physical layer frame header symbols are extracted from the baseband symbol sequence. The physical layer frame header is descrambled using the standard M sequence to extract 64 symbols of the PLSC segment. The 64 symbols of the descrambled PLSC segment are divided into odd-indexed symbol groups and even-indexed symbol groups according to their parity index. Based on the value of the 7th bit, the in-phase and quadrature components of the even-indexed symbol group are swapped and the symbols are inverted. The transformed even-indexed symbol group is merged with the odd-indexed symbol group to obtain 32 complex symbols. The 32 complex symbols are copied into two groups. For one group, the symbols at the corresponding index positions are inverted according to the first row element of the matrix generated by DVB-S2X. The other group is not processed. The real and imaginary parts of the two groups of symbols are independently multiplied by a 32-order Hadamard matrix to obtain four sets of transformation results. The absolute value of each element of the four sets of transformation results is calculated, and the global maximum value and its index are searched. Based on the index, the 5 bits of MODCOD are obtained through RM code inverse mapping. The standard identifier bits are obtained according to the path where the global maximum value is located. The initial phase deviation is estimated using SOF segment symbols and phase compensation is performed on the received symbols of PLSC segment. Based on the acquired bits, the 6th bit is assumed to be 0 to generate a test PLSC symbol sequence. The phase-compensated received symbols are multiplied symbol by symbol by symbol conjugate with the test sequence, and the real and imaginary parts are accumulated respectively. The 6th bit is determined according to the relationship between the real part accumulation value and the imaginary part accumulation value, and a complete 8-bit PLSC decoding result is generated.

2. The method according to claim 1, characterized in that, Differential operation on the baseband symbol sequence after timing synchronization includes: conjugate multiplication of adjacent symbols, the static phase deviation term in the resulting differential signal is eliminated, and the phase term caused by frequency deviation is retained in the differential signal; the correlation coefficient of the SOF segment is a sequence of 25 coefficients, and the correlation coefficient of the PLSC segment is a sequence of 32 coefficients. The position corresponding to the larger absolute value of the summation and subtraction results is the frame start position.

3. The method according to claim 1, characterized in that, The transformation rule for the even-numbered index symbol group is as follows: when the 7th bit is 0, the in-phase component and quadrature component of the even-numbered index symbol are interchanged and the in-phase component is inverted; when the 7th bit is 1, the in-phase component and quadrature component of the even-numbered index symbol are interchanged and the quadrature component is inverted. The above transformation restores the alternating phase rotation introduced by π / 2 BPSK modulation and uses the information of the 7th bit to complete the phase normalization compensation.

4. The method according to claim 1, characterized in that, The elements of the 32nd order Hadamard matrix contain only 0 and 1. Multiplication of the matrix with the real or imaginary part of the symbol is achieved only through addition and subtraction operations, without using multipliers, dividers or square root operators. The real and imaginary parts are multiplied independently with the Hadamard matrix, so that the unknown phase deviation only affects the energy distribution of each transform coefficient between the real and imaginary parts, without changing the index position corresponding to the global maximum value, thus making the decoding result unaffected by carrier phase error.

5. The method according to claim 1, characterized in that, An unprocessed path is equivalent to decoding according to the 5-bit RM code of DVB-S2, and a path preprocessed by the first row of the DVB-S2X generator matrix is ​​equivalent to decoding according to the 6-bit RM code of DVB-S2X with the extended bit set to 1. When the global maximum value falls on an unprocessed path, the standard identifier bit is 0, indicating the DVB-S2 standard; when the global maximum value falls on a preprocessed path, the standard identifier bit is 1, indicating the DVB-S2X standard.

6. The method according to claim 1, characterized in that, The inverse mapping relationship of the RM code is uniquely determined by the column structure of the RM encoding generation matrix in the DVB-S2 / S2X standard. The index input is the column index where the global maximum value is located, and the output is the corresponding 5-bit information sequence. This 5-bit information sequence, together with the 7th bit, the 6th bit, and the standard identifier bit, constitutes the complete 8-bit PLSC decoding result.

7. The method according to claim 1, characterized in that, After the 6th bit decision is completed, the complete 8-bit PLSC decoding result is substituted into the RM encoding process to generate a complete PLSC reference symbol sequence. The correlation value of this reference sequence and the received symbol is calculated. When the correlation value is lower than the preset confidence threshold, the 6th bit is flipped and the correlation value is recalculated. The set with the larger correlation value is selected as the final 6th bit decision result.

8. The method according to claim 1, characterized in that, The M-sequence is a 64-bit binary sequence. The descrambling rules are as follows: the frame header symbol corresponding to the index position with a value of 0 in the M-sequence remains unchanged, and the frame header symbol corresponding to the index position with a value of 1 in the M-sequence is inverted. After descrambling, 64 symbols of the PLSC segment are extracted from the physical layer frame header as input for subsequent processing.

9. The method according to claim 1, characterized in that, In the complete 8-bit PLSC decoding result, the standard identifier bit identifies the standard to which the signal belongs, and the remaining 7 bits contain MODCOD and TYPE information, thereby determining the signal's modulation method, LDPC coding rate, frame length, and pilot configuration, and providing the above information to the subsequent carrier recovery module and data demodulation and decoding module.

10. A DVB-S2 / S2X compatible physical layer signaling PLSC decoding system, used to perform the method according to any one of claims 1 to 9, characterized in that, include: The differential correlation module is used to perform differential operations and correlation peak detection on the baseband symbol sequence, determine the physical layer frame start position and obtain the 7th bit of MODCOD; The descrambling module is used to extract physical layer frame header symbols based on the frame start position and complete descrambling using the M-sequence, extracting 64 symbols of the PLSC segment; The preprocessing module is used to perform parity grouping, transformation and merging of the descrambled PLSC segment symbols according to the 7th bit to obtain 32 complex symbols; The Hadamard transform decoding module is used to copy 32 complex symbols into two groups and perform inversion preprocessing or no processing on each group. The real and imaginary parts of the two groups of symbols are multiplied independently by the Hadamard matrix. The global maximum value of the four transform results is searched. The 5 bits of MODCOD and the standard identifier bits are obtained through RM code inverse mapping. The 6th bit decision module is used to estimate the phase deviation and compensate for the PLSC segment symbols using the SOF segment, generate a test PLSC symbol sequence, multiply it with the conjugate of the received symbol, accumulate the real and imaginary parts respectively, determine the 6th bit according to the size relationship of the accumulation results, and output the complete 8-bit PLSC decoding result.