Communication module reliability detection system

Abstract

The embodiment of the application relates to the technical field of wireless communication testing, and discloses a communication module reliability detection system, which comprises a module adaptation bottom plate, a test control module and a power supply module; the module adaptation bottom plate is used for fixing a communication module to be tested; the test control module is used for monitoring and reading test data of the communication module, and judging whether the working state of the communication module is normal; the test control module is at least integrated with a central processor load test module, which is used for issuing a central processor load test instruction; the communication module executes central processor load adjustment, junction temperature collection and dynamic load adjustment operations based on the central processor load test instruction, and outputs central processor load test data, so as to verify the reliability of the central processor. The power supply module is used for supplying power for the whole detection system and the communication module to be tested. The application can accurately detect problems such as central processor load fluctuation and excessive junction temperature, and screen out communication modules that do not meet the requirements of vehicle regulations.

Description

Technical Field

[0001] This invention relates to the field of wireless communication testing technology, and more specifically to a communication module reliability testing system. Background Technology

[0002] With strong government support for the development of vehicle connectivity and intelligence, communication modules have been rapidly deployed in the market and have become an indispensable part of automobiles, playing an increasingly important role in autonomous driving and assisted navigation.

[0003] The rapid development of communication demands has closely integrated the communication industry with the vehicle industry. Currently, the communication module and chip industry is designed according to automotive standards, but there is a lack of effective testing methods. It is difficult to accurately detect problems such as central processing unit load fluctuations and excessive junction temperature, making it difficult to screen out unqualified communication modules that do not meet automotive standards. This has led to such modules entering the market, causing huge usage risks to vehicle customers and failing to meet the quality requirements of the vehicle industry for communication modules. Summary of the Invention

[0004] In view of the shortcomings of the prior art, the purpose of this application is to provide a communication module reliability testing system that can accurately detect problems such as central processing unit load fluctuations and junction temperature exceeding the standard, and screen out communication modules that do not meet automotive-grade requirements.

[0005] In a first aspect, the communication module reliability testing system of the present invention includes a module adapter baseboard, a test control module and a power supply module;

[0006] The module adapter base plate is used to fix the communication module to be tested and to provide the peripheral hardware support required for the normal operation of the communication module.

[0007] The test control module is used to monitor and read the test data of the communication module to determine whether the communication module is working properly. The test control module integrates at least a central processing unit (CPU) load test module, which is used to issue CPU load test commands. Based on the CPU load test commands, the communication module performs CPU load adjustment, junction temperature acquisition, and dynamic load adjustment operations, and outputs CPU load test data. The CPU load test data includes at least one of the following: real-time CPU utilization data, chip junction temperature value, load adjustment record, and CPU function operation status data, thereby verifying the reliability of the CPU.

[0008] The power supply module is used to supply power to the entire testing system and the communication module to be tested.

[0009] The above technical solution establishes a basic architecture for communication module reliability testing. A module adapter baseplate ensures stable fixation and external support for the module under test, guaranteeing a consistent testing environment. A central processing unit (CPU) load testing module accurately captures the CPU's operating status under different loads and junction temperatures, promptly identifying issues such as abnormal CPU load regulation, excessively high junction temperatures, or unstable operation. This ensures the basic operational reliability of the communication module from the core computing component level. A stable power supply module provides continuous and stable power support throughout the testing process, avoiding test errors caused by power fluctuations and ensuring the accuracy and reliability of the test results. This provides core foundational support for the quality screening of communication modules.

[0010] In one possible implementation, the test control module further integrates a flash memory read / write test module, which is used to issue flash memory read / write test commands. Based on the flash memory read / write test commands, the communication module performs flash memory partitioning and storage block erase / write cycle operations, and outputs flash memory read / write test data. The flash memory read / write test data includes at least one of the following: the number of erase / write completions for each storage block, read / write error data, data verification results, and read / write rate data under high and low temperatures. This verifies the read / write reliability and storage stability of the flash memory module under high and low temperature environments.

[0011] The above technical solution includes a dedicated reliability testing function for the flash memory module. Through tests that simulate real-world usage scenarios, such as flash memory partitioning and storage block erase / write cycles, the lifespan and read / write stability of the flash memory can be comprehensively evaluated.

[0012] In one possible implementation, the test control module further integrates a power amplifier strong transmit / receive test module, which is used to issue power amplifier strong transmit / receive test commands. Based on the power amplifier strong transmit / receive test commands, the communication module performs full-band frequency sweep and strong transmit / receive operations for various mobile communication standard frequency bands, and outputs power amplifier strong transmit / receive test data. The power amplifier strong transmit / receive test data includes at least one of the following: transmit and receive signal strength for each frequency band, real-time transmit power value, data packet transmission and reception statistics, and packet loss data, thereby verifying the reliability of the power amplifier's strong transmit / receive performance and the quality of the power amplifier chip.

[0013] In the above technical solution, special testing is carried out on the power amplifier, the core radio frequency component of the communication module. Through full-band frequency sweep and multi-standard frequency band strong transmission and strong reception tests, the signal transmission and reception capabilities and power stability of the power amplifier under different frequency bands can be fully verified. By monitoring indicators such as transmission power and packet loss data in real time, problems such as power amplifier chip performance degradation and signal transmission and reception abnormalities can be detected in a timely manner.

[0014] In one possible implementation, the test control module also integrates a serial gigabit media independent interface and a simplified gigabit media independent interface physical layer chip loopback test module.

[0015] The loopback test module (304) of the physical layer chip of the serial gigabit media independent interface and the simplified gigabit media independent interface is used to issue loopback test commands; the communication module performs loopback test operations based on the loopback test commands and outputs loopback test data. The loopback test data includes at least one of the following: interface connectivity status, transmission throughput, bidirectional forwarding time and data packet loss statistics, thereby verifying the reliability of the wireless LAN chip and the corresponding interface.

[0016] The above technical solution enables specialized reliability testing of wireless LAN chips and their corresponding interfaces. By simulating the entire data transmission process through loopback testing, it can accurately detect interface connectivity, data transmission efficiency, and stability. By monitoring indicators such as transmission throughput, forwarding time, and packet loss rate, it can promptly identify problems such as poor interface contact and abnormal chip transmission performance.

[0017] In one possible implementation, the test control module further integrates a secure digital input / output (SDI) interface external embedded multimedia card read / write test module. This module is used to issue SDI interface external embedded multimedia card read / write test commands. Based on these commands, the communication module executes file read / write test operations and outputs SDI interface external embedded multimedia card read / write test data. This data includes at least one of the following: file read / write success rate, read / write speed, interface communication status, and performance indicators from each test, thereby verifying the read / write reliability of the SDI interface and the embedded multimedia card storage device.

[0018] In the above technical solution, a special test is conducted on the reliability of the collaborative operation of the secure digital input / output interface and the external embedded multimedia card. By simulating actual data storage and reading scenarios through file read / write tests, the compatibility and read / write stability of the interface and storage device can be comprehensively evaluated. By monitoring the read / write success rate, speed and interface communication status, problems such as poor interface contact and storage device read / write failures can be detected in a timely manner.

[0019] In one possible implementation, the test control module further integrates a high-speed serial peripheral interconnect interface function test module, which is used to start the wireless LAN chip connected through the high-speed serial peripheral interconnect interface on the module adapter baseboard. During the test, the throughput of the high-speed serial peripheral interconnect interface is detected and must meet the preset throughput requirements. If the wireless LAN chip startup time exceeds the preset duration, data packet loss occurs, or the throughput does not meet the preset requirements during the test, the high-speed serial peripheral interconnect interface function reliability test is deemed to have failed.

[0020] The above technical solution realizes the special functional reliability test of the high-speed serial peripheral interconnect interface. By simulating the actual working scenario of the interface, the connectivity, data transmission efficiency and collaborative working capability with the wireless LAN chip can be accurately evaluated. By monitoring indicators such as chip startup time, packet loss statistics and throughput, problems such as interface function abnormality and transmission performance degradation can be detected in a timely manner.

[0021] In one possible implementation, the test control module also integrates a general-purpose input / output interface test module, which is used to control the input / output expansion chip on the module adapter baseboard through the communication interface to control multiple general-purpose input / output interfaces to perform level switching at a preset frequency. At the same time, it reads the level echo status of the general-purpose input / output interfaces through the communication interface to verify that the level switching success rate of the general-purpose input / output interfaces reaches a preset standard, thereby verifying the functional reliability of the general-purpose input / output interfaces.

[0022] In the above technical solution, a special test is conducted on the basic interactive interface of the general input / output interface module. By simulating the actual control and response scenarios of the interface through level flipping test, the response speed, control accuracy and stability of the interface can be comprehensively evaluated. By monitoring the level flipping frequency, success rate and consistency, problems such as abnormal interface level and response delay can be detected in a timely manner.

[0023] In one possible implementation, the test control module further integrates a power-on / off control test module, which is used to perform power-on / off operations of the communication module at a preset frequency within the test cycle, synchronously detect the startup status and function recovery status of the communication module after each power-on / off, and verify the reliability of the communication module's power-on / off startup and surge protection.

[0024] The above technical solution adds a reliability testing function for power-on / off and surge protection of the communication module. Through multiple power-on / off cycle tests, the start-up and shutdown scenarios in actual use of the communication module can be simulated to comprehensively evaluate the module's startup stability and functional recovery capability. By monitoring the surge protection status, the protection performance of the communication module under power fluctuations and surge impacts can be verified.

[0025] In one possible implementation, the test control module further integrates a working mode switching test module, which is used to perform switching operations between the CFUN0 mode and the CFUN1 mode of the communication module at a preset frequency during the test, and to detect the response speed, switching success rate and functional stability of the communication module after each mode switch, thereby verifying the reliability of the working mode switching of the communication module; CFUN0 is to disable the radio frequency function of the communication module, and CFUN1 is the normal network-connected working mode with all functions enabled.

[0026] In the above technical solution, a special test is conducted on the reliability of switching between multiple working modes of the communication module. By simulating mode switching scenarios in actual use, the switching response speed, switching stability and functional recovery capability of the module after switching can be accurately evaluated. By monitoring the switching success rate and functional operation status, problems such as mode switching lag, switching failure and functional abnormality after switching can be detected in a timely manner.

[0027] In one possible implementation, the test control module also integrates a rate transmission test module, which is used to test the rate transmission performance of the communication module in high temperature and low temperature environments, respectively, to ensure that the transmission rate reaches the preset standard and that there is no obvious packet loss or stuttering during the transmission process, thereby verifying the transmission reliability of the communication module.

[0028] The above technical solution enables comprehensive testing of the reliability of data transmission of the communication module. By simulating transmission scenarios under different environments, the transmission rate, stability and anti-interference capability of the module in various scenarios can be accurately evaluated. By monitoring the number of packet losses and the duration of lag, problems such as transmission performance degradation and insufficient anti-interference capability can be detected in a timely manner. Attached Figure Description

[0029] To more clearly illustrate the technical solutions in the embodiments of this application or the background art, the accompanying drawings used in the embodiments of this application will be described below.

[0030] Figure 1 This is a block diagram of a communication module reliability testing system disclosed in an embodiment of this application;

[0031] Figure 2 This is a schematic diagram of the module adapter base plate disclosed in the embodiments of this application;

[0032] Figure 3 This is a block diagram of the test control module disclosed in an embodiment of this application;

[0033] Figure 4 This is a flowchart of a communication module reliability testing method disclosed in an embodiment of this application;

[0034] Explanation of reference numerals in the attached figures:

[0035] 1. Power Supply Module; 2. Host Computer; 3. Test Control Module; 301. Central Processing Unit Load Test Module; 302. Flash Memory Read / Write Test Module; 303. Power Amplifier Strong Transmission / Reception Test Module; 304. Serial Gigabit Media Independent Interface and Simplified Gigabit Media Independent Interface Physical Layer Chip Loopback Test Module; 305. Secure Digital Input / Output Interface External Embedded Multimedia Card Read / Write Test Module; 306. High-Speed ​​Serial Peripheral Interconnection Interface Function Test Module; 307. General Purpose Input / Output Interface Test Module; 308. Power-On / Off Control Test Module; 309. Working Mode Switching Test Module; 310. Rate Transmission Test Module; 311. Universal Serial Bus External Universal Serial Bus Flash Disk Read / Write Test Module; 312. User Identification Card Card Identification and Reading Test Module; 4. Module Adaptor Backplane. Detailed Implementation

[0036] The embodiments of this application will be described in further detail below with reference to the accompanying drawings and examples. The detailed description of the following embodiments and the accompanying drawings are used to illustrate the principles of this application by way of example, but should not be used to limit the scope of this application, that is, this application is not limited to the described embodiments.

[0037] Please see Figure 1 , Figure 1 This is a schematic diagram of a communication module reliability testing system disclosed in an embodiment of this application. The communication module reliability testing system includes a module adapter board (BIB) 4, a test control module 3, and a power supply module 1. The module adapter board 4 is used to fix the communication module to be tested and to provide the peripheral hardware support required for the normal operation of the communication module. Test control module 3 is used to monitor and read test data from the communication module to determine whether the communication module is operating normally. Test control module 3 integrates at least a Central Processing Unit (CPU) load test module 301, which is used to issue CPU load test commands. Based on the CPU load test commands, the communication module performs CPU load adjustment, junction temperature acquisition, and dynamic load adjustment operations (specifically, controlling the CPU utilization rate within a preset reasonable range, configuring intensive multi-tasking and cyclic operation mechanisms to stabilize the CPU load, acquiring its own junction temperature in real time, keeping the peripheral load unchanged when the junction temperature exceeds a preset temperature threshold, reducing the CPU load and controlling the junction temperature by reducing idle threads), and outputs CPU load test data. The CPU load test data includes at least one of the following: real-time CPU utilization rate data, chip junction temperature value, load adjustment records, and CPU functional operation status data, thereby verifying the reliability of the CPU. Power supply module 1 is used to power the entire testing system and the communication module under test.

[0038] During testing, the communication module is placed inside a high-low temperature chamber, which provides the necessary high and low temperature environment for testing. Simultaneously, a communication connection is established between the test control module 3 and the host computer 2. The host computer 2, which can be a computer, is used to issue test configuration parameters and start / stop commands, receive and aggregate various test data, visually display the module's operating status, CPU load, and chip junction temperature information, perform test data analysis and judgment, and generate test logs and test reports, achieving unified management and result output throughout the entire testing process.

[0039] This application establishes the basic architecture for reliability testing of communication modules. The module adapter base plate 4 provides stable fixation and external support for the module under test, ensuring a consistent testing environment. The CPU load testing module accurately captures the CPU's operating status under different loads and junction temperatures, promptly identifying issues such as abnormal CPU load regulation, excessively high junction temperatures, or unstable operation. This ensures the basic operational reliability of the communication module from the core computing component level. The stable power supply module 1 provides continuous and stable power support throughout the testing process, avoiding test errors caused by power supply fluctuations and ensuring the accuracy and reliability of the test results. This provides core foundational support for the quality screening of communication modules.

[0040] Please see Figure 2 , Figure 2 This is a schematic diagram of the module adapter base plate disclosed in the embodiments of this application.

[0041] In one possible embodiment, the module adapter base plate 4 is a carrier base plate for fixing the communication module. The BIB board is provided with plug-in interfaces for installing the fixed communication module (such as: Secure Digital Input and Output (SDIO), Universal Serial Bus (USB), Subscriber Identity Module (SIM) card slot, Serial Gigabit Media Independent Interface (SGMII), Reduced Gigabit Media Independent Interface (RGMII), Peripheral Component Interconnect Express (PCIE), General Purpose Input Output (GPIO), IIC (Inter-Integrated Circuit), and various peripheral functional devices for ensuring the normal operation of the communication module. The peripheral functional devices include Subscriber Identity Module (SIM), Input / Output (I / O) chips, Wireless Fidelity Chip (WiFi) chips, and Wireless Local Area Network (WLAN) chips. At least one of the following: Layer (PHY) chip, Universal Serial Bus flash drive (e.g., USB flash drive), and embedded multimedia card storage device.

[0042] This application enables rapid disassembly and positioning of communication modules by setting standardized plug-in interfaces on the BIB board. It fully replicates the actual application peripheral circuit environment of the communication module with a variety of peripheral functional components, which fully meets the functional testing needs of various peripheral devices. The corresponding peripheral device test can be completed without the need for additional auxiliary test equipment, effectively ensuring that the test conditions are close to the actual use scenario, further improving the accuracy of the test results. At the same time, it can flexibly adapt to communication modules with different functional configurations to carry out testing, thus broadening the applicable testing range of the system.

[0043] In one possible embodiment, the module adapter baseboard 4 is used to control the testing and data reading of multiple communication modules, and the module adapter baseboard 4 establishes a connection with each communication module through a communication interface (such as Universal Asynchronous Receiver / Transmitter (UART), Serial Peripheral Interface (SPI), Inter-Integrated Circuit (IIC), etc.).

[0044] This application enables centralized management of multiple communication modules to conduct simultaneous testing on a single module adapter baseboard, significantly improving the efficiency of batch testing of communication modules. It establishes a stable and reliable data interaction link based on a dedicated communication interface, ensuring real-time and accurate issuance of test commands and transmission of test data. This achieves unified scheduling and management of the multi-module testing process, reduces manual operation input, and realizes large-scale and automated batch reliability testing.

[0045] Please see Figure 3 , Figure 3 This is a block diagram of the test control module disclosed in an embodiment of this application.

[0046] In one possible embodiment, the test control module 3 further integrates a NAND Flash (NAND) read / write test module 302, a power amplifier strong transmit / receive test module 303, a Serial Gigabit Media Independent Interface (SGMII) and Reduced Gigabit Media Independent Interface (RGMII) physical layer chip (PHY) loopback test module 304, a Secure Digital Input and Output (SDIO) external embedded Multi Media Card (EMMC) read / write test module 305, a Peripheral Component Interconnect Express (PCIE) functional test module 306, a General Purpose Input Output (GPIO) test module 307, a power-on / off control test module 308, a working mode switching test module 309, a rate transmission test module 310, and a Universal Serial Bus (USB) test module. One or more of the following: a USB flash drive (or USB flash drive) read / write test module 311 and a SIM card identification and reading test module 312.

[0047] In one possible embodiment, the flash memory read / write test module 302 is used to issue flash memory read / write test commands; the communication module, based on the flash memory read / write test commands, performs flash memory partitioning and storage block erase / write cycle operations (specifically, it divides its own flash memory module into a preset number of storage blocks, performs erase / write cycles at corresponding frequencies according to the storage block type, and completes the operation under high and low temperature environments), and outputs flash memory read / write test data. The flash memory read / write test data includes at least one of the following: the number of erase / write completions for each storage block, read / write error data, data verification results, and read / write rate data under high and low temperature environments; thereby verifying the read / write reliability and storage stability of the flash memory module under high and low temperature environments.

[0048] In one possible embodiment, the power amplifier strong transmit / receive test module is used to issue power amplifier strong transmit / receive test commands; the communication module, based on the power amplifier strong transmit / receive test commands, performs full-band frequency sweep and strong transmit / receive operations for various mobile communication standard frequency bands (the strong transmit operation sends at its maximum power, and the transmit power is reduced by a preset percentage when packet loss occurs), and outputs power amplifier strong transmit / receive test data. The power amplifier strong transmit / receive test data includes at least one of the following: transmit and receive signal strength of each frequency band, real-time transmit power value, data packet transmit and receive statistics, and packet loss data, thereby verifying the reliability of the power amplifier's strong transmit / receive performance and the quality of the power amplifier chip.

[0049] In one possible embodiment, the loopback test module 304 for the serial gigabit media independent interface and the simplified gigabit media independent interface physical layer chip is used to issue loopback test commands for the serial gigabit media independent interface and the simplified gigabit media independent interface physical layer chip. Based on the loopback test commands for the serial gigabit media independent interface and the simplified gigabit media independent interface physical layer chip, the communication module executes a loopback test operation (specifically, it calls its own wireless LAN register through the Management Data Input / Output (MDIO) interface, performs a loopback test according to a preset mode and preset throughput requirements; if the number of wireless LAN chips used for testing is preset, it performs a full-duplex forwarding operation according to preset grouping rules, and simultaneously receives data transmitted by the wireless LAN register and records the number of lost packets), and outputs loopback test data. The loopback test data includes at least one of the following: interface connectivity status, transmission throughput, bidirectional forwarding time, and data packet loss statistics, thereby verifying the reliability of the wireless LAN chip and the corresponding interface.

[0050] In one possible embodiment, the Secure Digital Input / Output Interface (SDI) external embedded multimedia card read / write test module 305 is used to issue SDI / embedded multimedia card read / write test commands. Based on these commands, the communication module performs file read / write test operations (specifically, by using the embedded multimedia card storage device mounted on the module adapter baseboard 4 as a load, it performs file write and read operations to complete one read / write test cycle, and repeats this cycle at preset intervals and times under high and low temperature environments). It then outputs SDI / embedded multimedia card read / write test data, which includes at least one of the following: file read / write success rate, read / write speed, interface communication status, and performance indicators for each test, thereby verifying the read / write reliability of the SDI / embedded multimedia card storage device.

[0051] In one possible embodiment, the high-speed serial peripheral interconnect interface function test module 306 is used to issue high-speed serial peripheral interconnect interface function test commands; the communication module executes high-speed serial peripheral interconnect interface function test operations based on the high-speed serial peripheral interconnect interface function test commands (specifically, it connects to and starts the wireless LAN chip through its own high-speed serial peripheral interconnect interface to complete the interface throughput detection), and outputs high-speed serial peripheral interconnect interface function test data. The high-speed serial peripheral interconnect interface function test data includes at least one of the following: wireless LAN chip startup time, data packet loss statistics, actual throughput data, and interface connectivity status. If, during the test, the wireless LAN chip startup time exceeds a preset duration, data packet loss occurs, or the throughput does not meet the preset requirements, the high-speed serial peripheral interconnect interface function reliability test is deemed to have failed.

[0052] In one possible embodiment, the general-purpose input / output interface (GPIO) test module 307 is used to issue GPIO test commands. Based on the GPIO test commands, the communication module executes GPIO test operations (specifically, by operating the module adapter chip on the baseboard 4 through the communication interface, controlling its own multiple GPIO interfaces to perform level switching at a preset frequency, and simultaneously reading the level echo status through the communication interface), and outputs GPIO test data. The GPIO test data includes at least one of the following: level switching frequency, switching success rate, and consistency data between the echo level and the command level, thereby verifying the functional reliability of the GPIO.

[0053] In one possible embodiment, the power-on / off control test module 308 is used to issue power-on / off control test commands; the communication module performs power-on / off test operations based on the power-on / off control test commands (specifically, it performs power-on / off operations at a preset frequency within the test cycle, starts and restores various functions after each power-on / off, and cooperates to complete status detection), and outputs power-on / off control test data. The power-on / off control test data includes at least one of the following: success rate of each power-on / off start, function recovery time, surge protection status data, and abnormal start log, thereby verifying the reliability of the communication module's power-on / off start and surge protection.

[0054] In one possible embodiment, the working mode switching test module 309 is used to issue a working mode switching test command; the communication module performs a working mode switching test operation based on the working mode switching test command (specifically, it performs a switching operation between CFUN0 mode and CFUN1 mode at a preset frequency, maintains the operation of the corresponding mode after switching and provides feedback on the operation status), and outputs working mode switching test data. The working mode switching test data includes at least one of the response speed, switching success rate and function operation status data after switching for each mode switch, thereby verifying the reliability of the communication module's working mode switching; CFUN0 is the RF function of the communication module turned off, and CFUN1 is the normal network-connected working mode with all functions turned on.

[0055] In one possible embodiment, the rate transmission test module 310 is used to issue a rate transmission test command; the communication module performs a rate transmission test operation based on the rate transmission test command (specifically, it starts data transmission in high temperature environment and low temperature environment respectively, maintains the transmission state and feeds back the transmission data), and outputs rate transmission test data. The rate transmission test data includes at least one of the transmission rate, number of packet loss and lag duration in each environment, so as to ensure that the transmission rate reaches the preset standard and verify the transmission reliability of the communication module.

[0056] In one possible embodiment, the Universal Serial Bus (USB) external USB flash drive read / write test module is used to write a file of a preset size to the USB flash drive via the USB flash drive mounted on the module adapter baseboard 4 as a load. After the file is written, a file of the same size is read from the USB flash drive to complete one read / write test cycle. This read / write test cycle is executed at preset cycles and three preset times in high temperature and low temperature environments, respectively. During the test, the normal function of the USB interface is verified and the performance indicators of each test are not significantly different, thereby verifying the read / write reliability of the USB interface and the USB flash drive.

[0057] In one possible embodiment, the user identification card recognition and reading test module is used to execute preset AT commands through the control module to query the working status of the SIM and realize the continuous card recognition operation of the SIM; the SIM card recognition and reading test is executed cyclically for a fourth preset number of times in the high temperature environment of stage A and the low temperature environment of stage C, thereby verifying the stability and reliability of the SIM card recognition function under high and low temperature environments.

[0058] This communication module reliability testing system can achieve full-function operation of the communication module, and its operating status has high compliance. The system can perform various reliability tests and aging tests on the communication module in high and low temperature environments. Specific test contents include: CPU load operation test, power amplifier strong transmit and receive test, flash memory (NAND Flash, Nand) read and write test, physical layer chip loopback test of serial gigabit media independent interface and simplified gigabit media independent interface, secure digital input and output interface external embedded multimedia card read and write test, high-speed serial peripheral interconnect interface function test, power-on and power-off operation, general input and output interface test, CFUN0 and CFUN1 switching, and rate transmission test, covering seven major categories of reliability tests and aging. Among them, FUN0 disables the radio frequency function of the communication module; CFUN1 is the normal network operation mode with all functions enabled. Both CFUN0 and CFUN1 are standard communication configuration commands with the AT prefix. AT is a common command start identifier character in the field of wireless communication. It serves as the unified start packet header for all module control commands and is used to trigger the communication module to enter the command parsing state, thereby enabling the configuration and switching of the device's working mode and operating status.

[0059] This application overcomes the shortcomings of conventional testing methods, which cannot fully cover all functional modules within a communication module. It allows for the simultaneous and comprehensive testing of all functions of the communication module and its internal chips. Traditional testing schemes only test a single communication function, neglecting other internal functions, resulting in less than 50% functional coverage. These uncovered functions still pose significant aftermarket quality risks and high sales and maintenance costs. This application's communication module reliability testing system boasts strong functional compatibility, covering all functions of the current communication module. It also allows for selective testing of specific functions, enabling engineers to tailor testing schemes and reduce additional design and development. This application provides testing methods for communication module functions. Testing methods for each function of the current communication module have been designed, allowing engineers to flexibly apply methods such as load adjustment, storage testing, and GPIO testing. This application allows for monitoring and control of the testing status via a host computer 2, enabling test data to be transmitted back via the network and controlling the test control module 3 through the host computer 2. It allows for automated testing without contact and can also serve as a system for testing the functionality of communication modules after they become offline.

[0060] Please see Figure 4 , Figure 4 This is a flowchart of a communication module reliability testing method disclosed in an embodiment of this application. In this embodiment, a communication module reliability testing method employs the communication module reliability testing system as described in this application, conducting testing in a phased, cyclical mode, performing various reliability tests and aging tests on the communication module under high and low temperature environments, specifically including the following steps:

[0061] Phase A: The test system is powered on, the communication module is powered on and in full operating mode, and various reliability tests and aging tests are carried out in a high-temperature environment (e.g., 70℃). The test duration is 25 minutes.

[0062] Phase B: The communication module switches to sleep mode and maintains the preset sleep duration (e.g., 5 minutes).

[0063] Phase C: The communication module is switched back to full operating mode and various reliability tests and aging tests are carried out in a low temperature environment (e.g., -40℃) for 25 minutes.

[0064] Phase D: The communication module switches to sleep mode and maintains the preset sleep duration (e.g., 5 minutes).

[0065] Phase E: Communication module powered off.

[0066] The A to E phases constitute a complete test cycle, which is executed cyclically for the first preset number of times (e.g., 2 times).

[0067] This application relies on a dedicated testing system and adopts a phased cyclic testing mode to highly simulate the accelerated operating conditions of communication modules, such as alternating high and low temperatures, switching between working and sleeping modes, and frequent power-on and power-off cycles. This can quickly expose hidden quality defects inside the communication module, integrate multiple core performance test items to complete full-dimensional reliability verification, and have a standardized and regulated testing process. This effectively shortens the long-term reliability verification cycle of the communication module and ensures that the test results can truly reflect the stability of the communication module in actual service.

[0068] In practical applications, if it is determined that low-temperature reliability testing is not required, the temperature in stage C can be the same as the high-temperature temperature in stage A, while the operating conditions in other stages remain unchanged. Conversely, if it is determined that high-temperature reliability testing is not required, the temperature in stage A can be the same as the low-temperature temperature in stage C, while the operating conditions in other stages remain unchanged. This approach can be applied to different temperature testing needs.

[0069] In one possible embodiment, the CPU load test specifically involves:

[0070] The CPU utilization rate of the communication module is controlled within a preset reasonable range (e.g., greater than 50% and less than 60%). Intensive multitasking or cyclic operations are implemented through programming to stabilize the CPU load. At the same time, dynamic detection of CPU function is implemented, and the CPU load rate is dynamically adjusted in combination with the junction temperature of the communication module. When the junction temperature of the communication module exceeds the preset temperature threshold, the peripheral load remains unchanged, and the CPU load is reduced and the junction temperature is controlled by reducing idle threads.

[0071] During the CPU load test of the communication module, the load percentage of all functions needs to be calculated according to A (A1, A2, ..., An), where An represents the CPU load rate of the corresponding function. Simultaneously, a priority sequence N (N1, N2, ..., Nn) is set for each function, with the smallest ranking number in the sequence representing the lowest priority. When it is necessary to reduce the CPU load to control the junction temperature of the communication module, the function with the highest load percentage in priority N1 (lowest priority) is shut down first. After shutting it down, wait X seconds, and then decide whether to continue shutting down the function with the highest load percentage in priority N1 based on whether the junction temperature of the communication module still exceeds a preset threshold, until the junction temperature of the communication module drops to a preset reasonable range.

[0072] This application can accurately and stably regulate the CPU operating load of the communication module, realistically reproduce the high-load multi-tasking operation scenario of the communication module, synchronously monitor the junction temperature of the communication module in real time and intelligently and dynamically adjust the CPU load, and complete the extreme load reliability test under the premise of controlling the hardware temperature within a safe range. It can effectively verify the operating stability of the communication module under high computing power conditions, and avoid hardware overheating damage during the test, ensuring that the load test is carried out safely and orderly throughout the process.

[0073] In one possible implementation, the Nand read / write test specifically involves:

[0074] The test object is the Nand module inside the communication module. Before the test, the Nand module needs to be divided into several storage blocks according to its storage size, totaling 4096 storage blocks. During the test, the erase / write cycle frequency is divided according to the block category, with the following specific rules and parameters: Storage blocks corresponding to integers in the hundreds (4000 blocks in total) are selected, and in each of the A phase (70℃ high-temperature test phase) and C phase (-40℃ low-temperature test phase), each type of storage block undergoes one erase / write cycle; Storage blocks corresponding to integers in the tens (90 blocks in total) are selected, and in each of the A and C phases, each type of storage block undergoes five erase / write cycles; Storage blocks corresponding to the remaining bits (6 blocks in total) are selected, and in each of the A and C phases, each type of storage block undergoes 25 erase / write cycles. Through the above-mentioned tiered erase / write cycles, the read / write reliability and storage stability of the Nand module under high and low temperature environments are verified.

[0075] In one possible embodiment, the power amplifier strong transmit and strong receive test is performed in phases A and C, specifically as follows:

[0076] Perform the strong transmission and strong reception operations for various mobile communication system bands under full-band sweeping in turn (exemplarily, perform the strong transmission and strong reception operations for each band of Global System for Mobile Communications (GSM), Wideband Code Division Multiple Access (WCDMA), Long Term Evolution (LTE), and New Radio (NR) under full-band sweeping in turn). The strong transmission operation is performed at the maximum power of the communication module. The test time ratio (m) for each band is calculated according to a preset formula. The preset formula is: m = (25 / 2) / n, where n is the total number of bands divided during full-band sweeping. The qualified standard for both the strong reception and strong transmission operations is that the receiving device does not lose packets. If packet loss occurs, the transmission power is reduced by a preset percentage. If packet loss still occurs after the transmission power is reduced to the preset power threshold, it is determined that there is a quality problem with the power amplifier chip.

[0077] This application specification defines the radio frequency transceiver test execution phase and test execution standards, fully covering the full band of mainstream communication systems to complete the extreme transceiver stress test, reasonably allocating the test duration for each band, using no packet loss of data as the basis for determining qualification, accurately distinguishing link anomalies and chip body failures through the determination method of gradually reducing the transmission power, being able to accurately and efficiently detect the radio frequency link transmission performance, accurately identify the quality defects existing in the radio frequency power amplifier chip, and comprehensively verify the transmission reliability of the communication module under the extreme working conditions of radio frequency communication.

[0078] In a possible embodiment, the SGMII and RGMII PHY loopback tests are specifically as follows: Detection is carried out through the PHY chip on the module adapter backplane 4, the PHY register is called through the MDIO interface, and the loopback test is performed according to the requirements of gigabit full-duplex mode and throughput greater than 900 Mbps. If the number of PHY chips used in the test is even, the test is carried out according to the grouping rule, that is, No. 1 and No. 2 are in a group, and No. 3 and No. 4 are in a group. Each group continuously performs duplex forwarding operations, simultaneously receives the data transmitted by the PHY register, and records the number of packet losses in real time to verify the reliability of the PHY chip and the corresponding interface.

[0079] In one possible embodiment, the SDIO external eMMC read / write test specifically involves: using the eMMC mounted on the module adapter baseboard 4 as the load, writing a 1GB file to the eMMC; after the file is written, reading a 1GB file from the eMMC, thus completing one read / write test cycle. This test requires two test cycles each in phase A (70℃ high-temperature test phase) and phase C (-40℃ low-temperature test phase) of the test process. Within each test cycle, the above read / write test process is executed 5 times, with a 10-minute interval between adjacent test cycles. During the test, it must be ensured that the SDIO interface functions normally and that there are no significant differences in performance indicators between tests.

[0080] In one possible embodiment, the PCIe function test specifically involves: starting the WiFi chip connected to the PCIe interface on the module adapter baseboard 4; during the test, the throughput of the PCIe interface is measured, requiring a throughput of no less than 1Gbps. If the WiFi chip startup time exceeds X seconds, data packet loss occurs, or the throughput falls below 1Gbps during the test, the PCIe function reliability test is deemed to have failed.

[0081] In one possible embodiment, the GPIO test is specifically performed as follows: the IIC operation module is adapted to the I / O expansion chip on the baseboard 4, and the 32 GPIOs are toggled once every 1 second (i.e., high to low, low to high). The IIC reads and echoes the status to verify that the toggle success rate is 100%.

[0082] In one possible embodiment, the power-on / off control test is as follows: within the test cycle, the power-on / off operation of the communication module is performed at a preset frequency, and the startup status and function recovery status of the communication module after each power-on / off are detected synchronously to verify the reliability of the communication module's power-on / off startup and surge protection.

[0083] In one possible embodiment, the working mode switching test is as follows: during the test, the switching operation between the CFUN0 mode and the CFUN1 mode of the communication module is performed at a preset frequency, and the response speed, switching success rate and functional stability of the communication module after each mode switch are detected to verify the reliability of the working mode switching of the communication module; CFUN0 is the RF function of the communication module is turned off, and CFUN1 is the normal network-connected working mode with all functions turned on.

[0084] In one possible embodiment, the rate transmission test is as follows: the rate transmission performance of the communication module is tested in the high temperature environment of stage A and the low temperature environment of stage C to ensure that the transmission rate reaches the preset standard and there is no obvious packet loss or stuttering during the transmission process, thereby verifying the transmission reliability of the communication module.

[0085] In one possible embodiment, the USB flash drive load read / write test is performed: the USB flash drive mounted on the BIB version is read and written, a 1GB file is written to the USB flash drive, and a 1GB file is read after completion. The A phase and the C phase are each executed for 2 cycles, each cycle is repeated 5 times, and the cycle interval is 10 minutes to ensure that the USB port function is normal and the performance indicators are the same.

[0086] In one possible embodiment, the SIM card identification and reading test involves controlling the execution of the AT command "AT+CPIN?" via the control module, where AT+CPIN = querying the SIM card PIN unlock status. This queries the SIM's operational status, enabling continuous SIM card identification operations. The SIM test needs to be executed at least 10 times each in phase A (70℃ high-temperature test phase) and phase C (-40℃ low-temperature test phase) of the test process to verify the stability and reliability of the SIM card identification function under both high and low temperature environments.

[0087] This testing system is used to perform reliability tests on communication modules under high and low temperature environments, including CPU load operation tests, power amplifier strong transmit and receive tests, flash memory read and write tests, physical layer chip loopback tests for serial gigabit and simplified gigabit media independent interfaces, read and write tests of external embedded multimedia cards connected to secure digital input / output interfaces, high-speed serial peripheral interconnect interface function tests, power-on / off operations, general input / output interface tests, CFUN0 and CFUN1 switching, rate transmission tests, read and write tests of external general serial bus flash drives connected to general serial buses, and user identification card recognition and reading tests.

[0088] The examples are not limited to those described above. Those skilled in the art can make modifications or alterations based on the above description, and all such modifications and alterations should fall within the scope of protection of the appended claims. Those skilled in the art can understand that implementing all or part of the processes of the above embodiments and making equivalent changes according to the claims of this application still fall within the scope of this application.

Claims

1. A communication module reliability detection system, comprising: Includes module adapter base plate (4), test control module (3) and power supply module (1); The module adapter base plate (4) is used to fix the communication module to be tested and to provide the peripheral hardware support required for the normal operation of the communication module. The test control module (3) is used to monitor and read the test data of the communication module and determine whether the working status of the communication module is normal. The test control module (3) integrates at least a central processing unit load test module (301). The central processing unit load test module (301) is used to issue central processing unit load test instructions. Based on the central processing unit load test instructions, the communication module performs central processing unit load adjustment, junction temperature acquisition and dynamic load adjustment operations, and outputs central processing unit load test data. The central processing unit load test data includes at least one of real-time central processing unit occupancy rate data, chip junction temperature value, load adjustment record and central processing unit function operation status data. The power supply module (1) is used to supply power to the entire detection system and the communication module to be tested.

2. The communication module reliability detection system of claim 1, wherein, The test control module (3) also integrates a flash memory read / write test module (302), which is used to issue flash memory read / write test commands. Based on the flash memory read / write test commands, the communication module performs flash memory partitioning and storage block erase / write cycle operations and outputs flash memory read / write test data. The flash memory read / write test data includes at least one of the following: the number of erase / write operations for each storage block, read / write error data, data verification results, and read / write rate data under high and low temperatures.

3. The communication module reliability testing system according to claim 1, characterized in that, The test control module (3) also integrates a power amplifier strong transmit and receive test module (303), which is used to issue power amplifier strong transmit and receive test commands. Based on the power amplifier strong transmit and receive test commands, the communication module performs full-band frequency sweep and strong transmit and receive operations for various mobile communication standard frequency bands, and outputs power amplifier strong transmit and receive test data. The power amplifier strong transmit and receive test data includes at least one of the following: signal strength of each frequency band, real-time transmit power value, data packet transmission and reception statistics, and packet loss data.

4. The communication module reliability testing system according to claim 1, characterized in that, The test control module (3) also integrates a serial gigabit media independent interface and a simplified gigabit media independent interface physical layer chip loopback test module (304). The loopback test module (304) of the physical layer chip of the serial gigabit media independent interface and the simplified gigabit media independent interface is used to issue loopback test commands; the communication module performs loopback test operations based on the loopback test commands and outputs loopback test data, the loopback test data including at least one of the following: interface connectivity status, transmission throughput, bidirectional forwarding time and data packet loss statistics.

5. The communication module reliability testing system according to claim 1, characterized in that, The test control module (3) also integrates a secure digital input / output interface external embedded multimedia card read / write test module (305). The secure digital input / output interface external embedded multimedia card read / write test module (305) is used to issue secure digital input / output interface external embedded multimedia card read / write test commands. The communication module performs file read / write test operations based on the secure digital input / output interface external embedded multimedia card read / write test commands and outputs secure digital input / output interface external embedded multimedia card read / write test data. The secure digital input / output interface external embedded multimedia card read / write test data includes at least one of the following: file read / write success rate, read / write rate, interface communication status, and performance index data of each test.

6. The communication module reliability testing system according to claim 1, characterized in that, The test control module (3) also integrates a high-speed serial peripheral interconnect interface function test module (306). The high-speed serial peripheral interconnect interface function test module (306) is used to issue high-speed serial peripheral interconnect interface function test instructions. Based on the high-speed serial peripheral interconnect interface function test instructions, the communication module executes high-speed serial peripheral interconnect interface function test operations and outputs high-speed serial peripheral interconnect interface function test data. The high-speed serial peripheral interconnect interface function test data includes at least one of the following: wireless LAN chip startup time, data packet loss statistics, actual throughput data, and interface connectivity status.

7. The communication module reliability testing system according to claim 1, characterized in that, The test control module (3) also integrates a general input / output interface test module (307), which is used to issue general input / output interface test commands. The communication module performs general input / output interface test operations based on the general input / output interface test commands and outputs general input / output interface test data. The general input / output interface test data includes at least one of the following: level switching frequency, switching success rate, and consistency data between echo level and command level.

8. The communication module reliability testing system according to claim 1, characterized in that, The test control module (3) also integrates a power-on / off control test module (308), which is used to issue power-on / off control test commands. The communication module performs power-on / off test operations based on the power-on / off control test commands and outputs power-on / off control test data. The power-on / off control test data includes at least one of the following: success rate of each power-on / off startup, function recovery time, surge protection status data, and abnormal startup log.

9. The communication module reliability testing system according to claim 1, characterized in that, The test control module (3) also integrates a working mode switching test module (309), which is used to issue working mode switching test instructions; the communication module performs working mode switching test operations based on the working mode switching test instructions and outputs working mode switching test data, which includes at least one of the following: response speed, switching success rate and function operation status data after switching for each mode switch.

10. The communication module reliability testing system according to claim 1, characterized in that, The test control module (3) also integrates a rate transmission test module (310), which is used to issue rate transmission test commands. The communication module performs rate transmission test operations based on the rate transmission test commands and outputs rate transmission test data. The rate transmission test data includes at least one of the following in various environments: transmission rate, number of packet loss, and lag duration.

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