Data transmission method, apparatus, system, and storage medium

Abstract

The application discloses a data transmission method, device and system and a storage medium, relates to the technical field of data transmission, and comprises the following steps: a message classifier does not need to set a special storage area to store header data, but can directly store the header data in the memory, so that the storage resources can be saved and the area of the message classifier can be reduced. Moreover, the first data and the second data are spliced in the scheme, so that the problem that the two parts of data cannot correspond can be avoided. In addition, the software does not need to access two storage positions of the memory and the message classifier when processing the message. Furthermore, the message does not need to be accessed multiple times to be read by the message classifier. In conclusion, the scheme can improve the management convenience of the message, and can save the storage resources and bus resources.

Description

Technical Field

[0001] This application relates to the field of data transmission technology, and in particular to data transmission methods, apparatus, systems and storage media. Background Technology

[0002] In the field of data transmission technology, during the process of the root port controller (RP) transmitting data to the packet classifier, the transmitted data typically includes two parts: header data and payload. After receiving the data sent by the RP, the packet classifier generally stores the payload in memory and stores the header data in its own dedicated buffer. When the software retrieves data through the processing core to execute tasks, it needs to read data from different locations (i.e., memory and the packet classifier). Furthermore, problems may arise where the header data and payload do not correspond correctly. This makes packet management quite inconvenient. Summary of the Invention

[0003] This application provides data transmission methods, apparatus, systems, electronic devices, storage media, and program products to address the problem of inconvenient message management.

[0004] This application provides a data transmission method applied to a data transmission system. The data transmission system includes memory, a processing core, a message classifier corresponding to the target message layer protocol, and a root port controller. The method is executed by the message classifier and includes: The first data and the target address are obtained from the bus between the message classifier and the root port controller; The header data corresponding to the first data is obtained from the sideband signal line between the message classifier and the root port controller. Both the first data and the header data are data transmitted using the target transmission protocol. If the target address is determined to be within a preset address range, extract the second data from the target field of the header data; The first data and the second data are concatenated to obtain the target message that conforms to the target message layer protocol; Based on the target address, the target packet is written to the target queue in memory.

[0005] This application allows the message classifier to read first data and the corresponding destination address from the bus between itself and the root port controller, and to read the header data corresponding to the first data from the sideband signal line between itself and the root port controller. Since there are many types of data transmitted using the target transmission protocol, and the message classifier is specifically designed to process data from the target message layer protocol, it can compare the destination address with a preset address range. If the destination address is within the preset address range, the data is confirmed to conform to the target message layer protocol. At this point, the second data can be extracted from the destination field of the header data. Finally, by concatenating the first and second data, a complete target message conforming to the target message layer protocol is obtained and written to the target queue in memory according to the destination address. This eliminates the need for a dedicated storage area for the header data; instead, the message classifier can directly store the second data carried in the header data in memory, saving storage resources and reducing the size of the message classifier. Furthermore, concatenating the first and second data avoids the problem of mismatched data. Furthermore, the software running on the processing core does not need to access both memory and the message classifier when processing messages, nor does it need to access the message classifier multiple times to read the complete message data. In summary, this solution improves the ease of message management and saves storage and bus resources.

[0006] In some optional implementations, after writing the target packet to a target queue in memory based on the target address, the method further includes: After receiving the response signal corresponding to the target message from the memory, the value of the first pointer variable is increased by a first preset value. The response signal is used to indicate that the target message has been successfully written to the target queue.

[0007] This ensures that each pointer advance corresponds precisely to a message being physically and safely stored in memory, fundamentally preventing data loss or incomplete data reads by the software. By monitoring the value of the first pointer variable, the message classifier can determine the number of messages it has successfully processed and whether the target queue is full, thus avoiding queue overflow caused by continuing to write messages when the target queue is full. Furthermore, the software can also conveniently obtain the value of the first pointer variable to determine processing progress.

[0008] In some alternative implementations, the method further includes: After detecting that the value of the first pointer variable is equal to the second preset value, the value of the first flag corresponding to the first pointer variable is updated to the target value, and the value of the first pointer variable is reset to the preset initial value, wherein the second preset value is the maximum number of packets stored in the target queue.

[0009] In this way, the software can easily understand the message classifier's processing progress through the first flag.

[0010] In some alternative implementations, the method further includes: Get the value of the second pointer variable and the value of the second flag, where the second pointer variable is used to indicate the number of packets that the processing core has successfully processed; Based on the values ​​of the first flag, the second flag, the first pointer variable, and the second pointer variable, determine whether the target queue is full. If the target queue is determined to be full, the handshake signal on the bus is pulled low to inform the root port controller to stop transmitting data to the message classifier.

[0011] In this way, when the software processing speed cannot keep up with the hardware processing speed, the target queue may become full. This solution can efficiently determine the status of the target queue by comparing the values ​​of the first pointer variable, the second pointer variable, the first flag, and the second flag in real time through hardware. This allows the upstream device to be notified to stop sending data in a timely manner through the handshake signal on the bus, thus avoiding the problem of new messages overwriting unprocessed messages due to queue overflow. In this way, the secure transmission of data can be guaranteed.

[0012] In some optional implementations, determining whether the target queue is full based on the values ​​of the first flag, the second flag, the first pointer variable, and the second pointer variable includes: Determine whether the value of the first pointer variable is equal to the value of the second pointer variable, and determine whether the value of the first flag is equal to the value of the second flag; If the value of the first pointer variable is equal to the value of the second pointer variable, and the value of the first flag is not equal to the value of the second flag, then the target queue is determined to be full. Alternatively, if it is determined that the value of the first pointer variable is equal to the value of the second pointer variable, and the value of the first flag is equal to the value of the second flag, then it is determined that the target queue is not full.

[0013] In this way, by simply comparing the values ​​of the two flags and the two pointer variables, it is easy to accurately determine whether the target queue is empty or full.

[0014] In some alternative implementations, before writing the target packet to the target queue in memory based on the target address, the method further includes: Determine the total data length of the target message; Generate address information based on the total data length and the target address; Address information is transferred to memory via the bus between memory and message classifier.

[0015] In this way, transmitting the target address and total data length to memory ensures that the target packet is completely written into memory.

[0016] In some alternative implementations, after the processing core completes the processing operation of a message in the target queue, it increments the value of the second pointer variable by a first preset value.

[0017] This application also provides a data transmission device configured in a data transmission system, the data transmission system including a message classifier, memory, a processing core, and a root port controller; the data transmission device includes: The acquisition module is used to acquire first data and target address from the bus between the message classifier and the root port controller; and to acquire header data corresponding to the first data from the sideband signal line between the message classifier and the root port controller, wherein the first data and header data are both data transmitted using the target transmission protocol; The extraction module is used to extract second data from the target field of the header data when the target address is determined to be within a preset address range. The splicing module is used to splice the first data and the second data to obtain a target message that conforms to the target message layer protocol corresponding to the message classifier; The write module is used to write target packets into the target queue in memory based on the target address.

[0018] This application also provides a data transmission system, including: A message classifier corresponding to the target message layer protocol is used to execute the above data transmission method; Memory; Processing kernel; Root port controller; The message classifier is connected to the root port controller, memory, and processing core, respectively.

[0019] This application also provides an electronic device, including: a memory for storing a computer program; and a processor for implementing the steps of any of the above-described data transmission methods when executing the computer program.

[0020] This application also provides a computer-readable storage medium storing a computer program, wherein the computer program, when executed by a processor, implements the steps of any of the above-described data transmission methods.

[0021] This application also provides a computer program product, including a computer program that, when executed by a processor, implements the steps of any of the above-described data transmission methods. Attached Figure Description

[0022] To more clearly illustrate the embodiments of this application, the accompanying drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0023] Figure 1 This application provides a schematic diagram of the architecture of a data transmission system according to an embodiment of the present application. Figure 2 This is a schematic diagram of the architecture of another data transmission system provided in an embodiment of this application; Figure 3 A flowchart illustrating a data transmission method provided in an embodiment of this application; Figure 4 This is a schematic diagram of an AXI bus data transmission embodiment provided in this application; Figure 5 This is a schematic diagram of the structure of a data transmission device provided in an embodiment of this application; Figure 6 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application. Detailed Implementation

[0024] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of this application.

[0025] It should be noted that, in the description of this application, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. The terms "first," "second," etc., in this application are used to distinguish similar objects and are not used to describe a specific order or sequence.

[0026] To enable those skilled in the art to better understand the present application, the present application will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0027] In the field of data transmission, Management Component Transport Protocol (MCTP) messages can typically be transmitted using vendor-defined messages (VDM) of the Peripheral Component Interconnect Express (PCIE) standard.

[0028] MTCP is a message layer protocol used to indicate the data format at the software layer. PCIe is a transport layer protocol used to indicate the transmission method of data across physical links between devices and boards. MTCP messages include a header and a payload. The header typically describes the payload, such as type, address, length, version number, and routing information. The payload contains the actual information or data to be transmitted in a data packet. PCIe VDM also includes a header and a payload.

[0029] During the transmission of MTCP packets using PCIe VDM, the header data and payload of the MTCP packet are placed in the payload within the PCIe VDM, while routing information related to the MCTP packet is placed in the header of the PCIe VDM. For example, routing information may include one or more of the following: Padding Length (PadLen), Requester Identification (Requester ID), and End-Point (EP). Padding Length refers to the length of meaningless padding data appended to the end of the packet's payload, and Requester Identification is the identifier of the source device initiating the request.

[0030] like Figure 1 As shown, the data transmission system includes a processing core, double data rate synchronous dynamic random access memory (DDR), a link matrix, a root port controller (RP), MCTP components, etc.

[0031] In this process, data received by the RP on the Central Processing Unit (CPU) side is stored in DDR via the Advanced eXtensible Interface (AXI) protocol bus. The AXI protocol bus is used to instruct data transfer on the physical link from the RP to the memory within the System of Chips (SOC).

[0032] In the PCIe protocol, header data is typically transmitted via sideband signal lines, while the payload is usually transmitted via the AXI bus. Upon receiving a PCIe VDM, the normal procedure for the RP (Receiving Portable Module) is to discard the PCIe VDM header data but retain the payload and transmit it to the DDR (Data Transfer Unit). However, as mentioned earlier, the PCIe VDM header data also contains critical information such as routing information. This routing information is crucial for the processing of MCTP (Multi-Channel Protocol) packets. Therefore, in the aforementioned data transmission system, an MCTP component can be mounted on the AXI bus, and a buffer can be set up within the MCTP component specifically for storing the PCIe VDM header data. For example, in... Figure 1 The Advanced Peripheral Bus (APB) connects to the link matrix and is connected to an MCTP component. The APB is a branch of the AXI bus used to connect simple peripheral components with low bandwidth requirements. In this scenario, the MCTP component is the simple peripheral component.

[0033] Generally, the software that processes the packets can run on the processing core. During the processing of MCTP packets, the processing core can read the PCIe VDM payload from the DDR, i.e., read the MCTP packet. Furthermore, through the processing core and APB, it can indirectly access the PCIe VDM header data stored in the MCTP component to extract the required routing information. In this way, the routing information and the PCIe VDM payload constitute a complete MCTP message.

[0034] Under the above scheme, the RP cannot perceive the state of the internal buffer of the MCTP component. Even when the buffer is full, the RP will still transmit the PCIe VDM header data to the MCTP component. This causes a buffer overflow, resulting in a mismatch between the header data in the MCTP component and the payload stored in DDR. Consequently, the MCTP component loses its functionality and can only be resolved through a PCIe protocol reset. Furthermore, in this scheme, the PCIe VDM payload is stored in DDR, while the PCIe VDM header data is stored in the MCTP component. Software needs to access two addresses, which is detrimental to MCTP packet management. Additionally, the PCIe VDM header data needs to be accessed via the APB, which has a data width of 32 bits. Reading one header data requires two register accesses, resulting in low efficiency. In summary, the data transmission methods and systems in related technologies are not conducive to MCTP packet management.

[0035] To address the aforementioned technical problems, this application provides a novel data transmission system, such as... Figure 2 As shown, the data transmission system may include memory, a processing core, a message classifier corresponding to the target message layer protocol, and a root port controller. The memory may be DDR. The target message layer protocol may be the MCTP protocol, and the message classifier may be an MCTP component.

[0036] The message classifier can be connected to the memory and processing core via a link matrix. It can also be connected to the memory via a bus, or to the root port controller via a bus or sideband signal lines. For example, the bus could be an AXI bus, which could include address channels, data channels, etc.

[0037] Based on the aforementioned data transmission system, embodiments of this application provide a data transmission method that can be executed by a message classifier in the data transmission system, such as... Figure 3 As shown, the specific processing steps of the data transmission method may include: Step 301: Obtain the first data and the target address from the bus between the message classifier and the root port controller.

[0038] Specifically, in such Figure 2In the data transmission system shown, the message classifier (i.e., the MCTP component) is connected to the RP via the AXI bus. The AXI bus includes a data channel and an address channel. The data channel can also be called a write channel, and the address channel can also be called an address write channel (AW channel). Accordingly, the message classifier can read the first data, i.e., the payload of the PCIe VDM, from the data channel of the AXI bus between itself and the RP, and read the target address corresponding to the first data from the address channel of the AXI bus. The target address can be the starting logical address in memory, which is selected by the PCIe VDM sender within a preset address range specified by the software.

[0039] Step 302: Obtain the header data corresponding to the first data from the sideband signal line between the message classifier and the root port controller.

[0040] Both the first data and the header data are transmitted using the target transmission protocol.

[0041] Specifically, the message classifier can also be connected to the RP via a sideband signal line. The sideband signal line can transmit sideband signals, such as header data in PCIe VDM. Correspondingly, the message classifier can also read the PCIe VDM header data from the sideband signal line between itself and the RP, that is, read the header data corresponding to the first data.

[0042] Step 303: If the target address is determined to be within the preset address range, extract the second data from the target field of the header data.

[0043] Specifically, since the message classifier is specifically designed to handle messages of the target message layer protocol (e.g., MCTP), in order for the message classifier to accurately identify messages of the target message layer protocol, the software can pre-allocate a storage area in memory to store the target queue. The address of this storage area is a preset address range (which can be a logical address range). Then, the software can write the preset address range into the configuration register in the message classifier through the processing core. Furthermore, after determining the preset address range, the software will inform each PCIe device so that the PCIe devices can select the target address from the preset address range when they need to transmit MCTP messages.

[0044] After receiving the target address, the message classifier can read the preset address range from the configuration register and determine whether the target address is within the preset address range. If it is, it can determine that the payload of the currently received PCIE VDM is an MCTP message (that is, it can determine that the received data conforms to the target message layer protocol) and needs to be specially processed. If not, it can process the PCIE VDM according to the normal processing method of the PCIE protocol (that is, the target transport protocol) (for example, discard its header data) and transmit it to the next node.

[0045] Furthermore, the software can pre-write the location of the target field to be extracted into the configuration register of the packet classifier. After determining that the payload of the currently received PCIe VDM is an MCTP packet, the target field location can be read from the configuration register. The target field corresponding to the target field location can be identified in the header data of the PCIe VDM, and the data in the target field can be extracted as the second data. The second data can be routing information corresponding to the first data. For example, the routing information may include one or more of the following: padding length, requester identifier, endpoint, etc.

[0046] Step 304: Concatenate the first data and the second data to obtain the target message that conforms to the target message layer protocol.

[0047] Specifically, the message classifier can concatenate the first data and the second data to obtain a complete MCTP message (i.e., the target message). For example, the second data can be concatenated before the first data.

[0048] Step 305: Write the target packet into the target queue in memory according to the target address.

[0049] Specifically, the message classifier can determine the physical address corresponding to the target address according to the mapping relationship between physical addresses and logical addresses, and then write the target message into the memory at the storage location corresponding to the physical address, that is, write it to the corresponding position in the target queue.

[0050] The data transmission method of this application's embodiments allows the message classifier to read first data and the corresponding target address from the bus between itself and the root port controller, and to read header data corresponding to the first data from the sideband signal line between itself and the root port controller. Since there are many types of data transmitted using the target transmission protocol, and the message classifier is specifically designed to process data from the target message layer protocol, it can compare the target address with a preset address range. If the target address is within the preset address range, the data is confirmed to conform to the target message layer protocol. At this point, the second data can be extracted from the target field of the header data. Finally, by concatenating the first and second data, a complete target message conforming to the target message layer protocol can be obtained and written to the target queue in memory according to the target address. In this way, the message classifier does not need to set up a dedicated storage area to store the header data; instead, it can directly store the second data carried in the header data in memory, saving storage resources and reducing the size of the message classifier. Furthermore, concatenating the first and second data in this solution avoids the problem of the two data parts not corresponding. Furthermore, the software running on the processing core does not need to access both memory and the message classifier when processing messages, nor does it need to access the message classifier multiple times to read the complete message data. In summary, this solution improves the ease of message management and saves storage and bus resources.

[0051] In some optional implementations, in order to facilitate recording the number of messages successfully processed by the message classifier and to facilitate subsequent determination of the target queue status, after step 305 above, the message classifier may also increase the value of the first pointer variable by a first preset value after receiving the response signal corresponding to the target message from the memory.

[0052] The response signal can be used to indicate that the target message has been successfully written to the target queue.

[0053] Specifically, after the message classifier writes the target message into memory, the memory can send a response signal back to the message classifier. After receiving the response signal corresponding to the target message, the message classifier can determine that the target message has been successfully written into the target queue.

[0054] The message classifier can pre-record a first pointer variable to record the number of messages successfully written to the target queue. Correspondingly, after receiving a response signal, the message classifier can increment the value of the first pointer variable by a first preset value, for example, the first preset value can be 1.

[0055] This ensures that each pointer advance corresponds precisely to a message being physically and safely stored in memory, fundamentally preventing data loss or incomplete data reads by the software. By monitoring the value of the first pointer variable, the message classifier can determine the number of messages it has successfully processed and whether the target queue is full, thus avoiding queue overflow caused by continuing to write messages when the target queue is full. Furthermore, the software can also conveniently obtain the value of the first pointer variable to determine processing progress.

[0056] In some optional implementations, based on the foregoing embodiments, in order to further improve the convenience of software management messages, the message classifier may also update the value of the first flag corresponding to the first pointer variable to the target value after detecting that the value of the first pointer variable is equal to the second preset value, and reset the value of the first pointer variable to the preset initial value.

[0057] The second preset value can be the maximum number of packets stored in the target queue. The value of the first flag can be 0 or 1. The target value is different from the current value of the first flag. That is, when the current value of the first flag is 0, the value of the first flag is set to 1, and 1 is the target value. When the current value of the first flag is 1, the value of the first flag is set to 0, and 0 is the target value. The initial value can be 0.

[0058] Specifically, the message classifier can also be configured with a first flag corresponding to the first pointer variable. Correspondingly, the message classifier can monitor the value of the first pointer variable. Upon detecting an update to the value of the first pointer variable, it compares the value with a second preset value. If the value of the first pointer variable equals the second preset value, the value of the first flag is set to the target value, and the value of the first pointer variable is reset to its initial value, restarting the accumulation process. For example, the initial value of the first flag can be 0, the second preset value can be 10, and the first preset value can be 1. When the value of the first pointer variable is updated to 10, the value of the first flag is updated to 1. Then, the value of the first pointer variable can be updated back to 0, restarting the accumulation process. When the first pointer variable reaches 10 again, the value of the first flag is updated to 0, and so on.

[0059] In some alternative implementations, in order to accurately determine the state of the target queue, the message classifier may also perform the following specific steps, based on the foregoing embodiments: Step 1: Obtain the value of the second pointer variable and the value of the second flag.

[0060] Step two: Determine whether the target queue is full based on the values ​​of the first flag, the second flag, the first pointer variable, and the second pointer variable.

[0061] Step 3: If the target queue is found to be full, pull the handshake signal on the bus low to inform the root port controller to stop transmitting data to the message classifier.

[0062] The second pointer variable is used to indicate the number of messages that the processing core has successfully processed.

[0063] Specifically, the software can monitor the target queue and, upon determining that the target queue is not empty, read messages from the target queue for processing. Alternatively, it can monitor the value of a first pointer variable and, upon determining that the value of the first pointer variable changes from zero to non-zero, read messages from the target queue. The target queue can be a first-in, first-out (FIFO) queue, allowing the software to read and process messages sequentially according to the order in which they were written.

[0064] After processing each message, the software can increment the value of the second pointer variable by a first preset value. Similarly, the software can also set a second flag corresponding to the second pointer variable, which can be 0 or 1. The software can monitor the value of the second pointer variable. After detecting that the value of the second pointer variable has been updated, it compares the value of the second pointer variable with the second preset value. If it determines that the value of the second pointer variable is equal to the second preset value, it updates the value of the second flag. The update method of the second flag is similar to that of the first flag. For example, if the current value of the second flag is 1, the value of the second flag is updated to 0; if the current value of the second flag is 0, the value of the second flag is updated to 1.

[0065] The software can send the latest value of the second pointer variable to the message classifier through the processing core every time the value of the second pointer variable is updated, meaning the message classifier can monitor the latest value of the second pointer variable in real time. Similarly, the software can send the latest value of the second flag variable to the message classifier through the processing core every time the value of the second flag is updated, meaning the message classifier can monitor the latest value of the second flag in real time.

[0066] The message classifier can obtain the latest values ​​of the second flag and the second pointer variable, and then, by combining the values ​​of the first pointer variable and the first flag recorded by itself, it can determine whether the target queue is full.

[0067] If the target queue is determined to be not full, the message classifier can perform no processing and continue waiting for the next data to be sent by the RP. Alternatively, if the target queue is determined to be full, to avoid message loss due to target queue overflow, the message classifier can send a notification to the RP to stop sending messages, for example, by pulling the handshake signal on the AXI bus with the RP low.

[0068] It should be noted that the software runs on the processing core. Therefore, the software's related operations can be considered as hardware-level execution operations performed by the processing core under the software's execution logic.

[0069] In this way, when the software processing speed cannot keep up with the hardware processing speed, the queue may become full. This solution can efficiently determine the status of the target queue by comparing the values ​​of the first pointer variable, the second pointer variable, the first flag, and the second flag in real time through hardware. This allows the upstream RP to be notified to stop sending data in a timely manner through the handshake signal on the bus, which can avoid the problem of new messages overwriting unprocessed messages due to queue overflow. In this way, the secure transmission of data can be guaranteed.

[0070] In some optional implementations, based on the foregoing embodiments, in step two above, the message classifier may use the following specific steps to determine whether the target queue is full based on the values ​​of the first flag, the second flag, the first pointer variable, and the second pointer variable: Step 1: Determine whether the value of the first pointer variable is equal to the value of the second pointer variable, and determine whether the value of the first flag is equal to the value of the second flag.

[0071] Step 2: If the value of the first pointer variable is equal to the value of the second pointer variable, and the value of the first flag is not equal to the value of the second flag, then determine that the target queue is full.

[0072] Alternatively, in step 3, if it is determined that the value of the first pointer variable is equal to the value of the second pointer variable, and the value of the first flag is equal to the value of the second flag, then it is determined that the target queue is not full.

[0073] The value of the first pointer variable is greater than or equal to the value of the second pointer variable.

[0074] Specifically, the message classifier can first compare the values ​​of the first pointer variable and the second pointer variable. If they match, it can then determine if the values ​​of the first flag and the second flag are the same. If they are the same, it means that the message processing speed of the message classifier and the software is not significantly different, and their progress is consistent. In this case, it can be determined that the target queue is not full. If they are different, it means that the message processing speed of the message classifier is faster than that of the software. In this case, it can be determined that the target queue is full. If the values ​​of the first pointer variable and the second pointer variable are inconsistent, it can be directly determined that the target queue is not full.

[0075] For example, the initial values ​​of both the first and second pointer variables are 0, and the initial values ​​of both the first and second flags are also 0, with a second preset value of 10. In the first case, the values ​​of the first and second pointer variables are both 2, the first flag is 1, and the second flag is 0, indicating that the number of unprocessed packets has reached the second preset value, and the target queue is full. In the second case, the values ​​of the first and second pointer variables are both 2, the first flag is 0, and the second flag is 0, indicating that there are still free slots in the target queue to store newly received packets. In the third case, the values ​​of the first and second pointer variables are both 2, 1, 0, and 0, indicating that the target queue is not full, or the values ​​of the first and second pointer variables are both 1, 2, 1, and 0, indicating that the target queue is not full. In other words, as long as the values ​​of the first and second pointer variables are inconsistent, the target queue can be considered not full.

[0076] In this way, by comparing the values ​​of the two pointer variables and the values ​​of the two flags, the state of the queue can be accurately determined, thereby avoiding message errors caused by queue overflow.

[0077] In some optional implementations, in order to ensure that the target packet can be accurately written into memory, the packet classifier may perform the following specific steps before step 305 above: Step 1: Determine the total data length of the target message.

[0078] Step 2: Generate address information based on the total data length and the target address.

[0079] Step 3: The address information is transferred to the memory via the bus between the memory and the message classifier.

[0080] Specifically, since the original AXI bus data channel required the transmission of data of the first data length, while this solution has changed the data length, in order to ensure that the entire target message can be correctly written into the target queue, the message classifier can first transmit the total data length to the memory through the address channel of the AXI bus between the message classifier and the memory before transmitting the target message, so that the memory can recognize the complete target message through the data channel and write the target message into the target queue.

[0081] One method for transmitting address information via an address channel is as follows: Based on the total data length and the unit data length, the signal transmission count is determined (calculated as the ratio between the total data length and the unit data length). Based on this count, the control signal AWLEN is set. Simultaneously, during the transmission of the control signal, the target address can be converted to its corresponding physical address and sent to memory as the starting physical address for this write operation. The starting physical address and the signal transmission count together constitute the address information.

[0082] For example, in the data channel upstream of the message classifier, the original transmitted data consisted of 5 units (i.e., the first data). The data that needs to be transmitted now consists of 6 units (5 units of the first data + 1 unit of the second data). Accordingly, the original AWLEN can be directly incremented by 1. Then, AWLEN is communicated to the memory through the address channel upstream of the message classifier. The memory can then receive and store the 6-unit data length based on the received starting physical address.

[0083] like Figure 4 As shown, on the AXI bus connecting the message classifier to the upstream and downstream components, the data transmitted in the data channel changes. Specifically, in the AXI bus data channel connecting the message classifier to the upstream component RP, only the PCI VDM payload (corresponding to the first data mentioned above) is transmitted. However, in the AXI bus data channel connecting the message classifier to the downstream component memory, the transmitted data includes routing information extracted from the PCIe VDM header data (corresponding to the second data mentioned above). Figure 4 In the diagram, the black box represents the first data, the white box represents data from non-target transport protocol layers, and the dashed box represents the second data.

[0084] In some optional implementations, the processing core (i.e., software) can monitor the value of the first pointer variable and determine the status of the target queue based on the values ​​of the first pointer variable, the second pointer variable, and a second preset value. The specific determination method is similar to the judgment process of the aforementioned message classifier. In this way, the processing core can also determine whether the target queue is full, thereby adjusting its own message processing speed and improving the timeliness of message processing. For example, when it is determined that the target queue is full, a preset amount of computing resources can be added to process messages.

[0085] The execution process of the above data transmission method will be explained in detail below with a specific example.

[0086] The first pointer variable mentioned above can be a producer pointer, and the second pointer variable can be a consumer pointer. The software can pre-allocate a storage area in DDR to store the target queue.

[0087] In a PCIe system, the MCTP component, acting as the producer of the target queue, writes the sideband information collected by the MCTP component's sideband signal lines and the MCTP message together as a complete MCTP message into the target queue in the DDR. It also informs the software that a new MCTP message has been written to the target queue by updating the target queue's producer pointer. Additionally, the MCTP component can maintain a corresponding first flag.

[0088] The software, acting as a consumer of the target queue, maintains a consumer pointer and a corresponding second flag for the target queue. After reading an MCTP message from the target queue in the DDR, the software needs to update the consumer pointer. Therefore, by using the producer pointer, consumer pointer, first flag, and second flag of the target queue, both the PCIe system's MCTP component and the software can obtain the current empty / full status of the target queue. Furthermore, since sideband information and corresponding MCTP messages are stored one-to-one in the DDR's target queue, the software only needs to access the DDR to obtain the complete MCTP message.

[0089] Specifically, in such Figure 2 In the data transmission system shown, when the MCTP component detects an MCTP message on the RP's AXI bus, it assembles the corresponding sideband information into second data. On the AXI write data channel, this second data is inserted before the MCTP message, and the AWLEN of the write address channel is incremented by 1. In this step, both the second data and the MCTP message are written into the DDR, forming a complete MCTP message (i.e., the aforementioned target message).

[0090] Each time the MCTP component receives a response signal from memory, it increments the producer pointer by 1, indicating that a new MCTP message has been written to the target queue of DDR.

[0091] When the target queue in DDR is full, the MCTP component can pause receiving packets from RP and use RP's own flow control mechanism (i.e., the operation of pulling the handshake signal low) to prevent the abnormal scenario of writing data to the target queue when it is full.

[0092] In this example, since the sideband information and MCTP packets are stored together in the DDR, the implementation area of ​​the MCTP component is reduced. Furthermore, the DDR space is large enough that the target queue size can be easily configured according to actual needs. Additionally, the MCTP component implements a backpressure mechanism (i.e., pulling the handshake signal low), which prevents the write-full state from occurring, thus avoiding the loss of sideband information.

[0093] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods according to the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method.

[0094] Embodiments of this application also provide a data transmission device, such as... Figure 5 As shown, the data transmission device is configured in the data transmission system, which includes a message classifier, memory, a processing core, and a root port controller; the data transmission device includes: The acquisition module 510 is used to acquire first data and target address from the bus between the message classifier and the root port controller; and to acquire header data corresponding to the first data from the sideband signal line between the message classifier and the root port controller, wherein the first data and the header data are both data transmitted using the target transmission protocol; Extraction module 520 is used to extract second data from the target field of header data when the target address is determined to be within a preset address range; The splicing module 530 is used to splice the first data and the second data to obtain a target message that conforms to the target message layer protocol corresponding to the message classifier; The write module 540 is used to write target packets into the target queue in memory based on the target address.

[0095] In some alternative embodiments, the device further includes a monitoring module 550, which is used for: After receiving the response signal corresponding to the target message from the memory, the value of the first pointer variable is increased by a first preset value. The response signal is used to indicate that the target message has been successfully written to the target queue.

[0096] In some alternative implementations, the monitoring module 550 is also used for: After detecting that the value of the first pointer variable is equal to the second preset value, the value of the first flag corresponding to the first pointer variable is updated to the target value, and the value of the first pointer variable is reset to the preset initial value, wherein the second preset value is the maximum number of packets stored in the target queue.

[0097] In some alternative implementations, the monitoring module 550 is also used for: Get the value of the second pointer variable and the value of the second flag, where the second pointer variable is used to indicate the number of packets that the processing core has successfully processed; Based on the values ​​of the first flag, the second flag, the first pointer variable, and the second pointer variable, determine whether the target queue is full; if the target queue is full, pull the handshake signal on the bus low to inform the root port controller to stop transmitting data to the message classifier.

[0098] In some alternative implementations, the monitoring module 550 is specifically used for: Determine whether the value of the first pointer variable is equal to the value of the second pointer variable, and determine whether the value of the first flag is equal to the value of the second flag; If the value of the first pointer variable is equal to the value of the second pointer variable, and the value of the first flag is not equal to the value of the second flag, then the target queue is determined to be full. Alternatively, if it is determined that the value of the first pointer variable is equal to the value of the second pointer variable, and the value of the first flag is equal to the value of the second flag, then it is determined that the target queue is not full. In some optional implementations, the write module 540 is further configured to: Determine the total data length of the target message; Generate address information based on the total data length and the target address; Address information is transferred to memory via the bus between memory and message classifier.

[0099] In some alternative implementations, after the processing core completes the processing operation of a message in the target queue, it increments the value of the second pointer variable by a first preset value.

[0100] For a description of the features in the embodiment corresponding to the data transmission device, please refer to the relevant description in the embodiment corresponding to the data transmission method, which will not be repeated here.

[0101] Embodiments of this application also provide an electronic device, such as... Figure 6As shown, the device includes a memory 10 and a processor 20. The memory 10 stores a computer program, and the processor 20 is configured to run the computer program to perform the steps in any of the above-described data transmission method embodiments. The electronic device may be the aforementioned message classifier, or an integrated circuit containing the aforementioned data transmission system.

[0102] Embodiments of this application also provide a computer-readable storage medium storing a computer program, wherein the computer program is configured to execute the steps in any of the above-described data transmission method embodiments when it is run.

[0103] In one exemplary embodiment, the aforementioned computer-readable storage medium may include, but is not limited to, various media capable of storing computer programs, such as a USB flash drive, read-only memory (ROM), random access memory (RAM), portable hard disk, magnetic disk, or optical disk.

[0104] Embodiments of this application also provide a computer program product, which includes a computer program that, when executed by a processor, implements the steps in any of the above-described data transmission method embodiments.

[0105] Embodiments of this application also provide another computer program product, including a non-volatile computer-readable storage medium storing a computer program, which, when executed by a processor, implements the steps in any of the above-described data transmission method embodiments.

[0106] Those skilled in the art will further recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the components and steps of the various examples have been generally described in terms of functionality in the foregoing description. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0107] The foregoing has provided a detailed description of a data transmission method, apparatus, system, electronic device, storage medium, and program product provided in this application. Specific examples have been used to illustrate the principles and implementation methods of this application. The descriptions of the embodiments above are merely for the purpose of helping to understand the method and core ideas of this application. It should be noted that those skilled in the art can make various improvements and modifications to this application without departing from its principles, and these improvements and modifications also fall within the protection scope of this application.

Claims

1. A data transmission method, characterized in that, The method is applied to a data transmission system, which includes memory, a processing core, a message classifier corresponding to the target message layer protocol, and a root port controller. The method is executed by the message classifier and includes: The first data and the target address are obtained from the bus between the message classifier and the root port controller; The header data corresponding to the first data is obtained from the sideband signal line between the message classifier and the root port controller, wherein both the first data and the header data are data transmitted using the target transmission protocol; If the target address is determined to be within a preset address range, the second data is extracted from the target field of the header data; The first data and the second data are concatenated to obtain a target message that conforms to the target message layer protocol; Based on the target address, the target message is written to the target queue in the memory.

2. The data transmission method according to claim 1, characterized in that, After writing the target packet to the target queue in memory according to the target address, the method further includes: Upon receiving the response signal corresponding to the target message from the memory feedback, the value of the first pointer variable is increased by a first preset value, wherein the response signal is used to indicate that the target message has been successfully written to the target queue.

3. The data transmission method according to claim 2, characterized in that, The method further includes: After detecting that the value of the first pointer variable is equal to the second preset value, the value of the first flag corresponding to the first pointer variable is updated to the target value, and the value of the first pointer variable is reset to the preset initial value, wherein the second preset value is the maximum number of packets stored in the target queue.

4. The data transmission method according to claim 3, characterized in that, The method further includes: Obtain the value of the second pointer variable and the value of the second flag, wherein the second pointer variable is used to indicate the number of packets that the processing core has successfully processed; Based on the values ​​of the first flag, the second flag, the first pointer variable, and the second pointer variable, determine whether the target queue is full; If the target queue is determined to be full, the handshake signal on the bus is pulled low to inform the root port controller to stop transmitting data to the message classifier.

5. The data transmission method according to claim 4, characterized in that, Determining whether the target queue is full based on the values ​​of the first flag, the second flag, the first pointer variable, and the second pointer variable includes: Determine whether the value of the first pointer variable is equal to the value of the second pointer variable, and determine whether the value of the first flag is equal to the value of the second flag; If it is determined that the value of the first pointer variable is equal to the value of the second pointer variable, and the value of the first flag is not equal to the value of the second flag, then it is determined that the target queue is full. Alternatively, if it is determined that the value of the first pointer variable is equal to the value of the second pointer variable, and the value of the first flag is equal to the value of the second flag, then it is determined that the target queue is not full.

6. The data transmission method according to any one of claims 1 to 5, characterized in that, Before writing the target packet to the target queue in memory according to the target address, the method further includes: Determine the total data length of the target message; Address information is generated based on the total data length and the target address; The address information is transmitted to the memory via the bus between the memory and the message classifier.

7. The data transmission method according to claim 4 or 5, characterized in that, After the processing core completes the processing operation of a message in the target queue, it increments the value of the second pointer variable by the first preset value.

8. A data transmission device, characterized in that, The data transmission device is configured in the data transmission system, which includes a message classifier, memory, a processing core, and a root port controller. The data transmission device includes: The acquisition module is used to acquire first data and a target address from the bus between the message classifier and the root port controller; and to acquire header data corresponding to the first data from the sideband signal line between the message classifier and the root port controller, wherein both the first data and the header data are data transmitted using the target transmission protocol; The extraction module is used to extract second data from the target field of the header data when it is determined that the target address is within a preset address range; The splicing module is used to splice the first data and the second data to obtain a target message that conforms to the target message layer protocol corresponding to the message classifier; The write module is used to write the target packet into the target queue in memory according to the target address.

9. A data transmission system, characterized in that, include: A message classifier corresponding to the target message layer protocol is used to execute the data transmission method as described in any one of claims 1 to 7; Memory; Processing kernel; Root port controller; The message classifier is connected to the root port controller, the memory, and the processing core, respectively.

10. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program, wherein the computer program, when executed by a processor, implements the steps of the data transmission method as described in any one of claims 1 to 7.

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