Silicon carbide epitaxial structure, method of manufacturing the same, and semiconductor device

Abstract

The embodiment of the present application relates to a silicon carbide epitaxial structure, a preparation method thereof and a semiconductor device, comprising: a substrate, a buffer layer and a silicon carbide epitaxial layer which are sequentially stacked on the substrate; wherein the substrate, the buffer layer and the silicon carbide epitaxial layer have the same conductivity type; the doping concentration of the substrate is higher than that of the buffer layer, and the doping concentration of the buffer layer is higher than that of the silicon carbide epitaxial layer; the silicon carbide epitaxial layer comprises a recombination center sublayer, the distance between the recombination center sublayer and the lower surface is less than the distance between the recombination center sublayer and the upper surface, the lower surface and the upper surface are two opposite surfaces of the silicon carbide epitaxial layer which are close to the substrate and away from the substrate respectively, and the doping concentration of the recombination center sublayer is higher than that of the part of the silicon carbide epitaxial layer which is adjacent to the upper and lower sides of the recombination center sublayer. In this way, by introducing the recombination center sublayer in the silicon carbide epitaxial layer, the problem of high minority carrier lifetime is solved.

Description

Technical Field

[0001] This application relates to the field of semiconductor technology, and in particular to a silicon carbide epitaxial structure, its preparation method, and a semiconductor device. Background Technology

[0002] Silicon carbide (SiC), as a wide bandgap semiconductor material, has outstanding advantages such as high thermal conductivity, high breakdown electric field, high saturation electron drift velocity and high bonding energy. Its excellent performance can meet the requirements of modern electronic technology for high temperature, high frequency, high power and radiation resistance.

[0003] In the fabrication of silicon carbide power devices, the quality of the epitaxial structure directly determines the final performance of the device. A typical silicon carbide epitaxial structure usually consists of a substrate, a buffer layer, and an epitaxial layer (EPI layer). The substrate, as the bottom supporting material, still contains numerous crystal defects despite significant advancements in growth technology. Therefore, a buffer layer is introduced to "heal" these minute defects on the substrate surface and reduce lattice stress. The epitaxial layer is the most important functional layer in the epitaxial structure. It can be precisely controlled during growth to become a low-doped drift region that meets voltage withstand requirements. Furthermore, during subsequent device fabrication, ion implantation can be performed on the epitaxial layer to form doped regions that meet various functional needs.

[0004] However, in existing silicon carbide epitaxial structures, minority carriers tend to remain in the epitaxial layer for extended periods, resulting in a high minority carrier lifetime. When the device is turned off, the reverse recovery charge (Qrr) accumulated in the epitaxial layer cannot be quickly dissipated through recombination mechanisms and must be forcibly removed by external circuitry, leading to a surge in the rate of change of current (di / dt). This effect ultimately results in a consistently high reverse recovery voltage (VRR), making it difficult to meet the stringent safety and reliability requirements of high-voltage, high-frequency applications. Summary of the Invention

[0005] In view of the above, this application provides a silicon carbide epitaxial structure, its preparation method, and a semiconductor device to solve at least one problem existing in the background art.

[0006] In a first aspect, embodiments of this application provide a silicon carbide epitaxial structure, comprising: a substrate and a buffer layer and a silicon carbide epitaxial layer sequentially stacked on the substrate; wherein... The substrate, the buffer layer, and the silicon carbide epitaxial layer have the same conductivity type; The doping concentration of the substrate is higher than that of the buffer layer, and the doping concentration of the buffer layer is higher than that of the silicon carbide epitaxial layer. The silicon carbide epitaxial layer includes a composite central sublayer. The distance between the composite central sublayer and the lower surface is less than the distance between the composite central sublayer and the upper surface. The lower surface and the upper surface are two opposing surfaces of the silicon carbide epitaxial layer that are closer to the substrate and farther away from the substrate, respectively. The doping concentration of the composite central sublayer is higher than the doping concentration of the portion of the silicon carbide epitaxial layer adjacent to the upper and lower sides of the composite central sublayer.

[0007] In conjunction with the first aspect of this application, in an alternative embodiment, The distance between the composite central sublayer and the lower surface is greater than or equal to 0.3 μm; and / or, The distance between the composite central sublayer and the upper surface is greater than or equal to 80% of the total thickness of the silicon carbide epitaxial layer.

[0008] In conjunction with the first aspect of this application, in an alternative embodiment, The thickness of the composite central sublayer is less than or equal to 10% of the total thickness of the silicon carbide epitaxial layer; and / or, The thickness of the composite central sublayer is in the range of 50nm to 200nm.

[0009] In conjunction with the first aspect of this application, in an alternative embodiment, The doping concentration of the silicon carbide epitaxial layer adjacent to the upper and lower sides of the composite central sublayer is equal.

[0010] In conjunction with the first aspect of this application, in an optional embodiment, the substrate, the buffer layer, and the silicon carbide epitaxial layer are all N-type.

[0011] Secondly, embodiments of this application provide a method for preparing a silicon carbide epitaxial structure, the method comprising: Provide substrate; An epitaxial buffer layer is grown on the substrate; A silicon carbide epitaxial layer is grown on the buffer layer; in, The substrate, the buffer layer, and the silicon carbide epitaxial layer have the same conductivity type; The doping concentration of the substrate is higher than that of the buffer layer, and the doping concentration of the buffer layer is higher than that of the silicon carbide epitaxial layer. The epitaxial growth of the silicon carbide epitaxial layer includes: first, epitaxially growing a first thickness on the buffer layer, then increasing the doping concentration to epitaxially grow to form a composite central sublayer, and then decreasing the doping concentration to continue epitaxially growing a second thickness to complete the epitaxial growth of the silicon carbide epitaxial layer, wherein the first thickness is less than the second thickness.

[0012] In conjunction with a second aspect of this application, in an optional embodiment, the composite central sublayer satisfies at least one of the following: The first thickness is greater than or equal to 0.3 μm; The second thickness is greater than or equal to 80% of the total thickness of the silicon carbide epitaxial layer; The thickness of the composite central sublayer is less than or equal to 10% of the total thickness of the silicon carbide epitaxial layer; The thickness of the composite central sublayer is in the range of 50nm to 200nm.

[0013] In conjunction with a second aspect of this application, in an optional embodiment, the doping concentration of the silicon carbide epitaxial layer adjacent to the upper and lower sides of the composite central sublayer is equal.

[0014] In conjunction with a second aspect of this application, in an optional embodiment, the substrate, the buffer layer, and the silicon carbide epitaxial layer are all N-type.

[0015] Thirdly, embodiments of this application provide a semiconductor device comprising a silicon carbide epitaxial structure as described in any one of the first aspects, or fabricated using a silicon carbide epitaxial structure as described in any one of the first aspects.

[0016] Compared with the prior art, this application has the following beneficial effects: The silicon carbide epitaxial structure, its fabrication method, and semiconductor device provided in this application address the issue of high minority carrier lifetime by introducing a recombination center sublayer into the silicon carbide epitaxial layer. Specifically, the doping concentration of this recombination center sublayer is higher than that of the portions adjacent to the upper and lower sides of the recombination center sublayer in the silicon carbide epitaxial layer. This utilizes high-concentration doping to form carrier recombination centers, physically resolving the minority carrier accumulation problem and significantly shortening the minority carrier lifetime. Furthermore, the distance between the recombination center sublayer and the lower surface is less than the distance to the upper surface, meaning the recombination center sublayer is positioned closer to the buffer layer. This ensures that device fabrication on the upper surface of the silicon carbide epitaxial layer is not affected after the recombination centers are introduced. The semiconductor device fabricated based on the silicon carbide epitaxial structure provided in the embodiments of this application significantly reduces the reverse recovery charge that needs to be cleared in the silicon carbide epitaxial layer during the turn-off process, thereby reducing the rate of change of current. According to the principle of electromagnetic induction (U = L × di / dt, where U is the induced voltage and L is the parasitic inductance), the reduction in the rate of change of current directly suppresses the reverse voltage induced by the parasitic inductance, and finally achieves stable control of the reverse recovery voltage, avoiding device breakdown due to voltage spikes, which is especially suitable for high voltage application scenarios.

[0017] Additional aspects and advantages of this application will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of this application. Attached Figure Description

[0018] The accompanying drawings, which are included to provide a further understanding of this application and form part of this application, illustrate exemplary embodiments and are used to explain this application, but do not constitute an undue limitation of this application. In the drawings: Figure 1 This is a cross-sectional schematic diagram of a silicon carbide epitaxial structure provided in an embodiment of this application; Figure 2 for Figure 1 A graph showing the relationship between concentration and depth in silicon carbide epitaxial structures. Figure 3 This is a schematic cross-sectional view of a silicon carbide epitaxial structure in related technologies; Figure 4 for Figure 3 A graph showing the relationship between concentration and depth in silicon carbide epitaxial structures. Figure 5 A schematic flowchart illustrating the method for preparing a silicon carbide epitaxial structure according to an embodiment of this application; Figures 6 to 8 This is a cross-sectional schematic diagram of the silicon carbide epitaxial structure provided in the embodiments of this application during the fabrication process. Detailed Implementation

[0019] Exemplary embodiments of the present application will now be described in more detail with reference to the accompanying drawings. While exemplary embodiments of the present application are shown in the drawings, it should be understood that the present application may be implemented in various forms and should not be limited to the specific embodiments set forth herein. Rather, these embodiments are provided to enable a more thorough understanding of the present application and to fully convey the scope of the disclosure of the present application to those skilled in the art.

[0020] In the following description, numerous specific details are set forth in order to provide a more thorough understanding of this application. However, it will be apparent to those skilled in the art that this application can be practiced without one or more of these details. In other instances, to avoid confusion with this application, some technical features well-known in the art have not been described; that is, not all features of actual embodiments are described herein, nor are well-known functions and structures described in detail.

[0021] In the accompanying drawings, for clarity, the dimensions of the structures and their relative dimensions may be exaggerated. The same reference numerals denote the same structural features throughout.

[0022] When structures are referred to as being "on," "adjacent to," "connected to," or "coupled to" other structures, they may be directly on, adjacent to, connected to, or coupled to other structures, or there may be intervening structures. Conversely, when a structure is referred to as being "directly on," "directly adjacent to," "directly connected to," or "directly coupled to" other structures, there are no intervening structures. Although the terms first, second, third, etc., may be used to describe structures or parts, these terms are only used to distinguish one structure or part from another. Therefore, without departing from the teachings of this application, the first structure or part discussed below may be referred to as the second structure or part. And the discussion of the second structure or part does not imply that the first structure or part necessarily exists in this application.

[0023] Spatial relation terms such as “below,” “under,” “below,” “under,” “above,” “above,” etc., are used herein for convenience of description to describe the relationship of one element or feature shown in the figure to other elements or features. In addition to the orientation shown in the figure, spatial relation terms are intended to also include different orientations of the device in use and operation. For example, if the device in the figure is flipped, then the element or feature described as “below” or “under” the other element or feature will be oriented “above” the other element or feature. Therefore, the exemplary terms “below” and “under” can include both upper and lower orientations. The device may be otherwise oriented (rotated 90 degrees or otherwise) and the spatial descriptive terms used herein will be interpreted accordingly.

[0024] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the scope of this application. When used herein, the singular forms “a,” “an,” and “the” are also intended to include the plural forms unless the context clearly indicates otherwise. It should also be understood that the terms “comprising” and / or “including,” when used in this specification, identify the presence of the stated feature but do not exclude the presence or addition of one or more other features. When used herein, the term “and / or” includes any and all combinations of the associated listed items.

[0025] To fully understand this application, detailed steps and structures will be presented in the following description to illustrate the technical solution of this application. Preferred embodiments of this application are described in detail below; however, in addition to these detailed descriptions, this application may have other implementation methods.

[0026] Please refer to Figure 1This application provides a silicon carbide epitaxial structure, comprising a substrate 110 and a buffer layer 120 and a silicon carbide epitaxial layer 130 sequentially stacked on the substrate 110. The substrate 110, buffer layer 120, and silicon carbide epitaxial layer 130 have the same conductivity type. The doping concentration of the substrate 110 is higher than that of the buffer layer 120, and the doping concentration of the buffer layer 120 is higher than that of the silicon carbide epitaxial layer 130. The silicon carbide epitaxial layer 130 includes a recombination center sublayer 133. The distance between the recombination center sublayer 133 and its lower surface 1301 is less than the distance between it and its upper surface 1302. The lower surface 1301 and the upper surface 1302 are two opposing surfaces of the silicon carbide epitaxial layer 130, one closer to the substrate 110 and the other farther away from the substrate 110. The doping concentration of the recombination center sublayer 133 is higher than the doping concentration of the portions of the silicon carbide epitaxial layer 130 adjacent to the upper and lower sides of the recombination center sublayer 133.

[0027] The portions adjacent to the upper and lower sides of the composite central sublayer 133 can be referenced. Figure 1 The second portion 1320 is adjacent to the upper side of the composite central sublayer 133 and the first portion 1310 is adjacent to the lower side of the composite central sublayer 133.

[0028] Within this field, epitaxial structures can also be called epitaxial wafers.

[0029] Understandably, the silicon carbide epitaxial structure provided in this application solves the problem of high minority carrier lifetime by introducing a recombination center sublayer 133 into the silicon carbide epitaxial layer 130. Specifically, the doping concentration of the recombination center sublayer 133 is higher than the doping concentration of the portion of the silicon carbide epitaxial layer 130 adjacent to the upper and lower sides of the recombination center sublayer 133, thereby utilizing high-concentration doping to form carrier recombination centers, solving the minority carrier accumulation problem from a physical perspective, and significantly shortening the minority carrier lifetime; the distance between the recombination center sublayer 133 and the lower surface 1301 is smaller than the distance between it and the upper surface 1302, that is, the recombination center sublayer 133 is arranged on the side closer to the buffer layer 120, thus ensuring that device fabrication on the upper surface 1302 side of the silicon carbide epitaxial layer 130 is not affected after the recombination center is introduced. The semiconductor device fabricated based on the silicon carbide epitaxial structure provided in this application significantly reduces the reverse recovery charge that needs to be cleared in the silicon carbide epitaxial layer 130 during the turn-off process, thereby reducing the current change rate. According to the principle of electromagnetic induction (U = L × di / dt, where U is the induced voltage and L is the parasitic inductance), the reduction in the current change rate directly suppresses the reverse voltage induced by the parasitic inductance, and finally achieves stable control of the reverse recovery voltage, avoiding device breakdown due to voltage spikes, which is especially suitable for high voltage application scenarios.

[0030] In the various embodiments of this application, the term "substrate" refers to a carrier on which subsequent material layers are added, and is the growth substrate on which the epitaxial growth process is performed. The material of the substrate 110 can be any suitable material known to those skilled in the art, such as silicon carbide. However, this application is not limited to this, and other substrate materials suitable for epitaxial growth of silicon carbide epitaxial layers are obviously also applicable in the embodiments of this application.

[0031] The thickness of the buffer layer 120 is, for example, 100 nm to 700 nm. The material of the buffer layer 120 is silicon carbide. In actual fabrication, the buffer layer 120 is formed, for example, by epitaxial growth directly on the substrate 110.

[0032] The thickness of the silicon carbide epitaxial layer 130 can be set according to the actual device requirements. Further, the total thickness D of the silicon carbide epitaxial layer 130 can be 6 μm to 11 μm. In some embodiments, the total thickness D of the silicon carbide epitaxial layer 130 is, for example, 9 μm to 11 μm. In other embodiments, the total thickness D of the silicon carbide epitaxial layer 130 is, for example, 6 μm to 8 μm.

[0033] The silicon carbide epitaxial layer 130 is formed, for example, by epitaxial growth directly on the buffer layer 120.

[0034] Please refer to Figure 3 and Figure 4 ;in, Figure 3 This is a cross-sectional schematic diagram of a silicon carbide epitaxial structure in related technologies. Figure 4 for Figure 3 A graph showing the relationship between concentration and depth in a medium-density silicon carbide epitaxial structure. (See figure.) Figure 3 and Figure 4 As shown, in related technologies, no composite centers are actively constructed or added within the silicon carbide epitaxial layer 130.

[0035] And such Figure 1 As shown, in the silicon carbide epitaxial structure provided in this application embodiment, a composite central sublayer 133 is introduced into the silicon carbide epitaxial layer 130. Figure 2 for Figure 1 The concentration-depth relationship diagram of medium silicon carbide epitaxial structures, through... Figure 2 and Figure 4 The comparison shows that if the doping concentration of the substrate 110 is C1, the doping concentration of the buffer layer 120 is C2, and the doping concentration of the silicon carbide epitaxial layer 130 is C3, then C1 > C2 > C3.

[0036] It should be understood that the doping concentration of the silicon carbide epitaxial layer 130 refers to the doping concentration of the silicon carbide epitaxial layer 130 obtained after performing the epitaxial growth process; this obviously does not take into account the concentration change caused by ion implantation of the silicon carbide epitaxial layer 130 during the subsequent semiconductor device fabrication process.

[0037] To utilize the recombination center function, during the epitaxial growth of the silicon carbide epitaxial layer 130, a certain thickness (hereinafter referred to as the "first thickness") D1 is first epitaxially grown on the buffer layer 120 according to the doping concentration set in the original process; then, the doping concentration is increased to form the recombination center sublayer 133. Thus, there is a certain distance between the recombination center sublayer 133 and the lower surface 1301 of the silicon carbide epitaxial layer 130, which is also the first thickness D1. Optionally, this distance is greater than or equal to 0.3 μm. More preferably, this distance is in the range of 0.9 μm to 1.1 μm.

[0038] Optionally, the distance D2 between the composite central sublayer 133 and the upper surface 1302 of the silicon carbide epitaxial layer 130 (hereinafter referred to as the "second thickness") is greater than or equal to 80% of the total thickness of the silicon carbide epitaxial layer 130. This ensures that the composite central sublayer 133 maintains a sufficient distance from the upper surface 1302 used for subsequent fabrication of the active region of the device, avoiding adverse effects of high-concentration doped regions on the device channel characteristics and gate oxide quality, thereby improving the device switching characteristics while ensuring the stability of the device's static parameters.

[0039] Understandably, the silicon carbide epitaxial layer 130 is typically a relatively thick functional layer. Furthermore, it can simultaneously satisfy the following conditions: the distance between the composite central sublayer 133 and the lower surface 1301 is greater than or equal to 0.3 μm, and the distance between the composite central sublayer 133 and the upper surface 1302 is greater than or equal to 80% of the total thickness D of the silicon carbide epitaxial layer 130.

[0040] The composite central sublayer 133 itself is a very thin, highly doped sublayer.

[0041] In terms of relative thickness, optionally, the thickness D3 of the composite central sublayer 133 is less than or equal to 10% of the total thickness D of the silicon carbide epitaxial layer 130.

[0042] In terms of absolute thickness, the thickness D3 of the composite center sublayer can optionally be in the range of 50nm to 200nm. This allows for the addition of more composite centers while ensuring the voltage withstand capability and electrical resistance of the silicon carbide epitaxial layer 130 itself.

[0043] Further optionally, the thickness D3 of the composite central sublayer is in the range of 100 nm to 200 nm.

[0044] In actual fabrication, after forming the composite central sublayer 133, the doping concentration is reduced and epitaxial growth continues, eventually completing the growth of the silicon carbide epitaxial layer 130.

[0045] Optionally, the doping concentrations of the two portions (first portion 1310 and second portion 1320) adjacent to the upper and lower sides of the composite central sublayer 133 in the silicon carbide epitaxial layer 130 are equal.

[0046] Alternatively, the dopant introduction concentration is equal in all portions of the silicon carbide epitaxial layer 130 except for the composite central sublayer 133 during growth. See [reference needed] for details. Figure 2 The doping concentration of the composite central sublayer 133 is C33, and the doping concentration of the other parts of the silicon carbide epitaxial layer 130 excluding the composite central sublayer 133 is C31, and C31 is equal to the doping concentration C3 of the silicon carbide epitaxial layer 130 in the related art.

[0047] As one optional specific implementation, C31 has a density of 1E16 atoms / cm². 3 C33 has 1E17±20% atoms / cm³ 3 Thus, by setting the doping concentration C33 of the composite central sublayer 133 to 1E17±20% atoms / cm 3 Within this range, it will not affect the voltage withstand or resistance performance of the silicon carbide epitaxial layer 130 itself, and can increase more composite centers.

[0048] Furthermore, C2 has a density of 1E18 atoms / cm². 3 C1 has a density of 1E19 atoms / cm². 3 .

[0049] As an optional specific implementation, the dopant is an N-type dopant, and the substrate 110, buffer layer 120, and silicon carbide epitaxial layer 130 are all N-type. Those skilled in the art will understand that the substrate 110, buffer layer 120, and silicon carbide epitaxial layer 130 can also be P-type in terms of conductivity, and this application does not specifically limit this.

[0050] This application also provides a method for preparing a silicon carbide epitaxial structure. Please refer to [link / reference]. Figure 5 The method includes: Step S1: Provide a substrate; Step S2: Epitaxially grow a buffer layer on the substrate; Step S3: Epitaxially grow a silicon carbide epitaxial layer on the buffer layer.

[0051] The substrate, buffer layer, and silicon carbide epitaxial layer have the same conductivity type; the doping concentration of the substrate is higher than that of the buffer layer, and the doping concentration of the buffer layer is higher than that of the silicon carbide epitaxial layer.

[0052] Step S3 includes: first, epitaxially growing a first thickness on the buffer layer; then, increasing the doping concentration to epitaxially grow a composite central sublayer; and then, decreasing the doping concentration to continue epitaxially growing a second thickness to complete the epitaxial growth of the silicon carbide epitaxial layer. The first thickness is less than the second thickness.

[0053] Understandably, similar to the silicon carbide epitaxial structure embodiment, this embodiment solves the minority carrier accumulation problem from a physical perspective by increasing the doping concentration during the growth of the silicon carbide epitaxial layer, thereby increasing the number of highly doped recombination sublayers and significantly shortening the minority carrier lifetime. Specifically, a first thickness is first epitaxially grown on the buffer layer, then the doping concentration is increased to form a recombination sublayer, and then the doping concentration is reduced to continue epitaxial growth to a second thickness to complete the epitaxial growth of the silicon carbide epitaxial layer. It is evident that the doping concentration of the formed recombination sublayer is higher than that of the portions adjacent to it above and below, thus increasing defects to introduce recombination centers while ensuring that the original performance of the silicon carbide epitaxial layer is not affected. The first thickness is less than the second thickness, meaning the recombination sublayer is positioned closer to the buffer layer, ensuring that device fabrication on the upper surface of the silicon carbide epitaxial layer after the recombination centers are introduced will not cause adverse effects.

[0054] Below, we will combine Figures 6 to 8 The preparation method of this embodiment will be further described in detail.

[0055] First, please refer to Figure 6 Substrate 110 is provided.

[0056] The substrate 110 can be made of any suitable material known to those skilled in the art, such as silicon carbide. However, this application is not limited to this, and other substrate materials suitable for epitaxial growth of silicon carbide epitaxial layers are obviously also applicable in the embodiments of this application.

[0057] In actual fabrication, the substrate 110 is pretreated before the epitaxial growth process. Specifically, taking an N-type SiC substrate as an example, the N-type SiC substrate is cleaned (to remove oil, impurities, etc.) and baked at high temperature to ensure that the substrate surface is clean and atomically flat, thereby providing a good substrate for epitaxial growth.

[0058] Next, please refer to Figure 7 A buffer layer 120 is epitaxially grown on a substrate 110.

[0059] The thickness of the buffer layer 120 is, for example, 100 nm to 700 nm. The material of the buffer layer 120 is silicon carbide. In actual fabrication, the buffer layer 120 is formed, for example, by epitaxial growth directly on the substrate 110.

[0060] The buffer layer 120 is used to "heal" minute defects on the surface of the substrate 110 and reduce lattice stress. Specifically, on the pretreated substrate 110, a specific gas (such as SiH4, C3H8, or a low-concentration N-type dopant) is first introduced, and a thin buffer layer 120 of 100 nm to 700 nm is grown at a slightly lower or specific temperature (usually slightly lower than the growth temperature of the subsequent silicon carbide epitaxial layer 130).

[0061] The doping type of the buffer layer 120 is the same as the conductivity type of the substrate 110, for example, both are N-type.

[0062] The doping concentration of substrate 110 is higher than that of buffer layer 120. This configuration provides a good transition for high-quality epitaxial growth.

[0063] Next, please refer to Figure 8 A silicon carbide epitaxial layer 130 is epitaxially grown on the buffer layer 120.

[0064] The silicon carbide epitaxial layer 130 has the same doping type as the buffer layer 120 and the substrate 110, for example, both being N-type. The doping concentration C3 of the silicon carbide epitaxial layer 130 is lower than the doping concentration C1 of the substrate 110 and the doping concentration C2 of the buffer layer 120; thus, the breakdown voltage requirements of the device for the low-doped drift region are met.

[0065] The silicon carbide epitaxial layer 130 is formed, for example, by epitaxial growth directly on the buffer layer 120.

[0066] As an optional specific implementation, a silicon carbide epitaxial layer 130 with a target thickness and doping concentration is grown on top of the buffer layer 120 by introducing a silicon source, a carbon source, and an N-type dopant according to the original epitaxial growth process. During the growth process, extremely thin high-doping is controlled at approximately the first thickness near the buffer layer 120, thereby introducing recombination centers.

[0067] The thickness of the silicon carbide epitaxial layer 130 can be set according to the actual device requirements. Further, the total thickness D of the silicon carbide epitaxial layer 130 can be 6 μm to 11 μm. In some embodiments, the total thickness D of the silicon carbide epitaxial layer 130 is, for example, 9 μm to 11 μm. In other embodiments, the total thickness D of the silicon carbide epitaxial layer 130 is, for example, 6 μm to 8 μm.

[0068] To leverage the role of the recombination center, during the epitaxial growth of the silicon carbide epitaxial layer 130, a certain thickness is first grown on the buffer layer 120 according to the doping concentration set in the original process to form a first sublayer 131 with a first thickness D1. Then, the doping concentration is increased to form a recombination center sublayer 133 with a third thickness D3. Finally, the doping concentration is reduced to continue epitaxial growth to a second thickness D2, completing the epitaxial growth of the silicon carbide epitaxial layer.

[0069] Optionally, the first thickness D1 is greater than or equal to 0.3 μm. More optionally, the first thickness D1 is in the range of 0.9 μm to 1.1 μm.

[0070] Optionally, the third thickness D3, in terms of relative thickness, is less than or equal to 10% of the total thickness D of the silicon carbide epitaxial layer 130; in terms of absolute thickness, it is in the range of 50 nm to 200 nm. Understandably, the composite central sublayer 133 itself is an extremely thin, highly doped sublayer.

[0071] Optionally, the second thickness D2 is greater than or equal to 80% of the total thickness of the silicon carbide epitaxial layer 130. This ensures that the composite central sublayer 133 maintains a sufficient distance from the upper surface 1302 used for subsequent fabrication of the active region of the device, avoiding adverse effects of high-concentration doped regions on the device channel characteristics and gate oxide quality, thereby improving the device switching characteristics while ensuring the stability of the device's static parameters.

[0072] Understandably, the silicon carbide epitaxial layer 130 is typically a relatively thick functional layer. Furthermore, it can simultaneously satisfy the following conditions: a first thickness D1 greater than or equal to 0.3 μm, and a second thickness D2 greater than or equal to 80% of the total thickness D of the silicon carbide epitaxial layer 130.

[0073] Optionally, the doping concentrations of the two portions (first portion 1310 and second portion 1320) adjacent to the composite central sublayer 133 in the silicon carbide epitaxial layer 130 are equal. Further optionally, the dopant introduction concentrations are equal in the other portions of the silicon carbide epitaxial layer 130 besides the composite central sublayer 133 during growth. See [reference needed] for details. Figure 2 The doping concentration of the composite central sublayer 133 is C33, and the doping concentration of the other parts of the silicon carbide epitaxial layer 130 excluding the composite central sublayer 133 is C31, and C31 is equal to the doping concentration C3 of the silicon carbide epitaxial layer 130 in the related art.

[0074] After performing step S3, the method may further include post-processing and detection steps.

[0075] Specifically, after growth is completed, the temperature is lowered; in addition to testing the parameters of the silicon carbide epitaxial layer 130, the defect suppression effect of the buffer layer 120 also needs to be evaluated to ensure that the overall epitaxial wafer meets the device manufacturing requirements.

[0076] Those skilled in the art will understand that the silicon source used in the epitaxial growth process may include at least one of silane, dichlorosilane, trichlorosilane, and tetrachlorosilane; the carbon source may include at least one of methane, ethylene, acetylene, and propane; and the N-type dopant may include nitrogen-containing gases, such as nitrogen or ammonia. The process parameters such as temperature, pressure, and gas flow rate during epitaxial growth can be adjusted according to actual equipment conditions and target film requirements, and this application does not impose specific limitations in these aspects.

[0077] Based on this, the present application also provides a semiconductor device, including the silicon carbide epitaxial structure in the foregoing embodiments, or fabricated using the silicon carbide epitaxial structure in the foregoing embodiments.

[0078] The semiconductor device can be, for example, a SiC MOSFET. Alternatively, it can be a JSB (Junction Barrier Schottky) diode, etc.

[0079] It should be noted that the silicon carbide epitaxial structure embodiments, silicon carbide epitaxial structure preparation method embodiments, and semiconductor device embodiments provided in this application belong to the same concept; the technical features in the technical solutions described in each embodiment can be arbitrarily combined without conflict.

[0080] It should be understood that the above embodiments are exemplary and not intended to encompass all possible implementations. Various modifications and changes can be made to the above embodiments without departing from the scope of this disclosure. Similarly, the various technical features of the above embodiments can be arbitrarily combined to form other embodiments of this application that may not be explicitly described. Therefore, the above embodiments only illustrate several implementations of this application and do not limit the scope of protection of this patent application.

Claims

1. A silicon carbide epitaxial structure, characterized in that, include: A substrate and a buffer layer and a silicon carbide epitaxial layer sequentially stacked on the substrate; wherein, The substrate, the buffer layer, and the silicon carbide epitaxial layer have the same conductivity type; The doping concentration of the substrate is higher than that of the buffer layer, and the doping concentration of the buffer layer is higher than that of the silicon carbide epitaxial layer. The silicon carbide epitaxial layer includes a composite central sublayer. The distance between the composite central sublayer and the lower surface is less than the distance between the composite central sublayer and the upper surface. The lower surface and the upper surface are two opposing surfaces of the silicon carbide epitaxial layer that are closer to the substrate and farther away from the substrate, respectively. The doping concentration of the composite central sublayer is higher than the doping concentration of the portion of the silicon carbide epitaxial layer adjacent to the upper and lower sides of the composite central sublayer.

2. The silicon carbide epitaxial structure according to claim 1, characterized in that, The distance between the composite central sublayer and the lower surface is greater than or equal to 0.3 μm; and / or, The distance between the composite central sublayer and the upper surface is greater than or equal to 80% of the total thickness of the silicon carbide epitaxial layer.

3. The silicon carbide epitaxial structure according to claim 1, characterized in that, The thickness of the composite central sublayer is less than or equal to 10% of the total thickness of the silicon carbide epitaxial layer; and / or, The thickness of the composite central sublayer is in the range of 50nm to 200nm.

4. The silicon carbide epitaxial structure according to claim 1, characterized in that, The doping concentration of the silicon carbide epitaxial layer adjacent to the upper and lower sides of the composite central sublayer is equal.

5. The silicon carbide epitaxial structure according to claim 1, characterized in that, The substrate, the buffer layer, and the silicon carbide epitaxial layer are all N-type.

6. A method for preparing a silicon carbide epitaxial structure, characterized in that, The method includes: Provide substrate; An epitaxial buffer layer is grown on the substrate; A silicon carbide epitaxial layer is grown on the buffer layer; in, The substrate, the buffer layer, and the silicon carbide epitaxial layer have the same conductivity type; The doping concentration of the substrate is higher than that of the buffer layer, and the doping concentration of the buffer layer is higher than that of the silicon carbide epitaxial layer. The epitaxial growth of the silicon carbide epitaxial layer includes: first, epitaxially growing a first thickness on the buffer layer, then increasing the doping concentration to epitaxially grow to form a composite central sublayer, and then decreasing the doping concentration to continue epitaxially growing a second thickness to complete the epitaxial growth of the silicon carbide epitaxial layer, wherein the first thickness is less than the second thickness.

7. The method for preparing a silicon carbide epitaxial structure according to claim 6, characterized in that, The composite central sublayer satisfies at least one of the following: The first thickness is greater than or equal to 0.3 μm; The second thickness is greater than or equal to 80% of the total thickness of the silicon carbide epitaxial layer; The thickness of the composite central sublayer is less than or equal to 10% of the total thickness of the silicon carbide epitaxial layer; The thickness of the composite central sublayer is in the range of 50nm to 200nm.

8. The method for preparing a silicon carbide epitaxial structure according to claim 6, characterized in that, The doping concentration of the silicon carbide epitaxial layer adjacent to the upper and lower sides of the composite central sublayer is equal.

9. The method for preparing a silicon carbide epitaxial structure according to claim 6, characterized in that, The substrate, the buffer layer, and the silicon carbide epitaxial layer are all N-type.

10. A semiconductor device, characterized in that, It includes the silicon carbide epitaxial structure as described in any one of claims 1 to 5, or is prepared using the silicon carbide epitaxial structure as described in any one of claims 1 to 5.

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