Semiconductor structure and method of forming the same
CN122438375APending Publication Date: 2026-07-21BEIJING INTPROP OPERATION MANAGEMENT CO LTD
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Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- BEIJING INTPROP OPERATION MANAGEMENT CO LTD
- Filing Date
- 2025-01-21
- Publication Date
- 2026-07-21
AI Technical Summary
Technical Problem
反相器的信号传输在PULVT会变慢,导致N/P MOS传输信号不同步
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Abstract
The application provides a semiconductor structure and a forming method thereof. The semiconductor structure comprises a semiconductor substrate, a PMOS structure is formed on the surface of the semiconductor substrate, the PMOS structure comprises a fin and a gate structure covering the top and sidewall of the fin; the gate structure on the top of the fin comprises a second metal layer and a third metal layer stacked from bottom to top in sequence, and the resistivity of the third metal layer is less than that of the second metal layer. The application provides a semiconductor structure and a forming method thereof. By reducing the titanium nitride of the gate structure in the PULVT device, the gate resistance difference between the PULVT and the NULVT is reduced, and the N / P MOS transmission signal synchronization rate is improved.
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