LED device, array substrate and manufacturing method thereof, display panel
By using GaN materials with different polarities to design and etch independent structures in the epitaxial layer of LEDs, and combining them with a reflective layer and a filter layer, the problems of low photon utilization and leakage current during LED etching are solved, thereby improving luminous efficiency and electron utilization.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- BOE TECHNOLOGY GROUP CO LTD
- Filing Date
- 2025-01-21
- Publication Date
- 2026-07-21
AI Technical Summary
During the etching process of LEDs, the photons formed on the sidewalls cannot be effectively utilized, resulting in low luminous efficiency. Furthermore, the etched LED sidewalls contain defects and damage, creating leakage current channels.
The design employs N-polar GaN for the flat portion and Ga-polar GaN for the tilted portion of the epitaxial layer material. Combined with a reflective layer and electrode structure, the epitaxial layer is divided into independent structures by etching to form isolation trenches. A filter layer is then set on the array substrate to improve photon utilization and reduce leakage current.
It improves the luminous efficiency of LEDs, reduces leakage current, enhances the radiative recombination efficiency of quantum wells, reduces electron leakage, and improves overall luminous performance.
Smart Images
Figure CN122438433A_ABST
Abstract
Description
Technical Field
[0001] This disclosure relates to the field of display technology, and in particular to an LED device, an array substrate and its manufacturing method, and a display panel. Background Technology
[0002] In related technologies, during the LED manufacturing process, the motherboard needs to be etched to cut it into multiple individual LED chips. Electrons and holes recombine on the sidewalls formed by the etching to form photons. However, the photons formed on the sidewalls cannot be effectively utilized, resulting in low luminous efficiency of the LED. In addition, the sidewalls formed by the etching will form a large number of defects and damages, which will also form leakage channels for charge carriers, thus forming leakage current on the sidewalls.
[0003] It should be noted that the information disclosed in the background section above is only used to enhance the understanding of the background of this disclosure, and therefore may include information that does not constitute prior art known to those skilled in the art. Summary of the Invention
[0004] According to one aspect of this disclosure, an LED device is provided, wherein the LED device includes: an epitaxial layer, the epitaxial layer including at least a P-type semiconductor layer, an N-type semiconductor layer, and a multi-quantum-well layer located between the P-type semiconductor layer and the N-type semiconductor layer;
[0005] The epitaxial layer includes a flat portion and an inclined portion inclinedly connected to the edge of the flat portion. The inclined portion and the flat portion form a first groove. The orthographic projection of the opening of the first groove away from the flat portion on the plane where the flat portion is located covers the orthographic projection of the opening of the first groove near the flat portion on the plane where the flat portion is located.
[0006] The material of the epitaxial layer includes GaN, wherein the GaN in the flat portion is N-polar GaN, and the GaN in the inclined portion is Ga-polar GaN.
[0007] In an exemplary embodiment of this disclosure, the P-type semiconductor layer is a P-type GaN layer, the material of the P-type semiconductor layer located in the flat portion is N-polar GaN, and the material of the P-type semiconductor layer located in the inclined portion is Ga-polar GaN;
[0008] The N-type semiconductor layer is an N-type GaN layer. The material of the N-type semiconductor layer located in the flat portion is N-polar GaN, and the material of the N-type semiconductor layer located in the inclined portion is Ga-polar GaN.
[0009] The multi-quantum well layer includes a barrier layer and a well layer stacked together. The barrier layer located in the flat portion is made of N-polar GaN, the barrier layer located in the inclined portion is made of Ga-polar GaN, the well layer located in the flat portion is made of N-polar InGaN, and the well layer located in the inclined portion is made of Ga-polar InGaN.
[0010] In one exemplary embodiment of this disclosure, the LED device further includes:
[0011] A reflective layer is located on one side of the epitaxial layer;
[0012] The first electrode portion is located on the side of the reflective layer opposite to the epitaxial layer, and the first electrode portion is connected to the flat portion through a via penetrating the reflective layer.
[0013] In one exemplary embodiment of this disclosure, the orthographic projection of the reflective layer onto the plane where the flat portion is located covers the flat portion.
[0014] According to one aspect of this disclosure, an array substrate is provided, wherein the array substrate includes a plurality of the above-described LED devices.
[0015] In one exemplary embodiment of this disclosure, the LED device includes a first electrode portion and a second electrode portion, the first electrode portion and the second electrode portion are respectively connected to both sides of the epitaxial layer, and the second electrode portions of the plurality of LED devices are interconnected to form a common electrode layer;
[0016] The array substrate further includes:
[0017] A first substrate, wherein the first electrode layer is located between the first substrate and the epitaxial layer;
[0018] A filter layer is located on the side of the common electrode layer opposite to the first substrate. The filter layer includes a plurality of filter portions corresponding to the LED device. In the corresponding filter portions and the LED device, the orthographic projection of the filter portion on the first substrate and the orthographic projection of the flat portion of the LED device on the first substrate at least partially overlap.
[0019] According to one aspect of this disclosure, a method for fabricating an array substrate is provided, wherein the method includes:
[0020] A patterned nucleation layer is formed on a substrate, and the nucleation layer and the substrate form a plurality of second grooves, wherein the orthographic projection of the opening of the second groove away from the substrate on the substrate covers the orthographic projection of the opening of the second groove close to the substrate on the substrate;
[0021] An epitaxial layer is formed on the side of the nucleation layer away from the substrate. The epitaxial layer includes at least a P-type semiconductor layer, an N-type semiconductor layer, and a multi-quantum-well layer located between the P-type semiconductor layer and the N-type semiconductor layer.
[0022] The epitaxial layer is made of GaN. The epitaxial layer formed on the substrate forms a flat portion, and the epitaxial layer formed on the sidewall of the second groove forms a tilted portion. The GaN in the flat portion is N-polar GaN, and the GaN in the tilted portion is Ga-polar GaN.
[0023] In one exemplary embodiment of this disclosure, the method for fabricating the array substrate further includes:
[0024] The substrate is peeled off, and a first substrate and a plurality of spaced first electrode portions are formed on one side of the substrate on the epitaxial layer. The first electrode portions are located between the first substrate and the epitaxial layer. The first electrode portions and the planar portions are correspondingly disposed. The orthographic projection of the first electrode portion on the first substrate and the orthographic projection of the corresponding planar portion on the first substrate at least partially overlap.
[0025] The epitaxial layer and the nucleation layer are etched along the extension direction of the nucleation layer to form an isolation trench surrounding the second groove. The isolation trench divides the epitaxial layer formed in each of the second grooves into independent structures, and the isolation trench is filled with a first insulating structure.
[0026] A common electrode layer is formed on the side of the first insulating structure away from the first substrate, and a plurality of filter portions are formed on the side of the common electrode layer away from the first substrate. The filter portions and the independent structures are correspondingly arranged, and the orthographic projection of the filter portion on the first substrate and the orthographic projection of the corresponding independent structure on the first substrate at least partially overlap.
[0027] In one exemplary embodiment of this disclosure, the method for fabricating the array substrate further includes:
[0028] Multiple reflective layers are formed on the side of the epitaxial layer away from the substrate, and the reflective layers are correspondingly disposed with the second groove, with at least a portion of the reflective layer located within the second groove corresponding to it;
[0029] A plurality of first electrode portions are formed on the side of the reflective layer away from the substrate. The first electrode portions are disposed correspondingly to the reflective layer. The first electrode portions are connected to the epitaxial layer through through-holes penetrating the corresponding reflective layer.
[0030] A first substrate is formed on the side of the plurality of first electrode portions facing away from the substrate, and the substrate and the nucleation layer are peeled off;
[0031] The epitaxial layer and the nucleation layer are etched along the extension direction of the nucleation layer to form an isolation trench surrounding the second groove, the isolation trench dividing the epitaxial layer formed in each of the second grooves into independent structures;
[0032] A second insulating structure is filled in the isolation groove, and a common electrode layer is formed on the side of the second insulating structure away from the first substrate. A plurality of filter portions are formed on the side of the common electrode layer away from the first substrate. The filter portions and the independent structures are correspondingly arranged, and the orthographic projection of the filter portion on the first substrate and the orthographic projection of the corresponding independent structure on the first substrate at least partially overlap.
[0033] In one exemplary embodiment of this disclosure, the distance between adjacent bottoms of the second groove in any direction is greater than the dimension of the bottom of the second groove in that direction;
[0034] The epitaxial layer conformally covers the second groove, and the side of the epitaxial layer opposite to the substrate forms a conformal groove. The method for fabricating the array substrate further includes:
[0035] A first filling layer is formed on the side of the epitaxial layer away from the substrate, the first filling layer at least partially filling the conformal groove, and a first temporary substrate is formed on the side of the first filling layer away from the substrate;
[0036] The substrate and nucleation layer are peeled off, and a third groove is formed at the location of the peeled nucleation layer. A second filling layer is formed on the epitaxial layer on the side away from the first temporary substrate. The second filling layer at least partially fills the third groove.
[0037] The second filling layer, the epitaxial layer, and the first filling layer are etched to form an isolation trench. The isolation trench divides the area where the second trench is located and the area where the third trench is located into independent structures. Both the second trench and the third trench retain sidewalls. The first filling layer and the epitaxial layer in the area where the second trench is located form a first independent structure, and the second filling layer and the epitaxial layer in the area where the third trench is located form a second independent structure.
[0038] The first independent structure is transferred onto the first substrate, and a first electrode portion is formed between the first independent structure and the first substrate;
[0039] The second independent structure is transferred to a second temporary substrate, and the second filling layer is located between the second temporary substrate and the epitaxial layer;
[0040] The second independent structure is transferred onto the first substrate, and a first electrode portion is formed between the second independent structure and the first substrate.
[0041] In one exemplary embodiment of this disclosure, the method for fabricating the array substrate further includes:
[0042] Remove the first and second filler layers, and fill the space between the first independent structure and the second independent structure with a third insulating structure;
[0043] A common electrode layer is formed on the side of the third insulating structure away from the first substrate, and a plurality of filter portions are formed on the side of the common electrode layer away from the first substrate. The filter portions and the independent structures are correspondingly arranged, and the orthographic projection of the filter portion on the first substrate and the orthographic projection of the corresponding independent structure on the first substrate at least partially overlap.
[0044] A second substrate is formed on the side of the filter portion opposite to the first substrate.
[0045] In one exemplary embodiment of this disclosure, the distance between adjacent bottoms of the second groove in any direction is greater than the dimension of the bottom of the second groove in that direction;
[0046] The epitaxial layer conformally covers the second groove, and the side of the epitaxial layer opposite to the substrate forms a conformal groove. The method for fabricating the array substrate further includes:
[0047] A first reflective layer is formed on the side of the epitaxial layer away from the substrate, the first reflective layer at least partially filling the conformal groove, and a first temporary substrate is formed on the side of the first reflective layer away from the substrate;
[0048] The substrate and nucleation layer are peeled off, and a third groove is formed at the location of the peeled nucleation layer. A second reflective layer is formed on the epitaxial layer on the side away from the first temporary substrate, and the second reflective layer at least partially fills the third groove.
[0049] The second reflective layer, the epitaxial layer, and the first reflective layer are etched to form an isolation trench. The isolation trench divides the area where the second trench is located and the area where the third trench is located into independent structures. Both the second trench and the third trench retain sidewalls. The first reflective layer and the epitaxial layer in the area where the second trench is located form a first independent structure, and the second reflective layer and the epitaxial layer in the area where the third trench is located form a second independent structure.
[0050] A first electrode portion is formed on the side of the second independent structure away from the first temporary substrate. The first electrode portion is connected to the epitaxial layer through a via penetrating the second reflective layer. The second independent structure with the first electrode portion is transferred onto the first substrate. The first electrode portion is located between the second independent structure and the first substrate.
[0051] The first independent structure is transferred to a second temporary substrate, wherein the first reflective layer is located on the side of the second temporary substrate opposite to the epitaxial layer;
[0052] A first electrode portion is formed on the side of the first independent structure away from the second temporary substrate. The first electrode portion is connected to the epitaxial layer through a via penetrating the first reflective layer. The first independent structure with the first electrode portion is transferred onto the first substrate. The first electrode portion is located between the first independent structure and the first substrate.
[0053] In one exemplary embodiment of this disclosure, the method for fabricating the array substrate further includes:
[0054] A third insulating structure is filled between the first independent structure and the second independent structure. A common electrode layer is formed on the side of the third insulating structure away from the first substrate. A plurality of filter portions are formed on the side of the common electrode layer away from the first substrate. The orthographic projection of the filter portion on the first substrate and the orthographic projection of the corresponding independent structure on the first substrate at least partially overlap.
[0055] A second substrate is formed on the side of the filter portion opposite to the first substrate.
[0056] In one exemplary embodiment of this disclosure, the substrate is a sapphire substrate, and the nucleation layer is an AlN layer.
[0057] According to one aspect of this disclosure, a display panel is provided, wherein the display panel includes the array substrate described above.
[0058] It should be understood that the above general description and the following detailed description are exemplary and explanatory only, and are not intended to limit this disclosure. Attached Figure Description
[0059] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this disclosure and, together with the description, serve to explain the principles of this disclosure. It is obvious that the drawings described below are merely some embodiments of this disclosure, and those skilled in the art can obtain other drawings based on these drawings without any inventive effort.
[0060] Figure 1 This is a schematic diagram of the structure of an exemplary embodiment of the LED device disclosed herein;
[0061] Figure 2 This is a schematic diagram of another exemplary embodiment of the LED device disclosed herein;
[0062] Figures 3-11This is a schematic flowchart of an exemplary embodiment of the array substrate fabrication method disclosed herein.
[0063] Figures 12-17 This is a schematic flowchart of another exemplary embodiment of the array substrate fabrication method of the present disclosure;
[0064] Figures 18-27 This is a schematic flowchart of another exemplary embodiment of the array substrate fabrication method of the present disclosure;
[0065] Figures 28-35 This is a schematic flowchart of another exemplary embodiment of the array substrate fabrication method disclosed herein. Detailed Implementation
[0066] Exemplary embodiments will now be described more fully with reference to the accompanying drawings. However, these exemplary embodiments can be implemented in many forms and should not be construed as limited to the examples set forth herein; rather, they are provided so that this disclosure will be more comprehensive and complete, and will fully convey the concept of the exemplary embodiments to those skilled in the art. The same reference numerals in the drawings denote the same or similar structures, and therefore their detailed description will be omitted.
[0067] The terms “a,” “one,” and “the” are used to indicate the existence of one or more elements / components / etc.; the terms “including” and “having” are used to indicate an open-ended meaning of inclusion and that there may be other elements / components / etc. in addition to the listed elements / components / etc.
[0068] like Figure 1 The diagram shown is a schematic structural representation of an exemplary embodiment of the LED device disclosed herein. The LED device includes: an epitaxial layer 1, which includes at least a P-type semiconductor layer 11, an N-type semiconductor layer 12, and a multi-quantum well layer 103 located between the P-type semiconductor layer 11 and the N-type semiconductor layer 12; wherein, the epitaxial layer 1 includes a flat portion 101 and an inclined portion 102 inclinedly connected to the edge of the flat portion 101, the inclined portion 102 and the flat portion 101 forming a first groove 21, the orthographic projection of the opening of the first groove 21 away from the flat portion 101 on the plane where the flat portion 101 is located covers the orthographic projection of the opening of the first groove 21 near the flat portion 101 on the plane where the flat portion is located; the material of the epitaxial layer 1 includes GaN, the GaN in the flat portion 101 is N-polar GaN, and the GaN in the inclined portion 102 is Ga-polar GaN.
[0069] N-polar GaN and Ga-polar GaN are two different polar forms of GaN (gallium nitride) materials, and they differ significantly in crystal structure and material properties. If the Ga atoms in each Ga-N bond are closer to the substrate, the GaN crystal is a Ga-polar GaN crystal. If the N atoms in each Ga-N bond are closer to the substrate, the GaN crystal is an N-polar GaN crystal.
[0070] Under a forward bias voltage, N-polar GaN reduces band bending in the quantum well region, thereby weakening the quantum confinement Stark effect on the entire quantum well and improving the radiative recombination efficiency of the material. Conversely, under a forward bias voltage, GaN increases band bending in the quantum well region, thereby enhancing the quantum confinement Stark effect on the entire quantum well and reducing the radiative recombination efficiency of the material. In this exemplary embodiment, the flat portion 101 is made of N-polar GaN, and the inclined portion 102 is made of Ga-polar GaN. This configuration improves the radiative recombination efficiency of the flat portion 101 and reduces the radiative recombination efficiency of the inclined portion 102. In other words, this exemplary embodiment can improve the radiative recombination efficiency of the flat portion 101, which has higher light extraction efficiency, and reduce the radiative recombination efficiency of the inclined portion 102, which has lower light extraction efficiency, thereby improving the overall luminous efficiency of the LED device.
[0071] Meanwhile, the tilted portion 102 can reduce the probability of total internal reflection of light emitted by the LED device, thereby further improving the luminous efficiency of the LED device. In addition, the electron overflow barrier in the nitrogen polar quantum well is significantly higher than that in the gallium polar quantum well, which can effectively suppress electron leakage from the active region to the p-type layer, thereby alleviating the efficiency decline of the LED under high current.
[0072] In this exemplary embodiment, as Figure 1 As shown, the P-type semiconductor layer 11 is a P-type GaN layer. The material of the P-type semiconductor layer 11 located in the planar portion 101 is N-polar GaN, and the material of the P-type semiconductor layer 11 located in the inclined portion 102 is Ga-polar GaN. The N-type semiconductor layer is an N-type GaN layer. The material of the N-type semiconductor layer 12 located in the planar portion 101 is N-polar GaN, and the material of the N-type semiconductor layer 12 located in the inclined portion 102 is Ga-polar GaN. The multiple quantum well layer may include a barrier layer and a well layer stacked together. The material of the barrier layer located in the planar portion 101 is N-polar GaN, and the material of the barrier layer located in the inclined portion 102 is Ga-polar GaN. The material of the well layer located in the planar portion 101 includes N-polar InGaN, and the material of the well layer located in the inclined portion 102 includes Ga-polar InGaN.
[0073] In this exemplary embodiment, as Figure 1As shown, the LED device may further include a first electrode portion 31 and a second electrode portion 32, which may be connected to opposite sides of the epitaxial layer 1.
[0074] like Figure 2 The diagram shown is a structural schematic of another exemplary embodiment of the LED device disclosed herein. The LED device further includes: a reflective layer 4 and a first electrode portion 31. The reflective layer 4 is located on one side of the epitaxial layer 1; the first electrode portion 31 is located on the side of the reflective layer 4 opposite to the epitaxial layer 1, and the first electrode portion 31 is connected to the flat portion 101 through a via penetrating the reflective layer 4. The reflective layer 4 can improve the light extraction efficiency of the LED device. The reflective layer 4 can be a Bragg reflector structure.
[0075] In this exemplary embodiment, as Figure 2 As shown, the orthographic projection of the reflective layer 4 onto the plane where the flat portion 101 is located covers the flat portion 101.
[0076] This exemplary embodiment also provides a method for manufacturing an array substrate, the array substrate including a plurality of LED devices. For example... Figure 3-11 As shown, Figure 3-11 This is a schematic flowchart of an exemplary embodiment of the array substrate fabrication method disclosed herein.
[0077] like Figure 3 , 4 As shown, Figure 3 A top view of the array substrate is shown. Figure 4 It shows Figure 3 The diagram shows a cross-sectional view of the semi-finished array substrate along the dashed line AA. The array substrate fabrication method includes: forming a patterned nucleation layer 52 on a substrate 51; the nucleation layer 52 and the substrate 51 form a plurality of second grooves 22; the orthographic projection of the opening of the second groove 22 away from the substrate 51 on the substrate covers the orthographic projection of the opening of the second groove 22 close to the substrate 51 on the substrate, that is, the opening of the second groove 22 gradually increases in the direction away from the substrate 51.
[0078] like Figure 5 As shown, an epitaxial layer 53 is formed on the side of the nucleation layer 52 away from the substrate 51. The epitaxial layer 53 includes at least a P-type semiconductor layer, an N-type semiconductor layer, and a multi-quantum well layer located between the P-type semiconductor layer and the N-type semiconductor layer. The material of the epitaxial layer includes GaN. The epitaxial layer formed on the substrate 51 forms a flat portion 101, and the epitaxial layer formed on the sidewall of the second groove 22 forms a tilted portion 102. Since the materials of the substrate 51 and the nucleation layer 52 are different, the GaN in the flat portion 101 is N-polar GaN, and the GaN in the tilted portion 102 is Ga-polar GaN.
[0079] In this exemplary embodiment, the P-type semiconductor layer is a P-type GaN layer, the material of the P-type semiconductor layer located in the flat portion 101 is N-polar GaN, and the material of the P-type semiconductor layer located in the inclined portion 102 is Ga-polar GaN; the N-type semiconductor layer is an N-type GaN layer, the material of the N-type semiconductor layer located in the flat portion 101 is N-polar GaN, and the material of the N-type semiconductor layer located in the inclined portion 102 is Ga-polar GaN; the multiple quantum well layer may include a barrier layer and a well layer stacked together, the material of the barrier layer located in the flat portion 101 is N-polar GaN, the material of the barrier layer located in the inclined portion 102 is Ga-polar GaN, the material of the well layer located in the flat portion 101 includes N-polar InGaN, and the material of the well layer located in the inclined portion 102 includes Ga-polar InGaN.
[0080] It should be understood that, in other exemplary embodiments, the epitaxial layer 53 may also include an undoped GaN layer, an electron blocking layer, etc. The undoped GaN layer may be located between the substrate 51 and the epitaxial layer, and the undoped GaN layer can improve the problem of lattice mismatch between the substrate 51 and the epitaxial layer. The electron blocking layer may be located between the p-type semiconductor layer and the multiple quantum well layer.
[0081] Furthermore, in this exemplary embodiment, the epitaxial layer can be formed by a metal-organic chemical vapor deposition process.
[0082] like Figure 6 As shown, the method for fabricating the array substrate further includes: peeling off the substrate 51, forming a first substrate 61 and a plurality of spaced-apart first electrode portions 31 on the side of the epitaxial layer 53 facing the substrate 51, wherein the first electrode portions 31 are located between the first substrate 61 and the epitaxial layer 53, and the first electrode portions 31 and the planar portions 101 are correspondingly disposed, and the orthographic projection of the first electrode portion 31 on the first substrate 61 and the orthographic projection of its corresponding planar portion on the first substrate 61 at least partially overlap. In this exemplary embodiment, the first electrode portions 31 can be pre-formed on the first substrate 61, thereby allowing direct mating of the first substrate with the first electrode portions 31 and the epitaxial layer 53. In other exemplary embodiments, the first electrode portions 31 can be formed on the epitaxial layer first, and then the epitaxial layer with the first electrode portions 31 can be attached to the first substrate 61.
[0083] like Figure 7 , 8 As shown, Figure 7 A top view of the array substrate is shown. Figure 8 It shows Figure 7 The diagram shows a cross-sectional view of a semi-finished array substrate. The array substrate fabrication method further includes: etching the epitaxial layer 53 and the nucleation layer 52 along the extension direction of the nucleation layer 52 to form an isolation trench 71 surrounding the second groove 22. The isolation trench 71 divides the epitaxial layer formed within each of the second grooves 22 into independent structures, such as... Figure 9As shown, the method for manufacturing the array substrate further includes filling the isolation trench 71 with a first insulating structure 81.
[0084] like Figure 10 As shown, the method for fabricating the array substrate further includes forming a common electrode layer 9 on the side of the first insulating structure 81 opposite to the first substrate 61.
[0085] like Figure 11 , 12 As shown, Figure 11 A top view of the array substrate is shown. Figure 12 It shows Figure 11 The diagram shows a cross-sectional view of a semi-finished array substrate. The method for fabricating this array substrate further includes forming a plurality of filter portions 13 on the side of the common electrode layer 9 facing away from the first substrate 61. The filter portions 13 are correspondingly disposed with independent structures, and the orthographic projections of the filter portions 13 on the first substrate 61 and their corresponding independent structures on the first substrate 61 at least partially overlap. The plurality of filter portions 13 may include filter portions of various colors; for example, the plurality of filter portions may include red filter portions, green filter portions, and blue filter portions. The first insulating structure 81 may be higher than the nucleation layer 52 to form a groove accommodating the filter portions 13.
[0086] like Figure 11 , 12 As shown, the method for manufacturing the array substrate further includes forming a second substrate 62 on the side of the filter section 13 opposite to the first substrate 61.
[0087] This exemplary embodiment also provides another method for fabricating an array substrate, the array substrate including multiple LED devices. For example... Figure 13-17 As shown, Figure 13-17 This is a schematic flowchart of another exemplary embodiment of the array substrate fabrication method disclosed herein.
[0088] In this exemplary embodiment, the preceding steps of the manufacturing method can be the same as... Figure 3-5 The flowchart shown is the same.
[0089] like Figure 13 As shown, the array substrate fabrication method further includes: forming a plurality of reflective layers 14 on the side of the epitaxial layer 53 facing away from the substrate 51, wherein the reflective layers 14 are correspondingly disposed with the second groove 22, and the reflective layers 14 are at least partially located within the corresponding second groove 22. The reflective layers 14 can be Bragg mirror structures.
[0090] like Figure 14As shown, the array substrate fabrication method further includes: forming a plurality of first electrode portions 31 on the side of the reflective layer 14 facing away from the substrate 51, wherein the first electrode portions 31 and the reflective layer 14 are correspondingly disposed, and the first electrode portions are connected to the epitaxial layer 53 through through-holes penetrating the corresponding reflective layer 14. The array substrate fabrication method further includes: forming a first substrate 61 on the side of the plurality of first electrode portions 31 facing away from the substrate 51, and then the substrate 51 and the nucleation layer 52 can be peeled off.
[0091] like Figure 15 As shown, the array substrate fabrication method further includes etching the epitaxial layer 53 and the nucleation layer 52 along the extension direction of the nucleation layer to form an isolation trench 71 surrounding the second groove 22. The isolation trench 71 divides the epitaxial layer formed in each of the second grooves 22 into independent structures.
[0092] like Figure 16 , 17 As shown, the array substrate fabrication method further includes: filling the isolation trench 71 with a second insulating structure 82; forming a common electrode layer 9 on the side of the second insulating structure 82 facing away from the first substrate; forming a plurality of filter portions 13 on the side of the common electrode layer 9 facing away from the first substrate 61; the filter portions 13 and the independent structures are correspondingly disposed; the orthographic projection of the filter portion 13 on the first substrate 61 and the orthographic projection of its corresponding independent structure on the first substrate 61 at least partially overlap. The array substrate fabrication method further includes: forming a second substrate 62 on the side of the filter portion 13 facing away from the first substrate 61. The second insulating structure 82 may be higher than the nucleation layer 52 to form a groove for accommodating the filter portion 13.
[0093] Figure 3-17 In the illustrated embodiment, the distance between the bottoms of adjacent second grooves 22 in any direction is less than the dimension of the bottom of the second groove 22 in that direction. For example, as Figure 3 As shown, the second grooves 22 are arrayed in the row direction X and the column direction Y. The distance between the bottoms of adjacent second grooves 22 in the row direction is less than the size of the bottom of the second groove 22 in the row direction, and the distance between the bottoms of adjacent second grooves 22 in the column direction is less than the size of the bottom of the second groove 22 in the column direction.
[0094] This exemplary embodiment also provides another method for fabricating an array substrate, the array substrate including multiple LED devices. For example... Figure 18-27 As shown, Figure 18-27 This is a schematic flowchart of another exemplary embodiment of the array substrate fabrication method disclosed herein.
[0095] In this exemplary embodiment, as Figure 18-20 As shown, Figure 18 A top view of the array substrate is shown. Figure 19 It shows Figure 18The image shows a cross-sectional view of the semi-finished array substrate along the dashed line BB. The preceding steps in this fabrication method can be compared with... Figure 3-5 The flowchart shown is the same. Among them, and Figure 3-5 The difference in the fabrication method of the array substrate shown is that the distance between the bottoms of adjacent second grooves 22 in any direction is greater than the dimension of the bottom of the second groove 22 in that direction. For example, as Figure 17 As shown, the second grooves 22 are arrayed in the row direction X and column direction Y. The distance between the bottoms of adjacent second grooves 22 in the row direction is greater than the dimension of the bottom of the second groove 22 in the row direction, and the distance between the bottoms of adjacent second grooves 22 in the column direction is greater than the dimension of the bottom of the second groove 22 in the column direction. Figure 18-20 As shown, the epitaxial layer 53 conformally covers the second groove 22, thereby forming a conformal groove 24 on the side of the epitaxial layer 53 away from the substrate 51.
[0096] like Figure 21 As shown, the array substrate fabrication method further includes: forming a first filling layer 151 on the side of the epitaxial layer 53 away from the substrate 51, the first filling layer 151 at least partially filling the conformal groove 24, and forming a first temporary substrate 161 on the side of the first filling layer 151 away from the substrate 51. The first filling layer 151 may be located within the conformal groove 24, and its upper surface may be flush with the epitaxial layer 53.
[0097] like Figure 22 As shown, the array substrate fabrication method further includes: peeling off the substrate 51 and the nucleation layer 52, forming a third groove 23 at the location of the peeled nucleation layer 52, forming a second filling layer 152 on the side of the epitaxial layer 53 away from the first temporary substrate 161, and the second filling layer 152 at least partially filling the third groove 23.
[0098] like Figure 23 As shown, the array substrate fabrication method further includes: etching the second filling layer 152, the epitaxial layer 53, and the first filling layer 151 to form an isolation trench 71. The isolation trench 71 divides the area where the second trench 22 is located and the area where the third trench 23 is located into independent structures, and both the second trench 22 and the third trench 23 retain sidewalls. The epitaxial layer 53 and the first filling layer 151 in the area where the second trench 22 is located form a first independent structure 171, and the second filling layer and the epitaxial layer 53 in the area where the third trench 23 is located form a second independent structure 172.
[0099] like Figure 24As shown, the array substrate fabrication method further includes: transferring a first independent structure 171 onto a first substrate 61, and forming a first electrode portion 31 between the first independent structure 171 and the first substrate 61. The first electrode portion 31 can be formed on the first substrate 61 beforehand, and then the first independent structure 171 can be transferred onto the first substrate 61; alternatively, the first electrode portion 31 can be formed on the side of the first independent structure 171 facing away from the first temporary substrate 161, and then the first independent structure 171 with the first electrode portion 31 can be transferred onto the first substrate 61. The array substrate fabrication method further includes: transferring a second independent structure 172 onto a second temporary substrate 162, with a second filler layer 152 located between the second temporary substrate 162 and the epitaxial layer 53.
[0100] like Figure 25 As shown, the array substrate fabrication method further includes: transferring the second independent structure 172 onto the first substrate 61, and forming a first electrode portion 31 between the second independent structure 172 and the first substrate 61. Alternatively, the first electrode portion 31 can be formed on the first substrate 61 beforehand, and then the second independent structure 172 can be transferred onto the first substrate 61. Or, the first electrode portion 31 can be formed first on the side of the second independent structure 172 facing away from the first temporary substrate 161, and then the second independent structure 172 with the first electrode portion 31 can be transferred onto the first substrate 61.
[0101] like Figure 26 As shown, the array substrate fabrication method further includes: removing the first filler layer 151 and the second filler layer 152. (As illustrated...) Figure 27 As shown, the array substrate fabrication method further includes filling a third insulating structure 83 between the first independent structure 171 and the second independent structure 172.
[0102] like Figure 27 As shown, the array substrate fabrication method further includes: forming a common electrode layer 9 on the side of the third insulating structure 83 facing away from the first substrate 61; forming a plurality of filter portions 13 on the side of the common electrode layer 9 facing away from the first substrate 61; the filter portions 13 and independent structures are correspondingly disposed; and the orthographic projection of the filter portion 13 on the first substrate 61 and the orthographic projection of its corresponding independent structure on the first substrate 61 at least partially overlap. The third insulating structure 83 may be disposed above the epitaxial layer 53, and grooves for accommodating the filter portions 13 may be formed between the third insulating structures 83. The array substrate fabrication method further includes: forming a second substrate 62 on the side of the filter portion 13 facing away from the first substrate 61.
[0103] This exemplary embodiment also provides another method for fabricating an array substrate, the array substrate including multiple LED devices. For example... Figure 28-35 As shown, Figure 28-34 This is a schematic flowchart of another exemplary embodiment of the array substrate fabrication method disclosed herein.
[0104] In this exemplary embodiment, the preceding steps of the manufacturing method can be the same as... Figure 18-20 The flowchart shown is the same. In this exemplary embodiment, the distance between the bottoms of adjacent second grooves 22 in any direction is also greater than the dimension of the bottom of the second groove 22 in that direction. For example, the second grooves 22 are arrayed in the row direction X and the column direction Y. The distance between the bottoms of adjacent second grooves 22 in the row direction is greater than the dimension of the bottom of the second groove 22 in the row direction, and the distance between the bottoms of adjacent second grooves 22 in the column direction is greater than the dimension of the bottom of the second groove 22 in the column direction.
[0105] In this exemplary embodiment, the epitaxial layer 53 also conformally covers the second groove 22, thereby forming a conformal groove 24 on the side of the epitaxial layer 53 facing away from the substrate 21. Figure 28 As shown, the array substrate fabrication method further includes: forming a first reflective layer 141 on the side of the epitaxial layer 53 away from the substrate 51, the first reflective layer 141 being at least partially filled in the conformal groove 24, and forming a first temporary substrate 161 on the side of the first reflective layer 141 away from the substrate 51.
[0106] like Figure 29 As shown, the array substrate fabrication method further includes: peeling off the substrate 51 and the nucleation layer 52, forming a third groove 23 at the location of the peeled nucleation layer 52. Figure 30 As shown, the array substrate fabrication method further includes: forming a second reflective layer 142 on the side of the epitaxial layer 53 away from the first temporary substrate 161, wherein the second reflective layer 142 at least partially fills the third groove 23.
[0107] like Figure 31 As shown, the array substrate fabrication method further includes: etching the second reflective layer 142, the epitaxial layer 53, and the first reflective layer 141 to form an isolation trench 71. The isolation trench 71 divides the area where the second trench 22 is located and the area where the third trench 23 is located into independent structures, and both the second trench 22 and the third trench 23 retain sidewalls. The first reflective layer 141 and the epitaxial layer 53 in the area where the second trench 22 is located form a first independent structure 171, and the second reflective layer 142 and the epitaxial layer 53 in the area where the third trench is located form a second independent structure 172.
[0108] like Figure 32 As shown, the array substrate fabrication method further includes: forming a first electrode portion 31 on the side of the second independent structure 172 away from the first temporary substrate 161, the first electrode portion 31 being connected to the epitaxial layer 53 through a via penetrating the second reflective layer 142, and transferring the second independent structure 172 with the first electrode portion 31 onto the first substrate 61, the first electrode portion 31 being located between the second independent structure 172 and the first substrate 61.
[0109] like Figure 32 As shown, the array substrate fabrication method further includes: transferring the first independent structure 171 to the second temporary substrate 162, wherein the first reflective layer 141 is located on the side of the second temporary substrate away from the epitaxial layer 53.
[0110] like Figure 33 As shown, the array substrate fabrication method further includes: forming a first electrode portion 31 on the side of the first independent structure 171 away from the second temporary substrate 162; the first electrode portion 31 is connected to the epitaxial layer 53 through a via penetrating the first reflective layer 141; and transferring the first independent structure 171 with the first electrode portion 31 onto the first substrate 61; the first electrode portion 31 is located between the first independent structure 712 and the first substrate 61.
[0111] like Figure 34 , 35 As shown, the array substrate fabrication method further includes: filling a third insulating structure 83 between the first independent structure 171 and the second independent structure 172; forming a common electrode layer 9 on the side of the third insulating structure 83 facing away from the first substrate 61; forming a plurality of filter portions 13 on the side of the common electrode layer 9 facing away from the first substrate 61; the filter portions 13 and the independent structures are correspondingly disposed; the orthographic projection of the filter portion 13 on the first substrate 61 and the orthographic projection of its corresponding independent structure on the first substrate 61 at least partially overlap. The third insulating structure 83 may be disposed above the epitaxial layer 53, and grooves for accommodating the filter portions 13 may be formed between the third insulating structures 83. The array substrate fabrication method further includes: forming a second substrate 62 on the side of the filter portion 13 facing away from the first substrate 61.
[0112] In this exemplary embodiment, the substrate is a sapphire substrate and the nucleation layer is an AlN layer.
[0113] This exemplary embodiment also provides an array substrate, which can be formed by the array substrate manufacturing method described above.
[0114] This exemplary embodiment also provides a display panel, wherein the display panel includes an array substrate formed by the above-described array substrate manufacturing method.
[0115] This exemplary embodiment also provides a display device, which includes the display panel described above. The display device can be a mobile phone, tablet computer, television, or other display device.
[0116] Other embodiments of this disclosure will readily occur to those skilled in the art upon consideration of the specification and practice of the disclosure herein. This application is intended to cover any variations, uses, or adaptations of this disclosure that follow the general principles of this disclosure and include common knowledge or customary techniques in the art not disclosed herein. The specification and examples are to be considered exemplary only, and the true scope and spirit of this disclosure are indicated by the claims.
[0117] It should be understood that this disclosure is not limited to the precise structures described above and shown in the accompanying drawings, and various modifications and changes can be made without departing from its scope. The scope of this disclosure is defined only by the appended claims.
Claims
1. An LED device, wherein, The LED device includes: an epitaxial layer, the epitaxial layer including at least a P-type semiconductor layer, an N-type semiconductor layer, and a multi-quantum well layer located between the P-type semiconductor layer and the N-type semiconductor layer; The epitaxial layer includes a flat portion and an inclined portion inclinedly connected to the edge of the flat portion. The inclined portion and the flat portion form a first groove. The orthographic projection of the opening of the first groove away from the flat portion on the plane where the flat portion is located covers the orthographic projection of the opening of the first groove near the flat portion on the plane where the flat portion is located. The material of the epitaxial layer includes GaN, wherein the GaN in the flat portion is N-polar GaN, and the GaN in the inclined portion is Ga-polar GaN.
2. The LED device according to claim 1, wherein, The P-type semiconductor layer is a P-type GaN layer. The material of the P-type semiconductor layer located in the flat part is N-polar GaN, and the material of the P-type semiconductor layer located in the inclined part is Ga-polar GaN. The N-type semiconductor layer is an N-type GaN layer. The material of the N-type semiconductor layer located in the flat portion is N-polar GaN, and the material of the N-type semiconductor layer located in the inclined portion is Ga-polar GaN. The multi-quantum well layer includes a barrier layer and a well layer stacked together. The barrier layer located in the flat portion is made of N-polar GaN, the barrier layer located in the inclined portion is made of Ga-polar GaN, the well layer located in the flat portion is made of N-polar InGaN, and the well layer located in the inclined portion is made of Ga-polar InGaN.
3. The LED device according to claim 1, wherein, The LED device also includes: A reflective layer is located on one side of the epitaxial layer; The first electrode portion is located on the side of the reflective layer opposite to the epitaxial layer, and the first electrode portion is connected to the flat portion through a via penetrating the reflective layer.
4. The LED device according to claim 3, wherein, The orthographic projection of the reflective layer onto the plane containing the flat portion covers the flat portion.
5. An array substrate, wherein, The array substrate includes: a plurality of LED devices as described in any one of claims 1-4.
6. The array substrate according to claim 5, wherein, The LED device includes a first electrode portion and a second electrode portion, the first electrode portion and the second electrode portion are respectively connected to both sides of the epitaxial layer, and the second electrode portions of the plurality of LED devices are interconnected to form a common electrode layer; The array substrate further includes: A first substrate, wherein the first electrode layer is located between the first substrate and the epitaxial layer; A filter layer is located on the side of the common electrode layer opposite to the first substrate. The filter layer includes a plurality of filter portions corresponding to the LED device. In the corresponding filter portions and the LED device, the orthographic projection of the filter portion on the first substrate and the orthographic projection of the flat portion of the LED device on the first substrate at least partially overlap.
7. A method for fabricating an array substrate, wherein, The method for fabricating the array substrate includes: A patterned nucleation layer is formed on a substrate, and the nucleation layer and the substrate form a plurality of second grooves, wherein the orthographic projection of the opening of the second groove away from the substrate on the substrate covers the orthographic projection of the opening of the second groove close to the substrate on the substrate; An epitaxial layer is formed on the side of the nucleation layer away from the substrate. The epitaxial layer includes at least a P-type semiconductor layer, an N-type semiconductor layer, and a multi-quantum-well layer located between the P-type semiconductor layer and the N-type semiconductor layer. The epitaxial layer is made of GaN. The epitaxial layer formed on the substrate forms a flat portion, and the epitaxial layer formed on the sidewall of the second groove forms a tilted portion. The GaN in the flat portion is N-polar GaN, and the GaN in the tilted portion is Ga-polar GaN.
8. The method for fabricating an array substrate according to claim 7, wherein, The method for fabricating the array substrate further includes: The substrate is peeled off, and a first substrate and a plurality of spaced first electrode portions are formed on one side of the substrate on the epitaxial layer. The first electrode portions are located between the first substrate and the epitaxial layer. The first electrode portions and the planar portions are correspondingly disposed. The orthographic projection of the first electrode portion on the first substrate and the orthographic projection of the corresponding planar portion on the first substrate at least partially overlap. The epitaxial layer and the nucleation layer are etched along the extension direction of the nucleation layer to form an isolation trench surrounding the second groove. The isolation trench divides the epitaxial layer formed in each of the second grooves into independent structures, and the isolation trench is filled with a first insulating structure. A common electrode layer is formed on the side of the first insulating structure away from the first substrate, and a plurality of filter portions are formed on the side of the common electrode layer away from the first substrate. The filter portions and the independent structures are correspondingly arranged, and the orthographic projection of the filter portion on the first substrate and the orthographic projection of the corresponding independent structure on the first substrate at least partially overlap.
9. The method for fabricating an array substrate according to claim 7, wherein, The method for fabricating the array substrate further includes: Multiple reflective layers are formed on the side of the epitaxial layer away from the substrate, and the reflective layers are correspondingly disposed with the second groove, with at least a portion of the reflective layer located within the second groove corresponding to it; A plurality of first electrode portions are formed on the side of the reflective layer away from the substrate. The first electrode portions are disposed correspondingly to the reflective layer. The first electrode portions are connected to the epitaxial layer through through-holes penetrating the corresponding reflective layer. A first substrate is formed on the side of the plurality of first electrode portions facing away from the substrate, and the substrate and the nucleation layer are peeled off; The epitaxial layer and the nucleation layer are etched along the extension direction of the nucleation layer to form an isolation trench surrounding the second groove, the isolation trench dividing the epitaxial layer formed in each of the second grooves into independent structures; A second insulating structure is filled in the isolation groove, and a common electrode layer is formed on the side of the second insulating structure away from the first substrate. A plurality of filter portions are formed on the side of the common electrode layer away from the first substrate. The filter portions and the independent structures are correspondingly arranged, and the orthographic projection of the filter portion on the first substrate and the orthographic projection of the corresponding independent structure on the first substrate at least partially overlap.
10. The method for fabricating an array substrate according to claim 7, wherein, The distance between adjacent bottoms of the second groove in any direction is greater than the dimension of the bottom of the second groove in that direction; The epitaxial layer conformally covers the second groove, and the side of the epitaxial layer opposite to the substrate forms a conformal groove. The method for fabricating the array substrate further includes: A first filling layer is formed on the side of the epitaxial layer away from the substrate, the first filling layer at least partially filling the conformal groove, and a first temporary substrate is formed on the side of the first filling layer away from the substrate; The substrate and nucleation layer are peeled off, and a third groove is formed at the location of the peeled nucleation layer. A second filling layer is formed on the epitaxial layer on the side away from the first temporary substrate. The second filling layer at least partially fills the third groove. The second filling layer, the epitaxial layer, and the first filling layer are etched to form an isolation trench. The isolation trench divides the area where the second trench is located and the area where the third trench is located into independent structures. Both the second trench and the third trench retain sidewalls. The first filling layer and the epitaxial layer in the area where the second trench is located form a first independent structure, and the second filling layer and the epitaxial layer in the area where the third trench is located form a second independent structure. The first independent structure is transferred onto the first substrate, and a first electrode portion is formed between the first independent structure and the first substrate; The second independent structure is transferred to a second temporary substrate, and the second filling layer is located between the second temporary substrate and the epitaxial layer; The second independent structure is transferred onto the first substrate, and a first electrode portion is formed between the second independent structure and the first substrate.
11. The method for fabricating an array substrate according to claim 10, wherein, The method for fabricating the array substrate further includes: Remove the first and second filler layers, and fill the space between the first independent structure and the second independent structure with a third insulating structure; A common electrode layer is formed on the side of the third insulating structure away from the first substrate, and a plurality of filter portions are formed on the side of the common electrode layer away from the first substrate. The filter portions and the independent structures are correspondingly arranged, and the orthographic projection of the filter portion on the first substrate and the orthographic projection of the corresponding independent structure on the first substrate at least partially overlap. A second substrate is formed on the side of the filter portion opposite to the first substrate.
12. The method for fabricating an array substrate according to claim 7, wherein, The distance between adjacent bottoms of the second groove in any direction is greater than the dimension of the bottom of the second groove in that direction; The epitaxial layer conformally covers the second groove, and the side of the epitaxial layer opposite to the substrate forms a conformal groove. The method for fabricating the array substrate further includes: A first reflective layer is formed on the side of the epitaxial layer away from the substrate, the first reflective layer at least partially filling the conformal groove, and a first temporary substrate is formed on the side of the first reflective layer away from the substrate; The substrate and nucleation layer are peeled off, and a third groove is formed at the location of the peeled nucleation layer. A second reflective layer is formed on the epitaxial layer on the side away from the first temporary substrate, and the second reflective layer at least partially fills the third groove. The second reflective layer, the epitaxial layer, and the first reflective layer are etched to form an isolation trench. The isolation trench divides the area where the second trench is located and the area where the third trench is located into independent structures. Both the second trench and the third trench retain sidewalls. The first reflective layer and the epitaxial layer in the area where the second trench is located form a first independent structure, and the second reflective layer and the epitaxial layer in the area where the third trench is located form a second independent structure. A first electrode portion is formed on the side of the second independent structure away from the first temporary substrate. The first electrode portion is connected to the epitaxial layer through a via penetrating the second reflective layer. The second independent structure with the first electrode portion is transferred onto the first substrate. The first electrode portion is located between the second independent structure and the first substrate. The first independent structure is transferred to a second temporary substrate, wherein the first reflective layer is located on the side of the second temporary substrate opposite to the epitaxial layer; A first electrode portion is formed on the side of the first independent structure away from the second temporary substrate. The first electrode portion is connected to the epitaxial layer through a via penetrating the first reflective layer. The first independent structure with the first electrode portion is transferred onto the first substrate. The first electrode portion is located between the first independent structure and the first substrate.
13. The method for fabricating an array substrate according to claim 12, wherein, The method for fabricating the array substrate further includes: A third insulating structure is filled between the first independent structure and the second independent structure. A common electrode layer is formed on the side of the third insulating structure away from the first substrate. A plurality of filter portions are formed on the side of the common electrode layer away from the first substrate. The orthographic projection of the filter portion on the first substrate and the orthographic projection of the corresponding independent structure on the first substrate at least partially overlap. A second substrate is formed on the side of the filter portion opposite to the first substrate.
14. The method for fabricating an array substrate according to any one of claims 7-13, wherein, The substrate is a sapphire substrate, and the nucleation layer is an AlN layer.
15. A display panel, wherein, The display panel includes the array substrate as described in claim 5 or 6.