A method for preparing a red light chip
By setting the ohmic contact layer on the surface of the N-type semiconductor layer in the red light chip, the fabrication process is simplified, and the problems of high process difficulty and poor contact effect caused by the thin thickness of the ohmic contact layer in the prior art are solved, thus achieving the stability and reliability of electrical performance.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- YUANXU SEMICONDUCTOR TECHNOLOGY (WUXI) CO LTD
- Filing Date
- 2025-11-28
- Publication Date
- 2026-07-21
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Figure CN122438440A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of semiconductor technology, and in particular to a method for fabricating a red light chip. Background Technology
[0002] A red light chip is a solid-state semiconductor device that converts electrical energy into red light energy. Its light-emitting principle is based on the band structure theory and quantum effects of semiconductor materials. Commonly used semiconductor materials for red light chips are III-V compounds, such as aluminum gallium indium phosphide (AlGaInP) or gallium arsenide phosphide (GaAsP). These materials have small band gaps. By precisely controlling the band gap size and doping elements of the semiconductor material, the emitted light wavelength is ensured to be stable, corresponding to a wavelength of approximately 620 to 750 nanometers, exhibiting a red color.
[0003] The structure of a red light chip mainly includes a light emitter and electrodes. The light emitter consists of stacked N-type semiconductor layers, a light-emitting layer, and a P-type semiconductor layer. The electrodes include a positive electrode and a negative electrode. To improve electrical connection and ensure stable electrical performance of the red light chip, an ohmic contact layer is often used to connect the negative electrode to the N-type semiconductor layer. However, in existing red light chips, the ohmic contact layer is located inside the N-type semiconductor layer. Under this structural condition, the ohmic contact layer is relatively thin. During the fabrication process, the etching depth of the N-type semiconductor layer must be precisely controlled; otherwise, over-etching of the ohmic contact layer can easily occur, affecting the ohmic contact effect. This makes the fabrication process quite challenging. Summary of the Invention
[0004] In view of the above-mentioned shortcomings in the existing technology, the present invention provides a method for fabricating a red light chip, which can simplify the fabrication process and reduce the difficulty of the process.
[0005] The technical solution adopted in this application is as follows: A method for fabricating a red light chip, characterized in that the method includes: providing a light emitter, the light emitter comprising a stacked P-type semiconductor layer, a light-emitting layer, and an N-type semiconductor layer; An ohmic contact layer is prepared on the surface of the N-type semiconductor layer; A first electrode and a second electrode are fabricated. The second electrode is electrically connected to the P-type semiconductor layer, and the first electrode is connected to the N-type semiconductor layer through the ohmic contact layer to obtain a red light chip.
[0006] Its further feature is that, The method for preparing the light emitter includes: providing a substrate; An epitaxial material is deposited on the same side of the substrate using a metal-organic chemical vapor deposition method. The epitaxial material includes N-type semiconductor material, light-emitting material, and P-type semiconductor material stacked together. The epitaxial material is etched using at least two photolithography etching processes to prepare several array-distributed light emitters.
[0007] Furthermore, the fabrication of the light emitter includes: providing a substrate; An epitaxial material is deposited on the same side of the substrate using a metal-organic chemical vapor deposition method. The epitaxial material includes N-type semiconductor material, light-emitting material, and P-type semiconductor material stacked together. A current spreading material is deposited on the surface of the P-type semiconductor material using electron gun evaporation or magnetron sputtering deposition. The current spreading material and the epitaxial material are etched using at least two photolithography etching processes to prepare a stacked current spreading layer, a P-type semiconductor layer, a light-emitting layer, and an N-type semiconductor layer. The current spreading layer covers the surface of the P-type semiconductor layer and is used to electrically connect the second electrode to the P-type semiconductor layer.
[0008] Furthermore, the material of the N-type semiconductor layer includes, but is not limited to, aluminum phosphide or aluminum gallium indium phosphide, the light-emitting layer is a quantum well layer, and the material of the P-type semiconductor layer includes, but is not limited to, aluminum indium phosphide.
[0009] Furthermore, the material of the current spreading layer includes, but is not limited to, ITO material or AuZn alloy.
[0010] Furthermore, before fabricating the first electrode and the second electrode, an insulating layer or a composite layer is fabricated, including: depositing a first insulating material on the entire surface including the ohmic contact layer surface and the light-emitting body surface using a chemical vapor deposition process or an atomic layer deposition process to form the insulating layer; or depositing the first insulating material and a reflective material to form the composite layer. The insulating layer or composite layer covers the surface of the light-emitting body. The composite layer includes two insulating layers and at least one reflective layer, with the reflective layer located between the two insulating layers for light reflection.
[0011] Furthermore, the reflective material includes, but is not limited to, Ni / Ag / Au metallic reflective material, ITO / Ag / Tiw hybrid material, or DBR reflective material.
[0012] Furthermore, the first insulating material includes, but is not limited to, SiO2, SiNx, or AlN.
[0013] Furthermore, the materials of the ohmic contact layer include, but are not limited to, composite materials of Cr (chromium), Ni (nickel), Al (aluminum), TiAl (titanium-aluminum alloy), Au (gold) and GeAuNi alloy (germanium-gold-nickel alloy), composite materials of Au and AuZn alloy (zinc-gold alloy), AuZn alloy, GeAuNi alloy, or Au.
[0014] Furthermore, the fabrication of the first electrode and the second electrode includes: using a photolithography etching process to etch a local area of the insulating layer or composite layer to form a first etch hole and a second etch hole; The first electrode and the second electrode are formed inside and in the corresponding areas of the first and second etched holes using photolithography, deposition, and lift-off processes. The first electrode is covered by the surface of the insulating layer or composite layer above the ohmic contact layer, and the second electrode is covered by the surface of the insulating layer or composite layer above the current spreading layer. The bottom of the first electrode penetrates the insulating layer or the composite layer and is electrically connected to the ohmic contact layer; the bottom of the second electrode penetrates the insulating layer or the composite layer and is electrically connected to the current spreading layer. An isolation groove is provided between the first electrode and the second electrode.
[0015] Furthermore, the first electrode extends from above the ohmic contact layer to above the P-type semiconductor layer, and a local area of the surface of the first electrode is flush with the surface of the second electrode.
[0016] Further, removing the substrate includes: coating the surfaces where the first electrode and the second electrode are located with a second insulating material to form a support substrate; The substrate is etched and stripped using a wet etching process; The third and fourth etched holes are formed in the second insulating material using photolithography or photolithographic etching processes. The first connection portion and the second connection portion are formed inside the third and fourth etched holes and in the corresponding areas using photolithography, deposition and stripping processes.
[0017] Furthermore, the second insulating material includes, but is not limited to, polyimide, photoresist, benzocyclobutene, or poly(p-phenylenebenzodioxazole) fiber.
[0018] Furthermore, the etching solution used in the wet etching process includes a mixture of ammonia and hydrogen peroxide.
[0019] Furthermore, the size range of the red light chip is 1μm to 100μm.
[0020] Furthermore, the red light chip is a Micro LED.
[0021] The above-mentioned solution of this application can achieve the following beneficial effects: In the red light chip fabrication process of this application, the ohmic contact layer is disposed on the surface of the N-type semiconductor layer, and there is no need to etch the N-type semiconductor layer when fabricating the ohmic contact layer, which simplifies the fabrication process and reduces the process difficulty. Attached Figure Description
[0022] Figure 1This is a cross-sectional view of the first embodiment of the red light chip in this application; Figure 2 This is a cross-sectional view of the second embodiment of the red light chip in this application; Figure 3 This is a cross-sectional view of the red light chip in Embodiment 3 of this application; Figure 4 This is a schematic cross-sectional view of the epitaxial layer formed in Example 1 of the red light chip fabrication method of this application; Figure 5 This is a schematic diagram of the structure after the protrusion is formed in Embodiment 1 of the red light chip fabrication method of this application; Figure 6 This is a schematic cross-sectional view of the structure after the channel is formed in Example 1 of the red light chip fabrication method of this application; Figure 7 This is a schematic cross-sectional view of the structure after the formation of the ohmic contact layer in Example 1 of the red light chip fabrication method of this application; Figure 8 This is a schematic cross-sectional view of the structure after the formation of the first electrode and the second electrode in Embodiment 1 of the red light chip fabrication method of this application; Figure 9 This is a schematic cross-sectional view of the structure after depositing the current-spreading material in Example 2 of the red light chip fabrication method of this application; Figure 10 This is a schematic diagram of the structure after the protrusion is formed in Example 2 of the red light chip fabrication method of this application; Figure 11 This is a schematic cross-sectional view of the structure after the channel is formed in Example 2 of the red light chip fabrication method of this application; Figure 12 This is a schematic cross-sectional view of the structure after the insulating layer is formed in Example 2 of the red light chip fabrication method of this application; Figure 13 This is a cross-sectional view of the structure after the formation of the ohmic contact layer in Example 2 of the red light chip fabrication method of this application; Figure 14 This is a schematic cross-sectional view of the structure after the formation of the first electrode and the second electrode in Example 2 of the red light chip fabrication method of this application; Figure 15 This is a cross-sectional view of the structure after the formation of the third and fourth etched holes in Example 3 of the red light chip fabrication method of this application.
[0023] Reference numerals: 1. Light emitter; 2. Electrode; 3. Ohmic contact layer; 4. Supporting substrate; 5. Substrate; 6. Channel. N-type semiconductor layer 101, light-emitting layer 102, P-type semiconductor layer 103, current spreading layer 104, insulating layer 105, reflective layer 106, first etched hole 107, and second etched hole 108; First electrode 201, second electrode 202; P-type semiconductor material 1003, light-emitting material 1002, N-type semiconductor material 1001, current spreading material 1004; First connecting part 401, second connecting part 402, third etched hole 403, and fourth etched hole 404. Detailed Implementation
[0024] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.
[0025] It should be noted that the terms "comprising" and "having" and any variations thereof in the specification, claims and accompanying drawings of this invention are intended to cover non-exclusive inclusion. For example, a process, method, apparatus, product or device that includes a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such process, method, product or device.
[0026] The following details several specific embodiments of red light chip fabrication: Example 1 of the method for fabricating red light chips A method for fabricating a red light chip, the method comprising the following steps: S1. Provide a light-emitting body, the specific preparation process of which includes: S11, Provide a substrate 5; S12. Using metal-organic chemical vapor deposition (MOCVD), epitaxial materials are deposited on the same side of substrate 5. The epitaxial materials include stacked N-type semiconductor material 1001, light-emitting material 1002, and P-type semiconductor material 1003. (Refer to...) Figure 4 ; S13. Using photolithography etching, the epitaxial material is etched to the surface or interior of the N-type semiconductor material, forming several protrusions. Each protrusion includes at least a stacked P-type semiconductor layer 103 and a light-emitting layer 102. This etching is a single etching operation. After the single etching is completed, the bottom N-type semiconductor material 1001 remains a continuous region; that is, the N-type semiconductor material at the bottom of two adjacent protrusions is connected as a whole. (Refer to...) Figure 5 ; S14. Using photolithography etching, the N-type semiconductor material between two adjacent protrusions is etched to a depth reaching the substrate surface or interior. This etching is a secondary etching process, thereby forming a channel 6 between the two adjacent protrusions. (Refer to...) Figure 6 The channel 6 divides the continuous N-type semiconductor material into independent regions, thereby obtaining several independent light emitters 1 arranged in an array on the substrate. Each light emitter 1 includes a P-type semiconductor layer 103, a light-emitting layer 102, and an N-type semiconductor layer 101. At this time, the edge of the N-type semiconductor layer 101 protrudes beyond the bottom edge of the boss, forming a step. The light emitter 1 is convex or L-shaped, which facilitates the setting of the ohmic contact layer 3.
[0027] S2. Using photolithography, deposition, and lift-off processes, an ohmic contact layer 3 is fabricated on the stepped surface of the N-type semiconductor layer 101. The ohmic contact layer 3 is electrically connected to the N-type semiconductor layer 101. (Reference) Figure 7 .
[0028] S3. Using photolithography, deposition, and lift-off processes, the first electrode 201 and the second electrode 202 are fabricated. (Ref) Figure 8 The second electrode 202 is located on the P-type semiconductor layer and is electrically connected to the P-type semiconductor layer 103. The first electrode 201 is located on the ohmic contact layer and forms an ohmic contact with the N-type semiconductor layer 101 through the ohmic contact layer 3.
[0029] S4. Using wet etching technology, remove substrate 5 to obtain several independent red light chips, reference. Figure 1 The substrate material includes GaAs, and the etching solution includes a mixture of ammonia and hydrogen peroxide (NH3·H2O). This etching solution is non-corrosive to AlGaInphosphorus, achieving the effect of removing only the substrate 5 while cutting off the N-type semiconductor material. It achieves effective removal of the substrate 5 without the need for a cutoff layer, simplifying the substrate removal process and the red light chip structure.
[0030] Red light chip structure reference prepared by the above method Figure 1 The red light chip includes a light emitter 1, an electrode 2, and an ohmic contact layer 3. The light emitter 2 includes a stacked P-type semiconductor layer 103, a light-emitting layer 102, and an N-type semiconductor layer 101. The electrode 2 includes a first electrode 201 (i.e., a negative electrode) and a second electrode 202 (i.e., a positive electrode). The second electrode 202 is electrically connected to the P-type semiconductor layer 103. The ohmic contact layer 3 is located on the surface of the N-type semiconductor layer 101 and is used to realize the electrical connection between the first electrode 201 and the N-type semiconductor layer 101.
[0031] In this embodiment, the N-type semiconductor layer 101 is made of aluminum phosphide or aluminum gallium indium phosphide, with aluminum gallium indium phosphide being preferred. The light-emitting layer 102 is a quantum well layer, and the P-type semiconductor layer 103 is preferably made of aluminum indium phosphide. The first electrode and the second electrode are preferably made of Cr, Ti, Pt, or Al. The ohmic contact layer is preferably made of a composite material of Cr, Ni, Al, TiAl, Au and GeAuNi (i.e., chromium-gold-nickel alloy), a composite material of Au and AuZn (i.e., gold-zinc alloy), AuZn alloy, GeAuNi alloy, or Au. The ohmic contact layer 3 ensures that the first electrode 201 and the N-type semiconductor layer 101 form a good ohmic contact, thereby ensuring the stable electrical performance of the red light chip.
[0032] To facilitate the setting of the ohmic contact layer 3 and achieve electrical connection between the first electrode 201 and the N-type semiconductor layer 101, this application sets the N-type semiconductor layer 101 with the following structure: at least one side surface of the N-type semiconductor layer 101 protrudes from the bottom edge of the P-type semiconductor layer 103 to form a step. In this embodiment, the outer edge of the N-type semiconductor layer 101 protrudes from the bottom edge of the P-type semiconductor layer 103, making the light emitter 1 convex or L-shaped, and the ohmic contact layer 3 is located on the step surface.
[0033] Example 2 of the method for fabricating red light chips A method for fabricating a red light chip, the method comprising: S1, providing a light emitter 1, wherein the specific fabrication process of the light emitter 1 includes: S11, Provide a substrate 5; S12. Using the metal-organic chemical vapor deposition (MOCVD) method, an epitaxial material is deposited on the same side of the substrate 5. The epitaxial material includes N-type semiconductor material 1001, light-emitting material 1002, and P-type semiconductor material 1003 stacked together. S13. Deposit current-spreading material on the surface of the epitaxial material using electron gun evaporation or magnetron sputtering, as referenced. Figure 9 The current spreading material 1004 and the P-type semiconductor material 1003 can form a good ohmic contact and have high light transmittance. In this embodiment, the current spreading material 1004 is preferably ITO material, which covers the surface of the P-type semiconductor material 1003 and has the function of current spreading. S14. Using photolithography etching, the current spreading material 1004 and the epitaxial material are etched to a depth reaching the surface or interior of the N-type semiconductor material, forming several protrusions. (Refer to...) Figure 10 The protrusion includes at least a stacked current spreading layer 104, a P-type semiconductor layer 103, and a light-emitting layer 102. This etching is a single etching process. After the single etching is completed, the bottom N-type semiconductor material remains a continuous region, that is, the N-type semiconductor material at the bottom of two adjacent protrusions is connected as a whole. S15. Using photolithography etching, the N-type semiconductor material 1001 between two adjacent protrusions is etched to a depth reaching the substrate surface or interior. This etching is a secondary etching process, thereby forming a channel 6 between the two adjacent protrusions. (Refer to...) Figure 11 The channel 6 divides the continuous N-type semiconductor material 1001 into independent regions, resulting in several independent and arrayed light emitters 1. Each light emitter 1 includes a stacked current spreading layer 104, a P-type semiconductor layer 103, a light-emitting layer 102, and an N-type semiconductor layer 101. The edge of the N-type semiconductor layer 101 protrudes beyond the bottom edge of the boss, forming a step. The light emitter 1 is convex or L-shaped, facilitating the placement of the ohmic contact layer 3.
[0034] S2. Using photolithography, deposition, and lift-off processes, an ohmic contact layer 3 is formed on the steps of the N-type semiconductor layer 101. The ohmic contact layer 3 is electrically connected to the N-type semiconductor layer 101. (Refer to...) Figure 12 .
[0035] S3. A first insulating material is deposited on the entire surface including the current spreading layer using chemical vapor deposition or atomic layer deposition. The first insulating material includes SiO2, SiNx, or AlN; in this embodiment, SiO2 is preferred. This forms an insulating layer 105. (Refer to...) Figure 13 .
[0036] It should be noted that, in another embodiment, chemical vapor deposition or atomic layer deposition can be used to sequentially deposit a first insulating material, a reflective material, and another first insulating material on the entire surface containing the current spreading layer to form a composite layer.
[0037] S4. Fabricating the first electrode 201 and the second electrode 202 includes: S41. Using photolithography etching process, etching a local area of the insulating layer 105 or the composite layer to form the first etching hole 107 and the second etching hole 108. S42. Using photolithography, deposition, and lift-off processes, the first electrode 201 and the second electrode 202 are fabricated. (Ref) Figure 14 The bottom of the first electrode 201 passes through the first etched hole 107 and is electrically connected to the ohmic contact layer 3. That is, the first electrode 201 is located on the ohmic contact layer and forms an ohmic contact with the N-type semiconductor layer 101 through the ohmic contact layer. The bottom of the second electrode 202 passes through the second etched hole 108 and is electrically connected to the current spreading layer 104. That is, the second electrode 202 is located on the current spreading layer and forms an ohmic contact with the P-type semiconductor layer 103 through the current spreading layer 104.
[0038] S5. Using wet etching technology, remove substrate 5 to obtain several independent red light chips, reference. Figure 2The substrate material includes GaAs, and the etching solution includes a mixture of ammonia and hydrogen peroxide (i.e., NH3·H2O). The reaction between the etching solution and the substrate is the same as in Example 1 above.
[0039] Red light chip structure reference prepared by the above method Figure 2 The red light chip includes a light emitter 1, an electrode 2, and an ohmic contact layer 3. The light emitter 1 includes a stacked insulating layer 105, a current spreading layer 104, a P-type semiconductor layer 103, a light emitting layer 102, and an N-type semiconductor layer 101. The electrode 2 includes a first electrode 201 (i.e., a negative electrode) and a second electrode 202 (i.e., a positive electrode). The ohmic contact layer 3 is located on the surface of the N-type semiconductor layer 101 and is used to achieve ohmic contact between the first electrode 201 and the N-type semiconductor layer 101. The current spreading layer 104 covers the surface of the P-type semiconductor layer 103 and is used to electrically connect the second electrode 202 to the P-type semiconductor layer 103.
[0040] In this embodiment, the N-type semiconductor layer 101 is made of aluminum phosphide or aluminum gallium indium phosphide, with aluminum phosphide being preferred. The light-emitting layer 102 is a quantum well layer, and the P-type semiconductor layer 103 is preferably made of aluminum indium phosphide. The current spreading layer 104 is preferably made of ITO, which has a current spreading function, enabling the current from the second electrode 202 to be rapidly transmitted and spread to the entire P-type semiconductor layer 103, thus ensuring rapid and uniform light emission from the light emitter. The first electrode 201 and the second electrode 202 are preferably made of Cr, Ti, or Al. The ohmic contact layer 3 is made of a composite material of Cr, Ni, Al, TiAl, Au and GeAuNi (i.e., chromium-gold-nickel alloy), a composite material of Au and AuZn (i.e., gold-zinc alloy), AuZn, GeAuNi, or Au. The ohmic contact layer 3 ensures that the first electrode 201 and the N-type semiconductor layer 101 form a good ohmic contact, thereby ensuring the stable electrical performance of the red light chip.
[0041] To facilitate the setting of the ohmic contact layer 3 and achieve electrical connection between the first electrode 201 and the N-type semiconductor layer 101, this application sets the N-type semiconductor layer 101 with the following structure: at least one side surface of the N-type semiconductor layer 101 protrudes from the bottom edge of the P-type semiconductor layer 103 to form a step. In this embodiment, the outer edge of the N-type semiconductor layer 101 protrudes from the bottom edge of the P-type semiconductor layer 103, making the light emitter "convex" or "L" shaped, and the ohmic contact layer 3 is located on the step.
[0042] In this embodiment, the insulating layer 105 covers the entire surface including the ohmic contact layer 3 and the current spreading layer. The material includes SiO2, SiNx, or AlN, with SiO2 being preferred in this embodiment. The bottom of the first electrode 201 penetrates the insulating layer 105 and is electrically connected to the ohmic contact layer 3; the bottom of the second electrode 202 penetrates the insulating layer 105 and is electrically connected to the current spreading layer 104. The insulating layer 105 effectively prevents the first electrode 201 and the second electrode 202 from connecting to areas other than the corresponding ohmic contact layer 3 and current spreading layer 104, thus avoiding any impact on the conductivity of the entire red light chip and further ensuring the stability of the red light chip's electrical performance. Furthermore, the provision of the insulating layer 105 facilitates the fabrication of larger-sized first electrodes 201 and second electrodes 202 in subsequent processes. In this embodiment, the first electrode 201 is covered by the insulating layer surface above the ohmic contact layer, and the second electrode 202 is covered by the insulating layer surface above the current spreading layer, so as to facilitate the electrical connection between the red light chip and other circuits. For example, the red light chip is a Micro LED with a size of 1μm to 50μm. Larger-sized electrodes are fabricated to match the electrode size with the linewidth of the driving substrate. This application does not specifically limit the electrode size. Under the condition that the first electrode and the second electrode are mutually insulated, the electrode size is determined based on the overall size of the red light chip.
[0043] It should be noted that, in another embodiment, the insulating layer 105 can be replaced by a composite layer. The composite layer includes two insulating layers and a reflective layer 106. The reflective layer 106 is located between the two insulating layers, preferably a DBR reflective layer or a metal reflective layer. The composite layer covers the surface of the light emitter, which helps to avoid the problem of short circuits formed between the first electrode 201 and the second electrode 202, which would affect the electrical performance of the red light chip. At the same time, it can realize light reflection and achieve the effect of improving light output efficiency.
[0044] Example 3 of the method for fabricating red light chips A method for fabricating a red light chip, the method comprising the steps S1 to S4 described above, and further comprising the step: S5. Using a flip-chip process, a support substrate 4 is provided on the electrode surface. Specifically, S51. A support substrate 4 is provided, and a first connection portion 401 and a second connection portion 402 are provided in the support substrate. Both the first connection portion 401 and the second connection portion 402 are made of conductive material, preferably at least one of Cr, Ti or Al. S52, the first connecting portion 401 and the second connecting portion 402 in the support substrate are flip-mounted and aligned with the first electrode 201 and the second electrode 202.
[0045] The above step S5 is mainly applicable to scenarios where the size of the red light chip and its electrodes is relatively large, such as when the size of the red light chip is above 50μm. When the size of the red light chip and its electrodes is relatively small, such as when the size of the red light chip is below 50μm, it is difficult to achieve high-precision flip-chip alignment connection between the electrode 2 and the first connection part 401 and the second connection part 402 in the support substrate 4.
[0046] In view of the above reasons, this application provides another method for preparing the support substrate 4, S5: coating the surfaces where the first electrode 201 and the second electrode 202 are located with a second insulating material; the second insulating material is preferably polyimide, photoresist, benzocyclobutene (i.e., BCB) or poly(p-phenylenebenzodioxazole) fiber.
[0047] The second insulating material is etched using photolithography to form the third etched hole 403 and the fourth etched hole 404, as shown in the figure. Figure 15 In step S4 above, making the surface of a local area of the first electrode flush with the surface of the second electrode is beneficial for exposure or etching in the photolithography process. Since the exposure or etching depth is limited, when the second insulating material is photoresist, photolithography can be directly used to develop and form the third and fourth etched holes. During photolithography, the exposure depth is consistent. Therefore, making the surface of the local area of the first electrode flush with the surface of the second electrode facilitates the implementation of the photolithography process and simultaneously meets the requirement that the subsequently fabricated first connection portion connects to the ohmic contact layer through the local area of the first electrode and is electrically connected to the bottom N-type semiconductor layer through the ohmic contact layer. When the second insulating material is polyimide, photolithography etching can be used to etch the second insulating material to form the third and fourth etched holes. During etching, the etching depth is consistent. Therefore, making the surface of the local area of the first electrode flush with the surface of the second electrode is beneficial for the implementation of the etching process and simultaneously meets the requirement that the subsequently fabricated first connection portion connects to the ohmic contact layer through the local area of the first electrode and is electrically connected to the bottom N-type semiconductor layer through the ohmic contact layer.
[0048] Conductive material is deposited inside and in the corresponding areas of the third and fourth etched holes using electron beam evaporation or magnetron sputtering to form the first connection part 401 and the second connection part 402, as shown in the figure. Figure 3 In this embodiment, the conductive material is preferably at least one of Cr, Ti, or Al.
[0049] S6. Remove substrate 5 using wet etching technology. The substrate material includes GaAs, and the etching solution includes a mixture of ammonia and hydrogen peroxide (i.e., NH3·H2O). The reaction between the etching solution and substrate 5 is the same as in Example 1 above.
[0050] S7. Based on channel 6 cutting, several independent red light chips are obtained, as referenced. Figure 3 .
[0051] Red light chip structure reference prepared by the above method Figure 3 The red light chip includes a light emitter 1, an electrode 2, and an ohmic contact layer 3. The structure of the light emitter 1 and the ohmic contact layer 3 is the same as that in Embodiment 2 above. The electrode 2 includes a first electrode 201 and a second electrode 202.
[0052] The red light chip prepared in this embodiment three differs from that in embodiment two in that a local area of the surface of the first electrode 201 is flush with the surface of the second electrode 202. In this embodiment three, the first electrode 201 extends from above the ohmic contact layer to above the P-type semiconductor layer, achieving a local area of the first electrode 201 flush with the second electrode 202. For larger red light chips, this structure facilitates the flip-chip alignment of the first electrode 201 and the second electrode 202 with other circuits in subsequent processes, such as flip-chip alignment with the support substrate or driving substrate. For smaller red light chips, this structure facilitates the photolithography or etching of the second insulating material when preparing the support substrate in subsequent processes, so as to prepare the first connection part and the second connection part, while meeting the requirement that the first electrode is electrically connected to the N-type semiconductor layer through the ohmic contact layer.
[0053] Another difference between the red light chip prepared in this embodiment three and that in embodiment two is that the red light chip also includes a supporting substrate 4. The material of the supporting substrate 4 is preferably polyimide, photoresist, benzocyclobutene (BCB), or poly(p-phenylenebenzodioxazole) fiber. The supporting substrate 4 is located on the electrode side, which not only facilitates the removal of the substrate 5 in subsequent processes, but also facilitates the application of the red light chip. After the substrate is removed, the overall size of the red light chip is further reduced. Due to its small size and thinness, it is extremely easy to break and be damaged, which is not conducive to its application. Therefore, this embodiment sets a supporting substrate 4 in the red light chip. The supporting substrate 4 has a certain supporting function and can effectively prevent the red light chip from breaking and being damaged, thus facilitating its mass transfer and other applications.
[0054] In addition, the support substrate 4 is provided with a first connecting portion 401 and a second connecting portion 402. One end of the first connecting portion 401 is electrically connected to the first electrode 201, and the other end penetrates through the support substrate 4. One end of the second connecting portion 402 is electrically connected to the second electrode 201, and the other end penetrates through the support substrate 4. The dimensions of one end of the first connecting portion 401 and the second connecting portion 402 match the electrode 2, and the dimensions of the other end match the pad size or line width of the external circuit (e.g., PCB board). This has the function of expanding the electrode size, which facilitates the connection of the red light chip to the external circuit and further facilitates its application.
[0055] It is understood that the above detailed description of the present invention is for illustrative purposes only and is not intended to limit the technical solutions described in the embodiments of the present invention. Those skilled in the art should understand that modifications or equivalent substitutions can still be made to the present invention to achieve the same technical effects; as long as the usage requirements are met, they are all within the protection scope of the present invention.
Claims
1. A method for fabricating a red light chip, characterized in that, The method includes: providing a light emitter (1), the light emitter (1) comprising a stacked P-type semiconductor layer (103), a light-emitting layer (102), and an N-type semiconductor layer (101); An ohmic contact layer (3) is prepared on the surface of the N-type semiconductor layer (101); A first electrode (201) and a second electrode (202) are prepared. The second electrode (202) is electrically connected to the P-type semiconductor layer (103). The first electrode (201) is connected to the N-type semiconductor layer (101) through the ohmic contact layer (3) to obtain a red light chip.
2. The method for fabricating a red light chip according to claim 1, characterized in that, The process of preparing the light emitter (1) includes: providing a substrate (5); An epitaxial material is deposited on the same side of the substrate (5) using a metal-organic chemical vapor deposition method. The epitaxial material includes N-type semiconductor material (1001), light-emitting material (1002), and P-type semiconductor material (1003) stacked together. The epitaxial material is etched using at least two photolithography etching processes to prepare several array-distributed light emitters (1).
3. The method for fabricating a red light chip according to claim 1, characterized in that, The process of preparing the light emitter (1) includes: providing a substrate (5); An epitaxial material is deposited on the same side of the substrate (4) using a metal-organic chemical vapor deposition method. The epitaxial material includes N-type semiconductor material (1001), light-emitting material (1002), and P-type semiconductor material (1003) stacked together. A current spreading material (1004) is deposited on the surface of the P-type semiconductor material (1003) using electron gun evaporation or magnetron sputtering deposition. At least two photolithography etching processes are used to etch the current spreading material (1001) and the epitaxial material to prepare a stacked current spreading layer (104), a P-type semiconductor layer (103), a light emitting layer (102), and an N-type semiconductor layer (101). The current spreading layer (104) covers the surface of the P-type semiconductor layer (103) and is used to electrically connect the second electrode (202) to the P-type semiconductor layer (103).
4. The method for fabricating a red light chip according to claim 2 or 3, characterized in that, Before preparing the first electrode (201) and the second electrode (202), an insulating layer (105) or a composite layer is prepared, including: using chemical vapor deposition or atomic layer deposition to deposit a first insulating material on the entire surface including the surface of the ohmic contact layer and the surface of the light emitter to form the insulating layer (105), or depositing the first insulating material and the reflective material to form the composite layer. The insulating layer (105) or the composite layer covers the surface of the light emitter (1). The composite layer includes two insulating layers (105) and at least one reflective layer (106). The reflective layer (106) is located between the two insulating layers (105) and is used for light reflection.
5. The method for fabricating a red light chip according to claim 4, characterized in that, The material of the current spreading layer (104) includes ITO material or AuZn alloy; the reflective material includes Ni / Ag / Au metal reflective material, ITO / Ag / Tiw mixed material or DBR reflective material; the first insulating material includes SiO2, SiNx or AlN; the material of the ohmic contact layer (3) includes Cr, Ni, Al, TiAl, Au and GeAuNi alloy composite material, Au and AuZn alloy composite material, AuZn, GeAuNi alloy or Au.
6. The method for fabricating a red light chip according to claim 5, characterized in that, The preparation of the first electrode (201) and the second electrode (202) includes: using photolithography etching process to etch a local area of the insulating layer (105) or the composite layer to form a first etch hole (107) and a second etch hole (108). Using photolithography, deposition, and lift-off processes, the first electrode (201) and the second electrode (202) are formed inside and in the corresponding areas of the first etched hole (107) and the second etched hole (108). The first electrode (202) is covered by the surface of the insulating layer (105) or the composite layer above the ohmic contact layer (3), and the second electrode (202) is covered by the surface of the insulating layer (105) or the composite layer above the current spreading layer. The bottom of the first electrode (201) penetrates the insulating layer (105) or the composite layer and is electrically connected to the ohmic contact layer (3). The bottom of the second electrode (202) penetrates the insulating layer (105) or the composite layer and is electrically connected to the current spreading layer (104). An isolation groove is provided between the first electrode (201) and the second electrode (202).
7. The method for fabricating a red light chip according to claim 1 or 6, characterized in that, The first electrode (201) extends from above the ohmic contact layer to above the P-type semiconductor layer, and a local area of the surface of the first electrode (201) is flush with the surface of the second electrode (202).
8. The method for fabricating a red light chip according to claim 7, characterized in that, Removing the substrate (4) includes: coating the surfaces where the first electrode (201) and the second electrode (202) are located with a second insulating material to form a support substrate; The substrate was etched and stripped using a wet etching process (5). The third etch hole (403) and the fourth etch hole (404) are formed in the support substrate by photolithography or photolithographic etching process. The first connecting part (401) and the second connecting part (402) are formed inside the third etched hole (403) and the fourth etched hole (404) and the corresponding area by photolithography, deposition and stripping processes.
9. The method for fabricating a red light chip according to claim 8, characterized in that, The second insulating material includes polyimide, photoresist, benzocyclobutene, or poly(p-phenylenebenzodioxazole) fiber.
10. The method for fabricating a red light chip according to claim 8, characterized in that, The wet etching process uses a etching solution consisting of a mixture of ammonia and hydrogen peroxide.