Display device and vehicle

Abstract

Provided are display devices and vehicles that can minimize glare to a user. A display device includes a display panel and a display driver connected to the display panel. The display panel includes a substrate, a pixel electrode on the substrate, a pixel definition layer on the pixel electrode and defining an emission area overlapping at least a portion of the pixel electrode, a light emitting layer on the pixel electrode in the emission area, and a common electrode on the light emitting layer. The emission area includes a first corner having a curved shape protruding convexly toward a first side of the display panel, the first corner includes a plurality of sub corners connected to each other, and each of the plurality of sub corners has a curved shape protruding convexly toward the first side of the display panel.

Description

[0001] Cross-references to related applications

[0002] This application claims priority to and all benefits arising therefrom of Korean Patent Application No. 10-2025-0008345, filed on January 20, 2025, the contents of which are incorporated herein by reference in their entirety. Technical Field

[0003] This disclosure relates to display devices, and more specifically, to display devices, vehicles, and electronic devices capable of minimizing glare to users. Background Technology

[0004] With the advancement of information-oriented society, the demand for display devices capable of displaying images in various ways is increasing. Display devices can be flat panel display devices, such as liquid crystal displays, field emission displays, and light-emitting displays. Light-emitting display devices can include organic light-emitting display devices that use organic light-emitting diode elements as light-emitting elements or inorganic light-emitting display devices that use inorganic light-emitting diode elements (such as light-emitting diodes (LEDs)) as light-emitting elements. Summary of the Invention

[0005] This disclosure provides display devices, vehicles, and electronic devices that can minimize glare to users.

[0006] According to one embodiment of the present disclosure, a display device is provided, comprising: a display panel; and a display driver connected to the display panel, wherein the display panel includes: a substrate; a pixel electrode on the substrate; a pixel defining layer located on the pixel electrode and defining an emitting region overlapping at least a portion of the pixel electrode; a light-emitting layer on the pixel electrode in the emitting region; and a common electrode on the light-emitting layer, wherein the emitting region includes a first corner having a curved shape projecting convexly toward a first edge of the display panel, the first corner including a plurality of sub-corners connected to each other, and each of the plurality of sub-corners having a curved shape projecting convexly toward the first edge of the display panel.

[0007] According to one embodiment of this disclosure, a display device is provided, including: a display panel; and a display driver connected to the display panel, wherein the display panel includes: a substrate; a pixel electrode on the substrate; a pixel defining layer located on the pixel electrode and defining an emitting region overlapping at least a portion of the pixel electrode; a light-emitting layer on the pixel electrode in the emitting region; a common electrode on the light-emitting layer; and a pattern layer disposed directly below the pixel electrode between the substrate and the pixel electrode, wherein the emitting region includes a first corner having a curved shape that convexly protrudes toward a first edge of the display panel, and in a plan view, the pattern layer extends along a first direction perpendicular to the extension direction of the first edge.

[0008] According to one embodiment of the present disclosure, a vehicle is provided, including: a driver's seat; and a display device positioned adjacent to the driver's seat, wherein the display device includes: a display panel; and a display driver connected to the display panel, wherein the display panel includes: a substrate; a pixel electrode on the substrate; a pixel defining layer on the pixel electrode and defining an emitting region overlapping at least a portion of the pixel electrode; a light-emitting layer on the pixel electrode in the emitting region; and a common electrode on the light-emitting layer, wherein the emitting region includes a first corner having a curved shape projecting convexly toward a first edge of the display panel, the first corner including a plurality of sub-corners connected to each other, and each of the plurality of sub-corners having a curved shape projecting convexly toward the first edge of the display panel.

[0009] According to one embodiment of the present disclosure, a vehicle is provided, including: a seat; and a display device positioned adjacent to the seat, wherein the display device includes: a display panel; and a display driver connected to the display panel, wherein the display panel includes: a substrate; a pixel electrode on the substrate; a pixel defining layer on the pixel electrode and defining an emitting region overlapping at least a portion of the pixel electrode; a light-emitting layer on the pixel electrode in the emitting region; and a common electrode on the light-emitting layer; and a pattern layer disposed directly below the pixel electrode between the substrate and the pixel electrode, wherein the emitting region includes a first corner having a curved shape that convexly projects toward a first edge of the display panel, and in a plan view, the pattern layer extends along a first direction perpendicular to the extension direction of the first edge.

[0010] According to one embodiment of the present disclosure, an electronic device is provided, including: a processor; a memory connected to the processor; and a display device connected to the processor, wherein the display device includes: a display panel; and a display driver connected to the display panel, wherein the display panel includes: a substrate; a pixel electrode on the substrate; a pixel defining layer located on the pixel electrode and defining an emitting region overlapping at least a portion of the pixel electrode; a light-emitting layer on the pixel electrode in the emitting region; and a common electrode on the light-emitting layer, wherein the emitting region includes a first corner having a curved shape projecting convexly toward a first edge of the display panel, the first corner including a plurality of sub-corners connected to each other, and each of the plurality of sub-corners having a curved shape projecting convexly toward the first edge of the display panel.

[0011] According to one embodiment of this disclosure, an electronic device is provided, including: a processor; a memory connected to the processor; and a display device connected to the processor, wherein the display device includes: a display panel; and a display driver connected to the display panel, wherein the display panel includes: a substrate; a pixel electrode on the substrate; a pixel defining layer located on the pixel electrode and defining an emitting region overlapping at least a portion of the pixel electrode; a light-emitting layer on the pixel electrode in the emitting region; and a common electrode on the light-emitting layer; and a pattern layer disposed directly below the pixel electrode between the substrate and the pixel electrode, wherein the emitting region includes a first corner having a curved shape that convexly protrudes toward a first edge of the display panel, and in a plan view, the pattern layer extends along a first direction perpendicular to the extension direction of the first edge.

[0012] According to the display device, vehicle, and electronic device according to the implementation method, glare to the user can be minimized.

[0013] For example, according to an embodiment, among the corners of the emitting area of ​​the display panel, the corner protruding toward the first side of the display panel (e.g., the side adjacent to the direction in which the user is located) has the largest radius of curvature, such that the amount of scattered light reflected from the display panel and traveling toward the first side can be minimized. Therefore, the amount of scattered light toward the user (e.g., the driver in the driver's seat of a vehicle) can be minimized, thereby minimizing glare to the user (e.g., the driver).

[0014] The effects of this disclosure are not limited to those described above, and other effects not described herein will become apparent to those skilled in the art from the following description. Attached Figure Description

[0015] The above and other aspects and features of this disclosure will become more apparent from the detailed description of exemplary embodiments thereof with reference to the accompanying drawings, in which: Figure 1 This is a plan view showing a display device according to an embodiment; Figure 2 This is a block diagram illustrating a display panel and a display driver according to an embodiment; Figure 3 This is a circuit diagram of a pixel of a display device according to an embodiment; Figure 4 This is a cross-sectional view of a display device according to an embodiment; Figure 5 This is a plan view of the display device according to the embodiment; Figure 6 yes Figure 5 A magnified view of area A1; Figure 7 This is an enlarged view of the emission area according to the implementation method; Figure 8 It is used to describe Figure 7 A view of the shape and radius of curvature of each corner of the emission region; Figure 9 This is a diagram showing a portion of a vehicle including a display device according to an embodiment; Figure 10 yes Figure 9 A magnified view of a portion; Figure 11 This is an enlarged view of the display device according to the embodiment; Figure 12 This is an enlarged view of the emission area according to the implementation method; Figure 13 It is used to describe Figure 12 A view of the shape and radius of curvature of each corner of the first firing region; Figure 14 This is an enlarged view of the emission area of ​​the display device according to the embodiment; Figure 15 It is used to describe Figure 14 A view of the shape and radius of curvature of each corner of the emission region; Figure 16 This is an enlarged view of the display device according to the embodiment; Figure 17 This is an enlarged view of the emission area according to the implementation method; Figure 18 It is used to describe Figure 17 A view of the shape and radius of curvature of each corner of the first firing region; Figure 19 It includes Figures 16 to 18 A magnified view of a portion of the vehicle displayed on the device; Figure 20This is a plan view of the display device according to the embodiment; Figure 21 It is a block diagram of an electronic device according to an embodiment; and Figure 22 and Figure 23 These are schematic diagrams of electronic devices according to various implementation methods. Detailed Implementation

[0016] Embodiments supported by this disclosure will now be described more fully below with reference to the accompanying drawings, in which exemplary embodiments of this disclosure are illustrated. However, aspects supported by this disclosure may be implemented in various forms and should not be construed as limited to the embodiments set forth herein. Rather, exemplary embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the exemplary aspects of this disclosure to those skilled in the art.

[0017] It will also be understood that when a layer is referred to as being "on" another layer or substrate, it can be directly on the other layer or substrate, or there may be an intervening layer. Throughout the specification, the same reference numerals denote the same components. In the drawings, the thickness of layers and regions is exaggerated for clarity.

[0018] Although the terms "first," "second," etc., may be used herein to describe various elements, these elements should not be limited by these terms. These terms can be used to distinguish one element from another. Therefore, without departing from the teachings of one or more embodiments, the first element discussed below may be referred to as the second element. The description of an element as a "first" element is not limited to requiring or implying the presence of a second element or other elements. The terms "first," "second," etc., may also be used herein to distinguish elements of different categories or groups. For the sake of brevity, the terms "first," "second," etc., may respectively represent "first class (or first group)," "second class (or second group)," etc.

[0019] The term "adjacent" as used herein can refer to a situation where elements are relatively close to each other but spaced apart. In some cases, elements described as adjacent to each other may be close to each other but spaced apart by a predetermined distance.

[0020] The term "proximity" can refer to a situation where elements are spaced apart from each other at a relatively small distance suitable for implementing aspects of the present disclosure. In some aspects, this distance can be a predetermined distance associated with implementing aspects of the present disclosure.

[0021] Features of the various embodiments of this disclosure can be combined in part or in whole. As will be clearly understood by those skilled in the art, various technical interactions and operations are possible. Various embodiments can be practiced individually or in combination.

[0022] In the following description, specific exemplary embodiments will be described with reference to the accompanying drawings.

[0023] Figure 1 This is a plan view showing the display device 10 according to an embodiment. Figure 2 This is a block diagram showing a display panel 100 and a display driver 200 according to an embodiment.

[0024] like Figure 1 and Figure 2 As shown, the display device 10 may include a display panel 100, a display driver 200, a circuit board 300, and a power supply unit 500.

[0025] like Figure 1 As shown, the display panel 100 can be formed into a quadrilateral planar shape or a near-quadrilateral planar shape. For example, in a planar view, the display panel 100 may include a first side S1, a second side S2, a third side S3, and a fourth side S4.

[0026] Each of the first side S1 and the second side S2 of the display panel 100 can extend in the second direction DR2, and each of the third side S3 and the fourth side S4 of the display panel 100 can extend in the first direction DR1.

[0027] The third side S3 of the display panel 100 may overlap with the circuit board 300. The first side S1 of the display panel 100 may be positioned adjacent to one end of the third side S3. For example, the first side S1 of the display panel 100 may be located between one end of the third side S3 and one end of the fourth side S4. The second side S2 of the display panel 100 may be positioned adjacent to the other end of the third side S3. For example, the second side S2 of the display panel 100 may be located between the other end of the third side S3 and the other end of the fourth side S4. The first side S1 and the second side S2 of the display panel 100 may face each other in the first direction DR1, and the third side S3 and the fourth side S4 of the display panel 100 may face each other in the second direction DR2.

[0028] The lengths of opposite sides of the display panel 100 can be equal. For example, the first side S1 and the second side S2 of the display panel 100 can have the same length. In some respects, the third side S3 and the fourth side S4 of the display panel 100 can have the same length.

[0029] The lengths of adjacent sides of the display panel 100 may differ from one another. For example, the length of the third side S3 of the display panel 100 may be longer than the length of the first side S1 of the display panel 100. In some aspects, the length of the fourth side S4 of the display panel 100 may be longer than the length of the second side S2 of the display panel 100. However, embodiments of the present disclosure are not limited thereto, and the length of each of the first side S1 to the fourth side S4 may be modified in various ways.

[0030] The display panel 100 may include a display area DA and a non-display area NDA.

[0031] The display area DA may include multiple pixels PX and multiple drive voltage lines VDL and multiple common voltage lines VSL connected to the multiple pixels PX (see [link to documentation]). Figure 3 It has multiple gate lines (GL), multiple emitter control lines (EML), and multiple data lines (DL).

[0032] Each of the multiple pixels PX can be connected to a gate line GL, a data line DL, an emitter control line EML, a drive voltage line VDL, and a common voltage line VSL. Each pixel PX may include at least one transistor, a light-emitting element, and a capacitor.

[0033] Each of the multiple gate lines GL can extend along a first direction DR1 and can be spaced apart from each other along a second direction DR2 that intersects the first direction DR1. The gate lines GL can be arranged along the second direction DR2. The gate lines GL can sequentially provide gate signals to multiple pixels PX.

[0034] Each transmission control line (EML) can extend along a first direction (DR1) and can be spaced apart from each other along a second direction (DR2). The transmission control lines (EML) can be arranged along the second direction (DR2). The transmission control lines (EML) can sequentially provide transmission signals to multiple pixels (PX).

[0035] Data lines DL can extend along the second direction DR2 and can be spaced apart from each other along the first direction DR1. Data lines DL can be arranged along the first direction DR1. Data lines DL can provide data voltages to multiple pixels PX. The data voltages determine the brightness of each pixel PX.

[0036] The driving voltage lines VDL can extend along the second direction DR2 and can be spaced apart from each other along the first direction DR1. The driving voltage lines VDL can be arranged along the first direction DR1. The driving voltage lines VDL can provide driving voltage VD to multiple pixels PX (see...). Figure 3 The driving voltage can be the high potential voltage used to drive the light-emitting element of the pixel PX.

[0037] The non-display area NDA may surround the display area DA. The non-display area NDA may include a gate driver 610, an emitter driver 620, a fan-out line FL, a first gate control line GSL1, and a second gate control line GSL2.

[0038] The fan-out line FL can extend from the display driver 200 to the display area DA. The fan-out line FL can provide the data voltage received from the display driver 200 to multiple data lines DL. The fan-out line FL can be connected to the display driver 200 via a circuit board 300.

[0039] The first gate control line GSL1 can extend from the display driver 200 to the gate driver 610. The first gate control line GSL1 can provide the gate control signal GCS received from the display driver 200 to the gate driver 610. The first gate control line GSL1 can be connected to the display driver 200 via the circuit board 300.

[0040] The second gate control line GSL2 can extend from the display driver 200 to the transmit driver 620. The second gate control line GSL2 can provide the transmit control signal ECS received from the display driver 200 to the transmit driver 620.

[0041] Display driver 200 may include timing controller 210 and data driver 220.

[0042] The timing controller 210 can receive digital video data DATA and timing signals from the circuit board 300. Based on the timing signals, the timing controller 210 can generate a data control signal DCS to control the operating timing of the data driver 220, a gate control signal GCS to control the operating timing of the gate driver 610, and a transmit control signal ECS to control the operating timing of the transmit driver 620. The timing controller 210 can provide the gate control signal GCS to the gate driver 610 via a first gate control line GSL1. The timing controller 210 can provide the transmit control signal ECS to the transmit driver 620 via a second gate control line GSL2. The timing controller 210 can also provide digital video data DATA and the data control signal DCS to the data driver 220.

[0043] Data driver 220 converts digital video data DATA into analog data voltage and provides it to data line DL via fan-out line FL. Gate driver 610's gate signal selects which pixel PX receives the data voltage, and the selected pixel PX can receive the data voltage via data line DL.

[0044] The power supply unit 500 may be located on the circuit board 300 to provide power voltage to the display driver 200 and the display panel 100. The power supply unit 500 may generate a driving voltage and provide the driving voltage to the driving voltage line VDL, generate an initialization voltage and provide the initialization voltage to the initialization voltage line, and generate a common voltage shared by the light-emitting elements of multiple pixels PX and provide the common voltage to a common electrode.

[0045] The gate driver 610 may be located at one outer edge of the display area DA or at one side of the non-display area NDA. The emitter driver 620 may be located at the other outer edge of the display area DA or at the other side of the non-display area NDA. However, embodiments of this disclosure are not limited thereto. As another example, the gate driver 610 and the emitter driver 620 may be located at either one side or the other side of the non-display area NDA.

[0046] Gate driver 610 may include a plurality of transistors for generating a gate signal based on a gate control signal GCS. Emitter driver 620 may include a plurality of transistors for generating an emit signal based on an emit control signal ECS. For example, the transistors of gate driver 610 and emitter driver 620 may be formed in the same layer as the transistors of each pixel PX. Gate driver 610 may provide a gate signal to gate line GL, and emitter driver 620 may provide an emit signal to emit control line EML.

[0047] Figure 3 This is a circuit diagram of a pixel PX of the display device 10 according to an embodiment. For example, Figure 3 Can be used for Figure 1 The equivalent circuit diagram of pixel PX.

[0048] Pixel PX can be connected to the first gate line GWL, the second gate line GCL, the third gate line GIL, the fourth gate line GBL, the emit control line EML, the data line DL, the drive voltage line VDL, the common voltage line VSL, the first initialization voltage line VIL1, and the second initialization voltage line VIL2.

[0049] A pixel PX may include a pixel circuit PC and a light-emitting element LEL. The pixel circuit PC may include a first transistor T1, a second transistor T2, a third transistor T3, a fourth transistor T4, a fifth transistor T5, a sixth transistor T6, a seventh transistor T7, an eighth transistor T8, and a capacitor Cst.

[0050] The first transistor T1 may include a gate electrode, a source electrode, and a drain electrode. The first transistor T1 can control the source-drain current (hereinafter referred to as the drive current) based on the data voltage applied to the gate electrode. The drive current flowing through the channel region of the first transistor T1 (e.g., Isd) can be proportional to the square of the difference between the threshold voltage (Vth) and the voltage between the source and gate electrodes of the first transistor T1 (Vsg) (Isd = k × (Vsg - Vth)). 2 Here, k is a scaling factor determined by the structure and physical characteristics of the first transistor T1, Vsg is the source-gate voltage of the first transistor T1, and Vth is the threshold voltage of the first transistor T1.

[0051] A light-emitting element (LEL) can emit light by receiving a driving current Isd. The amount of light emitted or the brightness of the LEL can be proportional to the magnitude of the driving current Isd.

[0052] The light-emitting element (LEL) can be an organic light-emitting diode (OLED), which includes a first electrode (e.g., an anode electrode or pixel electrode), a second electrode (e.g., a cathode electrode or a common electrode), and an organic light-emitting layer located between the first and second electrodes. In another example, the LEL can be an inorganic light-emitting element, which includes a first electrode, a second electrode, and an inorganic semiconductor located between the first and second electrodes. As another example, the LEL can be a quantum dot light-emitting element, which includes a first electrode, a second electrode, and a quantum dot light-emitting layer located between the first and second electrodes. Yet another example, the LEL can be a micro-LED.

[0053] The first electrode of the light-emitting element LEL can be electrically connected to the fourth node N4. The first electrode of the light-emitting element LEL can be connected to the drain electrode of the sixth transistor T6 and the source electrode of the seventh transistor T7 via the fourth node N4. The second electrode of the light-emitting element LEL can be connected to the common voltage line VSL. The second electrode of the light-emitting element LEL can receive a common voltage VS (e.g., a low potential voltage) from the common voltage line VSL.

[0054] The second transistor T2 can be turned on by the first gate signal GW of the first gate line GWL to electrically connect the data line DL to the first node N1, which is the source electrode of the first transistor T1. The second transistor T2 can be turned on according to the first gate signal GW to provide a data voltage to the first node N1. The gate electrode of the second transistor T2 can be electrically connected to the first gate line GWL, the source electrode of the second transistor T2 can be electrically connected to the data line DL, and the drain electrode of the second transistor T2 can be electrically connected to the first node N1.

[0055] The third transistor T3 can be turned on by the second gate signal GC of the second gate line GCL to electrically connect the second node N2, which is the drain electrode of the first transistor T1, to the third node N3, which is the gate electrode of the first transistor T1. The third transistor T3 can be connected between the third node N3 and the second node N2. For example, the gate electrode of the third transistor T3 can be electrically connected to the second gate line GCL, the source electrode of the third transistor T3 can be electrically connected to the third node N3, and the drain electrode of the third transistor T3 can be electrically connected to the second node N2. The third transistor T3 can be turned on by the second gate signal GC of the second gate line GCL to electrically connect the second node N2, which is the drain electrode of the first transistor T1, to the third node N3, which is the gate electrode of the first transistor T1.

[0056] The fourth transistor T4 can be turned on by the third gate signal GI of the third gate line GIL to electrically connect the third node N3, which serves as the gate electrode of the first transistor T1, to the first initialization voltage line VIL1. The fourth transistor T4 can be connected in series between the third node N3 and the first initialization voltage line VIL1. For example, the gate electrode of the fourth transistor T4 can be electrically connected to the third gate line GIL, the source electrode of the fourth transistor T4 can be electrically connected to the third node N3, and the drain electrode of the fourth transistor T4 can be electrically connected to the first initialization voltage line VIL1. The first initialization voltage line VIL1 can transmit the first initialization voltage VI1.

[0057] The fifth transistor T5 can be turned on by the emit signal EM of the emit control line EML to electrically connect the drive voltage line VDL to the first node N1, which is the source electrode of the first transistor T1. The gate electrode of the fifth transistor T5 can be electrically connected to the emit control line EML, the source electrode of the fifth transistor T5 can be electrically connected to the drive voltage line VDL, and the drain electrode of the fifth transistor T5 can be electrically connected to the first node N1.

[0058] The sixth transistor T6 can be turned on by the emit signal EM of the emitter control line EML to electrically connect the second node N2, which is the drain electrode of the first transistor T1, to the fourth node N4, which is the first electrode of the light-emitting element LEL. The gate electrode of the sixth transistor T6 can be electrically connected to the emitter control line EML, the source electrode of the sixth transistor T6 can be electrically connected to the second node N2, and the drain electrode of the sixth transistor T6 can be electrically connected to the fourth node N4. In the example where all of the fifth transistor T5, the first transistor T1, and the sixth transistor T6 are turned on, the drive current Isd can be provided to the light-emitting element LEL.

[0059] The seventh transistor T7 can be turned on by the fourth gate signal GB of the fourth gate line GBL to electrically connect the fourth node N4, which serves as the first electrode of the light-emitting element LEL, to the second initialization voltage line VIL2. By turning on the seventh transistor T7 based on the fourth gate signal GB, the first electrode of the light-emitting element LEL can discharge to the second initialization voltage VI2. The gate electrode of the seventh transistor T7 can be electrically connected to the fourth gate line GBL, the source electrode of the seventh transistor T7 can be electrically connected to the fourth node N4, and the drain electrode of the seventh transistor T7 can be electrically connected to the second initialization voltage line VIL2. The second initialization voltage line VIL2 can transmit the second initialization voltage VI2.

[0060] The eighth transistor T8 can be turned on by the fourth gate signal GB of the fourth gate line GBL to electrically connect the bias voltage line VBL to the first node N1, which is the source electrode of the first transistor T1. The eighth transistor T8 can be turned on according to the fourth gate signal GB to provide a bias voltage VB to the first node N1. The eighth transistor T8 can improve the hysteresis of the first transistor T1 by providing a bias voltage VB to the source electrode of the first transistor T1. The gate electrode of the eighth transistor T8 can be electrically connected to the fourth gate line GBL, the source electrode of the eighth transistor T8 can be electrically connected to the bias voltage line VBL, and the drain electrode of the eighth transistor T8 can be electrically connected to the first node N1.

[0061] Each of the first transistor T1, the second transistor T2, the fifth transistor T5, the sixth transistor T6, the seventh transistor T7, and the eighth transistor T8 may include a silicon-based active layer. For example, each of the first transistor T1, the second transistor T2, the fifth transistor T5, the sixth transistor T6, the seventh transistor T7, and the eighth transistor T8 may be a p-type transistor including an active layer comprising low-temperature polycrystalline silicon (LTPS). The active layer comprising low-temperature polycrystalline silicon can have high electron mobility and excellent conduction characteristics. Therefore, in the display device 10, multiple pixels PX can be driven stably and efficiently due to the inclusion of transistors with excellent conduction characteristics. Each of the first transistor T1, the second transistor T2, the fifth transistor T5, the sixth transistor T6, the seventh transistor T7, and the eighth transistor T8 can output the current flowing into the source electrode to the drain electrode based on a low gate voltage applied to the gate electrode.

[0062] The third transistor T3 and the fourth transistor T4 can be n-type transistors including an oxide-based active layer. The transistor including the oxide-based active layer can have a coplanar structure in which the gate electrode is located thereon. The transistor including the oxide-based active layer can output current flowing into the drain electrode to the source electrode based on a high gate voltage applied to the gate electrode.

[0063] The capacitor Cst can be electrically connected between the third node N3, which serves as the gate electrode of the first transistor T1, and the drive voltage line VDL. For example, the first electrode of the capacitor Cst can be electrically connected to the third node N3, and the second electrode of the capacitor Cst can be electrically connected to the drive voltage line VDL, so that the potential difference between the drive voltage line VDL and the gate electrode of the first transistor T1 can be maintained.

[0064] In some embodiments, a pixel PX may include multiple pixels that provide light of different colors (or wavelengths). For example, a pixel PX may include a first pixel that provides light of a first color, a second pixel that provides light of a second color, and a third pixel that provides light of a third color. Accordingly, the first pixel may include a first light-emitting element that provides light of the first color, the second pixel may include a second light-emitting element that provides light of the second color, and the third pixel may include a third light-emitting element that provides light of the third color. Here, the first color may be light in the red wavelength band, the second color may be light in the green wavelength band, and the third color may be light in the blue wavelength band. However, embodiments of this disclosure are not limited thereto, and the first color, second color, and third color may be various colors with different wavelengths.

[0065] Figure 4 This is a cross-sectional view of the display device 10 according to an embodiment. For example, Figure 4 It can be Figure 1 A cross-sectional view of a portion of the pixel PX.

[0066] like Figure 4 As shown, the display panel 100 of the display device 10 may include a substrate SUB, a barrier layer BR, a thin film transistor layer TFTL, a light-emitting element layer EMTL, and an encapsulation layer ENC. The barrier layer BR, the thin film transistor layer TFTL, the light-emitting element layer EMTL, and the encapsulation layer ENC may be sequentially located on the substrate SUB along the third direction DR3.

[0067] The substrate SUB can be a rigid substrate or a flexible substrate that can be bent, folded, or rolled. The substrate SUB may include insulating materials such as, for example, glass, quartz, or polymeric resins. Examples of polymeric materials may include polyethersulfone (PES), polyacrylate (PA), polyarylate (PAR), polyetherimide (PEI), polyethylene naphthalate (PEN), polyethylene terephthalate (PET), polyphenylene sulfide (PPS), polyallyl ester, polyimide (PI), polycarbonate (PC), cellulose triacetate (TAC), cellulose acetate propionate (CAP), or combinations thereof. Optionally, the substrate SUB may include metallic materials.

[0068] like Figure 4As shown, the barrier layer BR can be located on the substrate SUB. The barrier layer BR can be located on the entire surface of the substrate SUB. The barrier layer BR can be a film that can protect the transistors T1 to T8 of the thin-film transistor layer TFTL and the light-emitting layer EL of the light-emitting element layer EMTL from the effects of moisture permeating through the moisture-permeable substrate SUB. The barrier layer BR can include a plurality of inorganic films stacked alternately. For example, the barrier layer BR can include a plurality of films in which one or more inorganic films selected from silicon nitride layer, silicon oxide nitride layer, silicon oxide layer, titanium oxide layer and aluminum oxide layer are stacked alternately (e.g., first barrier layer BR1 and second barrier layer BR2).

[0069] like Figure 4 As shown, the first patterning layer may be located on the barrier layer BR. For example, a photoblocking layer BML may be located on the barrier layer BR. The photoblocking layer BML may be located on the barrier layer BR and cover the overlapping region (e.g., the first channel region CH1) between the first gate electrode GE1 and the first active layer ACT1. In other words, the photoblocking layer BML may be located on the barrier layer BR and overlap with the first channel region CH1 of the first transistor T1, which serves as the driving transistor. The photoblocking layer BML may include, for example, a metallic material (such as, for example, chromium (Cr) or molybdenum (Mo)), black ink, black dye, etc. In the example where the photoblocking layer BML includes a metallic material, the photoblocking layer BML may be provided with a constant power supply. In this way, the photoblocking layer BML is not electrically floating, and the electrical characteristics of the transistor (e.g., the first transistor T1) on the photoblocking layer BML can be stabilized.

[0070] like Figure 4 As shown, the buffer layer BF can be located on the light-blocking layer BML. The buffer layer BF can be located on the entire surface of the substrate SUB on which the barrier layer BR is disposed. The buffer layer BF can be a film that protects the transistors T1 to T8 of the thin-film transistor layer TFTL and the light-emitting layer EL of the light-emitting element layer EMTL from moisture permeating through the moisture-sensitive substrate SUB. The buffer layer BF can include multiple inorganic films stacked alternately. For example, the buffer layer BF can include multiple films in which one or more inorganic films selected from silicon nitride layers, silicon oxide nitride layers, silicon oxide layers, titanium oxide layers, and aluminum oxide layers are stacked alternately (e.g., first buffer layer BF1 and second buffer layer BF2).

[0071] The second patterning layer can be located on the buffer layer BF. For example, the first active layer ACT1 can be located on the barrier layer BR. Figure 4As shown, the first active layer ACT1 may include the first channel region CH1 of the first transistor T1, the second electrode E12 of the first transistor T1, the first electrode E61 of the sixth transistor T6, the second electrode E62 of the sixth transistor T6, and the sixth channel region CH6 of the sixth transistor T6. The first active layer ACT1 may be an active layer comprising low-temperature polysilicon (LTPS).

[0072] The first gate insulating layer GTI1 can be located on the second patterned layer. For example, as Figure 4 As shown, the first gate insulating layer GTI1 can be located on the first active layer ACT1. In this case, the first gate insulating layer GTI1 can be located on the entire surface of the substrate SUB on which the first active layer ACT1 is disposed. The first gate insulating layer GTI1 may include tetraethyl orthosilicate (TEOS), silicon nitride (SiN) x At least one of silicon nitride (SiO2) and silicon oxide (SiO2). For example, the first gate insulating layer GTI1 may have a double-film structure in which a silicon nitride film with a thickness of 40 nm and a tetraethyl orthosilicate film with a thickness of 80 nm are stacked sequentially.

[0073] The third pattern layer can be located on the first gate insulating layer GTI1. For example, the second gate electrode, the first gate electrode GE1, the eighth gate electrode, the emitter control line EML, the fifth gate electrode, and the sixth gate electrode GE6 can be located on the first gate insulating layer GTI1. Figure 4 An example is shown in which the first gate electrode GE1, the sixth gate electrode GE6, and the emitter control line EML are located on the first gate insulating layer GTI1. The first gate electrode GE1 may be located on the first gate insulating layer GTI1 and overlap with the first channel region CH1 of the first active layer ACT1. The sixth gate electrode GE6 of the emitter control line EML may be located on the first gate insulating layer GTI1 and overlap with the sixth channel region CH6 of the first active layer ACT1. The third patterning layer may include at least one of molybdenum (Mo), copper (Cu), aluminum (Al), and titanium (Ti), and may be formed as a single layer or multiple layers. For example, the first gate electrode GE1 may be formed as a three-layer film comprising a titanium film, an aluminum film, and a titanium film sequentially located on the first gate insulating layer GTI1 along the third direction DR3.

[0074] The second gate insulating layer GTI2 can be located on the third patterned layer. For example, as Figure 4As shown, the second gate insulating layer GTI2 can be located on the first gate electrode GE1, the sixth gate electrode GE6, and the emitter control line EML. In this case, the second gate insulating layer GTI2 can be located on the entire surface of the substrate SUB on which the first gate electrode GE1, the sixth gate electrode GE6, and the emitter control line EML are disposed. The second gate insulating layer GTI2 can include the same material and structure as the first gate insulating layer GTI1 described herein.

[0075] The fourth patterning layer can be located on the second gate insulating layer GTI2. For example, the fourth anti-gate electrode, the third anti-gate electrode GEb3, and the capacitor electrode CPE can be located on the second gate insulating layer GTI2. Figure 4 An example is shown in which the capacitor electrode CPE and the third anti-gate electrode GEb3 are located on the second gate insulating layer GTI2. The capacitor electrode CPE may be located on the second gate insulating layer GTI2 and overlap with the first gate electrode GE1. The capacitor Cst may be formed between the capacitor electrode CPE and the first gate electrode GE1. The fourth patterning layer may have the same material or structure as the third patterning layer described herein.

[0076] The first interlayer insulating layer ITL1 can be located on the fourth pattern layer. For example, as shown... Figure 4 As shown, the first interlayer insulating layer ITL1 can be located on the capacitor electrode CPE and the third anti-gate electrode GEb3. In this case, the first interlayer insulating layer ITL1 can be located on the entire surface of the substrate SUB on which the capacitor electrode CPE and the third anti-gate electrode GEb3 are disposed. The first interlayer insulating layer ITL1 can include an inorganic film, such as a silicon nitride layer, a silicon oxide nitride layer, a silicon oxide layer, a titanium oxide layer, or an aluminum oxide layer. In some embodiments, the first interlayer insulating layer ITL1 can include multiple inorganic films.

[0077] The fifth patterned layer can be located on the first interlayer insulating layer ITL1. For example, the second active layer ACT2 can be located on the first interlayer insulating layer ITL1. Figure 4 As shown, the second active layer ACT2 may be located on the first interlayer insulating layer ITL1 and overlap with the third anti-gate electrode GEb3. The second active layer ACT2 may include the first electrode E31 of the third transistor T3, the second electrode E32 of the third transistor T3, and the third channel region CH3 of the third transistor T3. The third channel region CH3 of the second active layer ACT2 may overlap with the third anti-gate electrode GEb3. The second active layer ACT2 may be an oxide-based active layer. For example, the second active layer ACT2 may be an oxide semiconductor comprising indium gallium zinc oxide (IGZO) or indium gallium zinc tin oxide (IGZTO).

[0078] The third gate insulating layer GTI3 can be located on the fifth patterned layer. For example, as Figure 4 As shown, the third gate insulating layer GTI3 may be located on the second active layer ACT2. The third gate insulating layer GTI3 may be located on the entire surface of the substrate SUB on which the second active layer ACT2 is disposed. The third gate insulating layer GTI3 may have the same material and structure as the first gate insulating layer GTI1 described herein.

[0079] The sixth pattern layer can be located on the third gate insulating layer GTI3. For example, the fourth gate electrode and the third gate electrode GE3 can be located on the third gate insulating layer GTI3. Figure 4 An example is shown in which the third gate electrode GE3 is located on the third gate insulating layer GTI3. The third gate electrode GE3 can be positioned such that it overlaps with the third channel region CH3 of the second active layer ACT2. The sixth patterning layer can have the same material or structure as the third patterning layer described herein.

[0080] The second interlayer insulating layer, ITL2, can be located on the sixth pattern layer. For example, as shown... Figure 4 As shown, the second interlayer insulating layer ITL2 may be located on the third gate electrode GE3. The second interlayer insulating layer ITL2 may be located on the entire surface of the substrate SUB on which the third gate electrode GE3 is disposed. The second interlayer insulating layer ITL2 may have the same material and structure as the first interlayer insulating layer ITL1 described herein.

[0081] The seventh pattern layer can be located on the second interlayer insulating layer ITL2. For example, the first initialization voltage line VIL1, the third gate line GIL, the data connection electrode, the first gate line GWL, the second gate line GCL, the gate connection electrode GCE, the active connection electrode ACE, the bias voltage line VBL, the capacitor connection electrode, the lower pixel connection electrode PCEa, the fourth gate line GBL, and the second initialization voltage line VIL2 can be located on the second interlayer insulating layer ITL2. Figure 4An example is shown where the gate connection electrode GCE, active connection electrode ACE, bias voltage line VBL, and lower pixel connection electrode PCEa are located on the second interlayer insulating layer ITL2. The lower pixel connection electrode PCEa can be connected to the second electrode E62 of the sixth transistor T6 via a first contact hole CT1 that penetrates the second interlayer insulating layer ITL2, the third gate insulating layer GTI3, the first interlayer insulating layer ITL1, the second gate insulating layer GTI2, and the first gate insulating layer GTI1. The active connection electrode ACE can be connected to the second electrode E12 of the first transistor T1 and the first electrode E61 of the sixth transistor T6 via a second contact hole CT2 that penetrates the second interlayer insulating layer ITL2, the third gate insulating layer GTI3, the first interlayer insulating layer ITL1, the second gate insulating layer GTI2, and the first gate insulating layer GTI1. Furthermore, the active connection electrode ACE can be connected to the second electrode E32 of the third transistor T3 via a fifth contact hole CT5 that penetrates the second interlayer insulating layer ITL2 and the third gate insulating layer GTI3. The gate connection electrode GCE can be connected to the first gate electrode GE1 via a hole 40 penetrating the second interlayer insulating layer ITL2, the third gate insulating layer GTI3, the first interlayer insulating layer ITL1, the capacitor electrode CPE, and the third contact hole CT3 of the second gate insulating layer GTI2. Furthermore, the gate connection electrode GCE can be connected to the first electrode E31 of the third transistor T3 via a fourth contact hole CT4 penetrating the second interlayer insulating layer ITL2 and the third gate insulating layer GTI3. The seventh patterning layer can have the same material or structure as the third patterning layer described herein.

[0082] The first planarization layer VA1 may be located on the seventh patterning layer. For example, the first planarization layer VA1 may be located on the gate connection electrode GCE, the active connection electrode ACE, the bias voltage line VBL, and the lower pixel connection electrode PCEa. The first planarization layer VA1 may be located on the entire surface of the substrate SUB on which the gate connection electrode GCE, the active connection electrode ACE, the bias voltage line VBL, and the lower pixel connection electrode PCEa are disposed. The first planarization layer VA1 may include an organic film, such as, for example, acrylic resin, epoxy resin, phenolic resin, polyamide resin, polyimide resin, etc.

[0083] The eighth pattern layer can be located on the first planarization layer VA1. For example, the first data line, the drive voltage line VDL, and the upper pixel connection electrode PCEb can be located on the first planarization layer VA1. Figure 4An example is shown in which the driving voltage line VDL and the upper pixel connection electrode PCEb are located on the first planarization layer VA1. The upper pixel connection electrode PCEb can be connected to the lower pixel connection electrode PCEa through a sixth contact hole CT6 penetrating the first planarization layer VA1. The eighth patterning layer may have the same material or structure as the third patterning layer described herein.

[0084] The second planarization layer VA2 can be located on the eighth patterning layer. For example, the second planarization layer VA2 can be located on the driving voltage line VDL and the upper pixel connection electrode PCEb. The second planarization layer VA2 can be located on the entire surface of the substrate SUB on which the driving voltage line VDL and the upper pixel connection electrode PCEb are disposed. The second planarization layer VA2 can have the same material and structure as the first planarization layer VA1 described herein.

[0085] The ninth patterning layer can be located on the second planarization layer VA2. For example, as shown... Figure 4 As shown, the light-emitting element layer EMTL, including the ninth patterning layer, can be located on the second planarization layer VA2. For example, as... Figure 4 As shown, the pixel electrode PE can be located on the second planarization layer VA2, serving as the ninth pattern layer. The pixel electrode PE can be connected to the upper pixel connection electrode PCEb through the seventh contact hole CT7 penetrating the second planarization layer VA2.

[0086] In addition to the aforementioned ninth pattern layer, the aforementioned light-emitting element layer EMTL may also include light-emitting elements LEL and pixel-defining layers PDL.

[0087] A light-emitting element (LEL) may include a pixel electrode (PE), an emissive layer (EL), and a common electrode (CM). The emission region EA, formed by the sequential stacking of the pixel electrode PE, the emissive layer EL, and the common electrode CM, represents the region where holes from the pixel electrode PE and electrons from the common electrode CM recombine in the emissive layer EL to emit light. In this case, the pixel electrode PE may be the anode electrode (or first electrode) of the LEL, and the common electrode CM may be the cathode electrode (or second electrode) of the LEL.

[0088] In a top-emitting structure that emits light relative to the light-emitting layer EL towards the common electrode CM, the pixel electrode PE can be formed as a single layer of molybdenum (Mo), titanium (Ti), copper (Cu), or aluminum (Al), or it can be formed as a stacked structure of aluminum and titanium (Ti / Al / Ti), a stacked structure of aluminum and ITO (ITO / Al / ITO), an APC alloy, or a stacked structure of APC alloy and ITO (ITO / APC / ITO) to increase reflectivity. The APC alloy is an alloy of silver (Ag), palladium (Pd), and copper (Cu).

[0089] A pixel defining layer (PDL) can be used to define the emission region EA of a pixel PX. For this purpose, the pixel defining layer (PDL) can be positioned such that it exposes a portion of the pixel electrode PE on the second planarization layer VA2. The pixel defining layer (PDL) can cover the edge of the pixel electrode PE. In some embodiments, the pixel defining layer (PDL) can be located within a seventh contact hole CT7 penetrating the second planarization layer VA2. Therefore, the seventh contact hole CT7 penetrating the second planarization layer VA2 can be filled by the pixel defining layer (PDL). The pixel defining layer (PDL) can be formed as an organic film, such as, for example, acrylic resin, epoxy resin, phenolic resin, polyamide resin, polyimide resin, etc.

[0090] like Figure 4 As shown, the spacer SPC can be located on the pixel defining layer PDL. The spacer SPC can be used to support the mask during the process of manufacturing the light-emitting layer EL. The spacer SPC can be formed as an organic film, such as, for example, acrylic resin, epoxy resin, phenolic resin, polyamide resin, polyimide resin, etc.

[0091] An emitting layer (EL) can be formed on a pixel electrode (PE). The EL can include organic materials to emit light of a selected color. For example, the EL can include a hole transport layer, an organic material layer, and an electron transport layer. The organic material layer can include a host and dopants. The organic material layer can include a material that emits the selected light, and the organic material layer can be formed using phosphorescent or fluorescent materials.

[0092] Each pixel PX can be provided with the aforementioned light-emitting element LEL. For example, a first pixel may include a first light-emitting element, a second pixel may include a second light-emitting element, and a third pixel may include a third light-emitting element. The first, second, and third light-emitting elements can provide light of different colors. For example, the first light-emitting element may emit light of a first color, the second light-emitting element may emit light of a second color, and the third light-emitting element may emit light of a third color.

[0093] For example, the organic material layer of the first emitting layer in the first emitting region emitting light of the first color can be a phosphorescent material comprising a host material containing carbazole biphenyl (CBP) or mCP (1,3-bis(carbazole-9-yl)) and a dopant comprising at least one selected from the group consisting of PIQIr(acac) (iridium bis(1-phenylisoquinoline)acetylacetonate), PQIr(acac) (iridium bis(1-phenylquinoline)acetylacetonate), PQIr (iridium tri(1-phenylquinoline)), and PtOEP (octaethylporphyrin platinum). Optionally, the organic material layer of the first emitting layer in the first emitting region can be a fluorescent material comprising PBD:Eu(DBM)3(Phen) or dinaphthalene-based phenylene oxide, but embodiments of this disclosure are not limited thereto.

[0094] The organic material layer of the second emitting layer in the second emitting region emitting light of the second color can be a phosphorescent material, which includes a host material containing CBP or mCP and a dopant material containing Ir(ppy)3 (planar tris(2-phenylpyridine)iridium). Optionally, the organic material layer of the second emitting layer in the second emitting region emitting light of the second color can be a fluorescent material including tris(8-hydroxyquinoline)aluminum (Alq3), but the embodiments of this disclosure are not limited thereto.

[0095] The organic material layer of the third emitting layer of the third emitting region that emits light of the third color can be a phosphorescent material, which includes a host material containing CBP or mCP and a dopant material containing (4,6-F2ppy)2Irpic or L2BD111, but the embodiments disclosed herein are not limited thereto.

[0096] The common electrode CM can be located on the first light-emitting layer, the second light-emitting layer, and the third light-emitting layer (e.g., EL). The common electrode CM can be positioned to cover the first light-emitting layer, the second light-emitting layer, and the third light-emitting layer. The common electrode CM can be a common layer located together in the first to third light-emitting layers. A capping layer can be formed on the common electrode CM.

[0097] In the top-emitting structure, the common electrode CM can include a transparent conductive material (TCO) capable of transmitting light (such as, for example, ITO or IZO) or a semi-transmissive conductive material (such as, for example, magnesium (Mg), silver (Ag), or an alloy of magnesium (Mg) and silver (Ag)). In examples where the common electrode CM includes a semi-transmissive conductive material, the light emission efficiency can be improved due to the microcavity effect.

[0098] An encapsulation layer ENC can be formed on the light-emitting element layer EMTL. The encapsulation layer ENC may include at least one inorganic film to prevent oxygen or moisture from penetrating into the light-emitting element layer EMTL. In some aspects, the encapsulation layer ENC may include at least one organic film to protect the light-emitting element layer EMTL from foreign matter such as dust. For example, the encapsulation layer ENC may include a first encapsulation inorganic film TFE1, an encapsulation organic film TFE2, and a second encapsulation inorganic film TFE3.

[0099] The first encapsulating inorganic film TFE1 can be located on the common electrode CM, the encapsulating organic film TFE2 can be located on the first encapsulating inorganic film TFE1, and the second encapsulating inorganic film TFE3 can be located on the encapsulating organic film TFE2. The first encapsulating inorganic film TFE1 and the second encapsulating inorganic film TFE3 can be formed as multiple films in which one or more inorganic films selected from silicon nitride layers, silicon oxide nitride layers, silicon oxide layers, titanium oxide layers, and aluminum oxide layers are alternately stacked. The encapsulating organic film TFE2 can be an organic film, such as, for example, acrylic resin, epoxy resin, phenolic resin, polyamide resin, polyimide resin, etc.

[0100] Figure 5 This is a plan view of the display device 10 according to the embodiment. Figure 6 yes Figure 5 A magnified view of area A1. For example, Figure 5 It can be located in Figure 1 A plan view of multiple pixel electrodes PE and multiple emission regions EA in the display area DA.

[0101] like Figure 5 As shown, the emission region EA can overlap with the pixel electrode PE, respectively. As described herein, the emission region EA can be a region defined by the pixel defining layer PDL. For example, the pixel defining layer PDL can have multiple openings OP that penetrate the pixel defining layer PDL in the third direction DR3, such that the multiple openings OP can correspond to the emission regions EA that expose multiple pixel electrodes PE, respectively. Figure 5 The pixel-defining layer (PDL) can be a pixel-defining layer with black color. For example, Figure 5 The pixel-defined layer (PDL) may include carbon.

[0102] Overlapping pixel electrodes PE and emission regions EA can be included in a pixel PX. For example, a pixel PX can include a pixel electrode PE and an emission region EA that overlaps with the pixel electrode PE.

[0103] like Figure 6As shown, multiple pixels PX1, PX2, and PX3 that are adjacent to each other and provide light of different colors can constitute a unit pixel UPX for displaying a unit image. For example, a first pixel PX1 including a first pixel electrode PE1 and a first emission region EA1 that overlap with each other, a second pixel PX2 including a second pixel electrode PE2 and a second emission region EA2 that overlap with each other, and a third pixel PX3 including a third pixel electrode PE3 and a third emission region EA3 that overlap with each other can be positioned adjacent to each other along a direction (e.g., the fifth direction DR5), such that the first pixel PX1, the second pixel PX2, and the third pixel PX3 can form a unit pixel UPX. Here, the first pixel PX1 can provide light of a first color (e.g., light in the red wavelength band), the second pixel PX2 can provide light of a second color (e.g., light in the green wavelength band), and the third pixel PX3 can provide light of a third color (e.g., light in the blue wavelength band).

[0104] Pixels PX1, PX2, and PX3 included in the unit pixel UPX can include pixel electrodes PE1, PE2, and PE3 of different sizes. For example, as Figure 6 As shown, the first pixel electrode PE1, the second pixel electrode PE2, and the third pixel electrode PE3 included in the unit pixel UPX, namely the first pixel PX1, the second pixel PX2, and the third pixel PX3, can have different sizes. For example, the area of ​​the first pixel electrode PE1 can be larger than the area of ​​the second pixel electrode PE2 and smaller than the area of ​​the third pixel electrode PE3.

[0105] Each of the multiple pixel electrodes PE1, PE2, and PE3 can have a polygonal shape. For example, each of the multiple pixel electrodes PE1, PE2, and PE3 can have a rectangular shape.

[0106] Some of the pixel electrodes PE1, PE2, and PE3 may include two sub-pixel electrodes connected to each other. For example, as... Figure 6 As shown, the third pixel electrode PE3 may include a first sub-pixel electrode SPE1 and a second sub-pixel electrode SPE2, each having one side connected to the other and the other side separated by a gap G (or slit). The facing edges between the sub-pixel electrodes may be separated by the gap G (or slit). Through the gap G, the gas release caused by the organic materials in the first planarization layer VA1 and the second planarization layer VA2 can be smoothly discharged to the outside.

[0107] Each corner of the plurality of pixel electrodes PE1, PE2, and PE3 may have a shape cut with a diagonal line. For example, each of the pixel electrodes PE1, PE2, and PE3 may have an octagonal shape. However, embodiments of this disclosure are not limited thereto, and the shape of each of the plurality of pixel electrodes PE1, PE2, and PE3 may be modified in various ways.

[0108] Multiple pixel electrodes PE1, PE2, and PE3 can extend in a diagonal direction. In an example where the first side S1 of the display panel 100 extends along the second direction DR2 and the third side S3 of the display panel 100 extends along the first direction DR1, some of the pixel electrodes PE1, PE2, and PE3 (e.g., the first pixel electrode PE1) can extend in a fourth direction DR4 between the first direction DR1 and the second direction DR2, and some other pixel electrodes PE1, PE2, and PE3 can extend in a fifth direction DR5 between the first direction DR1 (hereinafter referred to as the first reverse direction) and the second direction DR2. The angle between the first direction DR1 and the fourth direction DR4 can be 45 degrees, the angle between the second direction DR2 and the fifth direction DR5 can be 45 degrees, and the angle between the fourth direction DR4 and the fifth direction DR5 can be 90 degrees. However, the angles between the above directions are not limited to 45 degrees or 90 degrees and can be varied according to one or more embodiments of this disclosure.

[0109] A pixel electrode PE extending in the fourth direction DR4 may have a longer side in the fourth direction DR4 than in the fifth direction DR5. In an example where a pixel electrode extending in the fourth direction DR4 (e.g., a first pixel electrode PE1) is defined as a first type of pixel electrode, among the sides of the first type of pixel electrode, the side parallel to the fourth direction DR4 may have a longer length than the side parallel to the fifth direction DR5.

[0110] A pixel electrode PE extending in the fifth direction DR5 may have a longer side in the fifth direction DR5 than in the fourth direction DR4. In an example where the pixel electrode extending in the fifth direction DR5 is defined as a second type pixel electrode, among the sides of the second type pixel electrode, the side parallel to the fifth direction DR5 may have a longer length than the side parallel to the fourth direction DR4.

[0111] Each of the pixel electrodes PE1, PE2, and PE3 can be connected to the upper pixel connection electrode PCEb via the seventh contact hole CT7. For example, the first pixel electrode PE1 can be connected to the upper pixel connection electrode PCEb via the seventh contact hole CT7, the second pixel electrode PE2 can be connected to another upper pixel connection electrode PCEb via another seventh contact hole CT7, and the third pixel electrode PE3 can be connected to yet another upper pixel connection electrode PCEb via yet another seventh contact hole CT7.

[0112] Each of the multiple emission regions EA1, EA2, and EA3 can have a polygonal shape. For example, each of the multiple emission regions EA1, EA2, and EA3 can have a rectangular shape. In this case, the corresponding corners of the multiple emission regions EA1, EA2, and EA3 can have curved (or rounded) shapes.

[0113] Some of the multiple emission areas EA1, EA2, and EA3 may include two sub-emission areas that are separate from each other. For example, Figure 6 As shown, the third emission region EA3 may include a first sub-emission region SEA1 overlapping with the first sub-pixel electrode SPE1 described herein and a second sub-emission region SEA2 overlapping with the second sub-pixel electrode SPE2 described herein. Multiple sub-emission regions overlapping a pixel electrode can provide light of the same color. For example, the first sub-emission region SEA1 overlapping with the first sub-pixel electrode SPE1 of the third pixel electrode PE3 and the second sub-pixel electrode SPE2 overlapping with the second sub-pixel electrode SPE2 of the third pixel electrode PE3 can provide light of the same color.

[0114] Multiple emission regions EA1, EA2, and EA3 may extend in a diagonal direction. For example, some emission regions among the multiple emission regions EA1, EA2, and EA3 (e.g., the first emission region EA1) may extend in the fourth direction DR4, and some other emission regions among the multiple emission regions EA may extend in the fifth direction DR5. In other words, an emission region (e.g., EA1) that overlaps with a pixel electrode (e.g., a first type pixel electrode) extending in the fourth direction DR4 may extend in the fourth direction DR4, and an emission region that overlaps with a pixel electrode (e.g., a second type pixel electrode) extending in the fifth direction DR5 may extend in the fifth direction DR5.

[0115] A emission region extending in the fourth direction DR4 (e.g., EA2) may have a longer side in the fourth direction DR4 than in the fifth direction DR5. In an example where the emission region EA extending in the fourth direction DR4 is defined as a first type emission region, the side of the first type emission region parallel to the fourth direction DR4 may have a longer length than the side parallel to the fifth direction DR5.

[0116] The emission region extending in the fifth direction DR5 may have a longer side in the fifth direction DR5 than in the fourth direction DR4. In an example where the emission region extending in the fifth direction DR5 is defined as a second type emission region, the side of the second type emission region parallel to the fifth direction DR5 may have a longer length than the side parallel to the fourth direction DR4.

[0117] As described herein, each corner of the emitting region EA can have a curved shape, such that any one corner of the emitting region EA can have a different radius of curvature than the other remaining corners. For example, among all the corners of the emitting region EA, the corner closest to the first edge S1 of the display panel 100 can have the largest radius of curvature. Specifically, among all the corners of the emitting region EA, the corner closest to the first edge S1 of the display panel 100 can have a larger radius of curvature than the other remaining corners. In other words, among all the corners of the emitting region EA, the corner closest to the first edge S1 of the display panel 100 can have a smaller curvature than the other remaining corners.

[0118] Optionally, among all the corners of the emission region EA, the corner with a convex shape facing the first edge S1 of the display panel 100 may have the largest radius of curvature. Specifically, among all the corners of the emission region EA, the corner with a convex shape facing the first edge S1 of the display panel 100 may have a larger radius of curvature than the other remaining corners. In other words, among all the corners of the emission region EA, the corner with a convex shape facing the first edge S1 of the display panel 100 may have a smaller curvature than the other remaining corners.

[0119] Figure 7 This is an enlarged view of the emission area EA according to the implementation method. For example, Figure 7 The launch area EA can be as described in this article. Figure 6 An enlarged view of the first launch area EA1. Figure 8 It is used to describe Figure 7 A view of the shape and radius of curvature of each corner of the first launch region EA1.

[0120] like Figure 7As shown, the first emission area EA1 may include a first side S11, a second side S22, a third side S33, a fourth side S44, a first corner CR1, a second corner CR2, a third corner CR3, and a fourth corner CR4 that are connected to each other.

[0121] The first side S11, the second side S22, the third side S33, the fourth side S44, the first corner CR1, the second corner CR2, the third corner CR3, and the fourth corner CR4 of the first emission region EA1 can be the inner wall of the opening OP that defines the first emission region EA1. For example, the inner wall of the opening OP may include the first side S11, the second side S22, the third side S33, the fourth side S44, the first corner CR1, the second corner CR2, the third corner CR3, and the fourth corner CR4.

[0122] Each of the first side S11, the second side S22, the third side S33, and the fourth side S44 of the first launch area EA1 can have a straight line shape in the plan view.

[0123] At least two of the first side S11, the second side S22, the third side S33, and the fourth side S44 of the first emission region EA1 may have different dimensions (e.g., lengths). For example, each of the first side S11 and the second side S22 may have a length longer than the third side S33 (or the fourth side S44).

[0124] The first side S11, the second side S22, the third side S33, and the fourth side S44 of the first emission region EA1 can each extend in a diagonal direction. For example, each of the first side S11 and the second side S22 can extend in the fourth direction DR4, and each of the third side S33 and the fourth side S44 can extend in the fifth direction DR5.

[0125] The angle between two adjacent edges of the first emission region EA1 can have a curved (or rounded) shape. For example, the first angle CR1 between adjacent first edge S11 and third edge S33 can have a curved (or rounded) shape, the second angle CR2 between adjacent second edge S22 and fourth edge S44 can have a curved (or rounded) shape, the third angle CR3 between adjacent second edge S22 and third edge S33 can have a curved (or rounded) shape, and the fourth angle CR4 between adjacent first edge S11 and fourth edge S44 can have a curved (or rounded) shape. At this time, as... Figure 8As shown, the first corner CR1 of the first emission region EA1 may have a curved shape positioned along the periphery of an imaginary first circle CC1 located within and near the first corner CR1 of the first emission region EA1; the second corner CR2 of the first emission region EA1 may have a curved shape positioned along the periphery of an imaginary second circle CC2 located within and near the second corner CR2 of the first emission region EA1; the third corner CR3 of the first emission region EA1 may have a curved shape positioned along the periphery of an imaginary third circle CC3 located within and near the third corner CR3 of the first emission region EA1; and the fourth corner CR4 of the first emission region EA1 may have a curved shape positioned along the periphery of an imaginary fourth circle CC4 located within and near the fourth corner CR4 of the first emission region EA1.

[0126] The corners CR1, CR2, CR3, and CR4 of the first emission region EA1 can have curved convex shapes pointing in different directions. For example, as Figure 7 As shown, the first corner CR1 of the first emitting region EA1 may have a curved convex shape in the first opposite direction, the second corner CR2 of the first emitting region EA1 may have a curved convex shape in the first direction DR1, the third corner CR3 of the first emitting region EA1 may have a curved convex shape in the opposite direction of the second direction DR2 (hereinafter referred to as the second opposite direction), and the fourth corner CR4 of the first emitting region EA1 may have a curved convex shape in the second direction DR2. Therefore, the corners CR1, CR2, CR3 and CR4 of the first emitting region EA1 may have curved convex shapes facing different sides S1, S2, S3 and S4 of the display panel 100. For example, the first corner CR1 of the first emission region EA1 may have a curved convex shape that faces the first side S1 of the display panel 100 along the first opposite direction; the second corner CR2 of the first emission region EA1 may have a curved convex shape that faces the second side S2 of the display panel 100 along the first direction DR1; the third corner CR3 of the first emission region EA1 may have a curved convex shape that faces the third side S3 of the display panel 100 along the second opposite direction; and the fourth corner CR4 of the first emission region EA1 may have a curved convex shape that faces the fourth side S4 of the display panel 100 along the second direction DR2.

[0127] like Figure 7As shown, among all the corners CR1, CR2, CR3, and CR4 of the first emission region EA1, the corner closest to the first edge S1 of the display panel 100 can have the largest radius of curvature. In other words, among all the corners CR1, CR2, CR3, and CR4 of the first emission region EA1, the first corner CR1, which is closest to the first edge S1 of the display panel 100, can have a larger radius of curvature than the other remaining corners CR2, CR3, and CR4. For example, as... Figure 7 and Figure 8 As shown, among the first corner CR1, second corner CR2, third corner CR3, and fourth corner CR4, the first corner CR1, which has a protruding shape facing the first edge S1 of the display panel 100, is positioned closest to the first edge S1 of the display panel 100, such that the first corner CR1 can have a larger radius of curvature R1 than the other corners CR2, CR3, and CR4. For example, the radius of curvature R1 of the first corner CR1 can be larger than the radius of curvature R2 of the second corner CR2. In other words, among the first circle CC1, second circle CC2, third circle CC3, and fourth circle CC4, the first corner CR1, which is positioned along the periphery of the first circle CC1 with the largest radius of curvature R1, can have a larger radius of curvature R1 than the second corner CR2, which is positioned along the periphery of the second circle CC2. All of the radii of curvature R2 of the second corner CR2, the radii of curvature R3 of the third corner CR3, and the radii of curvature R4 of the fourth corner CR4 can be the same. For example, the second circle CC2, the third circle CC3, and the fourth circle CC4 can have the same radii of curvature R2, R3, and R4, such that the second angle CR2 located along the periphery of the second circle CC2, the third angle CR3 located along the periphery of the third circle CC3, and the fourth angle CR4 located along the periphery of the fourth circle CC4 can each have the same radii of curvature R2, R3, and R4. However, the embodiments of this disclosure are not limited to this, and under the condition that the corresponding radii of curvature R2, R3, and R4 of the second angle CR2, the third angle CR3, and the fourth angle CR4 are smaller than the radius of curvature R1 of the first angle CR1, at least two of the second angle CR2, the third angle CR3, and the fourth angle CR4 can have different radii of curvature.

[0128] According to one embodiment, the radius of curvature of each of the second corner CR2, the third corner CR3, and the fourth corner CR4 can be smaller than the radius of curvature R1 of the first corner CR1. In this case, the corresponding areas of the emission regions EA1, EA2, and EA3 can be increased, and in other words, the aperture ratio of the display device 10 can be improved. The higher the aperture ratio of the display device 10, the more light can be generated with the same power consumption in the same area of ​​the display region DA. Therefore, as the aperture ratio of the display device 10 increases, the power consumption of the display device 10 can be reduced, and thus, the lifespan of the display device 10 can be improved.

[0129] Light incident on each of the edges S11, S22, S33, and S44 and each of the corners CR1, CR2, CR3, and CR4 of the first emitting region EA1 of the display panel 100 can be reflected and scattered. Here, since each of the corners CR1, CR2, CR3, and CR4 of the first emitting region EA1 has a curved shape, the amount of light reflected and scattered from each of the corners CR1, CR2, CR3, and CR4 of the first emitting region EA1 can be less than the amount of light reflected and scattered from each of the edges S11, S22, S33, and S44 of the first emitting region EA1. In some aspects, the first corner CR1 of the first emitting region EA1 has a larger radius of curvature R1 than the other corners CR2, CR3, and CR4 of the first emitting region EA1, such that the first emitting region EA1 with this structure can provide a relatively small amount of scattered light compared to emitting regions with all corners having the same radius of curvature (hereinafter referred to as comparative emitting regions). In other words, the amount of scattered light reflected from the first emission region EA1, which has a relatively large radius of curvature (e.g., a first angle with a radius of curvature larger than the other angles), can be less than the amount of scattered light reflected from the comparative emission region. At this time, since the corresponding first angle CR1 of the first emission region EA1 is closer to the first edge S1 of the display panel 100 than the other angles CR2, CR3, and CR4, the amount of scattered light reflected from the first emission region EA1 and directed toward the first edge S1 of the display panel 100 can be reduced.

[0130] Figure 9 This is a diagram showing a portion of a vehicle 900 including a display device 10 according to an embodiment, and Figure 10 yes Figure 9 A magnified view of a portion of the image.

[0131] like Figure 9 As shown, display device 10 can be located in vehicle 900. For example, multiple display devices 10_C1, 10_C2, 10_C3, and 10_C4 can be located in vehicle 900. In this case, the first display device 10_C1 can be located in the center of vehicle 900 (e.g., in the center between the driver's seat 910 and the passenger seat 920 of vehicle 900), the second display device 10_C2 can be located in the center of vehicle 900 above the first display device 10_C1, the third display device 10_C3 can be located on the right side of the driver's seat 910 of vehicle 900, and the fourth display device 10_C4 can be located on the left side of the driver's seat 910 of vehicle 900. The driver's seat 910 of vehicle 900 can face the steering wheel 930. Here, the third display device 10_C3 can be located on the right side of the steering wheel 930, and the fourth display device 10_C4 can be located on the left side of the steering wheel 930.

[0132] The first side S1 of the first display device 10_C1 (e.g., the first side S1 of the display panel 100 of the first display device 10_C1) can be positioned close to the driver's seat 910. Therefore, among all the corners CR1, CR2, CR3, and CR4 of the emission area EA of the first display device 10_C1, the first corner CR1 with the largest radius of curvature R1 can be positioned close to the driver's seat 910. In other words, each of the first corners CR1 of all emission areas EA of the first display device 10_C1 (e.g., the display panel 100 of the first display device 10_C1) can be positioned close to the driver's seat 910.

[0133] The first side S1 of the second display device 10_C2 (e.g., the first side S1 of the display panel 100 of the second display device 10_C2) can be positioned close to the driver's seat 910. Therefore, among all the corners CR1, CR2, CR3, and CR4 of the emission area EA of the second display device 10_C2, the first corner CR1 with the largest radius of curvature R1 can be positioned close to the driver's seat 910. In other words, each of the first corners CR1 of all emission areas EA of the second display device 10_C2 (e.g., the display panel 100 of the second display device 10_C2) can be positioned close to the driver's seat 910.

[0134] The first side S1 of the third display device 10_C3 (e.g., the first side S1 of the display panel 100 of the third display device 10_C3) can be positioned close to the driver's seat 910. Therefore, among all the corners CR1, CR2, CR3, and CR4 of the emission area EA of the third display device 10_C3, the first corner CR1 with the largest radius of curvature R1 can be positioned close to the driver's seat 910. In other words, each of the first corners CR1 of all emission areas EA of the third display device 10_C3 (e.g., the display panel 100 of the third display device 10_C3) can be positioned close to the driver's seat 910.

[0135] The first side S1 of the fourth display device 10_C4 (e.g., the first side S1 of the display panel 100 of the fourth display device 10_C4) can be positioned close to the driver's seat 910. Therefore, among all the corners CR1, CR2, CR3, and CR4 of the emission area EA of the fourth display device 10_C4, the first corner CR1 with the largest radius of curvature R1 can be positioned close to the driver's seat 910. In other words, each of the first corners CR1 of all the emission areas EA of the fourth display device 10_C4 (e.g., the display panel 100 of the fourth display device 10_C4) can be positioned close to the driver's seat 910. Here, the first side S1 of the fourth display device 10_C4 can be positioned facing the first side S1 of another display device 10. For example, the first side S1 of the fourth display device 10_C4 can face the first side S1 of the third display device 10_C3.

[0136] like Figure 10 As shown, light from the outside may be incident on the first display device 10_C1. Light incident on each of the edges S11, S22, S33, and S44 of the emitting region EA of the first display device 10_C1, and on each of the corners CR1, CR2, CR3, and CR4, can be reflected. Here, since each of the corners CR1, CR2, CR3, and CR4 of the emitting region EA has a curved shape, the amount of light reflected and scattered from each of the corners CR1, CR2, CR3, and CR4 of the emitting region EA can be less than the amount of light reflected and scattered from each of the edges S11, S22, S33, and S44 of the emitting region EA. In some aspects, the first corner CR1 of the emitting region EA has a larger radius of curvature than the other corners CR2, CR3, and CR4 of the emitting region EA, such that the emitting region EA with this structure can provide a relatively small amount of scattered light compared to an emitting region having all corners with the same radius of curvature (hereinafter referred to as a comparative emitting region). In other words, the amount of scattered light reflected from the emission region EA, which has a first angle with a relatively large radius of curvature (e.g., a first angle with a radius of curvature larger than the other angles), can be less than the amount of scattered light reflected from the comparative emission region. In this case, since each of the first angles CR1 in the emission region EA is positioned closer to the driver's seat 910 than the other angles CR2, CR3, and CR4, the amount of scattered light reflected from the emission region EA and directed toward the driver's seat 910 can be reduced. Therefore, the amount of scattered light 111 directed toward the driver's seat 910 in the scattered light reflected from the first display device 10_C1 can be reduced. Therefore, glare to the driver located in the driver's seat 910 can be minimized.

[0137] Similarly, the amount of scattered light reflected from the second display device 10_C2, the third display device 10_C3, and the fourth display device 10_C4 and directed toward the driver's seat 910 can be minimized.

[0138] Figure 11 This is an enlarged view of the display device 10 according to the embodiment, and Figure 12 This is an enlarged view of the emission area EA according to the implementation method. For example, Figure 12 The launch area EA can be as described in this article. Figure 11 An enlarged view of the first launch area EA1. Figure 13 It is used to describe Figure 12 A view of the shape and radius of curvature of each corner of the first launch region EA1.

[0139] Figures 11 to 13 The display device 10 and the one described herein Figures 6 to 8 The difference of the display device 10 is that the first corner CR1 of the emission areas EA1, EA2 and EA3 includes multiple sub-corners, and this difference will be mainly described below.

[0140] like Figures 11 to 13 As shown, the first corner CR1 of the first transmission region EA1 may include a first sub-corner SCR1 and a second sub-corner SCR2. However, embodiments of this disclosure are not limited thereto, and the first corner CR1 of the first transmission region EA1 may include more than two sub-corners.

[0141] The sub-corner SCR1 and SCR2 of the first emission region EA1 may have curved convex shapes facing the same side of the display panel 100. For example, the first sub-corner SCR1 of the first emission region EA1 may have a curved convex shape facing the first side S1 of the display panel 100, and the second sub-corner SCR2 of the first emission region EA1 may have a curved convex shape facing the first side S1 of the display panel 100.

[0142] The second sub-corner SCR2 can be positioned adjacent to the first sub-corner SCR1. For example, the second sub-corner SCR2 and the first sub-corner SCR1 can be positioned adjacent to each other along the second direction DR2. The second sub-corner SCR2 can be connected to the first sub-corner SCR1.

[0143] The first sub-angle SCR1 can have a larger radius of curvature than other angles (e.g., the second angle CR2, the third angle CR3, and the fourth angle CR4).

[0144] The second sub-angle SCR2 can have a larger radius of curvature than other angles (e.g., the second angle CR2, the third angle CR3, and the fourth angle CR4).

[0145] The first sub-corner SCR1 and the second sub-corner SCR2 may have the same radius of curvature. However, embodiments of this disclosure are not limited thereto, and the radius of curvature of the first sub-corner SCR1 and the second sub-corner SCR2 may be different from each other, provided that each of the radii of curvature of the first sub-corner SCR1 and the second sub-corner SCR2 is greater than each of the radii of curvature of the second sub-corner CR2, the third sub-corner CR3, and the fourth sub-corner CR4 described herein. For example, the radius of curvature of the first sub-corner SCR1 may be smaller or larger than the radius of curvature of the second sub-corner SCR2.

[0146] like Figure 13 As shown, the first sub-corner SCR1 of the first transmission region EA1 may have a curved shape positioned along the periphery of an imaginary first sub-circle SCC1 located within and near the first sub-corner SCR1, and the second sub-corner SCR2 of the first transmission region EA1 may have a curved shape positioned along the periphery of an imaginary second sub-circle SCC2 located within and near the second sub-corner SCR2.

[0147] Similarly, the first corner CR1 of the second transmission region EA2 may include a first sub-corner SCR1 and a second sub-corner SCR2. However, embodiments of this disclosure are not limited thereto, and the first corner CR1 of the second transmission region EA2 may include more than two sub-corners.

[0148] Similarly, the first corner CR1 of the third transmission region EA3 may include a first sub-corner SCR1 and a second sub-corner SCR2. However, embodiments of this disclosure are not limited thereto, and the first corner CR1 of the third transmission region EA3 may include more than two sub-corners.

[0149] Figure 14 This is an enlarged view of the emission area EA (e.g., the first emission area EA1) of the display device 10 according to an embodiment, and Figure 15 It is used to describe Figure 14 A view of the shape and radius of curvature of each corner of the first launch region EA1.

[0150] Figure 14 and Figure 15 The display device 10 is similar in shape to the first pixel electrode PE1 and the first emission region EA1 described herein. Figures 6 to 8 The display device 10 is different, so the differences will be described mainly as follows.

[0151] like Figure 14 and Figure 15 As shown in the diagram, in the plan view, each of the first pixel electrode PE1 and the first emission region EA1 can have a hexagonal shape.

[0152] like Figure 14 As shown, the first transmission area EA1 may include a first side S11, a second side S22, a third side S33, a fourth side S44, a fifth side S55 and a sixth side S66 connected to each other, a first corner CR1, a second corner CR2, a third corner CR3, a fourth corner CR4, a fifth corner CR5 and a sixth corner CR6.

[0153] The first side S11, the second side S22, the third side S33, the fourth side S44, the fifth side S55, the sixth side S66, the first corner CR1, the second corner CR2, the third corner CR3, the fourth corner CR4, the fifth corner CR5, and the sixth corner CR6 of the first emission region EA1 can be the inner wall of the opening OP that defines the first emission region EA1. For example, the inner wall of the opening OP may include the first side S11, the second side S22, the third side S33, the fourth side S44, the fifth side S55, the sixth side S66, the first corner CR1, the second corner CR2, the third corner CR3, the fourth corner CR4, the fifth corner CR5, and the sixth corner CR6.

[0154] Each of the first side S11, the second side S22, the third side S33, the fourth side S44, the fifth side S55, and the sixth side S66 of the first launch area EA1 can have a straight line shape in the plan view.

[0155] The first side S11, the second side S22, the third side S33, the fourth side S44, the fifth side S55, and the sixth side S66 of the first emission region EA1 may have the same size (e.g., length). However, embodiments of this disclosure are not limited thereto, and for example, at least two of the first side S11, the second side S22, the third side S33, the fourth side S44, the fifth side S55, and the sixth side S66 of the first emission region EA1 may have different sizes (e.g., length).

[0156] The first side S11, the second side S22, the third side S33, and the fourth side S44 of the first emission region EA1 can each extend in a diagonal direction. For example, each of the first side S11 and the second side S22 can extend in the fifth direction DR5, and each of the third side S33 and the fourth side S44 can extend in the fourth direction DR4.

[0157] Each of the fifth side S55 and the sixth side S66 of the first emission region EA1 can extend in the horizontal direction. For example, each of the fifth side S55 and the sixth side S66 can extend in the first direction DR1.

[0158] The angle between two adjacent edges of the first emission region EA1 can have a curved (or rounded) shape. For example, the first angle CR1 between adjacent first edge S11 and third edge S33 can have a curved (or rounded) shape, the second angle CR2 between adjacent second edge S22 and fourth edge S44 can have a curved (or rounded) shape, the third angle CR3 between adjacent first edge S11 and fifth edge S55 can have a curved (or rounded) shape, the fourth angle CR4 between adjacent third edge S33 and sixth edge S66 can have a curved (or rounded) shape, the fifth angle CR5 between adjacent fourth edge S44 and fifth edge S55 can have a curved (or rounded) shape, and the sixth angle CR6 between adjacent second edge S22 and sixth edge S66 can have a curved (or rounded) shape. At this time, as... Figure 15 As shown, the first corner CR1 of the first emission region EA1 may have a curved shape positioned along the periphery of an imaginary first circle CC1 located within the first emission region EA1 and close to the first corner CR1; the second corner CR2 of the first emission region EA1 may have a curved shape positioned along the periphery of an imaginary second circle CC2 located within the first emission region EA1 and close to the second corner CR2; and the third corner CR3 of the first emission region EA1 may have a curved shape positioned along the periphery of an imaginary third circle CC3 located within the first emission region EA1 and close to the third corner CR3. The fourth corner CR4 of the first emission region EA1 may have a curved shape positioned along the periphery of an imaginary fourth circle CC4 located within the first emission region EA1 and close to the fourth corner CR4; the fifth corner CR5 of the first emission region EA1 may have a curved shape positioned along the periphery of an imaginary fifth circle CC5 located within the first emission region EA1 and close to the fifth corner CR5; and the sixth corner CR6 of the first emission region EA1 may have a curved shape positioned along the periphery of an imaginary sixth circle CC6 located within the first emission region EA1 and close to the sixth corner CR6.

[0159] The corners CR1, CR2, CR3, CR4, CR5, and CR6 of the first emission region EA1 can have curved convex shapes oriented in different directions. For example, the first corner CR1 of the first emission region EA1 can have a curved convex shape in a first opposite direction, the second corner CR2 of the first emission region EA1 can have a curved convex shape in a first direction DR1, the third corner CR3 of the first emission region EA1 can have a curved convex shape in the opposite direction of a fourth direction DR4 (hereinafter referred to as the fourth opposite direction), the fourth corner CR4 of the first emission region EA1 can have a curved convex shape in a fifth direction DR5, the fifth corner CR5 of the first emission region EA1 can have a curved convex shape in the opposite direction of a fifth direction DR5 (hereinafter referred to as the fifth opposite direction), and the sixth corner CR6 of the first emission region EA1 can have a curved convex shape in a fourth direction DR4. Here, the first corner CR1 may have a curved protruding shape toward the first side S1 of the display panel 100 along the first opposite direction, and the second corner CR2 may have a curved protruding shape toward the second side S2 of the display panel 100 along the first direction DR1.

[0160] like Figure 14 As shown, among all the corners CR1, CR2, CR3, CR4, CR5, and CR6 of the first emission area EA1, the corner closest to the first edge S1 of the display panel 100 can have the largest radius of curvature. In other words, among all the corners CR1, CR2, CR3, CR4, CR5, and CR6 of the first emission area EA1, the first corner CR1 closest to the first edge S1 of the display panel 100 can have a larger radius of curvature R1 than the other remaining corners CR2, CR3, CR4, CR5, and CR6. For example, as... Figure 15As shown, among the first corner CR1, second corner CR2, third corner CR3, fourth corner CR4, fifth corner CR5, and sixth corner CR6, the first corner CR1, which has a protruding shape facing the first edge S1 of the display panel 100, is positioned closest to the first edge S1 of the display panel 100, such that the first corner CR1 can have a larger radius of curvature R1 than the other corners CR2, CR3, CR4, CR5, and CR6. For example, the radius of curvature R1 of the first corner CR1 can be larger than the radius of curvature R2 of the second corner CR2. In other words, among the first circle CC1, second circle CC2, third circle CC3, fourth circle CC4, fifth circle CC5, and sixth circle CC6, the first corner CR1, which is positioned along the periphery of the first circle CC1 with the largest radius of curvature R1, can have a larger radius of curvature R1 than the second corner CR2, which is positioned along the periphery of the second circle CC2. All of the radii of curvature R2 of the second angle CR2, R3 of the third angle CR3, R4 of the fourth angle CR4, R5 of the fifth angle CR5, and R6 of the sixth angle CR6 can be the same. For example, the second circle CC2, the third circle CC3, the fourth circle CC4, the fifth circle CC5, and the sixth circle CC6 can have the same radius of curvature, such that each of the following can have the same radius of curvature: the second angle CR2 located along the periphery of the second circle CC2, the third angle CR3 located along the periphery of the third circle CC3, the fourth angle CR4 located along the periphery of the fourth circle CC4, the fifth angle CR5 located along the periphery of the fifth circle CC5, and the sixth angle CR6 located along the periphery of the sixth circle CC6. However, the embodiments of this disclosure are not limited thereto, and at least two of the second angles CR2, the third angle CR3, the fourth angle CR4, the fifth angle CR5 and the sixth angle CR6 may have different radii of curvature, provided that the radius of curvature of each of the second angle CR2, the third angle CR3, the fourth angle CR4, the fifth angle CR5 and the sixth angle CR6 is smaller than the radius of curvature of the first angle CR1.

[0161] Light incident on each of the edges S11 to S66 and each of the corners CR1 to CR6 of the first emitting region EA1 of the display panel 100 can be reflected and scattered. Here, since each of the corners CR1 to CR6 of the first emitting region EA1 has a curved shape, the amount of light reflected and scattered from each of the corners CR1 to CR6 of the first emitting region EA1 can be less than the amount of light reflected and scattered from each of the edges S11 to S66 of the first emitting region EA1. In some aspects, the first corner CR1 of the first emitting region EA1 has a larger radius of curvature than the other corners CR2 to CR6 of the first emitting region EA1, such that the first emitting region EA1 with this structure can provide a relatively small amount of scattered light compared to emitting regions having all corners with the same radius of curvature (hereinafter referred to as comparative emitting regions). In other words, the amount of scattered light reflected from the first emitting region EA1 having a first corner with a relatively large radius of curvature (e.g., a first corner with a radius of curvature larger than the other corners) can be less than the amount of scattered light reflected from the comparative emitting regions. At this time, since the first corner CR1 of the first emission area EA1 is positioned closer to the first side S1 of the display panel 100 than the other corners CR2 to CR6, the amount of scattered light reflected from the first emission area EA1 and directed toward the first side S1 of the display panel 100 can be reduced.

[0162] Figure 14 and Figure 15 The display device 10 can be applied as described herein. Figure 9 and 10 The vehicle shown is 900. At this time, Figure 14 and Figure 15 The first corner CR1 of the first emission area EA1 of the display device 10 can be positioned close to the first side S1 of the display device 10 (or the first side S1 of the display panel 100 of the display device 10). Therefore, the amount of scattered light directed from the display device 10 toward the driver's seat 910 can be reduced, thereby minimizing glare to the driver.

[0163] Figure 16 This is an enlarged view of the display device 10 according to the embodiment, and Figure 17 This is an enlarged view of the emission area EA according to the implementation method. For example, Figure 17 The launch area EA can be as described in this article. Figure 16 An enlarged view of the first launch area EA1. Figure 18 It is used to describe Figure 17 A view of the shape and radius of curvature of each corner of the first launch region EA1.

[0164] Figures 16 to 18 The display device 10 and the one described herein Figures 6 to 8 The difference in the display device 10 is that each of the first corners CR1 and CR2 of the first emission region EA1 has a larger radius of curvature than the other corners CR3 and CR4, such that the difference will be described in detail below.

[0165] like Figures 16 to 18 As shown, the radii of curvature R1 and R2 of the first angle CR1 and the second angle CR2 of the first emission region EA1 can be greater than the radii of curvature R3 and R4 of the third angle CR3 and the fourth angle CR4 of the first emission region EA1. For example, the radius of curvature R1 of the first angle CR1 can be greater than the radius of curvature R3 of the third angle CR3 (or the radius of curvature R4 of the fourth angle CR4), and the radius of curvature R2 of the second angle CR2 can be greater than the radius of curvature R3 of the third angle CR3 (or the radius of curvature R4 of the fourth angle CR4).

[0166] The radius of curvature R2 of the second angle CR2 can be the same as the radius of curvature R1 of the first angle CR1. However, the embodiments of this disclosure are not limited to this, and when the radius of curvature R2 of the second angle CR2 is greater than the radius of curvature R3 of the third angle CR3 (or the radius of curvature R4 of the fourth angle CR4), the radius of curvature R2 of the second angle CR2 can be different from the radius of curvature R1 of the first angle CR1. For example, when the radius of curvature R2 of the second angle CR2 is greater than the radius of curvature R3 of the third angle CR3 (or the radius of curvature R4 of the fourth angle CR4), the radius of curvature R2 of the second angle CR2 can be greater than or less than the radius of curvature R1 of the first angle CR1.

[0167] Since the first corner CR1 and the second corner CR2 of the first emitting region EA1 have larger radii of curvature than the other corners CR3 and CR4 of the first emitting region EA1, the amount of scattered light reflected at the first corner CR1 and the amount of scattered light reflected at the second corner CR2 can be less than the amount of scattered light reflected at the other corners CR3 and CR4. In this case, since each first corner CR1 of the first emitting region EA1 is positioned closer to the first edge S1 of the display panel 100 than the other corners CR2, CR3, and CR4, the amount of scattered light reflected from the first emitting region EA1 and directed toward the first edge S1 of the display panel 100 can be reduced. In some aspects, since the corresponding second corner CR2 of the first emitting region EA1 is positioned closer to the second edge S2 of the display panel 100 than the other corners CR1, CR3, and CR4, the amount of scattered light reflected from the first emitting region EA1 and directed toward the second edge S2 of the display panel 100 can be reduced.

[0168] The radii of curvature R1 and R2 of the first and second corners of the second emission region EA2 can be greater than the radii of curvature R3 and R4 of the third and fourth corners of the second emission region EA2.

[0169] The radii of curvature R1 and R2 of the first and second corners of the third emission region EA3 can be greater than the radii of curvature R3 and R4 of the third emission region EA3, namely the first and second corners CR3 and CR4.

[0170] In some aspects, such as Figure 16 As shown, in the substrate SUB and pixel electrode PE (see...) Figure 4 ) or PE1 or PE2 or PE3 (see Figure 16 Among the pattern layers between the first emission regions (e.g., EA1), the pattern layer closest to the pixel electrode PE (e.g., the eighth pattern layer PTL8) can extend in the convex direction of the first corner CR1 of the emission region (e.g., EA1). For example, the eighth pattern layer PTL8 can be positioned closest to the pixel electrode PE such that the eighth pattern layer PTL8 extends in a direction parallel to the convex direction of the first corner CR1 of the first emission region EA1 (e.g., the first opposite direction). Here, Figures 16 to 18 The pixel-defined layer (PDL) can include, for example, organic materials. Figures 16 to 18 The pixel-defining layer (PDL) may include polyimide.

[0171] The eighth pattern layer PTL8 can be configured in multiples. For example, multiple eighth pattern layers PTL8 may include data lines DL and power lines (e.g., drive voltage line VDL, first initialization voltage line VIL1, second initialization voltage line VIL2, and common voltage line VSL). Here, the multiple data lines DL may include a first data line, a second data line, and a third data line respectively connected to a first pixel PX1, a second pixel PX2, and a third pixel PX3 that provide light of different colors. Here, the first data line, the second data line, and the third data line are not connected to each other.

[0172] Each of the plurality of eighth pattern layers PTL8 may extend in a first direction DR1. In some aspects, the plurality of eighth pattern layers PTL8 may be spaced apart from each other along a second direction DR2. For example, each of the data line DL, drive voltage line VDL, first initialization voltage line VIL1, second initialization voltage line VIL2, and common voltage line VSL may extend in the first direction DR1. In some aspects, the data line DL, drive voltage line VDL, first initialization voltage line VIL1, second initialization voltage line VIL2, and common voltage line VSL may be spaced apart from each other along the second direction DR2.

[0173] When the eighth pattern layer PTL8 extends in this manner along the first direction DR1, scattered light reflected by the eighth pattern layer PTL8 and oriented in both the first and first reverse directions can be minimized. For example, when the eighth pattern layer PTL8 extends along the first direction DR1, the area of ​​the eighth pattern layer PTL8 seen in both the first and first reverse directions can be smaller than the area of ​​the eighth pattern layer PTL8 seen in both the first and first reverse directions when the eighth pattern layer PTL8 extends along the second direction DR2. In an example where the eighth pattern layer PTL8 extends along the first direction DR1 and the components of the eighth pattern layer PTL8 are spaced apart from each other along the second direction DR2, the area of ​​the eighth pattern layer PTL8 seen in the first direction DR1 and the area of ​​the eighth pattern layer PTL8 seen in the first reverse direction can be reduced due to the gaps between adjacent components of the eighth pattern layer PTL8 in the second direction DR2. In some embodiments, when the components of the eighth pattern layer PTL8 extend in the second direction DR2 and are spaced apart from each other along the first direction DR1, the gaps between the eighth pattern layers PTL8 are not visible in the first direction DR1 and the first reverse direction. Conversely, all surfaces of the eighth pattern layer PTL8 along their corresponding extension directions are visible in the first direction DR1 and the first reverse direction. Therefore, when the eighth pattern layer PTL8 extends in the second direction DR2, the amount of scattered light reflected in the first direction DR1 and the first reverse direction may increase.

[0174] In an example where the pixel-limiting layer (PDL) includes organic materials that do not contain carbon, Figures 16 to 18 The display device 10 is advantageous in reducing light scattered by the metal layer (e.g., the eighth pattern layer PTL8) located directly below the pixel defining layer PDL.

[0175] Figure 19 It includes Figures 16 to 18 A magnified view of a portion of vehicle 900 on display device 10.

[0176] like Figure 19 As shown, the display device 10 may be located in the vehicle 900. For example, the display device 10 may be located in the center of the vehicle 900 (e.g., in the center between the driver's seat 910 and the passenger seat 920 of the vehicle 900).

[0177] The first side S1 of the display device 10 (e.g., the first side S1 of the display panel 100 of the display device 10) can be positioned close to the driver's seat 910, and the second side S2 of the display device 10 (e.g., the second side S2 of the display panel 100 of the display device 10) can be positioned close to the passenger seat 920. Therefore, the first corner CR1 of the first emission area EA1 of the display device 10 can be positioned close to the driver's seat 910, and the second corner CR2 of the first emission area EA1 of the display device 10 can be positioned close to the passenger seat 920. In some aspects, the eighth pattern layer PTL8 can extend in the dashed line connecting the first side S1 and the second side S2 of the display device 10 (e.g., a dashed line extending in the first direction DR1). In other words, each of the components of the eighth pattern layer PTL8 (e.g., data line DL, drive voltage line VDL, upper pixel connection electrode PCEb, drive voltage line VDL, first initialization voltage line VIL1, second initialization voltage line VIL2, and common voltage line VSL) can extend in the first direction DR1. Therefore, the amount of scattered light 222 directed towards the driver's seat 910 and passenger seat 920 from the scattered light reflected from the display device 10 can be reduced. Consequently, glare to the driver in the driver's seat 910 and the passenger in the passenger seat 920 can be minimized.

[0178] Figures 16 to 18 The display device 10 can be applied as described herein. Figure 9 and Figure 10 The vehicle shown is 900. At this time, Figure 14 and Figure 15 The first corner CR1 of the first emission area EA1 of the display device 10 can be positioned close to the first side S1 of the display device 10 (or the first side S1 of the display panel 100 of the display device 10). Therefore, the amount of scattered light directed from the display device 10 toward the driver's seat 910 can be reduced, thereby minimizing glare to the driver.

[0179] Figure 20 This is a plan view of the display device 10 according to the embodiment.

[0180] Figure 20 The display device 10 is in the same position as described herein regarding the seventh contact hole CT7. Figure 7 The display device 10 is different, so the differences will be described mainly as follows.

[0181] like Figure 20As shown, the seventh contact hole CT7 can be positioned adjacent to the first corner CR1 of the first emission region EA1. In this case, the seventh contact hole CT7 can be positioned such that it overlaps with the first pixel electrode PE1. In other words, the seventh contact hole CT7 can be positioned adjacent to the first corner CR1 of the first emission region EA1 and overlaps with the first pixel electrode PE1.

[0182] like Figure 20 As shown in the diagram, in the plan view, the seventh contact hole CT7 can be located between the first corner CR1 of the first emission region EA1 and the corner of the first pixel electrode PE1 (e.g., the corner of the first pixel electrode PE1 adjacent to the first corner CR1).

[0183] Because the first corner CR1 of the first emission region EA1 has a larger radius of curvature than the other corners CR2 to CR4 of the first emission region EA1, the overlap area between the pixel defining layer PDL and the first pixel electrode PE1 around the first corner CR1 can be larger than the overlap area between the pixel defining layer PDL and the first pixel electrode PE1 around the other corners. Therefore, the seventh contact hole CT7 can be positioned such that the seventh contact hole CT7 overlaps with the first pixel electrode PE1. In this case, the distance between adjacent pixel electrodes PE1, PE2, and PE3 can be designed to be closer, thereby improving the resolution of the display device 10.

[0184] In some respects, for example, the seventh contact hole CT7 described herein can be positioned with Figure 12 The first corner CR1 of the first emission region EA1 shown is adjacent to the first emission region EA1. In the plan view, the seventh contact hole CT7 may be located between the first corner CR1 of the first emission region EA1 and the corner of the first pixel electrode PE1 (e.g., the corner of the first pixel electrode PE1 adjacent to the first corner CR1).

[0185] In some respects, for example, the seventh contact hole CT7 described herein can be positioned with Figure 14 The first corner CR1 of the first emission region EA1 shown is adjacent to the first emission region EA1. In the plan view, the seventh contact hole CT7 may be located between the first corner CR1 of the first emission region EA1 and the corner of the first pixel electrode PE1 (e.g., the corner of the first pixel electrode PE1 adjacent to the first corner CR1).

[0186] In some respects, for example, the seventh contact hole CT7 described herein can be positioned with Figure 17 The second corner CR2 of the first emission region EA1 shown is adjacent to the first emission region EA1. In the plan view, the seventh contact hole CT7 may be located between the second corner CR2 of the first emission region EA1 and the corner of the first pixel electrode PE1 (e.g., the corner of the first pixel electrode PE1 adjacent to the second corner CR2).

[0187] The display device 10 according to this embodiment can be applied to various electronic devices. The electronic device according to this embodiment may include the display device 10 described above, and may also include modules or devices with other additional functions in addition to the display device 10.

[0188] Figure 21 This is a block diagram of an electronic device 50 according to an embodiment. (See reference) Figure 21 The electronic device 50 according to the embodiments may include a display module 11 (e.g., display device 10), a processor 12, a memory 13, and a power module 14. The electronic device 50 may also include an input module 15, a non-visual output module 16, and / or a communication module 17.

[0189] Electronic device 50 can output various information in the form of images through display module 11. In an example where processor 12 executes an application stored in memory 13, image information provided by the application can be provided to the user through display module 11. Power module 14 may include a power module (such as a power adapter or battery device) and a power conversion module that converts the power provided by the power module to generate power for the operation of electronic device 50. Input module 15 can provide input information to processor 12 and / or display module 11. Non-visual output module 16 can be used to receive information other than images (such as sound, touch, light, etc.) sent from processor 12 and provide it to the user. Communication module 17 is responsible for transmitting and receiving information between electronic device 50 and external devices, and communication module 17 may include a receiver and a transmitter.

[0190] At least one of the components of the electronic device 50 described above may be included in the display device according to the embodiments described herein. Furthermore, some of the individual modules functionally included in a single module may be included in the display device, and some other modules may be provided separately from the display device. For example, the display device may include display module 11, while processor 12, memory 13, and power module 14 may be provided as other devices in the electronic device 50 besides the display device.

[0191] Figure 22 and Figure 23 These are schematic diagrams of electronic devices according to various implementation methods. Figure 22 and Figure 23 Examples of various electronic devices that apply the display device 10 according to the above embodiments are shown.

[0192] Figure 22Examples of electronic devices shown are a smartphone 10_1a, a tablet PC 10_1b, a laptop computer 10_1c, a TV 10_1d, and a desktop monitor 10_1e.

[0193] In addition to the display module 11, the smartphone 10_1a may also include a communication module and an input module (such as, for example, a touch sensor). The smartphone 10_1a can process information received through the communication module or the input module, and display the processed information through the display module of the display device.

[0194] Similar to the smartphone 10_1a, each of the tablet PC 10_1b, laptop computer 10_1c, TV 10_1d, and desktop monitor 10_1e may include a display and an input module, and in some cases may also include a communication module.

[0195] Figure 23 The illustration shows an example of an electronic device, including a display module, being used in a wearable electronic device. The wearable electronic device could be smart glasses 10_2a, a head-mounted display 10_2b, a smartwatch 10_2c, etc.

[0196] The smart glasses 10_2a and the head-mounted display 10_2b may include a display module that outputs a display image and a reflector that reflects the output display image to provide the output display image to the user's eyes, thereby providing the user with virtual reality or augmented reality images.

[0197] The smartwatch 10_2c may include a biosensor as an input device and can provide the user with biological information identified by the biosensor through a display module.

[0198] It will be understood by those skilled in the art to which this specification pertains that this specification may be implemented in other specific forms without altering its technical concept or essential characteristics. Therefore, it should be understood that the embodiments described herein are exemplary in all respects and not limiting. The scope of this specification is indicated by the scope of the patent claims described herein rather than by the detailed description above, and all changes or modifications derived from the meaning and scope of the patent claims and their equivalents should be interpreted as including within the scope of this specification. This specification and accompanying drawings disclose exemplary embodiments of this specification, and although specific terminology is used, it is used in its general sense to readily illustrate the technical content of this specification and aid in understanding the invention, and is not intended to limit the scope of this specification. In addition to the embodiments disclosed herein, it will be apparent to those skilled in the art to which this specification pertains that other examples of modifications based on the technical concept of this specification are possible.

Claims

1. A display device, comprising: Display panel; as well as The display driver is connected to the display panel. The display panel includes: Substrate; Pixel electrodes are located on the substrate. A pixel defining layer is located on the pixel electrode and defines an emission region that overlaps with at least a portion of the pixel electrode; A light-emitting layer is located on the pixel electrode in the emitting region; and The common electrode is located on the light-emitting layer. in: The emission area includes a first corner, which has a curved shape that protrudes convexly toward a first edge of the display panel. The first angle includes a plurality of sub-angles connected to each other, and Each of the plurality of sub-corners has a curved shape that protrudes outward toward the first edge of the display panel.

2. The display device according to claim 1, wherein, The radius of curvature of each of the plurality of sub-corners is greater than the radius of curvature of the other corners of the emission region.

3. The display device according to claim 1, wherein, The multiple sub-angles have the same radius of curvature as each other.

4. The display device according to claim 1, wherein, The radii of curvature of the angles in the emission region, excluding the first and second sub-angles among the plurality of sub-angles, are all equal.

5. The display device according to claim 1, wherein the display panel further comprises a pattern layer, the pattern layer being disposed directly below the pixel electrode between the substrate and the pixel electrode. in, In the plan view, the pattern layer extends along a first direction perpendicular to the extension direction of the first side.

6. The display device according to claim 5, wherein: The display panel also includes: The first side; The second side faces the first side in the first direction; The third side is located between one end of the first side and one end of the second side; and The fourth side faces the third side in a second direction that intersects with the first direction, and is located between the other end of the first side and the other end of the second side.

7. The display device according to claim 6, wherein, The display driver is positioned adjacent to the third side of the display panel.

8. The display device according to claim 6, wherein, The pattern layers are configured in multiple ways. The plurality of patterned layers are arranged along the second direction, and The first edge of the display panel extends along the second direction.

9. The display device according to claim 8, wherein, Each of the multiple patterned layers extends in the first direction.

10. The display device according to claim 5, wherein: The pixels, including the pixel electrode and the emission region, are located in the display area of ​​the display panel, and The pattern layer includes data lines and power lines connected to the pixels.

11. The display device according to claim 10, wherein, The data line and the power line each extend in the first direction.

12. The display device according to claim 11, wherein, The data line and the power line are arranged along the extension direction of the first side.

13. The display device according to claim 1, wherein: The pixel electrode is connected to the transistor on the substrate through contact holes in the insulating layer, and The contact hole is positioned adjacent to the first corner and overlaps with the pixel electrode and the pixel defining layer.

14. The display device according to claim 13, wherein, In the plan view, the contact hole is located between the first corner and the corner of the pixel electrode that is relatively close to the first corner.

15. A vehicle comprising: seat; as well as The display device is positioned adjacent to the seat. The display device includes: Display panel; and The display driver is connected to the display panel. The display panel includes: Substrate; Pixel electrodes are located on the substrate. A pixel defining layer is located on the pixel electrode and defines an emission region that overlaps with at least a portion of the pixel electrode; A light-emitting layer is located on the pixel electrode in the emitting region; and The common electrode is located on the light-emitting layer. in: The emission area includes a first corner, which has a curved shape that protrudes convexly toward a first edge of the display panel. The first angle includes a plurality of sub-angles connected to each other, and Each of the plurality of sub-corners has a curved shape that protrudes outward toward the first edge of the display panel.

16. The vehicle according to claim 15, wherein, The first side of the display panel is positioned relatively close to the seat compared to the other sides of the display panel.

17. The vehicle according to claim 16, wherein, The first edge of the display panel is positioned close to the seat.

Images