Computing storage system and method of operation thereof, electronic system

Abstract

The embodiments of the present disclosure provide a computing storage system and an operating method thereof and an electronic system, the computing storage system comprising a controller, a first memory coupled with the controller, and a computing processing component for executing a program; the first memory comprises a corresponding storage area configured for input data / output data in a process of executing the program by the computing processing component; the controller is configured to: flush the input data / output data in the process of executing the program into the corresponding storage area in batches in sequence; and a size of the input data / output data in the process of executing the program is greater than a capacity size of the corresponding storage area.

Description

Computing storage systems and their operating methods, electronic systems Technical Field

[0001] This disclosure relates to, but is not limited to, a computing storage system and its operating method, and an electronic system. Background Technology

[0002] Semiconductor memories can be roughly divided into two categories, depending on whether they retain stored data when power is off: volatile memory and non-volatile memory. Volatile memory loses stored data when power is off, while non-volatile memory retains stored data when power is off. Summary of the Invention

[0003] According to a first aspect of the present disclosure, a computing storage system is provided, the computing storage system including a controller, a first memory coupled to the controller, and a computing processing component for executing a program; the first memory includes corresponding storage areas configured for input data / output data during the execution of the program by the computing processing component; the controller is configured to: sequentially refresh the input data / output data during the program execution process to the corresponding storage areas in batches; the size of the input data / output data during the program execution process is greater than the capacity of the corresponding storage areas.

[0004] In some embodiments, the computing storage system further includes a second memory coupled to the controller; the controller includes a first storage component and a second storage component; a value in the first storage component is configured to indicate whether input data in the current corresponding storage area needs to be refreshed; a value in the second storage component is configured to indicate whether there is input data in the program execution process to be refreshed to the corresponding storage area; or, the controller includes a third storage component and a fourth storage component; a value in the third storage component is configured to indicate whether output data currently refreshed to the corresponding storage area needs to be stored in the second memory; a value in the fourth storage component is configured to indicate whether there is output data in the program execution process to be stored in the second memory.

[0005] In some implementations, the controller is configured to: receive a first command; and in response to the first command, configure a corresponding storage area for input / output data during the execution of a program by the computing processing component, and configure a corresponding storage component for the configured storage area.

[0006] In some embodiments, the controller is configured to: receive an activation command; activate the program in response to the activation command; receive a second command; the second command carrying address information of the first batch of input data to be refreshed to the corresponding storage area in the second memory; in response to the second command, refresh the first batch of input data to the corresponding storage area; based on the fact that the first batch of input data refreshed to the corresponding storage area has been processed by the program, set the value in the first storage component to a first value; or, based on the fact that the first batch of output data to be stored in the second memory has been refreshed to the corresponding storage area, set the value in the third storage component to a fifth value; based on the value in the third storage component being set to the fifth value, receive a third command; the third command carrying address information of the first batch of output data to be stored in the second memory to be stored in the second memory; in response to the third command, store the first batch of output data to be stored in the second memory in the second memory.

[0007] In some implementations, the controller is configured to: receive a fourth command based on the first value in the first storage component; the fourth command carries the address information of the Nth batch of input data to be refreshed to the corresponding storage area in the second memory; in response to the fourth command, refresh the Nth batch of input data to the corresponding storage area; where N is an integer greater than 1; based on the fact that the Nth batch of input data has been refreshed to the corresponding storage area, and there is still input data in the program execution process to be refreshed to the corresponding storage area, set the value in the first storage component to a second value; or, based on the fact that the Nth batch of input data has been refreshed to the corresponding storage area, and all input data in the program execution process has been refreshed to the corresponding storage area, set the value in the second storage component to a fourth value.

[0008] In some embodiments, the controller is configured to: receive a fifth command based on the value in the third storage component as the fifth value; the fifth command carries address information indicating where the Nth batch of output data to be stored in the second memory needs to be stored; in response to the fifth command, store the Nth batch of output data in the second memory; where N is an integer greater than 1; based on the fact that the Nth batch of output data has been stored in the second memory, and there is still output data from the program execution process to be stored in the second memory, set the value in the third storage component to a sixth value; or, based on the fact that the Nth batch of output data has been stored in the second memory, and all output data from the program execution process has been stored in the second memory, set the value in the fourth storage component to an eighth value.

[0009] In some implementations, the controller is configured to: when an interruption occurs during program execution, based on a fourth value in the second storage component indicating that all input data during program execution has been refreshed to the corresponding storage area, terminate the program and refresh the output data to the corresponding storage area.

[0010] In some embodiments, the controller is configured to: receive a sixth command; the sixth command carrying address information corresponding to the second memory allocated for input data that needs to be refreshed to the corresponding storage area during program execution, or the sixth command carrying address information corresponding to the address in the second memory allocated for output data that needs to be stored in the second memory during program execution; in response to the sixth command, sequentially refresh the input data during program execution in the second memory to the corresponding storage area in batches, and after each refresh of the input data during program execution in the second memory to the corresponding storage area, update the address information of the remaining input data that needs to be refreshed to the corresponding storage area during program execution in the second memory; or, in response to the sixth command, sequentially store the output data during program execution that has been refreshed to the corresponding storage area in batches to the second memory, and after each refresh of the output data during program execution in the corresponding storage area to the second memory, update the address information of the remaining output data that needs to be stored in the second memory during program execution.

[0011] In some embodiments, the first memory includes a plurality of storage areas configured for input data during program execution; during the execution of the program on input data in one of the plurality of storage areas by the computing processing component, the controller is configured to: refresh the input data in the storage areas where the input data has been processed by the program; or, the first memory includes a plurality of storage areas configured for output data during program execution; the controller is configured to: during the process of refreshing the output data during program execution to one of the plurality of storage areas, store the output data in the storage areas of the plurality of storage areas that has not yet been stored in the second memory into the second memory.

[0012] In some implementations, the computational processing component is configured to: load the program to be executed; read input data refreshed to the corresponding storage area; or refresh the output data obtained after the program processes the input data to the corresponding storage area.

[0013] In some embodiments, the computing storage system includes a non-volatile namespace, a computing namespace, and a subsystem local storage namespace; the non-volatile namespace includes the second memory, the computing namespace includes the computing processing component, and the subsystem local storage namespace includes the first memory.

[0014] In some implementations, the computing storage system supports the simultaneous execution of multiple programs, and the first memory includes corresponding storage areas configured for input / output data during the execution of each of the multiple programs. The controller is configured to configure corresponding storage components for the storage areas corresponding to each of the multiple programs and to configure corresponding storage components for each of the multiple programs.

[0015] According to a second aspect of the present disclosure, an electronic system is provided, the electronic system including a host and a computing storage system coupled to the host, the computing storage system including a controller, a first memory coupled to the controller, and a computing processing component for executing a program; wherein, the host is configured to: send a first command; the controller is configured to: receive the first command; configure corresponding storage areas for input data / output data during the execution of the program by the computing processing component in response to the first command; and sequentially refresh the input data / output data during the program execution process to the corresponding storage areas in batches; the size of the input data / output data during the program execution process is greater than the capacity of the corresponding storage area.

[0016] In some embodiments, the computing storage system further includes a second memory coupled to the controller; the controller includes a first storage component and a second storage component; a value in the first storage component is configured to indicate whether input data in the current corresponding storage area needs to be refreshed; a value in the second storage component is configured to indicate whether there is input data in the program execution process to be refreshed to the corresponding storage area; or, the controller includes a third storage component and a fourth storage component; a value in the third storage component is configured to indicate whether output data currently refreshed to the corresponding storage area needs to be stored in the second memory; a value in the fourth storage component is configured to indicate whether there is output data in the program execution process to be stored in the second memory.

[0017] In some embodiments, the host is configured to: send an activation command; send a second command; the second command carrying address information of the first batch of input data to be refreshed to the corresponding storage area in the second memory; the controller is configured to: receive the activation command; activate the program in response to the activation command; receive the second command; refresh the first batch of input data to the corresponding storage area in response to the second command; set the value in the first storage component to a first value based on the fact that the first batch of input data refreshed to the corresponding storage area has been processed by the program; or, the host is configured to: send a third command; the third command carrying address information of the first batch of output data to be stored in the second memory; the controller is configured to: refresh the first batch of output data to be stored in the second memory to the corresponding storage area, set the value in the third storage component to a fifth value; receive the third command based on the fact that the value in the third storage component is set to the fifth value; and store the first batch of output data to be stored in the second memory in response to the third command.

[0018] In some embodiments, the host is configured to: send a command to retrieve the value of the first storage component; send a fourth command based on the value of the first storage component being the first value; the fourth command carrying address information of the Nth batch of input data to be refreshed to the corresponding storage area in the second memory; where N is an integer greater than 1; send a seventh command; the seventh command carrying information that the Nth batch of input data to be refreshed to the corresponding storage area has been refreshed to the corresponding storage area, and information on whether there is still input data in the program execution process to be refreshed to the corresponding storage area; the controller is configured to: receive the command to retrieve the value of the first storage component; send the value of the first storage component to the host in response to the command to retrieve the value of the first storage component; receive the fourth command, and in response to the fourth command refresh the Nth batch of input data to the corresponding storage area; receive the seventh command; in response to the information carried in the seventh command that there is still input data in the program execution process to be refreshed to the corresponding storage area, set the value in the first storage component to a second value; or, in response to the information carried in the seventh command that all input data in the program execution process has been refreshed to the corresponding storage area, set the value in the second storage component to a fourth value.

[0019] In some embodiments, the host is configured to: send a command to retrieve the value of the third storage component; send a fifth command based on the value in the third storage component as the fifth value; the fifth command carries address information for the Nth batch of output data to be stored in the second memory; where N is an integer greater than 1; send an eighth command; the eighth command carries information that the Nth batch of output data has been stored in the second memory and whether there is still output data in the program execution process to be stored in the second memory; the controller is configured to: receive a command to retrieve the value of the third storage component; send the value of the third storage component to the host in response to the command to retrieve the value of the third storage component; receive the fifth command; store the Nth batch of output data in the second memory in response to the fifth command; receive the eighth command; set the value in the third storage component to a sixth value in response to the information carried in the eighth command that there is still output data in the program execution process to be stored in the second memory; or, set the value in the fourth storage component to an eighth value in response to the information carried in the eighth command that all output data in the program execution process has been stored in the second memory.

[0020] In some embodiments, the host is configured to: send a sixth command; the sixth command carrying address information corresponding to the second memory allocated for input data that needs to be refreshed to the corresponding storage area during program execution; or, the sixth command carrying address information corresponding to the address in the second memory allocated for output data that needs to be stored in the second memory during program execution; the controller is configured to: receive the sixth command; in response to the sixth command, refresh the input data during program execution in the second memory to the corresponding storage area in batches, and after each refresh of the input data during program execution in the second memory to the corresponding storage area, update the address information of the remaining input data that needs to be refreshed to the corresponding storage area during program execution in the second memory; or, in response to the sixth command, store the output data during program execution that has been refreshed to the corresponding storage area in batches to the second memory, and after each refresh of the output data during program execution in the corresponding storage area to the second memory, update the address information of the remaining output data that needs to be stored in the second memory during program execution.

[0021] In some embodiments, the host is configured to: send a command to configure multiple storage areas for input data / output data during program execution; the controller is configured to: configure multiple storage areas for input data during program execution; the computing processing component, while executing the program on input data in one of the multiple storage areas, refreshes the input data stored in the multiple storage areas that has been processed by the program; or, the controller is configured to: configure multiple storage areas for output data during program execution, and while refreshing the output data during program execution to one of the multiple storage areas, store the output data stored in the multiple storage areas that has not yet been stored in the second memory into the second memory.

[0022] According to a third aspect of the present disclosure, a method for operating a computing storage system is provided, comprising: configuring corresponding storage areas for input data / output data during the execution of a program by a computing processing component; sequentially refreshing the input data / output data during program execution to the corresponding storage areas in batches; wherein the size of the input data / output data during program execution is greater than the capacity of the corresponding storage areas.

[0023] In some implementations, a first storage component is configured for the corresponding storage area of ​​the input data during program execution, and a second storage component is configured for the program; the value in the first storage component is configured to indicate whether the input data in the current corresponding storage area needs to be refreshed; the value in the second storage component is configured to indicate whether there is input data during program execution that needs to be refreshed to the corresponding storage area; or, a third storage component is configured for the corresponding storage area of ​​the output data during program execution, and a fourth storage component is configured for the program; the value in the third storage component is configured to indicate whether the output data currently refreshed to the corresponding storage area needs to be stored in the second memory; the value in the fourth storage component is configured to indicate whether there is output data during program execution that needs to be stored in the second memory.

[0024] In some embodiments, the operation method further includes: receiving a first command; and in response to the first command, configuring a corresponding storage area for input / output data during the execution of a program by the computing processing component, and configuring a corresponding storage component for the configured storage area.

[0025] In some embodiments, the operation method further includes: receiving an activation command; activating the program in response to the activation command; receiving a second command; the second command carrying address information of the first batch of input data to be refreshed to the corresponding storage area in the second memory; in response to the second command, refreshing the first batch of input data to the corresponding storage area; setting the value in the first storage component to a first value based on the fact that the first batch of input data refreshed to the corresponding storage area has been processed by the program; or, setting the value in the third storage component to a fifth value based on the fact that the first batch of output data to be stored in the second memory has been refreshed to the corresponding storage area; receiving a third command based on the fact that the value in the third storage component is set to the fifth value; the third command carrying address information of the first batch of output data to be stored in the second memory to be stored in the second memory; and storing the first batch of output data to be stored in the second memory in response to the third command.

[0026] In some embodiments, the operation method further includes: receiving a fourth command based on the value in the first storage component being the first value; the fourth command carrying address information of the Nth batch of input data to be refreshed to the corresponding storage area in the second memory; responding to the fourth command, refreshing the Nth batch of input data to the corresponding storage area; where N is an integer greater than 1; based on the fact that the Nth batch of input data has been refreshed to the corresponding storage area, and there is still input data in the program execution process to be refreshed to the corresponding storage area, setting the value in the first storage component to a second value; or, based on the fact that the Nth batch of input data has been refreshed to the corresponding storage area, and all input data in the program execution process has been refreshed to the corresponding storage area, setting the value in the second storage component to a fourth value.

[0027] In some embodiments, the operation method further includes: receiving a fifth command based on the value in the third storage component as the fifth value; the fifth command carrying address information of the Nth batch of output data to be stored in the second memory; in response to the fifth command, storing the Nth batch of output data in the second memory; where N is an integer greater than 1; based on the fact that the Nth batch of output data has been stored in the second memory, and there is still output data from the program execution process to be stored in the second memory, setting the value in the third storage component to a sixth value; or, based on the fact that the Nth batch of output data has been stored in the second memory, and all output data from the program execution process has been stored in the second memory, setting the value in the fourth storage component to an eighth value.

[0028] In some embodiments, the operation method further includes: when an interruption occurs during program execution, based on a fourth value in the second storage component indicating that all input data during program execution has been refreshed to the corresponding storage area, ending the program and refreshing the output data to the corresponding storage area.

[0029] In some embodiments, the operation method further includes: receiving a sixth command; the sixth command carrying address information corresponding to the second memory allocated for input data that needs to be refreshed to the corresponding storage area during program execution, or the sixth command carrying address information corresponding to the address in the second memory allocated for output data that needs to be stored in the second memory during program execution; in response to the sixth command, refreshing the input data during program execution in the second memory to the corresponding storage area in batches, and updating the address information of the remaining input data that needs to be refreshed to the corresponding storage area during program execution in the second memory after each refresh of the input data during program execution in the second memory; or, in response to the sixth command, storing the output data during program execution that has been refreshed to the corresponding storage area in batches to the second memory, and updating the address information of the remaining output data that needs to be stored in the second memory during program execution after each refresh of the output data during program execution in the corresponding storage area to the second memory.

[0030] In some embodiments, the first memory includes multiple storage areas configured for input data during program execution; during the execution of the program on input data in one of the multiple storage areas by the computing processing component, the operation method further includes: refreshing the input data in the storage areas where the input data has been processed by the program; or, the first memory includes multiple storage areas configured for output data during program execution; the operation method further includes: during the process of refreshing the output data during program execution to one of the multiple storage areas, storing the output data in the storage areas of the multiple storage areas that has not yet been stored in the second memory into the second memory. Attached Figure Description

[0031] Figure 1 is a schematic diagram of the structure of an electronic system provided in an embodiment of this disclosure;

[0032] Figure 2 is a schematic diagram of the structure of a computing storage system provided in an embodiment of this disclosure;

[0033] Figure 3 is a schematic diagram of an example of loading a program in an electronic system according to an embodiment of the present disclosure;

[0034] Figure 4 is a schematic diagram illustrating an example of program execution in an electronic system according to an embodiment of this disclosure;

[0035] Figure 5 is a schematic diagram of a memory range and a set of memory ranges provided in an embodiment of this disclosure;

[0036] Figure 6a is a schematic diagram of the structure of a computing storage system provided in an embodiment of this disclosure;

[0037] Figure 6b is a schematic diagram of the structure of a computing storage system provided in an embodiment of this disclosure;

[0038] Figure 7 is a schematic diagram of the interaction between a host and a computing and storage system according to an embodiment of this disclosure;

[0039] Figure 8 is a schematic diagram of the interaction between a host and a computing and storage system according to an embodiment of this disclosure;

[0040] Figure 9 is a schematic diagram of the interaction between a host and a computing and storage system according to an embodiment of this disclosure;

[0041] Figure 10 is a schematic diagram of the structure of a computing storage system provided in an embodiment of this disclosure;

[0042] Figure 11 is a schematic diagram of the interaction between a host and a computing storage system according to an embodiment of this disclosure;

[0043] Figure 12 is a schematic diagram of the structure of an electronic system provided in an embodiment of this disclosure;

[0044] Figure 13 is a flowchart illustrating an operation method of a computing storage system provided in an embodiment of this disclosure. Detailed Implementation

[0045] Exemplary embodiments of the present disclosure will now be described in more detail with reference to the accompanying drawings. While exemplary embodiments of the present disclosure are shown in the drawings, it should be understood that the present disclosure may be implemented in various forms and should not be limited to the specific embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art.

[0046] In the following description, numerous specific details are set forth in order to provide a more thorough understanding of this disclosure. However, it will be apparent to those skilled in the art that this disclosure may be practiced without one or more of these details. In other instances, to avoid confusion with this disclosure, certain technical features well-known in the art have not been described; that is, not all features of actual embodiments are described herein, nor are well-known functions and structures described in detail.

[0047] In the accompanying drawings, the same reference numerals denote the same elements throughout.

[0048] It should be understood that spatial relation terms such as “below,” “under,” “below,” “below,” “above,” “above,” etc., are used herein for convenience of description to describe the relationship between one element or feature shown in the figure and other elements or features. It should be understood that, in addition to the orientation shown in the figure, spatial relation terms are intended to also include different orientations of the device in use and operation. For example, if the device in the figure is flipped, then the element or feature described as “below” or “below” other elements or features will be oriented “above” other elements or features. Therefore, the exemplary terms “below” and “under” can include both upper and lower orientations. The device may be otherwise oriented (rotated 90 degrees or otherwise) and the spatial descriptive terms used herein will be interpreted accordingly.

[0049] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit this disclosure. When used herein, the singular forms “a,” “an,” and “the” are also intended to include the plural forms unless the context clearly indicates otherwise. It should also be understood that the terms “comprise” and / or “comprising,” when used in this specification, identify the presence of the stated features, integers, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups. When used herein, the term “and / or” includes any and all combinations of the associated listed items.

[0050] Figure 1 is a schematic diagram of an electronic system provided in an embodiment of this disclosure. Figure 2 is a schematic diagram of a computing and storage system provided in an embodiment of this disclosure.

[0051] Referring to FIG1, the electronic system 100 may include a host 110 and at least one computing storage system 120. The host 110 may include a host processor 111 and a host memory 112. The host processor 111 controls the overall operation of the host 110. The host processor 111 may be implemented as at least one of various processing units, including, for example, a central processing unit (CPU), an application processor (AP), a graphics processing unit (GPU), a neural processing unit (NPU), a field-programmable gate array (FPGA), and / or a microprocessor. In some embodiments, the host processor 111 may be implemented as a system-on-chip (SoC). The host memory 112 may store data, instructions, and programs required for the operation of the host processor 111. The host memory 112 may be volatile memory. Volatile memory includes, but is not limited to, random access memory (RAM), dynamic random access memory (DRAM), static random access memory (SRAM), synchronous dynamic random access memory (SDRAM), and double data rate synchronous dynamic random access memory (DDR SDRAM).

[0052] The computing storage system 120 may be a semiconductor device that provides computing services and data storage services. The computing storage system 120 may be used as both a data storage device and a computing device for executing programs in the electronic system 100. In some embodiments, for example, the computing storage system 120 may be implemented as part of a data center or an artificial intelligence training data device.

[0053] In some embodiments, host 110 and compute storage system 120 are physically connected via an interface and communicate in accordance with the corresponding PCIe / NVMe protocol. Exemplarily, host 110 and compute storage system 120 can be connected via a network link, such as based on the NVMe-OF protocol. Exemplarily, host 110 and compute storage system 120 can also be connected via a Compute Express Link (CXL) interface, through which host 110 can control the operation of compute storage system 120. Compute storage system 120 is configured to conform to the NVMe compute storage protocol. The CXL interface may include CXL.io, CXL.cache, and CXL.mem as sub-protocols. Host 110 can load predetermined programs into compute storage system 120 for processing. Host 110 can load various types of programs (such as applications, kernels, and / or compute) into compute storage system 120. Programs may include, for example, encryption programs, compression programs, image recognition programs, filtering programs, and / or artificial intelligence programs.

[0054] Referring to FIG2, in some embodiments, the compute storage system 200 may include a controller 210, one or more sub-system local memory namespaces (SLM NS) 230, one or more non-volatile memory namespaces (NVM NS) 240, and one or more compute namespaces (CNS) 220. The compute storage system 200 may correspond to one of the plurality of compute storage systems 120 shown in FIG1. ​​The sub-system local memory namespace 230 may be a namespace implemented in volatile memory, which is closer to the compute processing components of the compute namespace 220 than the namespace implemented in non-volatile memory. The non-volatile namespace 240 may be a namespace implemented in non-volatile memory.

[0055] In some embodiments, the computing storage system 200 may use Non-Volatile Memory Fast Protocol (NVMe) as the storage protocol, and the controller 210 may be an NVMe controller. The controller 210 may, in response to input / output (I / O) requests from the host, store input / output data during program execution in the subsystem local storage namespace 230, and / or read input / output data stored in the subsystem local storage namespace 230.

[0056] In some embodiments, the controller 210 may perform various operations for controlling the non-volatile namespace 240 or other non-volatile storage devices. For example, these operations may include address mapping operations, wear leveling operations, and / or garbage collection operations. Address mapping operations may be translation operations between logical addresses managed by the host or controller and physical addresses of the non-volatile namespace 240. Wear leveling may be an operation that evens out the frequency or number of uses of multiple storage blocks included in the non-volatile namespace 240. Garbage collection operations may be an operation that copies valid data from a source block in the non-volatile namespace 240 to a target block and then erases the source block to ensure available or free blocks in the non-volatile namespace 240.

[0057] In some embodiments, compute namespace 220 can serve as an abstraction representing one or more compute engines for executing programs. Compute engine resources can consist of one or more CPUs, FPGAs, GPUs, ASICs, etc. For example, a compute namespace can include CPU cores and FPGAs. Compute engine resources can be part of controller 210 or separate from controller 210. The compute engine can execute programs pre-loaded from the host. In some embodiments, programs can be stored in program slots. Program slots can be formed within the compute engine or allocated in separate memory. In some embodiments, program slots storing programs can be within compute namespace 220, or compute namespace 220 can be formed as an entity capable of executing programs. Compute namespace 220 can be, for example, an entity in an NVMe subsystem. Compute namespace 220 can access subsystem local storage namespace 230. In some embodiments, compute storage system 200 can include one or more compute namespaces 220. If the computing storage system 200 includes multiple computing namespaces 220, the host can load multiple programs into the multiple computing namespaces 220 respectively (e.g., in a one-to-one relationship). Therefore, each loaded program can be managed in its respective computing namespace 220, and this disclosure is not limited thereto.

[0058] In some embodiments, the controller 210 may copy data stored in the non-volatile namespace 240 to the subsystem local storage namespace 230, and / or copy data stored in the subsystem local storage namespace 230 to the non-volatile namespace 240. That is, the controller 210 may control the data migration between the non-volatile namespace 240 and the local storage namespace 230 as needed for the program processing of the computation namespace 220.

[0059] The subsystem local storage namespace 230 may store input data used by the program to be executed, or it may store the results (output data) obtained by executing the program. In some embodiments, the subsystem local storage namespace 230 may also be accessed by the controller 210. The subsystem local storage namespace 230 may be implemented as, for example, DRAM.

[0060] In some embodiments, controller 210 may further include a first control portion (not shown) of the control subsystem local storage namespace 230, such as a cache controller. In some embodiments, the first control portion may be configured as a separate chip from controller 210. In some other embodiments, the first control portion may be configured as an internal component of controller 210.

[0061] The non-volatile namespace 240 may store input / output data during program execution. The non-volatile namespace 240 may include, for example, flash memory (such as NAND flash memory). In another example, the non-volatile namespace 240 may include, for example, phase-change memory, resistive memory, magnetoresistive memory, ferroelectric memory, or polymer memory. In some embodiments, the computing storage system 200 may also include a second control portion, such as a flash memory controller, that controls or is configured to control the non-volatile namespace 240, and this second control portion may be included in controller 210.

[0062] In this embodiment of the disclosure, the computing processing components in the computing storage system, including computing engine resources, are abstracted into one or more computing namespaces for user use. The RAM within the computing processing components of the computing storage system, as well as the common RAM within the computing storage system and the RAM within the controller, can all be abstracted into subsystem local namespaces for user use. For the user, these computing namespaces and subsystem local storage namespaces are parallel entities. In some implementations, the user can be informed, based on the specific internal physical implementation, that a particular subsystem local storage namespace is used by a particular computing namespace (due to physical dependencies).

[0063] Figure 3 is a schematic diagram of an example of loading a program in an electronic system according to an embodiment of the present disclosure.

[0064] Referring to Figure 3, host 310 can load programs into compute storage system 320. In Figure 3, compute storage system 320 is shown as including compute namespace 322 and compute namespace 323 (e.g., compute namespaces 0 and 1), but the number of compute namespaces is not limited to this.

[0065] In some embodiments, compute namespaces 322 and 323 may support device-defined programs and / or downloadable programs. Device-defined programs may be, for example, fixed programs provided by a manufacturer, while downloadable programs may be programs loaded into compute namespaces 322 and 323 by the host 310. For example, device-defined program 323a may be set in compute namespace 323.

[0066] In some embodiments, the controller 321 of the computing storage system 320 may receive programs 322a and 323b transmitted from the host 310 and store them in the computing storage system 320. The computing engine of the computing namespace may, in response to a program execution command from the host 310, use input data stored in the subsystem local storage namespace 324 to execute programs 322a, 323a, and / or 323b in computing namespaces 322 and 323. The input data may include corresponding input parameters required for program execution.

[0067] Figure 4 is a schematic diagram of an example of program execution in an electronic system according to an embodiment of the present disclosure. In Figure 4, it is assumed that program 422a is loaded into the computing namespace 422 of computing storage system 420.

[0068] Referring to Figure 4, in operation S431, the host 410 may send a data copy command to the controller 421 of the computing storage system 420. In operation S432, in response to the data copy command, input data stored in the non-volatile namespace 424 (e.g., a non-volatile memory device) may be copied to the subsystem local storage namespace 423. In some embodiments, the controller 421 may control the non-volatile namespace 424 and the subsystem local storage namespace 423 in response to the data copy command to transfer input data from the non-volatile namespace 424 to the subsystem local storage namespace 423.

[0069] It should be noted that Figure 4 is only an example and is not intended to limit the transmission path of input and output data in the embodiments of this disclosure. In some embodiments, the host 410 can directly write input data into the subsystem local storage namespace 423, and the output data obtained after the program processes the input data is stored in the subsystem local storage namespace 423. The host 410 can directly obtain the output data from the subsystem local storage namespace 423. That is, the non-volatile namespace 424 may not participate in the storage of input data and output data. In other embodiments, the non-volatile namespace 424 can also participate in the storage of input data and output data. The host 410 can write input data into the non-volatile namespace 424, the non-volatile namespace 424 copies the input data to the subsystem local storage namespace 423, the output data obtained after the program processes the input data is stored in the subsystem local storage namespace 423, the output data in the subsystem local storage namespace 423 is copied to the non-volatile namespace 424, and the host can obtain the output data from the non-volatile namespace 424. In some other embodiments, the non-volatile namespace 424 may only be used for either storing input data or storing output data. For example, the host 410 may directly write input data into the subsystem local storage namespace 423, and the output data obtained after the program processes the input data is stored in the subsystem local storage namespace 423. The output data in the subsystem local storage namespace 423 is copied to the non-volatile namespace 424, and the host 410 can obtain the output data from the non-volatile namespace 424. Alternatively, the host 410 may write input data into the non-volatile namespace 424, and the input data in the non-volatile namespace 424 is copied to the subsystem local storage namespace 423. The output data obtained after the program processes the input data is stored in the subsystem local storage namespace 423, and the host 410 can directly obtain the output data from the subsystem local storage namespace 423.

[0070] After the data has been copied from the NVM namespace 424 to the subsystem local storage namespace 423, in operation S433, the controller 421 may send a read success message to the host 410.

[0071] In order to execute the program, in operation S441, host 410 may send a program execution command to computing storage system 420 to execute program 422a in computing namespace 422. In some embodiments, controller 421 may receive the program execution command from host 410. In operation S442, in response to the program execution command, the computing engine in computing namespace 422 may use input data stored in subsystem local storage namespace 423 to execute program 422a in computing namespace 422. In operation S443, computing namespace may store the execution result (output data) of program 422a in subsystem local storage namespace 423. After the execution of program 422a in computing namespace 422 is completed, in operation S444, controller 421 may send a message indicating successful program execution to host 410.

[0072] In some embodiments, during operation S451, host 410 may send a read command instructing the computing storage system 420 to read output data from subsystem local storage namespace 423. During operation S452, controller 421 may read output data (e.g., the execution result of program 422a) from subsystem local storage namespace 423 and transmit the data to host 410.

[0073] In some embodiments, after the program 422a has finished executing, the output data can be flushed from the subsystem local storage namespace 423 to the non-volatile namespace 424.

[0074] The electronic system can execute programs on the computing storage system 420 by performing the above operations. Furthermore, if requested by the host 410, the electronic system can provide the execution results of the program from the computing storage system 420 to the host 410.

[0075] In some embodiments, the controller 421, in response to a host command, configures a corresponding storage region in the memory of the sub-system local memory namespace 423 to store input / output data during program execution. In some embodiments, the controller can configure the corresponding storage region by creating memory ranges. A memory range (MR) defines a corresponding storage region. A memory range can be represented by the sub-system local memory namespace identity (SLM NS ID), the starting address (Starting Byte) of the storage region within that local memory namespace, and the data length. Each memory range specifies the accessible range within the sub-system local memory namespace. The collection of memory ranges constitutes a memory range set (MRS). The memory range set can be stored in the compute namespace, and each execution of the program is limited to accessing ranges other than those specified in the memory range set in the program name. As shown in Figure 5, memory range 1 and memory range 2 in computing namespace 501 form memory range set 1, and memory range 1, memory range 2, and memory range 3 in computing namespace 502 form memory range set 2. Each memory range includes the Sub-system Local Memory Namespaces Identity (SLM NS ID), the starting address (Starting Byte) of the storage region in the local storage namespace, and information related to the data length. The information included in the memory range allows us to determine a region within the corresponding sub-system local storage namespace. It should be noted that Figure 5 illustrates an example of storing a storage range set within a computing namespace, but this embodiment is not limited to this; the storage range set can also be stored in other storage-functional memories within the computing storage system.

[0076] During program execution, input and output data are stored in the subsystem's local storage namespace. With the rise of big data and artificial intelligence applications, in some scenarios (such as AI training), the size of input and output data (for example, the input parameters of some large AI training programs can reach GB in size) far exceeds the capacity of the storage area configured for input and output data, thus affecting the normal execution of the program.

[0077] This disclosure provides a computing storage system, as shown in FIG6a. The computing storage system 600 includes a controller 601, a first memory 602 coupled to the controller 601, and a computing processing component 603 for executing a program. The first memory 602 includes corresponding storage areas configured for input data / output data during the execution of the program by the computing processing component 603. The controller 601 is configured to sequentially refresh the input data / output data during program execution to the corresponding storage areas in batches. The size of the input data / output data during program execution is greater than the capacity of the corresponding storage areas.

[0078] In this embodiment of the disclosure, the input / output data during the execution of a program is refreshed to the corresponding storage area in batches. Even if the size of the input / output data during the execution of a program is greater than the capacity of the corresponding storage area, the normal execution of the program can still be guaranteed. In other words, this embodiment of the disclosure does not require the size of the input / output data during the execution of the program to be less than the capacity of the corresponding storage area, which relaxes the requirements for the size of the input / output data during the execution of the program and expands the applicability of the computing storage system.

[0079] In some specific examples, the first memory 602 is volatile memory, including but not limited to random access memory (RAM), dynamic random access memory (DRAM), static random access memory (SRAM), synchronous dynamic random access memory (SDRAM), and double data rate synchronous dynamic random access memory (DDR SDRAM). The computing processing component 603 has computing functions, including but not limited to a computing engine, whose resources may consist of one or more of a CPU, FPGA, GPU, ASIC, etc. The computing processing component 603 may be part of the controller 601 or a component independent of the controller 601.

[0080] In some specific examples, as shown in FIG6a, the first memory 602 includes a first storage area 606 configured for input data during the execution of a program by the computing processing component 603, and a second storage area 607 configured for output data during the execution of a program by the computing processing component 603. The capacity of the first storage area 606 is smaller than the size of the input data during program execution, and the capacity of the second storage area 607 is smaller than the size of the output data during program execution. The controller 601 is configured to: sequentially refresh the input data during program execution to the first storage area 606 in batches, and / or sequentially refresh the output data during program execution to the second storage area 607 in batches.

[0081] In some specific examples, as shown in FIG6b, the first memory 602 includes a plurality of first storage areas 606 configured for input data during the execution of a program by the computing processing component 603, the capacity of the plurality of first storage areas 606 being smaller than the size of the input data during program execution. The first memory 602 includes second storage areas 607 configured for output data during the execution of a program by the computing processing component, the capacity of the plurality of second storage areas 607 being smaller than the size of the output data during program execution.

[0082] The solutions provided in this disclosure are applicable to input data and output data during program execution. The following description will first use input data during program execution as an example.

[0083] In some embodiments, as shown in FIG6a and FIG6b, the controller 601 includes a first storage component 611 and a second storage component 612; the value in the first storage component 611 is configured to characterize whether the input data in the current corresponding storage area needs to be refreshed; the value in the second storage component 612 is configured to characterize whether there is input data in the program execution process that needs to be refreshed to the corresponding storage area.

[0084] The first storage component 611 and the second storage component 612 can be registers, for example, they can be implemented through different units of the same register or through different registers; the first storage component 611 and the second storage component 612 can also be a region of memory in the controller 601. The first storage component 611 can be used to store a value indicating whether the input data in the current first storage region 606 needs to be refreshed. For example, a first value in the first storage component 611 indicates that the input data in the current first storage region 606 needs to be refreshed, and a second value in the first storage component 611 indicates that the input data in the current first storage region 606 does not need to be refreshed. The second storage component 612 can be used to store a value indicating whether there is input data in the program execution process that needs to be refreshed to the first storage region 606; for example, a third value in the second storage component 612 indicates that there is input data in the program execution process that needs to be refreshed to the first storage region 606, and a fourth value in the second storage component 612 indicates that all input data in the program execution process has been refreshed to the first storage region 606. For example, the first value can be either "1" or "0", and the second value can be either "1" or "0". For example, the third value can be either "1" or "0", and the fourth value can be either "1" or "0".

[0085] In this embodiment, the controller 601 provides a first storage component 611 associated with the first storage area 606. The value in the first storage component 611 reflects whether the program has finished processing the input data in the first storage area 606, i.e., whether the input data in the first storage area 606 needs to be updated. When the program has finished processing the input data in the first storage area 606, the input data in the first storage area 606 needs to be refreshed; when the program has not finished processing the input data in the first storage area 606, the input data in the first storage area 606 does not need to be refreshed. Furthermore, in this embodiment, the controller 601 provides a second storage component 612 associated with the program. The value in the second storage component 612 reflects whether all input data during the current program execution has been refreshed to the first storage area 606.

[0086] In some embodiments, the controller 601 is configured to: receive a first command; and in response to the first command, configure a corresponding storage area for input data during the execution of a program by the computing processing component 603, and configure a corresponding storage component for the configured storage area.

[0087] As shown in Figure 7①, the controller 601 receives a first command sent by the host 605. This first command may be a command to create a memory range set. After receiving the first command, the controller 601 allocates a storage area in the first memory for the input / output data during program execution. The first command carries an identifier of the memory range (MRID, Memory Range Identity Document) and information cells indicating that a first storage component 611 needs to be allocated for the first storage area 606 corresponding to the memory range in the memory range set, and a second storage component 612 needs to be allocated for the program to be executed. As shown in Figure 7②, after the controller finishes allocating the storage area in the first memory for the input / output data during program execution, the controller 601 may send a message confirming the successful creation of the memory range set to the host 605. This message confirming the successful creation of the memory range set may carry the address of the first storage component 611 and the address of the second storage component 612.

[0088] In some specific examples, controller 601 is configured to initialize the value of first storage unit 611 to a second value and the value of second storage unit 612 to a third value.

[0089] In some embodiments, as shown in FIG6a, the computing storage system 600 further includes a second memory 604 coupled to the controller 601.

[0090] In some specific examples, the second memory 604 is a non-volatile memory, including but not limited to flash memory (such as NAND flash memory), phase-change memory, resistive memory, magnetoresistive memory, ferroelectric memory, or polymer memory. The second memory 604 can be used to store input / output data during program execution.

[0091] In some embodiments, the controller 601 is configured to: receive an activation command; activate a program in response to the activation command; receive a second command; the second command carries address information in the second memory 604 of the first batch of input data that needs to be refreshed to the corresponding storage area; in response to the second command, refresh the first batch of input data to the corresponding storage area; and set the value in the first storage component 611 to a first value based on the fact that the first batch of input data refreshed to the corresponding storage area has been processed by the program.

[0092] In some embodiments, the computing processing component 603 is configured to: load a program to be executed; and read input data refreshed to the corresponding storage area.

[0093] In some specific examples, the program to be executed may not be loaded through the computation processing component 603, for example, for a fixed program provided by the manufacturer.

[0094] As shown in Figure 7, ③, the controller 601 receives an activation command from the host 605. The controller 601 can activate the program to be executed in the computing processing component 603 in response to the activation command. As shown in Figure 7, ④, once the program to be executed in the computing processing component 603 is successfully activated, the controller 601 can send a message confirming successful activation to the host 605. As shown in Figure 7, ⑤, the controller 601 receives a second command from the host 605. This second command instructs the first batch of input data that needs to be refreshed from the second memory 604 to the first storage area 606 to be refreshed to the first storage area 606. This second command carries the address information of the first batch of input data that needs to be refreshed to the first storage area 606 in the second memory 604. As shown in Figure 7, ⑥, once the first batch of input data that needs to be refreshed from the second memory 604 to the first storage area 606 is refreshed to the first storage area 606 of the first memory, the controller 601... 01 can send a message confirming the successful refresh of the first batch of input data that needs to be refreshed from the second memory 604 to the first memory area 606 to the first memory area 606 to the host 605; as shown in FIG7 ⑦, the controller 601 receives the execution program command sent by the host 605. The execution program command may carry the address information of the first storage component 611 and the address information of the second storage component 612. The execution program command instructs the computing processing component to execute the program; as shown in FIG7 ⑧, the computing processing component 603 reads the input data currently stored in the first memory area 606 of the first memory 602; as shown in FIG7 ⑨, the first memory 602 sends a message confirming the successful read of the input data currently stored in the first memory area 606 of the first memory 602 to the computing processing component 603; as shown in FIG7 ⑩, the computing processing component 603 executes the program; as shown in FIG7 As shown in Figure 7, when the computing processing component 603 finishes processing the input data stored in the first storage area 606 of the current first memory 602 (the first batch of input data refreshed to the first storage area 606), the computing processing component 603 reports to the controller 601 that the program is in a pending state; As shown, the controller 601 sets the value in the first storage unit 611 to the first value; as shown in Figure 7. As shown, the controller 601 confirms that the value in the second storage component 612 is the third value because the program in the computing processing component has not been completed, that is, there is still input data to be refreshed to the first storage area.

[0095] In some embodiments, the controller 601 is configured to: receive a fourth command based on a first value in the first storage unit 611; the fourth command carries address information of the Nth batch of input data to be refreshed to the corresponding storage area in the second memory 604; in response to the fourth command, refresh the Nth batch of input data to the corresponding storage area; N is an integer greater than 1; based on the fact that the Nth batch of input data has been refreshed to the corresponding storage area, and there is still input data in the program execution process to be refreshed to the corresponding storage area, set the value in the first storage unit 611 to a second value; or, based on the fact that the Nth batch of input data has been refreshed to the corresponding storage area, and all input data in the program execution process has been refreshed to the corresponding storage area, set the value in the second storage unit 612 to a fourth value.

[0096] As shown in Figure 7 As shown in Figure 7, the controller 601 receives a command from the host 605 to retrieve the value of the first storage component 611. This command is periodically sent by the host 605 to the controller 601. As shown in Figure 7, the controller 601 responds to the command sent by the host 605 to obtain the value of the first storage component 611, and informs the host 605 of the value of the first storage component 611; As shown, when the value in the first storage unit 611 is the first value, the controller 601 receives a fourth command sent by the host 605. This fourth command instructs the Nth batch of input data that needs to be refreshed from the second memory 604 to the first storage area 606 of the first memory to be refreshed to the first storage area 606. This fourth command carries the address information of the Nth batch of input data that needs to be refreshed to the first storage area 606 in the second memory 604; as shown in Figure 7. As shown, controller 601 can send a message to host 605 confirming the successful refresh of the Nth batch of input data that needs to be refreshed from second memory 604 to first storage area 606 of first memory; as shown in Figure 7. As shown in Figure 7, when the Nth batch of input data has been refreshed to the first storage area 606, the controller 601 receives a seventh command sent by the host 605. This seventh command carries information indicating that there is still input data in the program execution process that needs to be refreshed to the first storage area 606; As shown, in response to the seventh command, controller 601 sets the value in first storage unit 611 to the second value; as shown in Figure 7. As shown, controller 601 sends a message to host 605 indicating that the value in the first storage unit 611 has been successfully updated; or, as shown in Figure 7... As shown in Figure 7, when the Nth batch of input data has been refreshed to the first storage area 606, the controller 601 receives the ninth command sent by the host 605. This ninth command carries information indicating that all input data during program execution has been refreshed to the first storage area 606. As shown, in response to the ninth command, controller 601 sets the value in the second storage unit 612 to the fourth value; as shown in Figure 7. As shown, controller 601 sends a message to host 605 indicating that the update of the value in second storage unit 612 was successful.

[0097] In some embodiments, the controller 601 is configured to: when an interruption occurs during program execution, based on the value in the second storage component 612 being set to a fourth value indicating that all input data during program execution has been refreshed to the corresponding storage area, terminate the program and refresh the output data to the corresponding storage area.

[0098] In some embodiments, the computation processing component 603 is configured to refresh the output data obtained after the program processes the input data to the corresponding storage area.

[0099] In some specific examples, the output data obtained after the program processes the input data can be automatically refreshed to the second storage area 607.

[0100] As shown in Figure 7 As shown in Figure 7, if an interruption occurs during program execution, the controller 601 sends a command to the computing processing component 603 to continue the program after the interruption; As shown in Figure 7, the computing processing component 603 sends a message indicating successful continuation after a program interruption to the controller 601; As shown in Figure 7, when the program is in a pending state, the computation processing component 603 informs the controller 601 of the program's pending state. As shown in Figure 7, when the value in the second storage unit 612 is the fourth value, the controller 601 informs the computing processing unit 603 of the message that the value in the second storage unit 612 is the fourth value; As shown, the computational processing component 603 writes the output data during program execution into the first memory 602. In other specific examples, the output data can also be refreshed to the first memory 602 in batches during program execution; as shown in Figure 7. As shown in Figure 7, the first memory 602 sends a message indicating that the output data during the confirmation program execution process has been successfully written into the first memory 602 to the computing processing component 603; As shown, the controller notifies the host 605 of the program execution completion message based on the completion of the program execution in the computing processing component.

[0101] In some embodiments, the controller 601 is configured to: receive a sixth command; the sixth command carries address information of the corresponding second memory 604 allocated for input data that needs to be refreshed to the corresponding storage area during program execution;

[0102] In response to the sixth command, the input data during the program execution process in the second memory 604 is refreshed to the corresponding storage area in batches. After each refresh of the input data during the program execution process in the second memory 604 to the corresponding storage area, the address information of the remaining input data that needs to be refreshed to the corresponding storage area during the program execution process in the second memory 604 is updated.

[0103] As shown in ① of Figure 8, the first command may not carry the information cell indicating the need to allocate a first storage component to the first storage area 606 corresponding to the memory range of the memory range set, nor may it carry the information cell indicating the need to allocate a second storage component to the program to be executed. The rest is similar to ① to ④ of Figure 7, and will not be repeated here. As shown in ⑤ of Figure 8, the controller 601 receives a sixth command sent by the host 605. This sixth command instructs that the input data that needs to be refreshed from the second memory 604 to the first storage area 606 of the first memory be refreshed to the first storage area 606. This sixth command carries the address information of the corresponding second memory 604 allocated to the input data that needs to be refreshed to the corresponding storage area during program execution. That is, the sixth command carries the address information of all input data stored in the second memory 604 during program execution. This address information includes the starting address of all input data that needs to be stored in the first storage area 606 during program execution in the second memory 604. The controller 601, in response to the sixth command, refreshes the first batch of input data that needs to be refreshed from the second memory 604 to the first memory area 606, only after the program is in a pending state. As shown in Figure 8, after refreshing the first batch of input data during program execution to the first memory area 606 in the first memory 602, the controller 601 updates the address information of the remaining input data that needs to be refreshed to the first memory area 606 during program execution in the second memory 604.

[0104] As shown in Figure 8 (⑧), the controller 601 receives the command to execute the program sent by the host 605, and the controller 601 informs the computing processing component 603 of the command; as shown in Figure 8 (⑨), the computing processing component 603 reads the first batch of input data stored in the first storage area 606 of the first memory 602; as shown in Figure 8 (⑩), the first memory 602 informs the computing processing component 603 of a message indicating that the computing processing component 603 has successfully read the first batch of input data stored in the first storage area 606 of the first memory 602; as shown in Figure 8... As shown in Figure 8, the computational processing component 603 executes a program to process the first batch of input data stored in the first storage area 606; As shown in Figure 8, when the program finishes processing the first batch of input data stored in the first storage area 606, the computing processing component 603 informs the controller 601 that the program is in a pending state; As shown in Figure 8, when the controller 601 learns that the program is in a pending state, it sends a command to the first memory 602 to copy the input data. This command can instruct the input data during the execution of the Nth batch of programs to be refreshed to the first storage area 606 in the first memory 602. As shown, after the input data during the execution of the Nth batch of programs is refreshed to the first storage area 606 in the first memory 602, the controller 601 updates the address information of the remaining input data that needs to be refreshed to the first storage area 606 during program execution in the second memory 604; this process can be repeated cyclically as shown in Figure 8 from ⑨ to ⑨. The operation continues until the input data from the last batch of program execution is refreshed into the first storage area 606 in the first memory 602; as shown in Figure 8. As shown, after the input data of the last batch of program execution is refreshed to the first storage area 606 in the first memory 602, the controller 601 can send a message indicating that the input data copying was successful to the host 605.

[0105] As shown in Figure 8 As shown in Figure 8, host 605 sends a command to end the copying of input data, or host 605 can also issue a command to start copying new input data; As shown in Figure 8, after the computing processing component 603 finishes processing the last batch of input data refreshed to the first storage area 606, the computing processing component 603 informs the controller 601 that all input data has been processed by the program; As shown in Figure 8, the computational processing component 603 writes the results (output data) obtained after program execution into the first memory 602; As shown, after the computational processing component 603 writes the result obtained after the program execution into the first memory 602, the first memory 602 informs the computational processing component 603 of the successful writing of the result obtained after the program execution into the first memory 602.

[0106] In the embodiment shown in Figure 8, the host 605 pre-deploys the address information of the corresponding second memory 604 for all input data that needs to be refreshed to the first storage area 606 during program execution, and instructs the controller 601 to refresh the input data in the second memory 604 to the first storage area 606 when it detects that the program is in a pending state. The controller 601 can inform the program whether it is in a pending state through the computing processing component 603. Once the controller 601 is informed that the program is in a pending state, it can immediately issue a command to refresh the input data in the first storage area 606, thereby reducing the waiting time after the program enters a pending state. In the above embodiment, the controller 601 can autonomously determine the time node for refreshing data, reducing the impact of data refreshing on the normal input / output of the host.

[0107] The embodiment shown in Figure 9 is similar to the embodiment shown in Figure 8. Based on the embodiment shown in Figure 8, a first storage component 611 associated with the first storage area 606 can be further added, provided by the controller 601. The value in the first storage component 611 indicates whether the program has finished processing the input data in the current first storage area 606, and the value in the first storage component 611 indicates whether the input data in the first storage area 606 needs to be updated. The controller 601 is configured to initialize the value of the first storage component 611 to a second value and the value of the second storage component 612 to a third value. The first command shown in Figure 9 ① carries information cells indicating the need to allocate a first storage component to the first storage area 606 corresponding to the memory range in the memory range set and the need to allocate a second storage component 612 to the program to be executed; as shown in Figure 9... As shown, after the controller 601 learns that the program in the computing processing component is in a pending state, the controller 601 can set the value in the first storage unit 611 to a first value; as shown in Figure 9. As shown, the controller 601 can send a command to the first memory 602 to copy the input data based on the value in the first storage component 611 as a first value, so as to refresh the input data in the first storage area 606; as shown in Figure 9. As shown in Figure 9, after the input data in the first storage area 606 is refreshed, the controller 601 sets the value in the first storage area to the second value; As shown, after the host 605 sends the command to end the copying of input data, the controller 601 sets the value in the second storage unit 612 to the fourth value; as shown in Figure 9. As shown in Figure 9, after the computing processing component 603 finishes processing the last batch of input data in the first storage area 606, the computing processing component 603 informs the controller 601 that the program is in a pending state; As shown, the controller 601 sends a message indicating confirmation that the value in the second storage unit 612 is the fourth value to the computing processing unit 603; as shown in Figure 9. As shown, the calculation processing component 603 writes the result (output data) obtained after program execution into the first memory 602 based on the value in the second storage component 612 as the fourth value.

[0108] In some embodiments, the first memory 602 includes a plurality of storage regions configured for input data during program execution; during the execution of a program on input data in one of the plurality of storage regions by the computing processing component 603, the controller 601 is configured to: perform a refresh operation on the input data in the storage region where the input data stored in the plurality of storage regions has been processed by the program.

[0109] In this embodiment, a first storage area group can be configured for input data during program execution. This first storage area group includes multiple first storage areas 606. When the computing processing component 603 executes a program on input data in one of the first storage areas 606, it can refresh the input data in other first storage areas 606 that have already been processed by the program. In this embodiment, based on the configuration of multiple first storage areas 606, a ping-pong strategy is used to refresh the input data in another first storage area 606 during program execution, further reducing the time the program spends in a pending state and thus improving program execution efficiency. In some embodiments, the input data in the multiple first storage areas 606 corresponding to the program may not be processed serially.

[0110] In some specific examples, the controller is configured to configure a corresponding first storage component 611 for each first storage region in the first storage region group.

[0111] In some embodiments, as shown in FIG10, the computing storage system 600 includes a non-volatile namespace 610, a computing namespace 608, and a subsystem local storage namespace 609; the non-volatile namespace 610 includes a second memory 604, the computing namespace 608 includes a computing processing component 603, and the subsystem local storage namespace 609 includes a first memory 602.

[0112] In some embodiments, the computing storage system 600 supports the simultaneous execution of multiple programs. The first memory 602 includes corresponding storage areas configured for the input data during the execution of each of the multiple programs. The controller 601 is configured to: configure corresponding storage components for the storage areas corresponding to each of the multiple programs, and configure corresponding storage components for each of the multiple programs.

[0113] In the solution provided by this embodiment, when multiple programs are executed simultaneously, one or more first storage areas 606 are configured for the input data during the execution of each program, and each first storage area 606 corresponding to each program is configured with a corresponding first storage component 611 (e.g., a register), and each program is configured with a corresponding second storage component 612, so that when each program is executed, the input data during the execution of the program can be refreshed to the corresponding first storage area 606 in batches.

[0114] The solution provided in this disclosure is also applicable to output data during program execution. The process of sequentially refreshing output data in batches during program execution is similar to the process of sequentially refreshing output data in batches during program execution; the following description uses output data during program execution as an example.

[0115] In some embodiments, as shown in Figures 6a and 6b, the computing storage system 600 further includes a second memory 604 coupled to a controller 601; the controller 601 includes a third storage component 613 and a fourth storage component 614; the value in the third storage component 613 is configured to characterize whether output data currently refreshed to the corresponding storage area needs to be stored in the second memory 604; the value in the fourth storage component 614 is configured to characterize whether there is output data during program execution to be stored in the second memory 604.

[0116] The third storage component 613 and the fourth storage component 614 here can be registers or a region of memory in the controller 601. The third storage component 613 can be used to store whether the output data currently refreshed to the second storage region 607 needs to be stored in the second memory 604. For example, a value of the fifth value in the third storage component 613 indicates that the output data currently refreshed to the second storage region 607 has not yet been stored in the second memory 604, and therefore needs to be stored in the second memory 604. A value of the sixth value in the third storage component 613 indicates that the output data currently refreshed to the second storage region 607 has been stored in the second memory 604, and therefore does not need to be stored in the second memory 604. The fourth storage component 614 can be used to store information indicating whether output data during program execution exists and needs to be stored in the second memory 604. For example, a seventh value in the fourth storage component 614 indicates that output data during program execution also exists and needs to be stored in the second memory 604. For example, an eighth value in the fourth storage component 614 indicates that all output data during program execution needs to be stored in the second memory 604 has been stored in the second memory 604. For example, the fifth value can be either "1" or "0", and the sixth value can be either "1" or "0". For example, the seventh value can be either "1" or "0", and the eighth value can be either "1" or "0".

[0117] In this embodiment, the controller 601 provides a third storage component 613 associated with the second storage area 607. The value in the third storage component 613 reflects whether the output data obtained after the program processes the input data in the first storage area 606 has been refreshed to the second storage area 607, that is, whether the output data in the second storage area 607 needs to be stored in the second memory 604. When the output data obtained after the program processes the input data in the first storage area 606 has been refreshed to the second storage area 607, the output data in the second storage area 607 needs to be stored in the second memory 604. When the program is still processing the input data in the first storage area 606, or when the output data obtained after the program processes the input data in the first storage area 606 has not yet been refreshed to the second storage area 607, but the output data in the second storage area 607 has already been stored in the second memory 604, therefore, it is not necessary to store the output data in the second storage area 607 in the second memory 604 at this time. Furthermore, in this embodiment of the present disclosure, the controller 601 provides a fourth storage component 614 associated with the program, and the value in the fourth storage component 614 reflects whether all output data during the current program execution has been stored in the second memory 604.

[0118] In some embodiments, the controller 601 is configured to: receive a first command; and in response to the first command, configure a corresponding storage area for the output data during the execution of a program by the computing processing component 603, and configure a corresponding storage component for the configured storage area.

[0119] As shown in Figure 11①, the controller 601 receives a first command sent by the host 605. This first command may be a command to create a memory range set. The first command carries an identifier of the memory range (MRID, Memory Range Identity Document) and information cells indicating that a third storage component 613 needs to be allocated to the second storage area 607 corresponding to the memory range in the memory range set, and a fourth storage component 614 needs to be allocated to the program to be executed. As shown in Figure 11②, the controller 601 may send a message indicating that the creation of the memory range set is successful to the host 605. This message may carry the address of the third storage component 613 and the address of the fourth storage component 614.

[0120] In some specific examples, controller 601 is configured to initialize the value of third storage unit 613 to a sixth value and the value of fourth storage unit 614 to a seventh value.

[0121] In some embodiments, the computing processing component 603 is configured to: load a program to be executed; and read input data refreshed to the first storage area 606.

[0122] In some embodiments, the computing processing component 603 is configured to: load a program to be executed; and refresh the output data obtained after the program processes the input data to the corresponding storage area.

[0123] The following section, in conjunction with Figure 11, will further explain how to sequentially refresh the output data during program execution to the second storage area 607 in batches, and further explain how to sequentially store the output data sequentially refreshed to the second storage area 607 into the second memory 604.

[0124] In some embodiments, the controller 601 is configured to: receive an activation command; activate a program in response to the activation command; receive a second command; the second command carries address information in the second memory 604 of the first batch of input data that needs to be refreshed to the corresponding storage area; in response to the second command, refresh the first batch of input data to the corresponding storage area; and based on the first batch of output data that needs to be stored in the second memory 604 being refreshed to the corresponding storage area, set the value in the third storage component 613 to a fifth value.

[0125] As shown in Figure 11, ③, the controller 601 receives an activation command sent by the host 605. The controller 601 can activate the program to be executed in the computing processing component 603 in response to the activation command. As shown in Figure 11, ⑤, the controller 601 receives a second command sent by the host 605. This second command instructs the first batch of input data that needs to be refreshed from the second memory 604 to the first memory 602's first storage area 606 to be refreshed to the first storage area 606. This second command carries the address information of the first batch of input data that needs to be refreshed to the first storage area 606 in the second memory 604. As shown in Figure 11, ⑥, after the first batch of input data that needs to be refreshed from the second memory 604 to the first memory 602's first storage area 606 is refreshed... After the data is transferred to the first storage area 606, the controller 601 can send a message to the host 605 confirming the successful transfer of the first batch of input data that needs to be transferred from the second memory 604 to the first storage area 606. As shown in Figure 11, ⑦, the controller 601 receives the program execution command sent by the host 605, which instructs the execution of the program in the computing processing component. As shown in Figure 11, ⑧, the computing processing component 603 reads the input data stored in the first storage area 606 of the current first memory 602. As shown in Figure 11, ⑩, the computing processing component 603 executes the program, generates the first batch of output data, and automatically refreshes the generated first batch of output data to the second storage area 607. As shown in Figure 11, the computing processing component 603 refreshes the first batch of output data to the second storage area 607 and sends a successful message back to the controller 601; As shown, the controller 601 sets the value in the third storage unit 613 to the fifth value; as shown in Figure 11. As shown, controller 601 confirms that the value in the fourth storage unit 614 is the seventh value.

[0126] In some embodiments, the controller 601 is configured to: receive a third command based on the value in the third storage component 613 being set to a fifth value; the third command carries address information of the first batch of output data to be stored in the second memory 604; and, in response to the third command, store the first batch of output data to be stored in the second memory 604 in the second memory 604.

[0127] As shown in Figure 11 As shown, the controller 601 receives a command from the host 605 to retrieve the value of the third storage component 613. This command is periodically sent by the host 605 to the controller 601. (See Figure 11.) As shown, in response to a command sent by the host 605 to retrieve the value of the third storage component 613, the controller 601 informs the host 605 of the value of the third storage component 613; as shown in Figure 11. As shown, when the value in the third storage unit 613 is the fifth value, the controller 601 receives a third command sent by the host 605. This third command instructs the first batch of output data refreshed to the second storage area 607 to be stored in the second memory 604. The third command carries the address information of the first batch of output data to be stored in the second memory 604. In response to the third command, the controller 601 stores the first batch of output data to be stored in the second memory 604 in the second memory 604; as shown in Figure 11. As shown, controller 601 can send a message to host 605 confirming the successful storage of the first batch of output data to be stored in second memory 604. (See Figure 11.) As shown, after the controller 601 stores the first batch of output data that needs to be stored in the second memory 604 in the second memory 604, the controller 601 can set the value in the third storage unit 613 to the sixth value.

[0128] In some embodiments, the controller 601 is configured to: receive a fifth command based on the value in the third storage unit 613 being a fifth value; the fifth command carries address information of the Nth batch of output data to be stored in the second memory 604; in response to the fifth command, store the Nth batch of output data in the second memory 604; N is an integer greater than 1; based on the fact that the Nth batch of output data has been stored in the second memory 604, and there is still output data during program execution to be stored in the second memory 604, set the value in the third storage unit 613 to a sixth value; or, based on the fact that the Nth batch of output data has been stored in the second memory 604, and all output data during program execution has been stored in the second memory 604, set the value in the fourth storage unit 614 to an eighth value.

[0129] As shown in Figure 11 To Figure 11 As shown, the computing processing component 603 processes the input data refreshed to the first storage area 606 in the Nth batch to obtain the Nth batch of output data, and automatically refreshes the Nth batch of output data to the second storage area 607; the computing processing component 603 sends a message to the controller 601 that the Nth batch of output data has been successfully refreshed to the second storage area 607; the controller 601 sets the value in the third storage component 613 to the fifth value; the controller 601 confirms that the value in the fourth storage component 614 is the seventh value; based on the value in the third storage component 613 being the fifth value, the controller 601 receives the fifth command sent by the host 605, which carries the address information of the Nth batch of output data that needs to be stored in the second memory 604; in response to the fifth command, the controller 601 stores the Nth batch of output data in the second memory 604.

[0130] In some specific examples, as shown in Figure 11 To Figure 11 As shown, controller 601 sets the value in third storage unit 613 to the sixth value based on the fact that the Nth batch of output data has been stored in second memory 604, and there is still output data during program execution to be stored in second memory 604; or, controller 601 sets the value in fourth storage unit 614 to the eighth value based on the fact that the Nth batch of output data has been stored in second memory 604, and all output data during program execution has been stored in second memory 604.

[0131] In some embodiments, the controller 601 is configured to: receive a sixth command; the sixth command carries address information in the second memory 604 allocated for output data that needs to be stored in the second memory 604 during program execution; in response to the sixth command, sequentially store the output data of the program execution process refreshed to the corresponding storage area into the second memory 604 in batches, and after each refresh of the output data of the program execution process in the corresponding storage area into the second memory 604, update the address information of the remaining output data that needs to be stored in the second memory 604 during program execution.

[0132] The controller 601 receives a sixth command sent by the host 605. This sixth command instructs the storage of output data that needs to be stored in the second memory 604. The sixth command carries address information in the second memory 604 allocated to the output data that needs to be stored in the second memory 604 during program execution. In other words, the sixth command carries address information in the second memory 604 allocated to all output data that needs to be stored in the second memory 604 during program execution. This address information includes the starting address and data length of all output data that needs to be stored in the second memory 604 within the second storage area 607. The instruction to store the output data that needs to be stored in the second memory 604 is performed only after the computing processing component 603 processes the input data to obtain the corresponding output data and refreshes the output data to the second storage area 607. After each storage of output data from the second storage area 607 into the second memory 604, the address information of the remaining output data that needs to be stored in the second memory 604 during program execution is updated. After the input data of the first batch of program execution is refreshed to the first storage area 606 in the first memory 602, the process is completed.

[0133] In the above embodiment, the host 605 pre-issues the address information of the corresponding second memory 604 for all output data that needs to be stored in the first memory 602 during program execution, and instructs the controller 601 to store the output data currently refreshed to the second memory 607 into the second memory 604 when it detects that the corresponding output data obtained by the program processing the input data in the current first memory area 606 has been refreshed to the second memory area 607. The controller 601 can inform the program whether the corresponding output data obtained by the program processing the input data in the current first memory area 606 has been refreshed to the second memory area 607 through the computing processing component 603. Once the controller 601 is informed that the corresponding output data obtained by the program processing the input data in the current first memory area 606 has been refreshed to the second memory area 607, the controller 601 can immediately issue a command to store the output data currently refreshed to the second memory area 607 into the second memory 604, thereby reducing the waiting time after the corresponding output data obtained by the program processing the input data in the current first memory area 606 has been refreshed to the second memory area 607.

[0134] In some embodiments, the first memory 602 includes a plurality of storage areas configured for output data during program execution; the controller 601 is configured to: during the process of refreshing the output data during program execution to one of the plurality of storage areas, store the output data stored in the plurality of storage areas that has not yet been stored in the storage area of ​​the second memory 604 into the second memory 604.

[0135] In this embodiment of the disclosure, a second storage area group can be configured for the output data during program execution. The second storage area group includes multiple second storage areas 607. During the process of the computing processing component 603 refreshing the output data during program execution to one of the multiple second storage areas 607, the output data stored in the second storage areas 607 other than the first second storage area 607 can be stored in the second memory 604. In this embodiment of the disclosure, based on the configuration of multiple second storage areas 607, a ping-pong strategy is adopted to store the output data in the other second storage areas 607 into the second memory 604 when refreshing one second storage area 607, thereby improving program execution efficiency.

[0136] In some specific examples, the controller is configured to configure a corresponding third storage component 613 for each second storage region in the second storage region group.

[0137] In some embodiments, the computing storage system 600 supports the simultaneous execution of multiple programs. The first memory 602 includes corresponding storage areas configured for the output data of each program during execution. The controller 601 is configured to configure corresponding storage components for the storage areas corresponding to each program and to configure corresponding storage components for each program.

[0138] In the solution provided by this embodiment, when multiple programs are executed simultaneously, a corresponding second storage area 607 is configured for the output data during the execution of each program, and a corresponding third storage component 613 is configured for the second storage area 607 corresponding to each program, and a corresponding fourth storage component 614 is configured for each program. This enables each program to refresh the output data during its execution process to the corresponding second storage area 607 in batches during its execution, and further enables each program to store the output data during its execution process from the second storage area 607 to the second memory 604 in batches during its execution.

[0139] Based on the above-described computing storage system, this disclosure also provides an electronic system, as shown in FIG12. The electronic system includes a host 605 and a computing storage system 600 coupled to the host 605. The computing storage system 600 includes a controller 601, a first memory 602 coupled to the controller 601, and a computing processing component 603 for executing a program. The host 605 is configured to: send a first command; the controller 601 is configured to: receive the first command; configure corresponding storage areas for input data / output data during the execution of the program by the computing processing component 603 in response to the first command; and sequentially refresh the input data / output data during the program execution process to the corresponding storage areas in batches; the size of the input data / output data during the program execution process is greater than the capacity of the corresponding storage area.

[0140] As shown in Figure 12, the first memory 602 includes a first storage area 606 configured for input data during the execution of a program by the computing processing component, and a second storage area 607 configured for output data during the execution of a program by the computing processing component.

[0141] In some embodiments, the computing storage system further includes a second memory coupled to a controller; the controller includes a first storage component and a second storage component; a value in the first storage component is configured to characterize whether input data in the current corresponding storage area needs to be refreshed; a value in the second storage component is configured to characterize whether there is input data in the program execution process to be refreshed to the corresponding storage area; or, the controller includes a third storage component and a fourth storage component; a value in the third storage component is configured to characterize whether output data currently refreshed to the corresponding storage area needs to be stored in the second memory; a value in the fourth storage component is configured to characterize whether there is output data in the program execution process to be stored in the second memory.

[0142] In some embodiments, the host is configured to: send an activation command; send a second command; the second command carrying address information in the second memory of the first batch of input data to be refreshed to the corresponding storage area; the controller is configured to: receive the activation command; activate the program in response to the activation command; receive the second command; refresh the first batch of input data to the corresponding storage area in response to the second command; set the value in the first storage component to a first value based on the fact that the first batch of input data refreshed to the corresponding storage area has been processed by the program; or, the host is configured to: send a third command; the third command carrying address information in the second memory of the first batch of output data to be stored; the controller is configured to: refresh the first batch of output data to be stored to the second memory to the corresponding storage area, set the value in the third storage component to a fifth value; receive the third command based on the value in the third storage component being set to the fifth value; and store the first batch of output data to be stored to the second memory in the second memory in response to the third command.

[0143] In some embodiments, the host is configured to: send a command to retrieve the value of a first storage component; send a fourth command based on the value of the first storage component as a first value; the fourth command carries address information in the second memory of the Nth batch of input data that needs to be refreshed to the corresponding storage area; N is an integer greater than 1; send a seventh command; the seventh command carries information that the Nth batch of input data that needs to be refreshed to the corresponding storage area has been refreshed to the corresponding storage area, and information on whether there is still input data in the program execution process that needs to be refreshed to the corresponding storage area; the controller is configured to: receive the command to retrieve the value of the first storage component; send the value of the first storage component to the host in response to the command to retrieve the value of the first storage component; receive the fourth command, and refresh the Nth batch of input data to the corresponding storage area in response to the fourth command; receive the seventh command; and set the value in the first storage component to a second value in response to the information carried in the seventh command that there is still input data in the program execution process that needs to be refreshed to the corresponding storage area; or, set the value in the second storage component to a fourth value in response to the information carried in the seventh command that all input data in the program execution process has been refreshed to the corresponding storage area.

[0144] In some embodiments, the host is configured to: send a command to retrieve the value of the third storage component; send a fifth command based on the value in the third storage component being a fifth value; the fifth command carries address information for the Nth batch of output data to be stored in the second memory, where N is an integer greater than 1; send an eighth command; the eighth command carries information that the Nth batch of output data has been stored in the second memory and whether there is still output data during program execution to be stored in the second memory; the controller is configured to: receive the command to retrieve the value of the third storage component; send the value of the third storage component to the host in response to the command to retrieve the value of the third storage component; receive the fifth command; store the Nth batch of output data in the second memory in response to the fifth command; receive the eighth command; set the value in the third storage component to a sixth value in response to the information carried in the eighth command indicating that there is still output data during program execution to be stored in the second memory; or, set the value in the fourth storage component to an eighth value in response to the information carried in the eighth command indicating that all output data during program execution has been stored in the second memory.

[0145] In some embodiments, the host is configured to: send a sixth command; the sixth command carries address information of the corresponding second memory allocated for input data that needs to be refreshed to the corresponding storage area during program execution; or, the sixth command carries address information of the corresponding second memory allocated for output data that needs to be stored in the second memory during program execution; the controller is configured to: receive the sixth command; in response to the sixth command, refresh the input data of the program execution process in the second memory to the corresponding storage area in batches, and after each refresh of the input data of the program execution process in the second memory to the corresponding storage area, update the address information of the remaining input data that needs to be refreshed to the corresponding storage area during program execution in the second memory; or, in response to the sixth command, store the output data of the program execution process refreshed to the corresponding storage area in batches to the second memory, and after each refresh of the output data of the program execution process in the corresponding storage area to the second memory, update the address information of the remaining output data that needs to be stored in the second memory during program execution.

[0146] In some embodiments, the host is configured to: send a command to configure multiple storage areas for input data / output data during program execution; the controller is configured to: configure multiple storage areas for input data during program execution; the computing processing component, during the execution of a program on input data in one of the multiple storage areas, refreshes the input data stored in the multiple storage areas that has been processed by the program in the storage areas; or, the controller is configured to: configure multiple storage areas for output data during program execution, and during the process of refreshing the output data during program execution to one of the multiple storage areas, store the output data stored in the multiple storage areas that has not yet been stored in the second memory in the second memory.

[0147] Other details regarding the aforementioned electronic system have been described in detail in the foregoing embodiments concerning the computing and storage system, and will not be repeated here for the sake of brevity.

[0148] Based on the above-described computing storage system, this disclosure also provides an operation method for the computing storage system, as shown in FIG13. The operation method includes the following steps: S100, configuring corresponding storage areas for input data / output data during the execution of a program by a computing processing component; S200, sequentially refreshing the input data / output data during program execution to the corresponding storage areas in batches; the size of the input data / output data during program execution is greater than the capacity of the corresponding storage area.

[0149] In some embodiments, a first storage component is configured for the corresponding storage area configured for input data during program execution, and a second storage component is configured for the program; the value in the first storage component is configured to indicate whether the input data in the current corresponding storage area needs to be refreshed; the value in the second storage component is configured to indicate whether there is input data during program execution that needs to be refreshed to the corresponding storage area; or, a third storage component is configured for the corresponding storage area configured for output data during program execution, and a fourth storage component is configured for the program; the value in the third storage component is configured to indicate whether the output data currently refreshed to the corresponding storage area needs to be stored in the second memory; the value in the fourth storage component is configured to indicate whether there is output data during program execution that needs to be stored in the second memory.

[0150] In some embodiments, the operation method further includes: receiving a first command; and in response to the first command, configuring a corresponding storage area for input / output data during the execution of a program by a computing processing component, and configuring a corresponding storage component for the configured storage area.

[0151] In some embodiments, the operation method further includes: receiving an activation command; activating a program in response to the activation command; receiving a second command; the second command carrying address information in a second memory of the first batch of input data to be refreshed to the corresponding storage area; in response to the second command, refreshing the first batch of input data to the corresponding storage area; setting the value in a first storage component to a first value based on the fact that the first batch of input data refreshed to the corresponding storage area has been processed by the program; or, setting the value in a third storage component to a fifth value based on the fact that the first batch of output data to be stored in the second memory has been refreshed to the corresponding storage area; receiving a third command based on the fact that the value in the third storage component is set to the fifth value; the third command carrying address information of the first batch of output data to be stored in the second memory to be stored in the second memory; and storing the first batch of output data to be stored in the second memory in response to the third command in the second memory.

[0152] In some embodiments, the operation method further includes: receiving a fourth command based on a first value in the first storage component; the fourth command carrying address information of the Nth batch of input data to be refreshed to the corresponding storage area in the second memory; responding to the fourth command, refreshing the Nth batch of input data to the corresponding storage area; N is an integer greater than 1; based on the fact that the Nth batch of input data has been refreshed to the corresponding storage area, and there is still input data in the program execution process to be refreshed to the corresponding storage area, setting the value in the first storage component to a second value; or, based on the fact that the Nth batch of input data has been refreshed to the corresponding storage area, and all input data in the program execution process has been refreshed to the corresponding storage area, setting the value in the second storage component to a fourth value.

[0153] In some embodiments, the operation method further includes: receiving a fifth command based on a fifth value in the third storage component; the fifth command carrying address information of the Nth batch of output data to be stored in the second memory; in response to the fifth command, storing the Nth batch of output data in the second memory; N being an integer greater than 1; setting the value in the third storage component to a sixth value based on the fact that the Nth batch of output data has been stored in the second memory and there is still output data during program execution to be stored in the second memory; or, setting the value in the fourth storage component to an eighth value based on the fact that the Nth batch of output data has been stored in the second memory and all output data during program execution has been stored in the second memory.

[0154] In some embodiments, the operation method further includes: when an interruption occurs during program execution, based on the value in the second storage component being a fourth value indicating that all input data during program execution has been refreshed to the corresponding storage area, ending the program, and refreshing the output data to the corresponding storage area.

[0155] In some embodiments, the operation method further includes: receiving a sixth command; the sixth command carrying address information of the corresponding second memory allocated for input data that needs to be refreshed to the corresponding storage area during program execution, or the sixth command carrying address information of the corresponding second memory allocated for output data that needs to be stored in the second memory during program execution; in response to the sixth command, refreshing the input data of the program execution process in the second memory to the corresponding storage area in batches, and updating the address information of the remaining input data that needs to be refreshed to the corresponding storage area during program execution in the second memory after each refresh of the input data of the program execution process in the second memory; or, in response to the sixth command, storing the output data of the program execution process refreshed to the corresponding storage area in the second memory in batches, and updating the address information of the remaining output data that needs to be stored in the second memory during program execution after each refresh of the output data of the program execution process in the corresponding storage area to the second memory.

[0156] In some embodiments, the first memory includes a plurality of storage areas configured for input data during program execution; during the execution of a program on input data in one of the plurality of storage areas by the computing processing component, the operation method further includes: refreshing the input data in the storage area where the input data stored in the plurality of storage areas has been processed by the program; or, the first memory includes a plurality of storage areas configured for output data during program execution; the operation method further includes: during the process of refreshing the output data during program execution to one of the plurality of storage areas, storing the output data stored in the storage area of ​​the plurality of storage areas that has not yet been stored in the second memory into the second memory.

[0157] The operation method of the computing storage system mentioned in the above embodiments has been described in detail in the foregoing embodiments concerning the computing storage system, and will not be repeated here for the sake of brevity.

[0158] Based on the above-described operation method of the computing storage system, this disclosure also provides a computer-readable storage medium storing a computer program, which, when executed by a processor, performs the operation method of the computing storage system of any of the above embodiments.

[0159] Here, implementing all or part of the operational methods of the computing storage system in the above embodiments can be accomplished by a computer program instructing related hardware. The program can be stored in a computer-readable storage medium, and when executed, it can include the processes of the embodiments of the above methods. The storage medium can be a magnetic random access memory (FRAM), a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), a flash memory, a magnetic surface memory, an optical disc or a compact disc read-only memory (CD-ROM), etc.; the storage medium can also include combinations of the above types of memory.

[0160] The features disclosed in the several device embodiments provided in this disclosure can be arbitrarily combined without conflict to obtain new device embodiments.

[0161] The methods disclosed in the several method embodiments provided in this disclosure can be arbitrarily combined without conflict to obtain new method embodiments.

[0162] The above description is merely a specific embodiment of this disclosure, but the scope of protection of this disclosure is not limited thereto. Any changes or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this disclosure should be included within the scope of protection of this disclosure.

Claims

1. A computing storage system, the computing storage system comprising a controller, a first memory coupled to the controller, and a computing processing component for executing a program; the first memory including corresponding storage areas configured for input data / output data during the execution of the program by the computing processing component; the controller being configured to: The input / output data during program execution is refreshed to the corresponding storage area in batches; the size of the input / output data during program execution is greater than the capacity of the corresponding storage area.

2. The computing storage system according to claim 1, wherein, The computing storage system further includes a second memory coupled to the controller; The controller includes a first storage component and a second storage component; the value in the first storage component is configured to indicate whether the input data in the corresponding storage area needs to be refreshed; the value in the second storage component is configured to indicate whether there is input data in the program execution process that needs to be refreshed to the corresponding storage area; or, The controller includes a third storage component and a fourth storage component; the value in the third storage component is configured to indicate whether the output data currently refreshed to the corresponding storage area needs to be stored in the second memory; The value in the fourth storage component is configured to indicate whether there is output data from the program execution process to be stored in the second memory.

3. The computing storage system according to claim 2, wherein, The controller is configured to: Receive the first command; In response to the first command, a corresponding storage area is configured for the input / output data during the execution of the program by the computing processing component, and a corresponding storage component is configured for the configured storage area.

4. The computing storage system according to claim 3, wherein, The controller is configured to: Receive activation command; The program is activated in response to the activation command; Receive a second command; the second command carries the address information of the first batch of input data that needs to be refreshed to the corresponding storage area in the second memory. In response to the second command, the first batch of input data is refreshed to the corresponding storage area; Based on the fact that the first batch of input data refreshed to the corresponding storage area has been processed by the program, the value in the first storage component is set to the first value; or, Based on the first batch of output data that needs to be stored in the second memory, refresh the corresponding storage area and set the value in the third storage component to the fifth value; Based on the value in the third storage component being set to the fifth value, a third command is received; the third command carries the address information of the first batch of output data that needs to be stored in the second memory. In response to the third command, the first batch of output data that needs to be stored in the second memory is stored in the second memory.

5. The computing storage system according to claim 4, wherein, The controller is configured to: Based on the value in the first storage component, a fourth command is received; the fourth command carries the address information of the Nth batch of input data that needs to be refreshed to the corresponding storage area in the second memory. In response to the fourth command, the Nth batch of input data is refreshed to the corresponding storage area; where N is an integer greater than 1. Based on the fact that the Nth batch of input data has been refreshed to the corresponding storage area, and there is still input data in the program execution process that needs to be refreshed to the corresponding storage area, the value in the first storage component is set to the second value; or, based on the fact that the Nth batch of input data has been refreshed to the corresponding storage area, and all input data in the program execution process has been refreshed to the corresponding storage area, the value in the second storage component is set to the fourth value.

6. The computing storage system according to claim 4, wherein, The controller is configured to: Based on the value in the third storage component, the fifth value is received; the fifth command carries the address information of the Nth batch of output data that needs to be stored in the second memory. In response to the fifth command, the Nth batch of output data is stored in the second memory; N is an integer greater than 1; Based on the fact that the Nth batch of output data has been stored in the second memory, and there is still output data from the program execution process to be stored in the second memory, the value in the third storage component is set to the sixth value; or, based on the fact that the Nth batch of output data has been stored in the second memory, and all output data from the program execution process has been stored in the second memory, the value in the fourth storage component is set to the eighth value.

7. The computing storage system according to claim 2, wherein, The controller is configured to: When the program is interrupted during execution, the program ends and the output data is refreshed to the corresponding storage area based on the fourth value in the second storage component, which indicates that all input data during the program execution has been refreshed to the corresponding storage area.

8. The computing storage system according to claim 2, wherein, The controller is configured to: Receive a sixth command; the sixth command carries address information corresponding to the second memory allocated for input data that needs to be refreshed to the corresponding storage area during the execution of the program, or the sixth command carries address information corresponding to the second memory allocated for output data that needs to be stored in the second memory during the execution of the program; In response to the sixth command, the input data during the program execution process in the second memory is refreshed to the corresponding storage area in batches. After each refresh of the input data during the program execution process in the second memory to the corresponding storage area, the address information of the remaining input data during the program execution process that needs to be refreshed to the corresponding storage area in the second memory is updated. Alternatively, in response to the sixth command, the output data during the program execution process that has been refreshed to the corresponding storage area in batches is stored to the second memory. After each refresh of the output data during the program execution process in the corresponding storage area to the second memory, the address information of the remaining output data during the program execution process that needs to be stored to the second memory is updated.

9. The computing storage system according to claim 8, wherein, The first memory includes multiple storage areas configured for input data during program execution; during the execution of the program on input data in one of the multiple storage areas by the computing processing component, the controller is configured to: refresh the input data in the storage area where the input data stored in the multiple storage areas has been processed by the program; or, The first memory includes multiple storage areas configured for output data during program execution; the controller is configured to: during the process of refreshing the output data during program execution to one of the multiple storage areas, store the output data stored in the multiple storage areas that has not yet been stored in the second memory into the second memory.

10. The computing storage system according to claim 1, wherein, The computational processing component is configured as follows: Load the program to be executed; Read the input data refreshed to the corresponding storage area, or refresh the output data obtained after the program processes the input data to the corresponding storage area.

11. The computing storage system according to claim 2, wherein, The computing storage system includes a non-volatile namespace, a computing namespace, and a subsystem local storage namespace; the non-volatile namespace includes the second memory, the computing namespace includes the computing processing component, and the subsystem local storage namespace includes the first memory.

12. The computing storage system according to claim 1, wherein, The computing storage system supports the simultaneous execution of multiple programs. The first memory includes corresponding storage areas configured for the input / output data during the execution of each of the multiple programs. The controller is configured to: Configure a corresponding storage component for the storage area corresponding to each of the multiple programs, and configure a corresponding storage component for each of the multiple programs.

13. An electronic system comprising a host computer and a computing storage system coupled to the host computer, the computing storage system comprising a controller, a first memory coupled to the controller, and a computing processing component for executing a program; wherein, The host is configured to send a first command; The controller is configured to: Receive the first command; In response to the first command, configure corresponding storage areas for the input / output data during the execution of the program by the computing processing component; The input / output data during the program execution process is refreshed to the corresponding storage areas in batches. The size of the input / output data during program execution is greater than the capacity of the corresponding storage area.

14. The electronic system according to claim 13, wherein, The computing storage system further includes a second memory coupled to the controller; The controller includes a first storage component and a second storage component; the value in the first storage component is configured to indicate whether the input data in the corresponding storage area needs to be refreshed; the value in the second storage component is configured to indicate whether there is input data in the program execution process that needs to be refreshed to the corresponding storage area; or, The controller includes a third storage component and a fourth storage component; the value in the third storage component is configured to indicate whether the output data currently refreshed to the corresponding storage area needs to be stored in the second memory; The value in the fourth storage component is configured to indicate whether there is output data from the program execution process to be stored in the second memory.

15. The electronic system according to claim 14, wherein, The host is configured as follows: Send activation command; Send a second command; the second command carries the address information of the first batch of input data that needs to be refreshed to the corresponding storage area in the second memory. The controller is configured to: Receive the activation command; The program is activated in response to the activation command; Receive the second command; In response to the second command, the first batch of input data is refreshed to the corresponding storage area; Based on the fact that the first batch of input data refreshed to the corresponding storage area has been processed by the program, the value in the first storage component is set to the first value; or, The host is configured as follows: Send a third command; the third command carries the address information of the first batch of output data that needs to be stored in the second memory. The controller is configured to: Based on the first batch of output data that needs to be stored in the second memory, refresh the corresponding storage area and set the value in the third storage component to the fifth value; The third command is received based on the value in the third storage component being set to the fifth value. In response to the third command, the first batch of output data that needs to be stored in the second memory is stored in the second memory.

16. The electronic system according to claim 15, wherein, The host is configured as follows: Send a command to retrieve the value of the first storage component; Based on the value of the first storage component, a fourth command is sent; the fourth command carries the address information of the Nth batch of input data that needs to be refreshed to the corresponding storage area in the second memory; N is an integer greater than 1. Send a seventh command; the seventh command carries information that the Nth batch of input data that needs to be refreshed to the corresponding storage area has been refreshed to the corresponding storage area, and information on whether there is still input data in the program execution process that needs to be refreshed to the corresponding storage area; The controller is configured to: Receive a command to retrieve the value of the first storage component; In response to a command to retrieve the value of the first storage component, the value of the first storage component is sent to the host; Receive the fourth command and, in response to the fourth command, refresh the Nth batch of input data to the corresponding storage area; Receive the seventh command; in response to the information carried in the seventh command that there is still input data in the program execution process that needs to be refreshed to the corresponding storage area, set the value in the first storage component to the second value; or, in response to the information carried in the seventh command that all input data in the program execution process has been refreshed to the corresponding storage area, set the value in the second storage component to the fourth value.

17. The electronic system according to claim 15, wherein, The host is configured as follows: Send a command to retrieve the value of the third storage component; Based on the value in the third storage component, the fifth command is sent; the fifth command carries the address information of the Nth batch of output data that needs to be stored in the second memory; where N is an integer greater than 1. Send the eighth command; the eighth command carries information about whether the Nth batch of output data has been stored in the second memory and whether there is still output data from the program execution process that needs to be stored in the second memory; The controller is configured to: Receive a command to retrieve the value of the third storage component; In response to a command to retrieve the value of the third storage component, the value of the third storage component is sent to the host; Receive the fifth command; In response to the fifth command, the Nth batch of output data is stored in the second memory; Receive the eighth command; In response to the information carried in the eighth command that there is still output data in the program execution process to be stored in the second memory, the value in the third storage component is set to the sixth value; or, in response to the information carried in the eighth command that all output data in the program execution process has been stored in the second memory, the value in the fourth storage component is set to the eighth value.

18. The electronic system according to claim 14, wherein, The host is configured as follows: Send a sixth command; the sixth command carries address information of the corresponding second memory allocated for input data that needs to be refreshed to the corresponding storage area during the execution of the program; or, the sixth command carries address information of the corresponding second memory allocated for output data that needs to be stored in the second memory during the execution of the program. The controller is configured to: Receive the sixth command; In response to the sixth command, the input data during the program execution process in the second memory is refreshed to the corresponding storage area in batches. After each refresh of the input data during the program execution process in the second memory to the corresponding storage area, the address information of the remaining input data during the program execution process that needs to be refreshed to the corresponding storage area in the second memory is updated. Alternatively, in response to the sixth command, the output data during the program execution process that has been refreshed to the corresponding storage area in batches is stored to the second memory. After each refresh of the output data during the program execution process in the corresponding storage area to the second memory, the address information of the remaining output data during the program execution process that needs to be stored to the second memory is updated.

19. The electronic system according to claim 18, wherein, The host is configured to send commands to configure multiple storage areas for input / output data during program execution; The controller is configured to: configure multiple storage areas for input data during program execution; and, during the execution of the program on input data in one of the multiple storage areas, the computing processing component refreshes the input data in the storage areas that have been processed by the program. or, The controller is configured to: configure multiple storage areas for the output data during the program execution process, and during the process of refreshing the output data during the program execution process to one of the multiple storage areas, store the output data stored in the multiple storage areas that has not yet been stored in the storage area of ​​the second memory into the second memory.

20. A method of operating a computing storage system, comprising: Configure appropriate storage areas for the input / output data during the execution of the program by the computing processing component; The input / output data during program execution is refreshed to the corresponding storage areas in batches. The size of the input / output data during program execution is greater than the capacity of the corresponding storage area.

21. The operating method according to claim 20, wherein, A first storage component is configured for the corresponding storage area of ​​the input data during program execution, and a second storage component is configured for the program; the value in the first storage component is configured to indicate whether the input data in the current corresponding storage area needs to be refreshed; the value in the second storage component is configured to indicate whether there is input data during program execution that needs to be refreshed to the corresponding storage area. or, A third storage component is configured for the corresponding storage area of ​​the output data during the execution of the program, and a fourth storage component is configured for the program; the value in the third storage component is configured to indicate whether the output data currently refreshed to the corresponding storage area needs to be stored in the second memory; The value in the fourth storage component is configured to indicate whether there is output data from the program execution process to be stored in the second memory.

22. The operating method according to claim 21, wherein, The operation method further includes: Receive the first command; In response to the first command, a corresponding storage area is configured for the input / output data during the execution of the program by the computing processing component, and a corresponding storage component is configured for the configured storage area.

23. The operating method according to claim 22, wherein, The operation method further includes: Receive activation command; The program is activated in response to the activation command; Receive a second command; the second command carries the address information of the first batch of input data that needs to be refreshed to the corresponding storage area in the second memory. In response to the second command, the first batch of input data is refreshed to the corresponding storage area; based on the fact that the first batch of input data refreshed to the corresponding storage area has been processed by the program, the value in the first storage component is set to the first value; or, Based on the first batch of output data that needs to be stored in the second memory, refresh the corresponding storage area and set the value in the third storage component to the fifth value; Based on the value in the third storage component being set to the fifth value, a third command is received; the third command carries the address information of the first batch of output data that needs to be stored in the second memory. In response to the third command, the first batch of output data that needs to be stored in the second memory is stored in the second memory.

24. The operating method according to claim 23, wherein, The operation method further includes: Based on the value in the first storage component, a fourth command is received; the fourth command carries the address information of the Nth batch of input data that needs to be refreshed to the corresponding storage area in the second memory. In response to the fourth command, the Nth batch of input data is refreshed to the corresponding storage area; where N is an integer greater than 1. Based on the fact that the Nth batch of input data has been refreshed to the corresponding storage area, and there is still input data in the program execution process that needs to be refreshed to the corresponding storage area, the value in the first storage component is set to the second value; or, based on the fact that the Nth batch of input data has been refreshed to the corresponding storage area, and all input data in the program execution process has been refreshed to the corresponding storage area, the value in the second storage component is set to the fourth value.

25. The operating method according to claim 23, wherein, The operation method further includes: Based on the value in the third storage component, the fifth value is received; the fifth command carries the address information of the Nth batch of output data that needs to be stored in the second memory. In response to the fifth command, the Nth batch of output data is stored in the second memory; where N is an integer greater than 1. Based on the fact that the Nth batch of output data has been stored in the second memory, and there is still output data from the program execution process to be stored in the second memory, the value in the third storage component is set to the sixth value; or, based on the fact that the Nth batch of output data has been stored in the second memory, and all output data from the program execution process has been stored in the second memory, the value in the fourth storage component is set to the eighth value.

26. The operating method according to claim 21, wherein, The operation method further includes: When the program is interrupted during execution, the program ends and the output data is refreshed to the corresponding storage area based on the fourth value in the second storage component, which indicates that all input data during the program execution has been refreshed to the corresponding storage area.

27. The operating method according to claim 21, wherein, The operation method further includes: Receive a sixth command; the sixth command carries address information corresponding to the second memory allocated for input data that needs to be refreshed to the corresponding storage area during the execution of the program, or the sixth command carries address information corresponding to the second memory allocated for output data that needs to be stored in the second memory during the execution of the program; In response to the sixth command, the input data during the program execution process in the second memory is refreshed to the corresponding storage area in batches. After each refresh of the input data during the program execution process in the second memory to the corresponding storage area, the address information of the remaining input data during the program execution process that needs to be refreshed to the corresponding storage area in the second memory is updated. Alternatively, in response to the sixth command, the output data during the program execution process that has been refreshed to the corresponding storage area in batches is stored to the second memory. After each refresh of the output data during the program execution process in the corresponding storage area to the second memory, the address information of the remaining output data during the program execution process that needs to be stored to the second memory is updated.

28. The operating method according to claim 27, wherein, The first memory includes multiple storage areas configured for input data during program execution; during the execution of the program on input data in one of the multiple storage areas by the computing processing component, the operation method further includes: refreshing the input data in the storage area where the input data stored in the multiple storage areas has been processed by the program; or, The first memory includes multiple storage areas configured for output data during program execution; the operation method further includes: during the process of refreshing the output data during program execution to one of the multiple storage areas, storing the output data stored in the multiple storage areas that has not yet been stored in the second memory into the second memory.

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