Group iii nitride-based epitaxial wafer for hemt power semiconductor and method for manufacturing the same

Abstract

Disclosed is a III-nitride-based epitaxial wafer for HEMT power semiconductor, comprising: a growth substrate; a nucleation region grown on the growth substrate; and a stress-relaxing AlN region with nanometer-scale size of gallium vacancies, indium vacancies or micro-scale cavities grown on the nucleation region.

Description

Technical Field

[0001] This invention relates to a group III nitride-based epitaxial wafer for HEMT power semiconductors and its manufacturing method. Specifically, it relates to a group III nitride-based epitaxial wafer for HEMT power semiconductors and its manufacturing method, which can suppress leakage current in the vertical direction and significantly improve breakdown voltage in GaN HEMT power semiconductor devices by introducing AlN regions with stress relief and low crystal defect, i.e., dislocation density. Background Technology

[0002] In the modern electronics industry, with increasingly fierce competition in energy efficiency, the development of new renewable energy sources, and the expansion of related infrastructure industries, people are paying more and more attention to the efficiency of power control systems.

[0003] In addition, the power systems needed to improve the efficiency and even stability of electric vehicles and related charging infrastructure, as well as power networks such as smart grids, are receiving attention.

[0004] With this changing trend in the modern electronics industry, there is increasing attention on power semiconductors of various structures, especially power semiconductors using HEMT (High Electron Mobility Transistor) that can be used for high-power and high-frequency signal processing.

[0005] Figure 1 This is a diagram illustrating a typical group III nitride epitaxial wafer used in HEMT power semiconductors.

[0006] Reference Figure 1 Existing group III nitride-based epitaxial wafers used for HEMT power semiconductors consist of a growth substrate (1100), a nucleation region (1200), a stress relieving region (1300), a buffer region (1400), a channel region (1500), and a barrier region (1600) in their growth sequence.

[0007] The growth substrate (1100) is typically made of Si or SiC substrate, and is made of a high-resistivity material.

[0008] The nucleation region (1200) suppresses the melt back etching phenomenon that has an adverse effect on the surface of the growth substrate due to the Si-Ga eutectic reaction, and at the same time provides a basis for forming a high-quality buffer region (1400), channel region (1500), and barrier region (1600).

[0009] In a HEMT power semiconductor having a horizontal current path and used under high voltage / high current conditions, by using aluminum nitride (AlN) having a wide energy bandgap with respect to gallium nitride (GaN) as the nucleation region (1200), a high-performance electrical insulating layer can be achieved.

[0010] The stress adjustment region (1300) is formed to compensate for the thermo-mechanical stress generated due to the formation of the buffer region (1400) and channel region (1500) formed on its upper side, and to reduce the dislocation density of crystal defects that have an adverse effect on quality.

[0011] In a group-III nitride-based epitaxial wafer, the buffer region (1400) and the channel region (1500) generally adopt a GaN thick film and a thin film structure, respectively. At this time, the stress adjustment region (1300) can suppress the warping or cracking of the epitaxial wafer caused by the above thermo-mechanical stress by using an Al(1-x)Ga(x)N (0 < x < 1) thin film layer.

[0012] The buffer region (1400) has a function of electrically forming a high-resistance layer to reduce the vertical leakage current, and carbon (C), iron (Fe), nickel (Ni), cobalt (Co), and rare-earth metals are used as dopants.

[0013] As described above, a high-density electron carrier of 2DEG (two-dimensional electron gas) is formed near the interface with the barrier region (1600) formed on the upper side of the channel region (1500).

[0014] The barrier region (1600) forms a hetero-junction with the lower GaN channel region. However, existing group-III nitride-based epitaxial wafers for HEMT power semiconductors have the following several structural problems due to the stress adjustment region (1300) and the buffer region (1400).

[0015] If carbon or iron is used as a dopant to achieve high resistance when forming the buffer region (1400), the crystal quality of the channel region grown on it will be degraded.

[0016] To solve this problem, it is difficult to find the optimal growth conditions for the buffer region using carbon and iron as dopants.

[0017] The buffer region (1400) must ensure a minimum thickness so that the lattice mismatch of the stress adjustment region (1300) does not extend to the channel region (1500), and therefore its thickness cannot be reduced excessively.

[0018] As a result, the thickness of the stress-adjusting region (1300) must also be grown to a thickness that is suitable for the thickness of the buffer region (1400) and the channel region (1500).

[0019] In this case, the high lattice mismatch density of the stress-adjusting region (1300) may create a fatal vertical leakage current path.

[0020] Furthermore, based on the existing group III nitride-based epitaxial wafer structure used for HEMT power semiconductors, there is a technical difficulty in growing a thick AlN film with excellent film quality below the channel region (1500).

[0021] For the nucleation region (1200), thin-film AlN materials with excellent film quality are usually used. AlN materials have a wide band gap and can perform ideal electrical insulation functions, but it is difficult to form thick films that exceed a certain thickness.

[0022] On the other hand, the stress-adjusting region (1300) and buffer region (1400) formed on the nucleation region (1200) can grow to a relatively thick thickness, but they have a variety of crystal defects.

[0023] Basically, power semiconductors must have high breakdown voltage.

[0024] To improve the breakdown voltage, it must be able to form a thick film as an electrical insulator.

[0025] In summary, the existing group III nitride-based epitaxial wafer structures used for HEMT power semiconductors have the following problems: AlN material, which can be used as an ideal electrical insulating film, is used as the nucleation region for thin films, but thick film growth is difficult; the buffer region (1400) and stress-adjusting region (1300), which are easy to grow thick films, have poor film quality; and the channel region (1500) has poor film quality in order to obtain high resistivity.

[0026] Therefore, there is a need to develop a new thin film or thick film structure that can replace the buffer region and the stress adjustment region, relieve stress through a Si or SiC substrate, and have a high-resistance characteristic that can electrically seal the channel region. Summary of the Invention

[0027] Technical Problem An object of the present invention is to provide a group-III nitride-based epitaxial wafer for HEMT power semiconductors and a method for manufacturing the same, which can improve the crystal quality of an epitaxy layer and prevent cracks.

[0028] Means for Solving the Problem A group-III nitride-based epitaxial wafer for HEMT power semiconductors according to any one of several aspects describing the present invention includes: a growth substrate; a nucleation region grown on the growth substrate; and a stress-relieving AlN region grown on the nucleation region and having gallium vacancies, indium vacancies at the nanoscale, or microscale voids.

[0029] The stress-relieving AlN region may have a structure in which the density of the gallium vacancies, indium vacancies at the nanoscale, or the microscale voids decreases along the growth direction.

[0030] The stress-relieving AlN region may be formed by performing a heat treatment process in a high temperature above the growth temperature and a reducing atmosphere containing hydrogen (H2) after growing Al(1-y)Ga(y)N (0 < y < 1) or Al(1-z)In(z)N (0 < z < 1).

[0031] The stress-relieving AlN region may be formed by repeatedly performing the growth of Al(1-y)Ga(y)N (0 < y < 1) or Al(1-z)In(z)N (0 < z < 1) and the heat treatment process.

[0032] The nanoscale gallium vacancies, indium vacancies or microscale voids in the stress-relieved AlN region can be formed by the decomposition and sublimation of the Ga or In components contained in the grown Al(1-y)Ga(y)N (0 < y < 1) or Al(1-z)In(z)N (0 < z < 1) through the heat treatment.

[0033] The stress-relieved AlN region can be configured to randomly remain gallium (Ga) or indium (In) in space.

[0034] It may include an active region grown on the stress-relieved AlN region.

[0035] The active region may include a channel region (GaN) forming a 2DEG (two-dimensional electron gas) and a barrier region (AlGaN, AlScN, AlInN) grown on the channel region.

[0036] It may have a buffer region, which is composed of gallium nitride (GaN) doped with carbon (C), iron (Fe), nickel (Ni), cobalt (Co) and rare-earth elements and is located between the stress-relieved AlN region and the active region.

[0037] The active region may have an AlN thin film, which is grown with a thickness less than 5 nm between the channel region and the barrier region.

[0038] According to a method for manufacturing a group-III nitride-based epitaxial wafer for a HEMT power semiconductor according to any one of several aspects describing the present invention, it includes: a step of growing a nucleation region on the growth substrate; and a step of growing Al(1-y)Ga(y)N (0 < y < 1) or Al(1-z)In(z)N (0 < z < 1) at a set growth temperature on the nucleation region and performing a heat treatment (annealing) process at a high temperature above the growth temperature and in a reducing atmosphere containing hydrogen (H2), thereby growing a stress-relieved AlN region having nanoscale gallium vacancies, indium vacancies or microscale voids.

[0039] The step of growing the stress-relieving AlN region can be repeated several times.

[0040] Invention Effects According to the present invention, the crystal quality of the active layer region of the HEMT power semiconductor can be improved by means of the newly introduced stress-adjustable AlN region.

[0041] Therefore, it can significantly improve the breakdown voltage of HEMT power semiconductors.

[0042] Furthermore, the AlN region for stress regulation has high resistivity, which can suppress leakage current in the vertical direction. Therefore, it is possible to reduce or eliminate the existing buffer region.

[0043] Furthermore, the stress-regulating AlN region can effectively alleviate the stress caused by lattice mismatch while achieving high-quality thick film growth. Attached Figure Description

[0044] Figure 1 This is a diagram showing existing group III nitride-based epitaxial wafers used for HEMT power semiconductors.

[0045] Figure 2 This is a diagram illustrating one embodiment of a group III nitride-based epitaxial wafer for HEMT power semiconductors according to the present invention.

[0046] Figures 3 to 6 It is shown Figure 2 A diagram illustrating the fabrication process of group III nitride-based epitaxial wafers used in HEMT power semiconductors.

[0047] Figure 7 This is a diagram illustrating another embodiment of a group III nitride-based epitaxial wafer for HEMT power semiconductors according to the present invention.

[0048] Figure 8 This is a diagram illustrating yet another embodiment of a group III nitride-based epitaxial wafer for HEMT power semiconductors according to the present invention. Detailed Implementation

[0049] Hereinafter, embodiments of the group III nitride-based epitaxial wafer for HEMT power semiconductors and the method for manufacturing the same, according to the present invention, will be described in detail with reference to the accompanying drawings.

[0050] The terminology used below is chosen for ease of explanation, and therefore should not be limited to its literal meaning in grasping the intrinsic technical concept of the present invention, but should be interpreted as meaning in accordance with the technical concept of the present invention.

[0051] Figure 2This is a diagram illustrating one embodiment of a group III nitride-based epitaxial wafer for HEMT power semiconductors according to the present invention. Figures 3 to 6 It is shown Figure 2 A diagram illustrating the fabrication process of group III nitride-based epitaxial wafers used in HEMT power semiconductors.

[0052] Reference Figures 2 to 6 According to this embodiment, a group III nitride-based epitaxial wafer for HEMT power semiconductors includes: a growth substrate (100), a nucleation region (200) grown on the growth substrate (100), and a stress-relieving AlN region (700) grown on the nucleation region and having nanoscale gallium vacancy, indium vacancy, or microscale void.

[0053] The growth substrate (100) has high resistance electrical properties with low conductivity, and is preferably made of silicon (Si) or silicon carbide (SiC).

[0054] The nucleation region (200) promotes the formation of the high-quality active region described later. In the group III nitride-based epitaxial wafer for HEMT power semiconductors according to this embodiment, since the active region, especially the active region, is a nitride-based material, the nucleation region (200) is formed using aluminum nitride (AlN) as the material.

[0055] The stress-relieving AlN region (700) provides improved device characteristics by mitigating the tensile stress applied to the active region due to the difference in lattice constant and coefficient of thermal expansion between silicon (Si) or silicon carbide (SiC) used as the growth substrate (100) and the materials constituting the active region, namely GaN and AlGaN.

[0056] The growth substrate (100) is hundreds of micrometers (μm) thick, while the active region is only hundreds of nanometers (nm) thick. When the active region is formed on the upper side of the growth substrate, due to the difference in lattice constants and thermal expansion coefficients between the two regions, it is unavoidable to apply very large tensile stress to the relatively thin active region.

[0057] Such problems can deteriorate the physical properties of the active region, thus causing problems in device characteristics and possibly forming minute cracks (cracks) that cannot be confirmed. In addition, serious process problems such as wafer breakage per wafer may be caused in the manufacturing process.

[0058] The stress-relaxing AlN region (700) used in the group III nitride-based epitaxial wafer for HEMT power semiconductors according to the present embodiment compensates and blocks in advance the tensile stress caused by the difference in lattice constant and thermal expansion coefficient between the growth substrate (100) and Si or SiC growth substrate by forming an AlN material having a lattice constant smaller than that of the GaN material and a thermal expansion coefficient larger than that of the GaN material on the upper side adjacent to the growth substrate.

[0059] Thus, the active region formed on the upper side of the stress-relaxing AlN region (700) can not only improve problems such as breakage and minute cracks in the above process, but also significantly improve the problem of deterioration of device characteristics because the tensile stress caused by the growth substrate is applied after being greatly relaxed.

[0060] In the present embodiment, the stress-relaxing AlN region (700) is formed by growing "Al(1-y)Ga(y)N (0 < y < 1) or Al(1-z)In(z)N (0 < z < 1)" (710) at a set growth temperature (Tg) and then performing a heat treatment (annealing) process in a high temperature above the growth temperature and a reducing atmosphere containing hydrogen (H2). Here, y and z are 0.05 ≤ y ≤ 0.3 or 0.05 ≤ z ≤ 0.3, which is preferable for realizing the function of the stress-relaxing AlN region (700) described later.

[0061] Thus, the stress-relaxing AlN region (700) contains gallium vacancies, indium vacancies at the nanoscale or voids at the microscale.

[0062] Gallium vacancies, indium vacancies at the nanoscale or voids at the microscale can be formed by the decomposition and sublimation of Ga or In contained in "Al(1-y)Ga(y)N (0 < y < 1) or Al(1-z)In(z)N (0 < z < 1)" (710) during the heat treatment process.

[0063] In addition, when growing the stress-relieved AlN region (700), Ga or In components act as surfactants during the growth of "Al(1-y)Ga(y)N (0 < y < 1) or Al(1-z)In(z)N (0 < z < 1)" (710), promoting the migration of Al adatoms (adsorbed atoms), and ultimately enabling the growth of high-quality thick-film AlN.

[0064] Particularly importantly, the upper interface of the stress-relieved AlN region (700) is formed of high-quality AlN material with a low density of crystal defects, i.e., dislocations, and a uniform Al surface polarity.

[0065] As a result, the stress-relieved AlN region (700) has high electrical insulation properties, and thus the stress-relieved AlN region (700) can replace a part or all of the existing GaN buffer region (400) that necessarily contains carbon (C), iron (Fe), nickel (Ni), cobalt (Co), and rare-earth elements.

[0066] On the other hand, the stress-relieved AlN region (700) according to the present embodiment is characterized by a structure in which the density of nanoscale gallium vacancies, indium vacancies, or microscale voids decreases along the growth direction.

[0067] The nanoscale gallium vacancies and indium vacancies formed in the stress-relieved AlN region (700) are voids remaining after the Ga or In contained in the AlN region (700) decomposes and sublimes during the heat treatment process; the microscale voids can be various forms of voids formed during the rearrangement of Al and N molecules after the discharge of Ga or In adatoms.

[0068] Different from the microscale voids, the gallium vacancies and indium vacancies have nanoscale sizes and can be confirmed by methods for crystallinity analysis and defect observation using various X-ray measurements including XRD (X-Ray diffractometer).

[0069] The stress-relaxed AlN region (700). During the heat treatment process after forming an AlN layer containing Ga or In, all of the Ga or In contained in the AlN material layer (layer) containing Ga or In may not be discharged. Thus, after the heat treatment described below, gallium (Ga) or indium (In) may also remain without forming vacancies.

[0070] The remaining Ga and In are randomly distributed spatially in the stress-relaxed AlN region (700).

[0071] In other words, the remaining AlGaN or AlInN molecules containing Ga and In may not have a uniform single crystal structure along the growth surface, but are independent of each other and separated from each other, having a single crystal, polycrystalline or amorphous structure.

[0072] Figure 7 It is a diagram showing another embodiment of a group-III nitride-based epitaxial wafer for a HEMT power semiconductor according to the present invention.

[0073] Refer to Figure 7 , in the group-III nitride-based epitaxial wafer for a HEMT power semiconductor according to the present embodiment, the stress-relaxed AlN region (700) can be formed by repeatedly performing the growth of "Al(1-y)Ga(y)N(0 < y < 1) or Al(1-z)In(z)N(0 < z < 1)" (710) and the above heat treatment process several times, so as to form a structure in which multiple layers of the stress-relaxed AlN region (700) are stacked.

[0074] In this case, the nanoscale gallium vacancies, indium vacancies or microscale voids formed in the stress-relaxed AlN region (700) bend the direction of crystal defects (threading dislocations, TDs) growing from the lower side to the upper side, or merge multiple crystal defects with each other, thereby finally reducing the TD density in the upper side direction. [[ID=I20]]

[0075] As a result, in the channel region (500) and the barrier region (600) that are continuously grown as subsequent processes and form the active region, tensile stress can be relaxed, and thus an effect of significantly improving device characteristics can be expected.

[0076] Figure 8This is a diagram illustrating yet another embodiment of a group III nitride-based epitaxial wafer for HEMT power semiconductors according to the present invention.

[0077] Reference Figure 8 According to this embodiment, the group III nitride-based epitaxial wafer for HEMT power semiconductors includes active regions (500, 600) grown on a stress-relieving AlN region (700).

[0078] The active region consists of a channel region (GaN, 500) that forms a 2DEG (two-dimensional electron gas, 501) and a barrier region (Al(1-y)Ga(y)N, 600) grown on the upper side of the channel region.

[0079] According to this embodiment, the group III nitride-based epitaxial wafer for HEMT power semiconductors means that active regions (500, 600) are grown on stress-relieving AlN regions (700) without a buffer region (400) that serves as a highly resistive layer doped with carbon (C), iron (Fe), nickel (Ni), cobalt (Co) and rare-earth elements.

[0080] This means that the high resistance-high insulation properties of the buffer region (400) can also be fully realized by the stress-relieving AlN region (700) with a wide energy band gap relative to the active regions (500, 600).

[0081] Therefore, the buffer region (400), which is defective due to the doping of carbon (C), iron (Fe), nickel (Ni), cobalt (Co) and rare-earth elements, can be replaced to achieve high resistance characteristics. The channel region (GaN, 500) can be grown on the stress-relieving AlN region (700) with excellent film quality, thereby significantly improving the film quality of the channel region (500).

[0082] On the other hand, in the group III nitride-based epitaxial wafer for HEMT power semiconductors according to this embodiment, the active regions (500, 600) may further include an AlN thin film with a thickness of less than 5 nm, located between the channel region (500) forming the 2DEG and the barrier region (600).

[0083] Next, a method for manufacturing a group III nitride-based epitaxial wafer for HEMT power semiconductors according to the present invention will be described.

[0084] The manufacturing method according to the present embodiment includes: a step of preparing a growth substrate (100); a step of growing a nucleation region (200) on the growth substrate (100); and a step of growing Al(1-y)Ga(y)N (0 < y < 1) or Al(1-z)In(z)N (0 < z < 1) at a set growth temperature on the nucleation region (200), and performing heat treatment (annealing) in a high temperature above the growth temperature and a reducing atmosphere containing hydrogen, thereby growing a stress-relieved AlN region (700) having gallium vacancies, indium vacancies at the nanoscale or microscale voids at the micron scale.

[0085] In the present embodiment, it may further include a step of repeating the step of growing the stress-relieved AlN region (700) several times to stack multiple stress-relieved AlN regions (700).

[0086] In the present embodiment, through heat treatment, the stress-relieved AlN region (700) has a structure in which the density of gallium vacancies, indium vacancies at the nanoscale along the growth direction or microscale voids decreases.

[0087] Table 1 shows the process conditions of each region of the manufacturing method of the group-III nitride-based epitaxial wafer for HEMT power semiconductors according to the present invention.

[0088] [Table 1]

[0089] In Table 1, the V / III ratio is the molar ratio of N / (Al, Ga, In). The growth atmosphere (H2 / N2) refers to the ratio of the H2 flow rate to the N2 flow rate.

[0090] In Table 1, the growth pressure and V / III ratio of the stress-relieved AlN region are the optimal conditions for suppressing parasitic reactions.

[0091] Generally, in an epitaxial device where an epitaxial growth process is performed, an epitaxial wafer forms a molecular bond by reacting gaseous elements on the wafer surface carried on a carrier, thereby forming a normal molecular structure such as AlN, AlGaN, AlGaInN, and GaN.

[0092] However, gaseous elements may react with each other in the air after passing through the showerhead. If this happens, unwanted molecules will form in the air, and these undesirable molecules may adhere to the wafer surface.

[0093] This phenomenon may vary with the ratio between elements (V / III ratio) and the growth pressure (i.e., vacuum level).

[0094] The growth pressure and V / III ratio shown in Table 1 can maximally suppress the above-mentioned parasitic reactions, thereby improving the quality of the grown membrane.

Claims

1. A group III nitride-based epitaxial wafer for HEMT power semiconductors, characterized in that, Comprising: A growth substrate; A nucleation region grown on the growth substrate; And A stress-relaxed AlN region grown on the nucleation region, having gallium vacancies, indium vacancies at the nanoscale, or voids at the micron scale.

2. The group-III nitride-based epitaxial wafer for HEMT power semiconductors according to claim 1, wherein In the stress-relaxed AlN region, the density of the gallium vacancies at the nanoscale, the indium vacancies at the nanoscale, or the voids at the micron scale decreases along the growth direction.

3. The group-III nitride-based epitaxial wafer for HEMT power semiconductors according to claim 1, wherein The stress-relaxed AlN region is formed by performing a heat treatment (annealing) process at a high temperature above the growth temperature and in a reducing atmosphere containing hydrogen (H2) after growing Al(1-y)Ga(y)N (0 < y < 1) or Al(1-z)In(z)N (0 < z < 1).

4. The group-III nitride-based epitaxial wafer for HEMT power semiconductors according to claim 3, wherein The stress-relaxed AlN region is formed by repeatedly performing the growth of Al(1-y)Ga(y)N (0 < y < 1) or Al(1-z)In(z)N (0 < z < 1) and the heat treatment (annealing) process.

5. The group-III nitride-based epitaxial wafer for HEMT power semiconductors according to claim 3, wherein The gallium vacancies at the nanoscale, the indium vacancies at the nanoscale, or the voids at the micron scale in the stress-relaxed AlN region are formed by the decomposition and sublimation of the Ga or In components contained in the grown Al(1-y)Ga(y)N (0 < y < 1) or Al(1-z)In(z)N (0 < z < 1) during the heat treatment.

6. The group-III nitride-based epitaxial wafer for HEMT power semiconductors according to claim 1, wherein The stress-relaxed AlN region randomly retains gallium (Ga) or indium (In) spatially.

7. The group III nitride epitaxial wafer for HEMT power semiconductors according to claim 1, characterized in that, Comprising: An active region grown on the stress-relaxed AlN region.

8. The group-III nitride-based epitaxial wafer for HEMT power semiconductors according to claim 7, wherein The active region includes a channel region (GaN) forming a 2DEG (two-dimensional electron gas) and a barrier region grown on the channel region.

9. The group-III nitride-based epitaxial wafer for HEMT power semiconductors according to claim 7, wherein It has a buffer region, which is located between the stress-relaxed AlN region and the active region and is composed of GaN doped with carbon (C), iron (Fe), nickel (Ni), cobalt (Co), and rare-earth elements.

10. The group-III nitride-based epitaxial wafer for HEMT power semiconductors according to claim 7, wherein the active region has an AlN thin film, and the AlN thin film is between the channel region and the barrier region and is grown with a thickness less than 5 nm.

11. A method for manufacturing a group III nitride-based epitaxial wafer for HEMT power semiconductors, characterized in that, Comprising: a step of preparing a growth substrate; a step of growing a nucleation region on the growth substrate; and a step of growing Al(1-y)Ga(y)N (0 < y < 1) or Al(1-z)In(z)N (0 < z < 1) on the nucleation region at a set growth temperature, and performing a heat treatment (annealing) process in a high temperature above the growth temperature and a reducing atmosphere containing hydrogen (H2) to grow a stress-relieved AlN region having gallium vacancies with nanoscale dimensions, indium vacancies with nanoscale dimensions, or voids with micrometer scale dimensions.

12. The method for manufacturing a group-III nitride-based epitaxial wafer for HEMT power semiconductors according to claim 11, wherein the step of growing the stress-relieved AlN region is repeated several times.

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