Bonding impedance detection circuit and bonding impedance detection device

Abstract

The application provides a bonding impedance detection circuit and a bonding impedance detection device. The bonding impedance detection circuit comprises a plurality of first switches, a plurality of second switches and a plurality of detection units. The plurality of first switches are connected between a plurality of signal pads of a plurality of display panels and a ground terminal. The plurality of second switches are connected between each gold finger and a common line. The detection units are connected with a corresponding gold finger and the common line. The detection units detect the bonding impedance of a matched gold finger and the signal pad, realize single detection, improve detection accuracy, realize orderly detection of multiple bonding channels, realize step-by-step triggering and step-by-step transmission, improve detection efficiency, and after the test is completed, the first switches and the second switches are turned off, the signal pad and the gold finger can realize normal bonding effect and signal transmission, and normal switching between a test mode and a working mode is realized.

Description

Technical Field

[0001] This invention belongs to the field of impedance detection technology, and particularly relates to a bonding impedance detection circuit and a bonding impedance detection device. Background Technology

[0002] With the continuous iteration and upgrading of flat panel display technology, display products are rapidly developing towards ultra-high resolution, high refresh rate, thinness, and flexibility, significantly improving the integration density and circuit precision of display modules. Flexible circuit boards, as the core signal connection carrier of display modules, bear the responsibility of transmitting data signals, clock signals, and power supply signals between the display panel and the driving system. The bonding quality of the flexible circuit board between it and the display panel directly determines the imaging effect, operational stability, and long-term reliability of the display module.

[0003] The bonding process between flexible circuit boards and display panels commonly employs ACF (Anisotropic Conductive Fiber) hot-press bonding technology. ACF contains numerous micro-conductive particles, which are compressed and deformed under high temperature and pressure in specialized bonding equipment. This achieves electrical conductivity between the gold fingers of the flexible circuit board and the pads of the display panel, while physical fixation and insulation are achieved through adhesive curing. In actual mass production, ACF comes in various models and specifications, with significant differences in conductive particle density, hardness, and adhesive curing characteristics. Furthermore, when combined with different glass substrates, base materials, and driver chips, core process parameters such as temperature, pressure, and holding time in the bonding equipment cannot be directly calibrated. The industry generally requires multiple trial production experiments to repeatedly adjust parameters before a suitable bonding process window can be preliminarily determined. This results in a long overall debugging cycle, high production costs, and difficulty in ensuring process stability.

[0004] Currently, the industry's testing methods for the bonding quality of flexible circuit boards suffer from significant technical limitations, and an efficient, accurate, and comprehensive online testing system has not yet been established. Existing mainstream testing methods rely solely on visual inspection using optical lenses. This involves manually or visually observing the state of conductive particles on the surface of the metal pads in the bonding area, and subjectively judging the bonding process's quality based on the number and fullness of particle protrusions. This purely visual inspection method has a fatal flaw: a good appearance of the particles does not equate to acceptable electrical connection performance. Some bonding areas may appear normal on the outside but exhibit hidden defects such as poor internal contact, microcracks, or loose connections. These hidden defects cannot be detected through microscopic inspection and can only be identified in subsequent LED lighting processes, significantly increasing production rework costs and the risk of defective products leaving the circuit.

[0005] Alternatively, an impedance test can be performed using a multimeter in resistance mode to determine the bonding effect. However, current technologies also have many shortcomings when testing this core electrical parameter, bonding impedance. Currently, to obtain accurate bonding impedance values, the industry must reserve dedicated test circuits and measurement points during the product design phase, and then manually test these points using a multimeter in resistance mode during production. This testing method can only achieve impedance testing at a limited number of points, measuring the bonding impedance between only two sets of metal pads at a time. It cannot cover all channels of the hundreds of signal pads in the bonding area of ​​the display module, resulting in extremely low testing coverage.

[0006] Meanwhile, manual multimeter testing has extremely poor accuracy. Test results are easily affected by multiple factors, such as the resistance of the test leads themselves, the contact resistance between the probe and the pad, and interference from the testing environment, resulting in large measurement errors and poor stability. After the product completes reliability testing, if a failure related to bonding impedance occurs, engineers cannot rely on existing test data to accurately locate the abnormal channel and troubleshoot the cause of the fault. They can only rely on experience to troubleshoot one by one, which is extremely inefficient and makes it impossible to achieve closed-loop control of production quality. Summary of the Invention

[0007] The purpose of this invention is to provide a bonding impedance detection circuit, which aims to solve the problems of low detection efficiency and low accuracy in traditional bonding impedance detection methods.

[0008] A first aspect of this invention provides a bonding impedance detection circuit for detecting the bonding impedance between the gold fingers of a flexible circuit board and the signal pads of a display panel. A plurality of the signal pads are arranged side by side in sequence along a first direction, and a plurality of the gold fingers are bonded one by one to the plurality of the pads in sequence along the first direction. The bonding impedance detection circuit includes: Multiple first switches, each of the signal pads is connected to ground via a first switch, the first switch being controlled to be turned on in test mode and controlled to be turned off in operating mode; Multiple second switches, wherein the first end of each gold finger is connected to the first end of a second switch, and the second ends of the second switches are connected to a common line. The second switches are used for controlled conduction in test mode and controlled deactivation in working mode. Multiple detection units are cascaded in sequence. The first signal terminal of each detection unit is connected to the common line, and the second signal terminal of each detection unit is connected to the second end of a gold finger. The first detection unit is used to detect the bonding impedance of the connected gold fingers according to the start signal and output detection information and output transmission signal to the next detection unit. The first end and the second end of the gold finger are the two ends of the extension direction of the gold finger. The i-th detection unit is used to detect the bonding impedance of the connected gold fingers according to the transmission signal and output detection information and output the transmission signal to the next detection unit, where i is greater than 1 and i is a positive integer.

[0009] Optionally, the second end of each of the gold fingers is connected to a signal source. In the test mode, the gold finger does not receive a current signal output by the signal source. In the working mode, the gold finger receives a preset current output by the signal source. The preset current is greater than or exceeds a threshold current. The first switch and the second switch are fuses. The first switch and the second switch melt when the threshold current is received, and remain in a conducting state when the preset current is not received.

[0010] Optionally, the display panel further includes a first grounding pad, and the gold fingers include a plurality of signal gold fingers and a first grounding gold finger arranged side by side along the first direction. The plurality of signal gold fingers are respectively bonded to the plurality of signal pads, the first grounding gold finger is bonded to the first grounding pad, the first grounding gold finger is grounded, and the plurality of signal gold fingers are respectively connected to the first grounding pad through a plurality of first switches.

[0011] Optionally, the display panel further includes a second grounding pad, and the gold fingers include a second grounding gold finger, a plurality of signal gold fingers and a first grounding gold finger arranged side by side along the first direction. The second grounding gold finger is bonded to the second grounding pad and grounded. The plurality of signal gold fingers are respectively connected to the first grounding pad and the second grounding pad through a plurality of the first switches.

[0012] Optionally, the common line is arranged around the signal gold finger, and the bonding impedance detection circuit further includes: The third switch is connected in series between the second grounding gold finger and the common line. The third switch is also connected to the last detection unit. The third switch is used to trigger shutdown when no cascade signal is received from the last detection unit, and to trigger conduction when a cascade signal is received from the last detection unit.

[0013] Optionally, the plurality of detection units are further connected to a clock signal terminal, and the detection unit includes: A switching circuit, wherein the first terminal of the switching circuit is connected to the positive voltage terminal, and the second terminal of the switching circuit is connected to the second signal terminal of the detection unit, the switching circuit being used to turn on and output a corresponding voltage to the second signal terminal of the detection unit according to the clock signal of the clock signal terminal; An impedance conversion circuit is connected to the first signal terminal and the second signal terminal of the detection unit, respectively. The impedance conversion circuit is used to convert the bonding impedance positive correlation into a voltage signal. A cascading transmission circuit is connected to the impedance conversion circuit, the detection unit or start signal terminal of the preceding stage, and the detection unit of the following stage, respectively. The cascading transmission circuit is used for: Pre-charge is performed based on the start signal or the stage transmission signal output by the detection unit of the previous stage, and the voltage signal is converted into the stage transmission signal when the voltage signal is received, and the stage transmission signal is reset and the output of the stage transmission signal is stopped when the stage transmission signal output by the detection unit of the next stage is received. A comparison circuit is connected to the transmission circuit. The comparison circuit is used to compare the transmission signal with a threshold voltage and output a high or low level signal characterizing the detection information.

[0014] Optionally, the switching circuit includes a first transistor, a first terminal of the first transistor is connected to the positive voltage terminal, a second terminal of the first transistor is connected to the second signal terminal of the detection unit, and a control terminal of the first transistor is connected to the clock signal terminal. The impedance conversion circuit includes a second transistor and a first resistor; The first terminal of the second transistor is connected to the second signal terminal of the detection unit, the control terminal of the second transistor is connected to the first signal terminal of the detection unit, the second terminal of the second transistor is connected to the first terminal of the first resistor to form the output terminal of the impedance conversion circuit, and the second terminal of the first resistor is grounded.

[0015] Optionally, the cascade circuit includes a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, and an energy storage capacitor; The first terminal and control terminal of the third transistor are connected to the output terminal or start signal terminal of the cascade circuit of the detection unit in the previous stage. The second terminal of the third transistor, the first terminal of the fifth transistor, the control terminal of the fourth transistor, and the first terminal of the energy storage capacitor are connected. The first terminal of the fourth transistor is connected to the output terminal of the impedance conversion circuit. The second terminal of the fourth transistor, the second terminal of the energy storage capacitor, and the first terminal of the sixth transistor are connected to form the output terminal of the cascade circuit. The control terminals of the fifth transistor and the sixth transistor are connected to the output terminal of the cascade circuit of the detection unit in the next stage. The second terminals of the fifth transistor and the second terminals of the sixth transistor are grounded.

[0016] Optionally, the comparison circuit includes a second resistor, a comparator, and a seventh transistor; The first end of the second resistor is connected to the positive voltage terminal, the second end of the second resistor is connected to the non-inverting input terminal of the comparator, the inverting input terminal of the comparator, the control terminal of the seventh transistor and the output terminal of the cascade circuit are connected, the output terminal of the comparator is connected to the first end of the seventh transistor, and the second end of the seventh transistor constitutes the output terminal of the comparator circuit.

[0017] A second aspect of the present invention provides a bonding impedance detection device, including a signal source and a bonding impedance detection circuit as described above, wherein the signal source is connected to the bonding impedance detection circuit, and the signal source is used to output corresponding current signals, clock signals, positive voltages and start signals.

[0018] The beneficial effects of the present invention compared with the prior art are as follows: The bonding impedance detection circuit includes multiple first switches, multiple second switches, and multiple detection units. The multiple first switches are connected to multiple signal pads and ground terminals of multiple display panels, and the multiple second switches are connected between each gold finger and the common line. The detection unit is connected to a corresponding gold finger and the common line. The detection unit detects the bonding impedance of a matched gold finger and signal pad, realizing single detection, improving detection accuracy, and realizing orderly detection of multiple bonding channels, realizing step-by-step triggering and step-by-step transmission, improving detection efficiency. At the same time, after the test is completed, the first and second switches are turned off, and the signal pad and gold finger can achieve normal bonding effect and signal transmission, realizing normal switching between test mode and working mode. Attached Figure Description

[0019] Figure 1 This is a schematic diagram of the first structure of the bonding impedance detection circuit and bonding impedance detection device provided in Embodiments 1 and 4 of the present invention. Figure 2 This is a schematic diagram of a second structure of the bonding impedance detection circuit provided in Embodiment 1 of the present invention; Figure 3 This is a schematic diagram of the third structure of the bonding impedance detection circuit provided in Embodiment 1 of the present invention; Figure 4 This is a schematic diagram of the fourth structure of the bonding impedance detection circuit provided in Embodiment 1 of the present invention; Figure 5 This is a schematic diagram of the bonding impedance detection circuit provided in Embodiment 2 of the present invention; Figure 6 This is a circuit diagram of the bonding impedance detection circuit provided in Embodiment 3 of the present invention; Figure 7 This is a signal timing diagram of the bonding impedance detection circuit provided in Embodiment 3 of the present invention.

[0020] The figures in the diagram are labeled as follows: 100. Bonding impedance detection circuit; 200. Signal source; 110. First switch; 120. Second switch; 130. Common line; 140. Detection unit; 150. Third switch; 11. Signal pad; 12. First ground pad; 13. Second ground pad; 21. Signal gold finger; 22. First ground gold finger; 23. Second ground gold finger; 141. Switching circuit; 142. Impedance conversion circuit; 143. Transmission circuit; 144. Comparison circuit; IO1, First signal terminal; IO2, Second signal terminal; IO3, Third signal terminal; OUT1, First output terminal; OUT2, Second output terminal; CLK, Clock signal terminal; RST, Reset terminal; R01, First impedance; R02, Second impedance; F1, First fuse; F2, Second fuse; M1, First transistor; M2, Second transistor; M3, Third transistor; M4, Fourth transistor; M5, Fifth transistor; M6, Sixth transistor; M7, Seventh transistor; R1, First resistor; R2, Second resistor; U1, Comparator; Clk, clock signal; I0, preset current; Te, detection information; OUTn-1, transmission signal of the detection unit in the previous stage; OUTn, transmission signal of this stage; OUTn+1, transmission signal of the detection unit in the next stage; Vb, terminal voltage of the second impedance; P, terminal voltage of the first resistor; A, gate voltage of the fourth transistor. Detailed Implementation

[0021] To make the technical problems to be solved, the technical solutions, and the beneficial effects of the present invention clearer, the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the present invention and are not intended to limit the present invention.

[0022] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this invention, "a plurality of" means two or more, unless otherwise explicitly specified.

[0023] Example 1 A first aspect of this invention provides a bonding impedance detection circuit 100 for detecting the bonding impedance between the gold fingers of a flexible circuit board and the signal pads 11 of a display panel, such as... Figure 1As shown, multiple signal pads 11 are disposed in the bonding area of ​​the display panel. The multiple signal pads 11 are uniformly arranged side by side along the first direction, with consistent spacing to meet the requirements of high-density bonding layout. The signal pads 11 are used to transmit corresponding drive signals to the display panel. The bonding end of the flexible circuit board is provided with multiple gold fingers, which are also arranged sequentially along the first direction and correspond one-to-one with the multiple signal pads 11 on the display panel. The one-to-one bonding is achieved through ACF hot-press bonding process, completing the signal electrical connection and physical fixation between the flexible circuit board and the display panel.

[0024] In this embodiment, the bonding impedance detection circuit 100 includes: Multiple first switches 110, each signal pad 11 is connected to the ground through a first switch 110, the first switch 110 is used to be controlled to be turned on in test mode and controlled to be turned off in working mode; Multiple second switches 120, with the first end of each gold finger connected to the first end of a second switch 120, and the second ends of the second switches 120 connected to a common line 130. The second switches 120 are used for controlled conduction in test mode and controlled deactivation in working mode. Multiple detection units 140 are cascaded in sequence. The first signal terminal IO1 of each detection unit 140 is connected to the common line 130, and the second signal terminal IO2 of each detection unit 140 is connected to the second end of a gold finger. The first detection unit 140 is used to detect the bonding impedance of the connected gold fingers according to the start signal STV and output detection information Te and output the signal to the next detection unit 140. The first end and the second end of the gold finger are the two ends of the extension direction of the gold finger. The i-th detection unit 140 is used to detect the bonding impedance of the connected gold fingers according to the stage transmission signal and output detection information Te, and output the stage transmission signal to the next detection unit 140, where i is greater than 1 and i is a positive integer.

[0025] In this embodiment, the bonding impedance detection circuit 100 includes multiple first switches 110, multiple second switches 120, and multiple detection units 140 cascaded in sequence. The functional devices work together to achieve channel-by-channel, orderly, and full-coverage bonding impedance detection. It also strictly distinguishes between the working states in test mode and working mode, taking into account both the detection function and the normal display performance of the product. The test mode can be performed during bonding before leaving the factory, while the working mode can be performed when the flexible circuit board and the display panel establish signal transmission before leaving the factory.

[0026] Multiple first switches 110 are correspondingly arranged between the signal pad 11 and the ground terminal. Each signal pad 11 is individually matched with an independent first switch 110, forming a one-to-one on / off control structure. The working logic of the first switch 110 is time-division controlled operation. In the set test mode, the first switch 110 receives the conduction control signal issued by the control system or the detection unit 140 to achieve full conduction, constructing a complete grounding loop for the bonding impedance detection and ensuring the integrity of the impedance detection loop. After the product completes the test and enters the normal working mode, the first switch 110 is controlled to be completely turned off, cutting off the connection between the signal pad 11 and the detection ground terminal, completely avoiding the interference of the bonding impedance detection circuit 100 on the normal signal transmission of the product, and ensuring that the imaging effect of the display module is not affected.

[0027] Multiple second switches 120 are correspondingly arranged on the extension path of the gold finger, with each gold finger matched with an independent second switch 120, achieving independent control of a single channel. Specifically, the first end of each gold finger is electrically connected to the first end of the corresponding second switch 120, and the second ends of all second switches 120 are uniformly connected to the common line 130 of the circuit, forming a multi-path converged common transmission loop. The second switches 120 also adopt a time-division controlled operating mechanism. In test mode, they are controlled to conduct, forming a path between the gold finger and the common line 130, ensuring that the impedance detection signal can be effectively transmitted to the detection unit 140; in operating mode, they are controlled to turn off, disconnecting the gold finger from the common detection line, isolating the impedance detection circuit 100, and preventing parasitic parameters of the detection line from affecting signal transmission accuracy.

[0028] Multiple detection units 140 are designed to be cascaded sequentially to form a multi-level serial shift detection array, which enables orderly detection of multiple bonding channels and avoids signal crosstalk and data confusion caused by simultaneous detection of multiple channels.

[0029] like Figure 2 As shown, each detection unit 140 is equipped with an independent first signal terminal IO1 and a second signal terminal IO2. The first signal terminal IO1 of all detection units 140 is electrically connected to the common line 130. The second signal terminal IO2 of each detection unit 140 is individually connected to the second end of a gold finger, realizing a one-to-one matching between the detection unit 140 and the bonding channel, ensuring that each set of bonding impedance can be independently acquired and independently detected. The first end and the second end of the gold finger are set opposite to each other along the extension direction of the gold finger, that is, along the second direction, which intersects with the first direction.

[0030] The detection unit 140 also includes a third signal terminal IO3, a first output terminal OUT1, a second output terminal OUT2, a clock signal terminal CLK, and a reset terminal RST. The third signal terminal IO3 of the first detection unit 140 is used to receive the start signal STV. The third signal terminal IO3 of the subsequent detection unit 140 is connected to the first output terminal OUT1 of the previous detection unit 140. The first output terminal OUT1 is used to output the stage transmission signal of this stage. The second output terminal OUT2 is used to output the detection information Te. The reset terminal RST is connected to the first output terminal OUT1 of the subsequent detection unit 140. The clock signal terminal CLK is used to receive the clock signal Clk.

[0031] The cascaded detection unit 140 has a step-by-step triggering and transmission working logic. When detection starts, the first detection unit 140 receives the start signal STV sent by the signal source 200 through the third signal terminal IO3, which serves as the start trigger signal for the entire detection array. Driven by the start signal STV, the first detection unit 140 completes the acquisition and detection calculation of the bonding impedance between its corresponding gold finger and the signal pad 11 through the first signal terminal IO1 and the second signal terminal IO2, generates the corresponding detection information Te, and simultaneously generates the cascade transmission signal OUTn of this level, and transmits the cascade transmission signal to the next adjacent detection unit 140, completing the step-by-step transmission of the detection signal.

[0032] For the i-th detection unit 140, where i is a positive integer greater than or equal to 2, this detection unit 140 does not directly receive the start signal STV. Instead, it receives the cascade signal OUTN-1 from the previous detection unit 140 via the third signal terminal IO3 as its own start trigger signal. Driven by the cascade signal, the i-th detection unit 140 starts working, accurately detects the bonding impedance between its corresponding gold finger and the signal pad 11, outputs the corresponding detection information Te, and simultaneously generates a new cascade signal to be transmitted to the next detection unit 140, until all detection units 140 have completed the detection of all bonding channels.

[0033] At the same time, when the subsequent detection unit 140 detects the output stage transmission signal OUTn+1, it also outputs the output stage transmission signal OUTn+1 to the reset terminal RST of the preceding detection unit 140 through the output terminal, and resets the preceding detection unit 140, so that the preceding detection unit 140 stops outputting the stage transmission signal and detection information Te.

[0034] The cascaded shift detection architecture enables the orderly and sequential detection of hundreds of bonding channels, completely solving the problem that traditional detection technologies cannot achieve full coverage. At the same time, through the independent detection of a single channel, it can accurately locate the specific bonding channel with abnormal impedance, providing accurate data support for production defect rework and process parameter optimization, and effectively improving production yield and quality control accuracy.

[0035] like Figure 3 As shown, the equivalent impedance of the circuit of the flexible circuit board and the impedance between the gold fingers of the flexible circuit board can be equivalent to the first impedance R01. The bonding impedance between the gold fingers and the corresponding signal pads 11 can be expressed as the second impedance R02. The first impedance R01 and the second impedance R02 are connected in series. The detection unit 140 is connected to both ends of the first impedance R01. The detection unit 140 applies voltage to the first impedance R01 and the second impedance R02. When the gold fingers and the corresponding signal pads 11 have different connection states, such as normal bonding, loose connection, poor contact, etc., the bonding impedance changes. Correspondingly, the detection unit 140 detects the change in the terminal voltage of the second impedance R02. The magnitude of the bonding impedance and the bonding state can be determined according to the magnitude of the terminal voltage, thereby realizing the bonding detection of a single gold finger and signal pad 11.

[0036] The first switch 110 and the second switch 120 can be composed of corresponding switching devices and fuses, such as... Figure 4 As shown, in an optional embodiment, in order to achieve state switching, the second end of each gold finger is connected to the signal source 200, the signal source 200 is connected to the second signal terminal IO2 of the detection unit 140, the gold finger does not receive the current signal output by the signal source 200 in the test mode, and the gold finger receives the preset current I0 output by the signal source 200 in the working mode, the preset current I0 is greater than or exceeds the threshold current. The first switch 110 and the second switch 120 are fuses, that is, the first switch includes a first fuse F1 and the second switch includes a second fuse F2. The first switch 110 and the second switch 120 melt when a threshold current is received, and remain in a conducting state when a preset current I0 is not received.

[0037] In this embodiment, both the first switch 110 and the second switch 120 are fuses. The fuse has threshold-triggered switching characteristics and can adaptively switch working states according to the size of the circuit current. It does not require additional control signals, has a simple structure, high stability, and low cost, and is suitable for the application scenarios of precision circuits in display modules.

[0038] The fuse operates in two states, corresponding to test mode and normal operation mode. In test mode, as follows... Figure 4 As shown, the first fuse F1 and the second fuse F2 are equivalent to being connected in series in the detection circuit. The signal source 200 does not output the preset current I0 to the second end of the corresponding gold finger. At this time, the fuse can maintain a stable conducting state, ensuring that the detection circuit is unobstructed throughout, ensuring that the bonding impedance detection work can be carried out normally and orderly, without the problem of circuit breakage in the middle of the detection, and ensuring the integrity and accuracy of the detection data.

[0039] Once the impedance detection of all bonding channels is completed, or after each detection unit 140 has finished its detection, the signal source 200 outputs a preset current I0 to the corresponding gold finger. The preset current I0 is greater than the threshold current, and flows into the gold finger, signal pad 11, first fuse F1, and second fuse F2, causing the current in the detection circuit to exceed the fuse's threshold current. At this point, the first fuse F1 and the second fuse F2 instantly blow, achieving touch-off. After the fuses blow, the electrical connection between the signal pad 11 and ground, and between the gold finger and the common line 130, is completely severed, completely isolating the detection circuit structure, including the detection unit 140 and the common line 130, from the front-end bonding gold finger and signal pad 11.

[0040] By employing a fuse-based power-off design, the drawback of traditional detection circuits that cannot disconnect from the working circuit after testing is completely resolved. This avoids problems such as short circuits, signal leakage, and impedance drift caused by the connection between the bonding impedance detection circuit 100 and the bonding channel during long-term normal operation of the product, thus improving the working stability and lifespan of the display module. Furthermore, the fuse's tripping is a one-time, irreversible operation, permanently disconnecting the detection circuit after testing, without causing any interference to subsequent product use, ensuring extremely high protection reliability.

[0041] In order to ensure reliable grounding of the signal pad 11 in test mode, in an optional embodiment, such as Figure 1 As shown, the display panel also includes a first grounding pad 12. The gold fingers include a plurality of signal gold fingers 21 and a first grounding gold finger 22 arranged side by side along a first direction. The plurality of signal gold fingers 21 are respectively bonded to the plurality of signal pads 11. The first grounding gold finger 22 is bonded to the first grounding pad 12 and grounded. The plurality of signal gold fingers 21 are respectively connected to the first grounding pad 12 through a plurality of first switches 110.

[0042] In this embodiment, the display panel is additionally provided with a first grounding pad 12, and the gold finger structure is functionally partitioned. Along the arrangement path in the first direction, the gold fingers are divided into multiple signal gold fingers 21 and a first grounding gold finger 22. The multiple signal gold fingers 21 are structures for realizing the transmission of display signals, and are respectively bonded to multiple signal pads 11 on the display panel to complete the transmission and interaction of data signals and clock signals Clk. The first grounding gold finger 22 is a dedicated grounding structure, which is individually bonded to the first grounding pad 12, and the first grounding gold finger 22 is continuously kept in a grounded state to provide a reference ground potential for the entire bonding area.

[0043] In terms of circuit connection structure, the multiple first switches 110 corresponding to the multiple signal gold fingers 21 are all uniformly connected to the first grounding pad 12, so that the detection grounding loops of all signal pads 11 converge to the first grounding pad 12, forming a unified and centralized grounding loop. This achieves uniform ground potential throughout the bonding area, avoids ground potential drift and uneven potential during multi-channel detection, effectively reduces the interference of ground potential difference on impedance detection data, and significantly improves the detection accuracy of bonding impedance.

[0044] Meanwhile, the centralized grounding structure provides a stable return path for signal transmission, effectively suppressing crosstalk in single-channel signals during normal product operation, reducing signal attenuation and waveform distortion, and improving the integrity of the displayed signal. During impedance testing, a unified grounding loop eliminates differences in grounding impedance between multiple testing channels, ensuring consistent testing standards for each bonding channel, making impedance testing data from different channels comparable, and facilitating rapid screening of channels with abnormal impedance.

[0045] Furthermore, to achieve the circuit design requirements of low impedance and high shielding, in an optional embodiment, such as Figure 1 As shown, the display panel also includes a second grounding pad 13. The gold fingers include a second grounding gold finger 23, a plurality of signal gold fingers 21 and a first grounding gold finger 22 arranged side by side along a first direction. The second grounding gold finger 23 is bonded to the second grounding pad 13 and grounded. The plurality of signal gold fingers 21 are respectively connected to the first grounding pad 12 and the second grounding pad 13 through a plurality of first switches 110.

[0046] In this embodiment, the display panel is simultaneously provided with a first grounding pad 12 and a second grounding pad 13. The two sets of grounding pads are respectively arranged on both sides of the signal pad 11 array, forming a double-sided opposing layout. The corresponding gold finger structure is arranged sequentially in the first direction as a second grounding gold finger 23, multiple signal gold fingers 21, and a first grounding gold finger 22, realizing a layout in which the grounding structure surrounds the signal transmission structure. The second grounding gold finger 23 is bonded to the second grounding pad 13, and the second grounding gold finger 23 is continuously grounded, forming a double-sided grounding system in conjunction with the first grounding gold finger 22.

[0047] At the circuit connection level, the first switch 110 corresponding to multiple signal gold fingers 21 is simultaneously connected to the first ground pad 12 and the second ground pad 13, so that the detection grounding loop of each signal pad 11 has a double-sided grounding path, forming a multi-parallel grounding structure. Compared with a single-sided grounding structure, double-sided opposing grounding can significantly reduce the equivalent impedance of the grounding loop, providing a lower resistance and more stable grounding reference for impedance detection, and completely eliminating the detection data deviation caused by excessively high grounding impedance.

[0048] Meanwhile, the double-sided grounding structure enables bidirectional electromagnetic shielding of the signal channel. The dual-sided grounding structure constrains the propagation range of the signal's electric and magnetic fields, effectively suppressing crosstalk between adjacent signal channels and isolating the bonding signal from external electromagnetic interference. During the testing process, double-sided equipotential grounding ensures a completely uniform potential across the entire bonding area, avoiding potential gradient deviations caused by single-sided grounding. This guarantees a completely consistent testing environment for each set of bonding impedances, further improving testing accuracy and stability.

[0049] Furthermore, to improve the electromagnetic shielding effect, in an optional embodiment, such as Figure 6 As shown, the common line 130 is arranged around the signal gold finger 21, and the bonding impedance detection circuit 100 also includes: The third switch 150 is connected in series between the second grounding gold finger 23 and the common line 130. The third switch 150 is also connected to the last detection unit 140. The third switch 150 is used to trigger shutdown when no cascade signal is received from the last detection unit 140, and to trigger conduction when a cascade signal is received from the last detection unit 140.

[0050] In this embodiment, in order to maximize the electromagnetic optimization effect of grounding shielding, the layout of the common line 130 is optimized. The common line 130 adopts a surround layout structure, which surrounds all the signal gold fingers 21 to form a closed loop line layout, which can completely wrap the entire bonding signal area and provide a structural basis for subsequent electromagnetic shielding optimization.

[0051] The third switch 150 is connected in series between the second grounding gold finger 23 and the common line 130 to realize the controllable switching of the grounding shielding circuit. At the same time, the control terminal of the third switch 150 is electrically connected to the last detection unit 140 in the entire detection array. The cascade signal output by the last detection unit 140 controls the working state of the third switch 150, realizing precise linkage between the detection process and the working state of the shielding circuit.

[0052] The third switch 150 has two operating states, perfectly matching the timing of the detection process. When the entire detection array has not completed the detection of all channels and the last detection unit 140 has not output a signal, the third switch 150 is in the off state. At this time, the second grounding gold finger 23 is disconnected from the common line 130, the shielding circuit does not work, avoiding interference from the shielding line with the signal acquisition of the early impedance detection, and ensuring the accuracy of the detection data.

[0053] After the last detection unit 140 completes the impedance detection of the corresponding bonding channel, the last detection unit 140 outputs a transmission signal. This transmission signal directly triggers the third switch 150 to conduct, enabling the second grounding gold finger 23 to achieve electrical connection with the wraparound common line 130. At this time, the first grounding pad 12, the second grounding pad 13, and the wraparound common line 130 form a complete closed-loop grounding shield circuit, and the entire bonding area is fully covered by the ground loop.

[0054] The closed-loop grounding structure can effectively absorb high-frequency signal reflections caused by discontinuities in bonding impedance and line impedance in the bonding area, suppress high-frequency electromagnetic oscillations and signal crosstalk, optimize the electromagnetic performance of the display module, and solve problems such as screen flickering, horizontal lines, and uneven display caused by high-frequency interference in traditional bonding structures. At the same time, it will not interfere with impedance detection, achieving a dual balance between detection function and product performance optimization.

[0055] The detection unit 140 can be a corresponding comparison unit, conversion unit, or other impedance detection unit 140, and the specific structure is not limited.

[0056] Example 2 like Figure 5 As shown, in an optional embodiment, multiple detection units 140 are also connected to a clock signal terminal CLK, and the detection unit 140 includes: Switching circuit 141, the first terminal of switching circuit 141 is connected to positive voltage terminal Vin, and the second terminal of switching circuit 141 is connected to the first signal terminal IO1 of detection unit 140. Switching circuit 141 is used to turn on and output voltage to the second signal terminal IO2 of detection unit 140 according to the clock signal Clk of clock signal terminal CLK. Impedance conversion circuit 142 is connected to the first signal terminal IO1 and the second signal terminal IO2 of detection unit 140 respectively. Impedance conversion circuit 142 is used to convert the bonding impedance positive correlation into a voltage signal. The stage transmission circuit 143 is connected to the impedance conversion circuit 142, the detection unit 140 of the previous stage or the start signal terminal, and the detection unit 140 of the next stage, respectively. The stage transmission circuit 143 is used for: Pre-charge is performed based on the start signal STV or the stage transmission signal output by the previous stage detection unit 140, and the voltage signal is converted into a stage transmission signal when a voltage signal is received, and the stage transmission signal is reset and cut off when the stage transmission signal output by the next stage detection unit 140 is received. Comparison circuit 144 is connected to stage transmission circuit 143. Comparison circuit 144 is used to compare the stage transmission signal with the threshold voltage and output a high or low level signal characterizing the detection information Te.

[0057] In this embodiment, all cascaded detection units 140 are synchronously connected to the system clock signal terminal CLK, receiving a unified clock signal Clk. This ensures the synchronization of the working timing of the multiple detection units 140, avoiding detection failures and data misalignment caused by timing errors. Each detection unit 140 adopts a modular design, internally integrating four functional sub-units: a switching circuit 141, an impedance conversion circuit 142, a cascading circuit 143, and a comparison circuit 144. These four sub-units work in sequence to fully realize all functions of bonding impedance detection, cascaded transmission, anomaly detection, and signal output.

[0058] The equivalent impedance of the flexible circuit board and the impedance between the gold fingers of the flexible circuit board can be equivalent to the first impedance R01. The bonding impedance between the gold fingers and the corresponding signal pads 11 can be expressed as the second impedance R02. The first impedance R01 and the second impedance R02 are connected in series. The second end of the switch circuit 141 is connected to the first end of the first impedance R01. The impedance conversion circuit 142 is connected to both ends of the first impedance R01. The switch circuit 141 is the front-end control module of the detection unit 140. The first end of the switch circuit 141 is connected to the positive voltage terminal Vin to obtain a stable detection power supply voltage. The second end of the switch circuit 141 is connected to the second signal terminal IO2 of the detection unit 140 and directly connected to the gold finger detection channel. The control terminal of the switching circuit 141 is connected to the clock signal terminal CLK. It receives the clock signal Clk sent by the signal source 200 throughout the process. It achieves precise switching according to the high and low level changes of the clock signal Clk and synchronously outputs a matching detection voltage to the second signal terminal IO2 of the detection unit 140. This provides a stable voltage input basis for subsequent impedance acquisition and voltage conversion, ensuring that the input voltage reference is consistent for each detection.

[0059] Impedance conversion circuit 142 establishes bidirectional electrical connections with the first signal terminal IO1 and the second signal terminal IO2 of detection unit 140. The function of impedance conversion circuit 142 is to realize the linear conversion between impedance parameters and voltage parameters, converting the bonding impedance value, which cannot be directly acquired, into an identifiable and comparable analog voltage signal, and the magnitude of the output voltage signal is positively correlated with the bonding impedance value. When the bonding process is normal and the impedance value is within the standard range, the converted output voltage signal is within the standard range; when defects such as bonding misalignment, poor ACF particle bursting, loose connection, or microcracks cause abnormally high impedance, the converted output voltage signal will shift synchronously, providing accurate signal basis for subsequent anomaly judgment.

[0060] The first impedance R01 and the second impedance R02 are connected in series and connected to the positive voltage terminal Vin and the ground terminal. The impedance conversion circuit 142 scales the voltage of the second impedance R02, i.e., the bonding impedance, and outputs a voltage signal. The voltage of the second impedance R02 is Vb = VDD * R02 / (R01 + R02). Each bonding impedance is different. When there is a deviation or the bonding particle explosion effect is not good, the second impedance R02 is much larger than the normal value, resulting in different voltages of the corresponding second impedance R02. When the voltages are different, the voltage signal output by the impedance conversion circuit 142 is different. The larger the second impedance R02, the larger the voltage signal.

[0061] The cascade circuit 143 is the timing transmission module for the multi-stage detection array and is the core structure for realizing channel-by-channel ordered detection. The cascade circuit 143 is connected to the impedance conversion circuit 142, the previous stage detection unit 140 or the start signal terminal, and the next stage detection unit 140, respectively, and undertakes the full timing operation of signal pre-charging, signal conversion, stage-by-stage transmission, and reset cutoff.

[0062] The specific working logic is as follows: In the initial stage of detection, the system receives the start signal STV or the stage transmission signal OUTn-1 from the previous detection unit 140 to complete the pre-charging operation of the internal energy storage structure and prepare for detection. When the impedance conversion circuit 142 outputs a voltage signal, the stage transmission circuit 143 receives the voltage signal and completes the signal conversion, generating the stage transmission signal OUTn that can be transmitted stage by stage and sending it to the next detection unit 140. When the system receives the stage transmission signal OUTn+1 from the next detection unit 140, it triggers an internal reset operation, cuts off the signal output of the current stage, completes the single-channel detection cycle, and waits for the next round of detection timing to be triggered.

[0063] The comparator circuit 144 is a detection result determination module. Its input terminal is connected to the output terminal of the cascade circuit 143, receiving the voltage signal output by the cascade circuit 143 throughout the process. The comparator circuit 144 has a preset fixed threshold voltage, which corresponds to the industry standard bonding impedance critical value and can be flexibly adjusted according to different products and process requirements. The comparator circuit 144 compares the received detection voltage signal with the preset threshold voltage in real time, and outputs corresponding high and low level signals based on the comparison result. These high and low level signals represent the detection information Te, which characterizes the current channel bonding impedance status. The system can quickly determine whether the bonding quality is qualified by reading the level status.

[0064] The switching circuit 141, impedance conversion circuit 142, stage transmission circuit 143 and comparator circuit 144 can adopt corresponding switch, comparator unit and other structures, and the specific structure is not limited.

[0065] Example 3 In an alternative embodiment, such as Figure 6As shown, the switching circuit 141 includes a first transistor M1. The first terminal of the first transistor M1 is connected to the positive voltage terminal Vin, the second terminal of the first transistor M1 is connected to the second signal terminal IO2 of the detection unit 140, and the control terminal of the first transistor M1 is connected to the clock signal terminal CLK. Impedance conversion circuit 142 includes a second transistor M2 and a first resistor R1; The first terminal of the second transistor M2 is connected to the second signal terminal IO2 of the detection unit 140, the control terminal of the second transistor M2 is connected to the first signal terminal IO1 of the detection unit 140, the second terminal of the second transistor M2 is connected to the first terminal of the first resistor R1 to form the output terminal of the impedance conversion circuit 142, and the second terminal of the first resistor R1 is grounded.

[0066] The stage transmission circuit 143 includes a third transistor M3, a fourth transistor M4, a fifth transistor M5, a sixth transistor M6, and an energy storage capacitor C1; The first terminal and control terminal of the third transistor M3 are connected to the output terminal or start signal terminal of the transmission circuit 143 of the previous detection unit 140. The second terminal of the third transistor M3, the first terminal of the fifth transistor M5, the control terminal of the fourth transistor M4, and the first terminal of the energy storage capacitor C1 are connected. The first terminal of the fourth transistor M4 is connected to the output terminal of the impedance conversion circuit 142. The second terminal of the fourth transistor M4, the second terminal of the energy storage capacitor C1, and the first terminal of the sixth transistor M6 are connected to form the output terminal of the transmission circuit 143. The control terminals of the fifth transistor M5 and the sixth transistor M6 are connected to the output terminal of the transmission circuit 143 of the next detection unit 140. The second terminals of the fifth transistor M5 and the sixth transistor M6 are grounded.

[0067] The comparator circuit 144 includes a second resistor R2, a comparator U1, and a seventh transistor M7; The first end of the second resistor R2 is connected to the positive voltage terminal Vin, and the second end of the second resistor R2 is connected to the non-inverting input terminal of comparator U1. The inverting input terminal of comparator U1, the control terminal of the seventh transistor M7, and the output terminal of the cascade circuit 143 are connected. The output terminal of comparator U1 is connected to the first end of the seventh transistor M7, and the second end of the seventh transistor M7 constitutes the output terminal of comparator circuit 144.

[0068] In this embodiment, reference Figure 7As shown, P is the terminal voltage of the first resistor R1, and A is the gate voltage of the fourth transistor M4. The switching circuit 141 adopts a single-transistor independent control architecture. The first transistor M1 is an NMOS thin-film transistor. The first terminal of the first transistor M1 is directly connected to the positive voltage terminal Vin of the circuit to continuously obtain a stable positive voltage. The second terminal of the first transistor M1 is connected to the second signal terminal IO2 of the detection unit 140, which is directly connected to the gold finger detection channel and is responsible for outputting the detection voltage to the detection circuit. The control terminal of the first transistor M1 is connected to the clock signal terminal CLK to receive the clock signal Clk.

[0069] The specific operating timing of the switching circuit 141 completely follows the changes in the clock signal Clk, such as... Figure 7 As shown, when the clock signal Clk is high, the gate-source voltage of the first transistor M1 meets the conduction condition, the transistor is fully turned on, and the voltage signal at the positive voltage terminal Vin is transmitted to the second signal terminal IO2 through the first transistor M1 to power the bonding impedance detection circuit. The first impedance R01 and the second impedance R02 divide the voltage and start single-channel impedance acquisition. When the clock signal Clk is low, the first transistor M1 is quickly turned off, cutting off the voltage input of the detection circuit and ending the single detection. This achieves millisecond-level fast start and stop detection, ensuring overall detection efficiency.

[0070] The impedance conversion circuit 142 consists of a second transistor M2 connected in series with a first resistor R1, forming a voltage sampling circuit structure to achieve linear conversion from bonding impedance to voltage signal. The second transistor M2 also uses an NMOS thin-film transistor, possessing excellent linear conduction characteristics to ensure the accuracy of the impedance-to-voltage conversion. The first terminal of the second transistor M2 is connected to the second signal terminal IO2 of the detection unit 140 to synchronously acquire the detection voltage output by the switching circuit 141; the control terminal of the second transistor M2 is connected to the first signal terminal IO1 of the detection unit 140 to sense the potential change corresponding to the impedance change of the bonding circuit in real time.

[0071] The first impedance R01 and the second impedance R02 are connected in series between the first transistor M1 and the ground terminal. The terminal voltage of the second impedance R02 is Vb = VDD * R02 / (R01 + R02). Each bonding impedance is different. When there is a deviation or the bonding particle explosion effect is not good, the second impedance R02 is much larger than the normal value, resulting in different terminal voltages of the corresponding second impedance R02. When the terminal voltages are different, the conduction state of the second transistor M2 is different. The larger the terminal voltage, the larger the current of the second transistor M2. Correspondingly, the larger the terminal voltage of the first resistor R1, the larger the voltage signal obtained by the impedance conversion circuit 142.

[0072] The third transistor M3 acts as a pre-charge control transistor, responsible for implementing the pre-charge function of the cascade circuit 143. The first terminal of the third transistor M3 is shorted to the control terminal, and connected to the output terminal of the cascade circuit 143 of the preceding detection unit 140, receiving the cascade signal OUTn-1 from the preceding detection unit 140. Alternatively, the third transistor M3 of the first detection unit 140 can be directly connected to the start signal terminal to receive the start signal STV. The second terminal of the third transistor M3 is simultaneously connected to the first terminal of the fifth transistor M5, the control terminal of the fourth transistor M4, and the first terminal of the energy storage capacitor C1. Trigger signals or cascade signals transmitted from the preceding stage can be transmitted to the energy storage capacitor C1 through the third transistor M3, completing the pre-charge of the energy storage capacitor C1.

[0073] The fourth transistor M4 acts as the output control transistor, responsible for controlling the output and transmission of the detection signal in this stage. The first terminal of the fourth transistor M4 is connected to the output terminal of the impedance conversion circuit 142, directly receiving the voltage signal after impedance conversion. The second terminal of the fourth transistor M4 is connected to the second terminal of the energy storage capacitor C1 and the first terminal of the sixth transistor M6. This node is the final output terminal of the transmission circuit 143, used to output the transmission signal of this stage. The conduction state of the fourth transistor M4 is directly controlled by the pre-charge potential of the energy storage capacitor C1. After pre-charging, the fourth transistor M4 has the basis for conduction, and can open the output path after receiving the voltage signal.

[0074] The fifth transistor M5 and the sixth transistor M6 together form a reset discharge unit, responsible for loop reset, charge release, and signal cutoff after single-channel detection is completed. The control terminals of the fifth transistor M5 and the sixth transistor M6 are shorted and connected to the output terminal of the cascade circuit 143 of the subsequent detection unit 140. The reset action is triggered by the cascade signal of the subsequent stage. The second terminals of the fifth transistor M5 and the sixth transistor M6 are grounded to ensure that the charge can be quickly discharged to the ground during reset.

[0075] refer to Figure 7As shown, the complete operating timing of the stage transmission circuit 143 is divided into four stages. The first stage is clock trigger detection. After the clock signal Clk is pulled high, the switching circuit 141 is turned on, the impedance conversion circuit 142 outputs the corresponding voltage, and the loop forms the initial potential. The second stage is pre-charge trigger. The previous stage transmission signal OUTn-1 or the start signal STV triggers the third transistor M3 to conduct, the energy storage capacitor C1 completes pre-charge, and the gate potential of the fourth transistor M4 is pulled high. The third stage is signal output coupling. The voltage signal is input to the fourth transistor M4, and with the coupling boost effect of the energy storage capacitor C1, the fourth transistor M4 is fully turned on and outputs the stage transmission signal OUTn. The fourth stage is reset cutoff. The next stage transmission signal OUTn+1 triggers the fifth transistor M5 and the sixth transistor M6 to conduct, the two ends of the energy storage capacitor C1 discharge rapidly, the output of this stage is turned off, the single-cycle detection and reset is completed, and it waits for the next round of timing trigger.

[0076] The second resistor R2 is a threshold voltage divider and current-limiting resistor. Its first terminal is connected to the positive voltage terminal Vin to obtain a stable reference voltage input. Its second terminal is connected to the non-inverting input terminal of comparator U1, providing a fixed reference threshold voltage for comparator U1. This reference threshold voltage can be flexibly adjusted using the matching resistor value or a sliding rheostat, making it highly adaptable to different display module models and impedance standards of different bonding processes.

[0077] The inverting input of comparator U1 is the detection signal input, which is directly connected to the output of the stage circuit 143. The working logic of comparator U1 is bidirectional voltage comparison, continuously comparing the standard threshold voltage at the non-inverting input with the detection voltage at the inverting input.

[0078] The output of comparator U1 is connected to the control terminal of the seventh transistor M7, and the switching on and off of the seventh transistor M7 is controlled by changes in the output level. The first terminal of the seventh transistor M7 is connected to the output of comparator U1, and the second terminal serves as the signal output terminal of the entire comparator circuit 144, outputting the final detection alarm level signal for the system to read and identify.

[0079] The specific judgment logic is as follows: when the bonding process is qualified and the bonding impedance is within the standard range, the voltage of the converted stage transmission signal is less than the preset threshold voltage, the comparator U1 outputs a high level, triggering the seventh transistor M7 to conduct and output a high level. The system determines that the bonding impedance of the current channel is qualified and there is no abnormality. When defects such as bonding misalignment, poor ACF particle bursting, loose connection, or micro-crack occur, the bonding impedance exceeds the standard significantly. The converted voltage signal is greater than the preset threshold voltage, the comparator U1 outputs a low level, the seventh transistor M7 conducts and outputs a low level. The system quickly identifies the current channel impedance abnormality, triggers an alarm, and realizes automated defect screening and accurate positioning.

[0080] The beneficial effects of the present invention embodiment compared with the prior art are as follows: The bonding impedance detection circuit 100 mentioned above includes multiple first switches 110, multiple second switches 120 and multiple detection units 140. The multiple first switches 110 are connected to multiple signal pads 11 and ground terminals of multiple display panels. The multiple second switches 120 are connected between each gold finger and common line 130. The detection unit 140 is connected to a corresponding gold finger and common line 130. The detection unit 140 detects the bonding impedance of a matched gold finger and signal pad 11, realizing single detection, improving detection accuracy, and realizing orderly detection of multiple bonding channels, realizing step-by-step triggering and step-by-step transmission, improving detection efficiency. At the same time, after the test is completed, the first switches 110 and second switches 120 are turned off, and the signal pads 11 and gold fingers can achieve normal bonding effect and signal transmission, realizing normal switching between test mode and working mode.

[0081] Example 4 The present invention also proposes a bonding impedance detection device, such as Figure 1 As shown, the bonding impedance detection device includes a signal source 200 and a bonding impedance detection circuit 100. The specific structure of the bonding impedance detection circuit 100 is as described in the above embodiments. Since this bonding impedance detection device adopts all the technical solutions of all the above embodiments, it has at least all the beneficial effects brought about by the technical solutions of the above embodiments, and will not be described in detail here. The signal source 200 is connected to the bonding impedance detection circuit 100, and the signal source 200 is used to output corresponding current signals, clock signals Clk, positive voltage, and start signals STV.

[0082] In this embodiment, the signal source 200 is the driving module of the bonding impedance detection device, which establishes an electrical connection with the bonding impedance detection circuit 100 and can stably output various timing signals and power supply voltages required for the operation of the bonding impedance detection circuit 100. Specifically, these include a preset current I0, a clock signal Clk, a positive voltage, and a start signal STV. These various signal parameters are precisely matched to the working requirements of the detection circuit, ensuring synchronous detection timing, stable power supply, and accurate triggering.

[0083] In test mode, signal source 200 provides a clock signal Clk, a positive voltage, and a start signal STV. The clock signal Clk is a high-frequency PWM pulse signal that can precisely control the on / off timing of the switching circuit 141 of each detection unit 140. The output positive voltage is a stable DC voltage, providing a reference power supply voltage for impedance conversion, signal comparison, and cascade transmission of the entire detection circuit, avoiding detection data deviation caused by voltage fluctuations. The start signal STV is the start trigger signal for the detection array, which precisely controls the start timing of the first detection unit 140, ensuring that the multi-level cascaded detection array starts up in an orderly manner and works sequentially, avoiding multi-channel detection timing disorder.

[0084] The signal source 200 still outputs a preset current I0 in the working mode. The preset current I0 is transmitted to the first switch 110 and the second switch 120 through the gold finger, and controls the first switch 110 and the second switch 120 to blow. The electrical connection between the signal pad 11 and the ground terminal, and between the gold finger and the common line 130 is completely cut off, so that the detection circuit structure such as the detection unit 140 and the common line 130 is completely isolated from the front-end bonding gold finger and signal pad 11.

[0085] The signal source 200 can be a corresponding timing controller, various signal output modules, etc., and the specific structure is not limited.

[0086] The above-described embodiments are only used to illustrate the technical solutions of the present invention, and are not intended to limit it. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention, and should all be included within the protection scope of the present invention.

Claims

1. A bonding impedance detection circuit for detecting the bonding impedance between the gold fingers of a flexible circuit board and the signal pads of a display panel, characterized in that, The signal pads are arranged side by side in sequence along the first direction, and the gold fingers are bonded one by one to the pads in sequence along the first direction. The bonding impedance detection circuit includes: Multiple first switches, each of the signal pads is connected to ground via a first switch, the first switch being controlled to be turned on in test mode and controlled to be turned off in operating mode; Multiple second switches, wherein the first end of each gold finger is connected to the first end of a second switch, and the second ends of the second switches are connected to a common line. The second switches are used for controlled conduction in test mode and controlled deactivation in working mode. Multiple detection units are cascaded in sequence. The first signal terminal of each detection unit is connected to the common line, and the second signal terminal of each detection unit is connected to the second end of a gold finger. The first detection unit is used to detect the bonding impedance of the connected gold fingers according to the start signal and output detection information and output transmission signal to the next detection unit. The first end and the second end of the gold finger are the two ends of the extension direction of the gold finger. The i-th detection unit is used to detect the bonding impedance of the connected gold fingers according to the transmission signal and output detection information and output the transmission signal to the next detection unit, where i is greater than 1 and i is a positive integer. The second end of each of the gold fingers is connected to a signal source. In the test mode, the gold finger does not receive a current signal output by the signal source. In the working mode, the gold finger receives a preset current output by the signal source. The preset current is greater than or exceeds a threshold current. The first switch and the second switch are fuses. The first switch and the second switch melt when the threshold current is received, and remain in a conducting state when the preset current is not received.

2. The bonding impedance detection circuit as described in claim 1, characterized in that, The display panel further includes a first grounding pad. The gold fingers include a plurality of signal gold fingers and a first grounding gold finger arranged side by side along the first direction. The plurality of signal gold fingers are respectively bonded to the plurality of signal pads. The first grounding gold finger is bonded to the first grounding pad and is grounded. The plurality of signal gold fingers are respectively connected to the first grounding pad through a plurality of first switches.

3. The bonding impedance detection circuit as described in claim 2, characterized in that, The display panel further includes a second grounding pad. The gold fingers include a second grounding gold finger, a plurality of signal gold fingers, and a first grounding gold finger arranged side by side along the first direction. The second grounding gold finger is bonded to the second grounding pad and is grounded. The plurality of signal gold fingers are respectively connected to the first grounding pad and the second grounding pad through a plurality of the first switches.

4. The bonding impedance detection circuit as described in claim 3, characterized in that, The common line is arranged around the signal gold finger, and the bonding impedance detection circuit further includes: The third switch is connected in series between the second grounding gold finger and the common line. The third switch is also connected to the last detection unit. The third switch is used to trigger shutdown when no cascade signal is received from the last detection unit, and to trigger conduction when a cascade signal is received from the last detection unit.

5. The bonding impedance detection circuit as described in any one of claims 1 to 4, characterized in that, The plurality of detection units are also connected to a clock signal terminal, and the detection unit includes: A switching circuit, wherein the first terminal of the switching circuit is connected to the positive voltage terminal, and the second terminal of the switching circuit is connected to the second signal terminal of the detection unit, the switching circuit being used to turn on and output a corresponding voltage to the second signal terminal of the detection unit according to the clock signal of the clock signal terminal; An impedance conversion circuit is connected to the first signal terminal and the second signal terminal of the detection unit, respectively. The impedance conversion circuit is used to convert the bonding impedance positive correlation into a voltage signal. A cascading transmission circuit is connected to the impedance conversion circuit, the detection unit or start signal terminal of the preceding stage, and the detection unit of the following stage, respectively. The cascading transmission circuit is used for: Pre-charge is performed based on the start signal or the stage transmission signal output by the detection unit of the previous stage, and the voltage signal is converted into the stage transmission signal when the voltage signal is received, and the stage transmission signal is reset and the output of the stage transmission signal is stopped when the stage transmission signal output by the detection unit of the next stage is received. A comparison circuit is connected to the transmission circuit. The comparison circuit is used to compare the transmission signal with a threshold voltage and output a high or low level signal characterizing the detection information.

6. The bonding impedance detection circuit as described in claim 5, characterized in that, The switching circuit includes a first transistor, a first terminal of the first transistor is connected to the positive voltage terminal, a second terminal of the first transistor is connected to the second signal terminal of the detection unit, and a control terminal of the first transistor is connected to the clock signal terminal. The impedance conversion circuit includes a second transistor and a first resistor; The first terminal of the second transistor is connected to the second signal terminal of the detection unit, the control terminal of the second transistor is connected to the first signal terminal of the detection unit, the second terminal of the second transistor is connected to the first terminal of the first resistor to form the output terminal of the impedance conversion circuit, and the second terminal of the first resistor is grounded.

7. The bonding impedance detection circuit as described in claim 5, characterized in that, The cascade circuit includes a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, and an energy storage capacitor; The first terminal and control terminal of the third transistor are connected to the output terminal or start signal terminal of the cascade circuit of the detection unit in the previous stage. The second terminal of the third transistor, the first terminal of the fifth transistor, the control terminal of the fourth transistor, and the first terminal of the energy storage capacitor are connected. The first terminal of the fourth transistor is connected to the output terminal of the impedance conversion circuit. The second terminal of the fourth transistor, the second terminal of the energy storage capacitor, and the first terminal of the sixth transistor are connected to form the output terminal of the cascade circuit. The control terminals of the fifth transistor and the sixth transistor are connected to the output terminal of the cascade circuit of the detection unit in the next stage. The second terminals of the fifth transistor and the second terminals of the sixth transistor are grounded.

8. The bonding impedance detection circuit as described in claim 5, characterized in that, The comparison circuit includes a second resistor, a comparator, and a seventh transistor; The first end of the second resistor is connected to the positive voltage terminal, the second end of the second resistor is connected to the non-inverting input terminal of the comparator, the inverting input terminal of the comparator, the control terminal of the seventh transistor and the output terminal of the cascade circuit are connected, the output terminal of the comparator is connected to the first end of the seventh transistor, and the second end of the seventh transistor constitutes the output terminal of the comparator circuit.

9. A bonding impedance detection device, characterized in that, It includes a signal source and a bonding impedance detection circuit as described in any one of claims 1 to 8, wherein the signal source is connected to the bonding impedance detection circuit, and the signal source is used to output corresponding current signals, clock signals, positive voltages, and start signals.

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