A band-pass signal link construction method based on front-back coupling

Abstract

The application discloses a kind of based on front and rear coupling band communication signal link construction method, it is related to band communication signal link construction technical field, including: according to the basic circuit topology of signal acquisition circuit, form reconfigurable link;Link planning model is built;Identify signal processing scene, to be based on the spectrum characteristics and interference characteristics of scene demand, quantitative index analysis is carried out, target parameter is determined;Target parameter is imported into link planning model, executes the filter mode topology analysis and parameter scaling configuration based on scene preset rule, determines target signal link;Determine coupling connection strategy and unit element value matrix, obtain reconfigurable acquisition circuit.The application solves the technical problem that existing fixed structure filter circuit cannot be flexibly modified and is difficult to compatible with multiple signal acquisition, achieves the adaptive topology reconstruction and parameter automatic configuration of multi-scene signal acquisition circuit, improves the scene adaptation capability and filter processing precision of signal acquisition circuit.

Description

Technical Field

[0001] This invention relates to the field of bandpass signal link construction technology, and specifically to a method for constructing a bandpass signal link based on front-end and back-end coupling. Background Technology

[0002] Most existing signal acquisition and filtering circuits adopt a fixed topology structure with hardware specifications. Component selection and circuit soldering are completed before leaving the factory, and the circuit link form and filtering parameters cannot be modified later. They can only carry out acquisition operations for single frequency band and single type of signal. When facing the test signal with different characteristics such as communication, bioelectricity, and vibration, the entire hardware circuit board needs to be replaced. Not only is the equipment versatility poor and the hardware replacement cost high, but manual adjustment of component parameters is also time-consuming and difficult to quickly match the different spectrum and anti-interference requirements of various signals, which seriously limits the applicability and flexibility of the acquisition equipment.

[0003] The existing fixed-structure filter circuits cannot be flexibly modified and are difficult to be compatible with the acquisition of multiple types of signals. Summary of the Invention

[0004] This application provides a method for constructing a bandpass signal link based on front-to-back stage coupling, which addresses the technical problem that existing fixed-structure filter circuits cannot be flexibly modified and are difficult to be compatible with the acquisition of multiple types of signals.

[0005] In view of the above problems, this application provides a method for constructing a bandpass signal link based on front-end and rear-end coupling.

[0006] This application provides a method for constructing a bandpass signal link based on front-to-back stage coupling, the method comprising: Based on the basic circuit topology of the signal acquisition circuit, the unit elements in the basic circuit topology are reconstructed through connection topology structure reconstruction under the coupling planning of the preceding and following stages and the order allocation planning to form cascaded, parallel, or hybrid reconfigurable links. Based on the basic circuit topology, a link planning model is built, which includes a first connection mode matching module and a second projection matching module. The signal processing scenario is identified, and target parameters are determined by quantization analysis based on the spectral characteristics and interference characteristics required by the scenario. The target parameters are determined by the signal center frequency, bandwidth, stopband attenuation, and dynamic range. The target parameters are imported into the link planning model, and filtering mode topology analysis and parameter scaling configuration based on scenario preset rules are performed to determine the target signal link. Based on the target signal link, the coupling connection strategy and unit element numerical matrix are determined, and responded to the corresponding unit elements and programmable analog switch matrix in the signal acquisition circuit to obtain the reconstructed acquisition circuit.

[0007] One or more technical solutions provided in this application have at least the following technical effects or advantages: Based on the basic circuit topology of the signal acquisition circuit, a link planning model is built. Signal processing scenarios are identified, and target parameters are determined through quantization analysis of the spectral and interference characteristics based on scenario requirements. These target parameters are then imported into the link planning model, and topology analysis and parameter scaling configuration based on scenario-preset rules are performed to determine the target signal link. Based on the target signal link, coupling connection strategies and unit element numerical matrices are determined, and responses are sent to the corresponding unit elements and programmable analog switch matrices in the signal acquisition circuit to obtain a reconstructed acquisition circuit. This achieves adaptive topology reconstruction and automatic parameter configuration for signal acquisition circuits in multiple scenarios, improving the scenario adaptability and filtering accuracy of the signal acquisition circuit. Attached Figure Description

[0008] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0009] Figure 1 A flowchart illustrating a method for constructing a bandpass signal link based on front-to-back coupling, provided in an embodiment of this application; Figure 2 This is a schematic diagram illustrating the process of obtaining the reconstructed signal in a bandpass signal link construction method based on front-to-back coupling provided in an embodiment of this application. Detailed Implementation

[0010] This application provides a method for constructing a bandpass signal link based on front-to-back stage coupling, which addresses the technical problem that existing fixed-structure filter circuits cannot be flexibly modified and are difficult to be compatible with the acquisition of multiple types of signals.

[0011] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the scope of protection of this application.

[0012] Examples, such as Figure 1 As shown, this application provides a method for constructing a bandpass signal link based on front-to-back stage coupling, the method comprising: Step S100: Based on the basic circuit topology of the signal acquisition circuit, the unit elements in the basic circuit topology are reconstructed through the connection topology structure under the coupling planning of the preceding and following stages and the order allocation planning to form cascaded, parallel or hybrid reconfigurable links.

[0013] Specifically, link reconstruction is carried out based on a predetermined basic circuit topology of the signal acquisition circuit. The basic circuit topology is the inherent basic arrangement and original electrical connection architecture of various unit components such as resistors, capacitors, and operational amplifiers that make up the bandpass signal link. The electrical connection relationship between all unit components is adjusted according to two design principles: front-to-back stage coupling planning and order allocation planning. The hardware switching implementation of the aforementioned component connection relationship is exemplarily achieved by using a programmable analog switch matrix to complete the line switching and topology switching. This implementation is only a preferred implementation scheme. Any similar hardware devices or equivalent electrical connection means that can realize component line switching and link topology reconstruction fall within the scope of application of this technical solution. Through the above-mentioned reconstruction and optimization of connection relationship, three reconfigurable bandpass signal links with three structural forms can be constructed according to the architectural requirements of different application scenarios such as communication, bioelectricity, and vibration: filter unit cascade arrangement, filter branch parallel arrangement, or a hybrid arrangement of cascade and parallel combination. The reconfigurable link can adapt to the input signal under test with different spectral characteristics and interference characteristics, and serves as the hardware carrier for subsequent link planning model to carry out topology matching, parameter configuration, and final reconstruction of the acquisition circuit.

[0014] Step S200: Based on the basic circuit topology, build a link planning model, wherein the link planning model includes a first connection pattern matching module and a second projection matching module.

[0015] Specifically, based on a defined basic circuit topology, a link planning model is built to automatically generate bandpass signal links. This link planning model is a core processing unit with topology matching and parameter calculation functions. It integrates two functional sub-units: a first connection mode matching module and a second projection matching module. The first connection mode matching module is used to match the filter order, structural form, and basic circuit framework according to the scenario requirements to complete the initial construction of the filter topology. The second projection matching module is used to simplify and reconstruct the initial circuit topology, perform projection and frequency impedance scaling calculations, and generate configuration vectors of component values ​​and switching states. The two modules work together to achieve adaptive determination of the target signal link.

[0016] Step S300: Identify the signal processing scenario, and determine the target parameters by performing quantitative index analysis based on the spectral characteristics and interference characteristics required by the scenario. The target parameters are determined by the signal center frequency, bandwidth, stopband attenuation and dynamic range.

[0017] Specifically, the signal processing scenario in the current application is automatically identified. Based on the inherent spectral and interference characteristics of typical signals in this scenario, quantitative index analysis is performed. The spectral characteristics represent the distribution of signal energy with frequency, while the interference characteristics represent the frequency and amplitude characteristics of noise and spurious signals within the scenario. By quantifying and calculating these characteristics, target parameters that meet the filtering requirements of the scenario are determined. These target parameters are jointly defined by the signal center frequency, bandwidth, stopband attenuation, and dynamic range. The signal center frequency is the target signal center frequency that needs to be retained; the bandwidth is the minimum frequency range of the signal allowed to pass; the stopband attenuation is the degree of suppression of out-of-band interference; and the dynamic range is the ratio of the maximum signal amplitude to the minimum signal amplitude that the signal link can withstand. This provides a clear quantitative design basis for subsequent link construction.

[0018] Step S400: Import the target parameters into the link planning model, perform filtering mode topology analysis and parameter scaling configuration based on scenario preset rules, and determine the target signal link.

[0019] Specifically, the determined target parameters are imported into the constructed link planning model. According to the pre-defined scenario rules for different application scenarios, the filtering mode topology analysis and parameter scaling configuration operations are executed sequentially. The filtering mode topology analysis is completed by the first connection mode matching module within the link planning model. It is used to match the filter order and structural form and generate the first construction data to complete the initialization of the basic circuit topology. The parameter scaling configuration is performed by the second projection matching module on the initialized circuit topology to perform simplified reconstruction projection and frequency impedance conversion calculation, generating the second configuration vector. Finally, by combining the first construction data and the second configuration vector, the target signal link that can fully match the scenario spectrum and interference suppression requirements is determined, which serves as the core basis for subsequent hardware reconstruction.

[0020] Step S500: Based on the target signal link, determine the coupling connection strategy and the unit element numerical matrix, and respond to the corresponding unit element and programmable analog switch matrix in the signal acquisition circuit to obtain the reconstructed acquisition circuit.

[0021] Specifically, based on the determined target signal link, a coupling connection strategy and a unit element numerical matrix that perfectly match it are generated. The coupling connection strategy is a set of binary configurations used to control the on / off states of each switch in the programmable analog switch matrix, and the unit element numerical matrix is ​​a set of precise parameter configurations assigned to each basic unit element such as resistors and capacitors in the topology. The configuration signals of the above two sets of matrices are synchronously responded to the corresponding unit elements and programmable analog switch matrix inside the signal acquisition circuit. By adjusting the element parameters and switch connection relationships, the original basic circuit topology is reconstructed into a hardware circuit that meets the scene filtering requirements, and finally the reconstructed acquisition circuit is obtained.

[0022] In one possible implementation, step S400 further includes: Step S410: Based on the first connection mode matching module, identify the target parameters and perform filter order and structural morphology matching according to the scene preset rules to determine the first construction data.

[0023] Step S420: Initialize the basic circuit topology based on the first construction data to determine the initialization circuit topology.

[0024] Step S430: Transfer the initialization circuit topology flow to the second projection matching module, perform simplified reconstruction projection, and determine the second configuration vector.

[0025] Step S440: Generate the target signal link based on the first construction data and the second configuration vector.

[0026] Specifically, the first connection mode matching module within the link planning model reads the signal center frequency, bandwidth, stopband attenuation, and dynamic range values ​​from the target parameters through registers. It first calculates the quality factor Q based on the ratio of bandwidth to center frequency, then determines the minimum order of the filter by looking up a table in conjunction with the stopband attenuation requirement. At the same time, it matches the Q value, filter type, and topology library according to the scenario preset rules, selects the cascaded, parallel, or hybrid structure, and finally outputs the first construction data containing the filter structure type, number of stages, connection method, and topology framework.

[0027] Based on the initial construction data, a three-stage initialization configuration of the basic circuit topology is carried out: First, the first connection mode matching module matches the target parameters with the built-in filter parameter template item by item to generate a basic circuit framework adapted to the scenario; second, based on the filter order, structural form and connection method contained in the initial construction data, the connection method adaptive configuration and order setting are performed on each filter substructure in the basic circuit framework to form an initial filter structure; finally, for the initial filter structure, the smallest unit element is allocated and selected from the unit element library of the basic circuit topology, and the electrical connection relationship between the elements is analyzed and arranged to accurately connect the initial filter structure with the basic circuit topology, complete the topology link adjustment, and finally obtain an initial circuit topology with a fixed structure and complete connection relationship.

[0028] The initialization circuit topology, which has completed structural initialization, is transmitted to the second projection matching module in the link planning model. This module performs simplified reconstruction projection processing on the initialization circuit topology: first, it decomposes the overall index into the target center frequency and target bandwidth corresponding to each filter substructure based on the target parameters; then, it converts the above frequency index into pole position constraints; and completes a frequency-impedance projection calculation by calling the pre-stored filter coefficient library to obtain the frequency scaling factor and impedance scaling factor. Finally, it determines the programmable capacitance value, resistance value, and switch on / off state of the unit elements in each filter substructure based on the two types of scaling factors, thereby generating the second configuration vector for hardware configuration.

[0029] The first construction data output by the first connection mode matching module and the second configuration vector output by the second projection matching module are fused and comprehensively verified. The filter topology, connection method, number of stages and frame layout determined by the first construction data are used as the basis for the main structure of the link. The frequency scaling factor, impedance scaling factor, resistance / capacitance values ​​and switch on / off states contained in the second configuration vector are used as the basis for component parameters and electrical connections. The structural information and parameter information are bound one by one to form a complete link scheme in which the structure and parameters fully match the requirements of the scenario. Finally, a target signal link that can be directly used for hardware reconstruction is generated.

[0030] In one possible implementation, step S420 further includes: Step S421: The first connection mode matching module interacts with the filter parameter template to perform template matching on the target parameters and obtain the basic circuit framework.

[0031] Step S422: Based on the first construction data, adaptively configure the connection method and level of each filter substructure in the basic circuit framework to obtain the initial filter structure.

[0032] Step S423: For the initial filter structure, the smallest unit components under the filter line are allocated, selected, and linked for analysis to obtain the initialization circuit topology, wherein the link adjustment is performed between the basic circuit topology and the initialization circuit topology.

[0033] Specifically, the first connection mode matching module interacts with the built-in filter parameter template to compare and match the determined target parameters with the standard filter characteristics stored in the filter parameter template item by item. Combined with the three sets of filter structures contained in the first bandpass signal link and the second bandpass signal link in the front-end design, the unit components such as resistors and capacitors inside each filter are selected in detail and their electrical connection relationships are allocated. The topology and combination form of each filter sub-module are clarified, and finally a basic circuit framework with a clear structure that meets the filtering requirements of the scenario is formed.

[0034] Based on the initial configuration data, the initial filter structure is determined in two steps: adaptive connection mode and stage configuration. First, the first connection mode matching module reads the scene type, quality factor Q, and structural morphology information from the initial configuration data. According to the scene preset rules, it automatically selects cascaded, parallel, or mixed connection methods, matching the high-pass, low-pass, and fully differential amplifier filter substructures within the basic circuit framework according to the signal flow direction, thus achieving adaptive connection mode. Second, based on the stopband attenuation A in the target parameters... s The Chebyshev / Butterworth filter order estimation formula is used. Calculate the minimum total order required, where A p For passband attenuation, f s For the stopband frequency, f p The passband cutoff frequency is set, and the total order is evenly distributed to each filter substructure of the two links according to the symmetrical constraints of the first and second bandpass signal links. This completes the order setting and hierarchical arrangement of each stage, and finally obtains an initial filter structure with matching parameters, fixed connections, and clear hierarchy.

[0035] For the initial filter structure with completed connection methods and stage configurations, the minimum unit components such as resistors, capacitors, and programmable switches preset in the basic circuit topology are used as the selection library. According to the impedance requirements, frequency parameters, and symmetry constraints of each filter sub-circuit, the minimum unit components with corresponding values ​​and specifications are assigned to each filter branch. At the same time, the port connection relationship of all selected components is analyzed point by point to determine the series and parallel relationships between components, signal flow direction, and node positions. Then, based on the physical ports, coupling nodes, and differential symmetry structure of the basic circuit topology, the initial filter structure is docked, corrected, and linked with the basic circuit topology to ensure topology compatibility, signal path integrity, and matching of front and rear stage coupling. Finally, an initial circuit topology with clear component selection, fixed connection relationships, and direct parameter projection calculation is obtained.

[0036] In one possible implementation, step S430 further includes: Step S431: Based on the target parameters, decompose them into the target center frequency and target bandwidth of each filter substructure in the initialization circuit topology.

[0037] Step S432: Convert the target center frequency and the target bandwidth into pole position requirements, and obtain the frequency scaling factor and impedance scaling factor by performing a frequency-impedance projection calculation based on the pre-stored filter coefficient library.

[0038] Step S433: Based on the frequency scaling factor and impedance scaling factor, generate the programmable capacitance value, resistance value and switch on / off state of each unit element in the corresponding filter substructure, as the second configuration vector.

[0039] Specifically, the target parameters, including the overall center frequency and passband bandwidth, are retrieved. Combined with the order ratio of each filter substructure within the initialization circuit topology, the series and parallel arrangement of links, and the frequency division rules, the frequency domain indicators of the whole machine are decomposed level by level according to the multi-level filter frequency allocation weight. The exclusive target center frequency and target bandwidth corresponding to each independent filter substructure in the topology are calculated one by one, providing a sub-term frequency domain reference for subsequent pole conversion and parameter scaling.

[0040] First, the target center frequency of a single filter substructure. First, perform parameter conversion for the target bandwidth B by... , Convert angular frequency, where Represents the target center angular frequency, For the target center frequency, B represents the angular frequency corresponding to the filter bandwidth, and B represents the target bandwidth. Let π be the circumference constant; then substitute it into the quality factor formula. Q is the quality factor of the filter substructure, and then the second-order conjugate poles are calculated using the formula. Solve for the coordinates of the pole, where These are two conjugate poles in the complex frequency domain, where j represents the imaginary unit. The pole position constraints are formed based on the calculated pole coordinates. Then, a pre-stored normalized prototype filter coefficient library is retrieved, and a prototype circuit with pole matching is selected to extract the prototype normalized angular frequency. Prototype reference impedance ,use Determine the frequency scaling factor. The preset reference impedance transformation factor is the impedance scaling factor, where... It is the frequency scaling factor. For the prototype normalized angular frequency, The impedance scaling factor is used to perform a single frequency impedance projection calculation using the above formula, ultimately yielding the frequency scaling factor and the impedance scaling factor.

[0041] Based on the frequency scaling factor and impedance scaling factor obtained from the solution, the normalized reference resistor value and reference capacitor value in the prototype circuit are retrieved. According to the conversion formula that the actual resistance is equal to the reference resistance multiplied by the impedance scaling factor and the actual capacitance is equal to the reference capacitance divided by the product of the frequency scaling factor and the impedance scaling factor, the tuning parameters of all resistors and programmable capacitors in each filter substructure are calculated one by one. Then, combined with the predetermined series and parallel structure and link arrangement logic of the initialization circuit topology, the on or off conditions of each programmable analog switch are calibrated one by one. All component resistance value, capacitance value data and switch state data are systematically summarized, grouped and integrated into a complete and usable second configuration vector.

[0042] In one possible implementation, step S400 further includes: Step S450: The scenario preset rules are used for link structure mode constraints. Specifically, the communication scenario corresponds to narrowband high-Q characteristics and uses a cascaded structure; the bioelectric signal scenario corresponds to low-mid frequency wide bandwidth and uses an embedded notch filter branch structure; the vibration signal scenario corresponds to multi-frequency characteristics and uses a parallel bandpass structure.

[0043] Specifically, the scenario-preset rules pre-define corresponding link structure constraint items according to different application conditions. Based on the measured filtering indicators, bandwidth range, and attenuation thresholds corresponding to various scenarios, standard link templates are pre-entered. During the link selection stage, the total number of filtering links, the number of filters under each link, and the allowed topology forms of cascaded, parallel, or mixed connection for each filtering unit are limited from the structural level. At the same time, the matching rules of the front and rear interface and the differential link layout specifications are constrained to achieve hard constraints on the overall link structure mode, providing a basis for judgment in the early order selection and topology construction.

[0044] Among them, the scenario-preset rules are divided into structural constraint details according to the signal application category. The communication scenario signal has the characteristics of narrowband high quality factor. Therefore, the constraint link adopts a cascaded arrangement structure with multi-level filters connected end to end. The bioelectric signal is concentrated in the low and mid frequency range and has a relatively large passband width. The corresponding constraint topology embeds a dedicated notch filter branch to eliminate power frequency interference. A composite structure with a notch filter branch is selected. The vibration signal covers multiple discrete frequency points and has the requirement of multi-frequency band acquisition. Under the constraint of the rules, a parallel structure with multiple bandpass filters is adopted. The link structure mode constraint is completed by limiting the three types of scenario-differentiated structures.

[0045] In one possible implementation, step S500 further includes: A signal acquisition circuit is deployed, wherein the signal acquisition circuit includes a first bandpass signal link and a second bandpass signal link constructed based on a front-end input coupling unit, a fully differential amplifier unit, a rear-end output coupling unit and an analog-to-digital converter unit connected in sequence.

[0046] Specifically, a signal acquisition circuit suitable for scenarios with a 20kHz sampling rate, low power consumption, and high anti-interference capability is deployed. This signal acquisition circuit internally constructs a first bandpass signal link and a second bandpass signal link that operate in parallel with a symmetrical structure. Both bandpass signal links are composed of a pre-stage input coupling unit, a fully differential amplifier unit, a post-stage output coupling unit, and an analog-to-digital converter unit connected in sequence. The pre-stage input coupling unit is used to achieve DC isolation and primary high-pass filtering of the input signal. The fully differential amplifier unit includes a symmetrical multi-feedback network and an output RC low-pass circuit, which is used for differential signal amplification and to collaboratively form a third-order low-pass filter characteristic. The post-stage output coupling unit is used for output-stage high-pass filtering and signal isolation matching. The analog-to-digital converter unit is used to convert the conditioned analog signal into a digital signal. The two bandpass signal links naturally form an accurate bandpass response through pre-stage coupling and the inherent feedback network, without the need for an additional independent filter chip.

[0047] Establish a connection between the signal terminal and the signal acquisition circuit, and obtain the signal source based on the signal terminal.

[0048] Specifically, an electrical connection is established between the external signal terminal to be acquired and the aforementioned signal acquisition circuit. The analog electrical signal output from the signal terminal is connected to the signal input interface of the signal acquisition circuit. The analog signal output from the signal terminal is used as the signal source for the entire bandpass signal link. The signal source is a differential output sensor signal or an equivalent differential analog signal after differential driving conversion of a single-ended output signal. It is used to provide a stable and continuous input signal to be processed for the subsequent first and second bandpass signal links, so as to meet the working requirements of low power consumption and high anti-interference signal acquisition and processing at a sampling rate of 20kHz.

[0049] The positive half signal of the signal source is input into the first bandpass signal chain, and the negative half signal is input into the second bandpass signal chain. Three-stage signal processing is performed in parallel. The resulting positive half processed signal and negative half processed signal are input into the analog-to-digital converter to obtain the reconstructed signal.

[0050] Specifically, the differential analog signal output from the aforementioned signal source is divided into a positive half-signal and a negative half-signal. The positive half-signal is input into the first bandpass signal link, and the negative half-signal is input into the second bandpass signal link. The two symmetrical signal links synchronously and in parallel perform a three-stage signal processing consisting of primary high-pass filtering, third-order low-pass filtering, and secondary high-pass filtering, respectively obtaining the positive half-processed signal and the negative half-processed signal. The two processed differential analog signals are then synchronously input into an analog-to-digital converter (ADC). The ADC reconstructs the two complementary signals into a complete single-ended digital output signal through internal subtraction operations, so that the common-mode noise with equal amplitude and phase in the two signals cancels each other out, while the differential signal component is retained and doubled, ultimately forming a reconstructed digital signal that meets the 20kHz sampling rate requirement, has a passband range of 10Hz~5kHz, and has strong power frequency interference suppression capability.

[0051] Specifically, based on the reconstructed signal, symmetrical failure verification of the first bandpass signal link and the second bandpass signal link is performed in reverse.

[0052] Specifically, after acquiring the reconstructed digital signal output by the analog-to-digital converter, a reverse verification is performed based on the amplitude, noise level, and waveform integrity characteristics of the reconstructed signal. Symmetrical failure verification is carried out on the first and second bandpass signal links. By monitoring the consistency and output stability of the processed signals of the two links, it is determined whether there are symmetrical failures such as abnormal signal amplitude attenuation, abnormal noise level increase, or waveform distortion. This confirms whether the two bandpass signal links maintain structural symmetry, parameter matching, and normal working status, ensuring the reliability and accuracy of the signal acquisition and processing process.

[0053] One possible implementation also includes: The pre-stage input coupling unit includes a symmetrical positive input branch and a negative input branch. The positive input branch is connected to the non-inverting input pin of the fully differential amplifier via a first coupling capacitor and a first resistor in series, with the amplifier's own input impedance serving as the ground path. The negative input branch is connected to the inverting input pin of the fully differential amplifier via a second coupling capacitor and a second resistor in series. The positive input branch acts as a first high-pass filter, and the negative input branch acts as a second high-pass filter, used for DC isolation and high-pass filtering of the input signal.

[0054] Specifically, the pre-stage input coupling unit is a functional module in the signal acquisition circuit that implements DC isolation of the input stage and primary high-pass filtering. It consists of a positive input branch and a negative input branch with a completely symmetrical structure and matched electrical parameters. The two branches correspond to the positive and negative input parts of the differential signal, respectively. The symmetrical topology ensures the common-mode rejection performance of the fully differential amplifier unit, providing a symmetrical input foundation for the subsequent construction of the first high-pass filter, the second high-pass filter, and the overall bandpass response, thus meeting the design requirements of a 20kHz sampling rate signal acquisition system for a low-distortion and high-interference-resistant input stage.

[0055] The positive input branch is the path for processing the positive differential signal in the pre-stage input coupling unit. It is composed of a first coupling capacitor and a first resistor connected in series. The output of the series connection is connected to the non-inverting input pin of the fully differential amplifier. The signal is transmitted to the non-inverting input of the fully differential amplifier through the first coupling capacitor and the first resistor. The inherent input impedance of the fully differential amplifier is used as the signal grounding path. Together with the first coupling capacitor and the first resistor, it forms a high-pass filter structure for DC isolation and low-frequency interference filtering of the input positive signal.

[0056] The negative input branch is a negative differential signal processing path in the pre-stage input coupling unit that is symmetrical and parameter-matched with the positive input branch. It is composed of a second coupling capacitor and a second resistor connected in series. The output of this series branch is directly connected to the inverting input pin of the fully differential amplifier. Together with the positive input branch, it forms a fully differential input structure for transmitting the negative differential signal and forming a second high-pass filter. This achieves DC isolation and ultra-low frequency noise filtering of the negative input signal, ensuring the consistency and symmetry of the two differential signal processing paths, and supporting the accurate construction of subsequent symmetrical third-order low-pass filtering and overall bandpass response.

[0057] The positive input branch, consisting of the first coupling capacitor, the first resistor, and the input impedance of the fully differential amplifier, is defined as the first high-pass filter. The negative input branch, consisting of the second coupling capacitor, the second resistor, and the input impedance of the fully differential amplifier, is defined as the second high-pass filter. The two high-pass filters are symmetrically matched and perform DC isolation and primary high-pass filtering on the input positive and negative differential signals, respectively. This effectively filters out DC offset and extremely low-frequency noise in the signal, providing a DC-free and low-noise differential input signal for the third-order low-pass filtering stage in the subsequent fully differential amplifier unit. Together with the subsequent circuitry, they form a target bandpass response of 10Hz to 5kHz, while suppressing power frequency interference without the need for a dedicated notch filter circuit.

[0058] One possible implementation also includes: The fully differential amplifier unit includes a first third-order low-pass filter connected to the non-inverting output of the fully differential amplifier, and a second third-order low-pass filter connected to the inverting output. The non-inverting output of the fully differential amplifier is connected to a feedback network, forming a second-order multi-feedback low-pass filter; and a series branch is led out from the non-inverting output to form a first-order low-pass filter. By cascading the second-order multi-feedback low-pass filter and the first-order low-pass filter, the first and third-order low-pass filters are obtained.

[0059] Specifically, the fully differential amplifier unit is the core module in the signal acquisition circuit that realizes signal amplification and high-frequency filtering. It uses a fully differential amplifier as the core device and integrates two sets of third-order low-pass filters with identical filtering architecture and strictly matched electrical parameters. The connection architecture of the in-phase and out-of-phase filters is the same, specifically including a first third-order low-pass filter connected to the in-phase output of the fully differential amplifier and a second third-order low-pass filter connected to the out-of-phase output of the fully differential amplifier. Both sets of filters are composed of a second-order multi-feedback low-pass filter and a first-order RC low-pass filter cascaded together. They are used to perform synchronous high-frequency filtering on the differential signal after the previous high-pass filtering. The same high-frequency cutoff frequency f_H is set to effectively suppress high-frequency noise and aliasing interference, meet the anti-aliasing filtering requirements of the 20kHz sampling rate signal acquisition system, and provide stable and consistent high-frequency cutoff characteristics for the overall bandpass response.

[0060] The non-inverting output of the fully differential amplifier is connected to a feedback network consisting of a feedback capacitor, a feedback resistor, and an input stage resistor. This feedback network forms a second-order multi-feedback low-pass filter. Simultaneously, a series branch consisting of a series resistor and a grounding capacitor is led out from the non-inverting output to form a first-order low-pass filter. The second-order multi-feedback low-pass filter and the first-order low-pass filter are cascaded to form a first- or third-order low-pass filter with stable high-frequency cutoff characteristics. This filter can achieve rapid attenuation of high-frequency noise and interference signals, providing reliable anti-aliasing filtering capability for a 20kHz sampling rate system, and working in conjunction with the high-pass filters before and after to form the target bandpass response.

[0061] One possible implementation also includes: The feedback network includes a first branch and a second branch connected in parallel. The first branch is formed by a first feedback capacitor and a first feedback resistor connected in series, and the second branch is formed by a second feedback resistor. The second branch is formed by connecting the second feedback resistor and a first grounding capacitor in series and then grounding them.

[0062] Specifically, the feedback network is the core topology for constructing a second-order multi-feedback low-pass filter. This network includes a first branch and a second branch connected in parallel. The first branch is formed by connecting a first feedback capacitor and a first feedback resistor in series, while the second branch is formed by a second feedback resistor alone. The two branches, connected in parallel, together with the first resistor in the input stage and the fully differential amplifier, form a second-order multi-feedback low-pass filter structure. By adjusting the resistor and capacitor parameters, the quality factor Q can be set between 0.5 and 1.0, and the natural frequency fn can be set between 5kHz and 10kHz. This provides stable second-order filtering characteristics for subsequent cascading to form a first and third-order low-pass filter, adapting to the anti-aliasing filtering requirements of a 20kHz sampling rate signal acquisition system.

[0063] The second branch uses the second feedback resistor as the core component. The second feedback resistor is connected in series with the first grounding capacitor and then connected to the analog ground. This constitutes the series branch used to form a first-order low-pass filter in this invention. This series branch is cascaded with the second-order multi-feedback low-pass filter composed of the feedback network in the preceding sequence to form a first third-order low-pass filter. The cutoff frequency of the first-order low-pass filter is set by coordinating the parameters of the second feedback resistor and the first grounding capacitor, so that the -3dB cutoff frequency of the overall third-order low-pass filter is stabilized at 8kHz±1kHz, which meets the anti-aliasing filtering requirements of the 20kHz sampling rate signal acquisition system. High-frequency interference can be rapidly attenuated without the need to add an additional independent filter chip.

[0064] One possible implementation also includes: The subsequent output coupling unit includes a positive output coupling capacitor and a negative output coupling capacitor. The positive output coupling capacitor is connected in series between the non-inverting output of the fully differential amplifier and the positive input pin of the analog-to-digital converter, forming a third high-pass filter. The negative output coupling capacitor is connected in series between the inverting output of the fully differential amplifier and the negative input pin of the analog-to-digital converter, forming a fourth high-pass filter.

[0065] Specifically, the output coupling unit is a functional module located between the fully differential amplifier unit and the analog-to-digital converter unit, used to achieve DC isolation in the output stage and high-pass filtering in the secondary stage. This unit includes a symmetrically structured and parameter-matched positive output coupling capacitor and a negative output coupling capacitor, which correspond to the non-inverting output terminal and the inverting output terminal of the fully differential amplifier, respectively. It is used to form a secondary high-pass filtering characteristic in conjunction with the input impedance of the subsequent analog-to-digital converter unit, further filtering out residual low-frequency noise and isolating DC components. Together with the preceding high-pass filter and the third-order low-pass filter, it forms an overall bandpass response of 10Hz~5kHz. At the same time, it can suppress power frequency interference without the need for a dedicated notch filter circuit, which is suitable for the low power consumption and high anti-interference design requirements of a 20kHz sampling rate signal acquisition system.

[0066] The positive output coupling capacitor is connected in series between the non-inverting output of the fully differential amplifier and the positive input pin of the analog-to-digital converter. The positive output coupling capacitor and the input impedance of the analog-to-digital converter together form a third high-pass filter, which is used to perform low-frequency filtering and DC isolation on the positive signal output by the first third-order low-pass filter. The corresponding third low-frequency cutoff frequency f_L3 is set, and together with the first high-pass filter and the first third-order low-pass filter, they form the bandpass response of the positive path, providing output stage high-pass support for the construction of the overall 10Hz~5kHz target passband, and adapting to the low power consumption and high anti-interference operation requirements of the 20kHz sampling rate signal acquisition system.

[0067] The negative output coupling capacitor is connected in series between the inverting output of the fully differential amplifier and the negative input pin of the analog-to-digital converter. The negative output coupling capacitor and the input impedance of the analog-to-digital converter together form a fourth high-pass filter, which is used to perform secondary low-frequency interference filtering and DC isolation on the negative signal output by the second and third order low-pass filters. The corresponding fourth low-frequency cutoff frequency f_L4 is set to maintain the parameter symmetry with the third high-pass filter in the positive path. Together with the second high-pass filter and the second and third order low-pass filters, it forms the bandpass response of the negative path, ensuring the consistency of the two differential signal processing. It provides output stage filtering support for the high anti-interference and low power consumption operation of the overall 10Hz~5kHz target passband and 20kHz sampling rate system.

[0068] One possible implementation also includes: According to the signal acquisition circuit, the overall bandpass response based on the first high-pass filter, the first third-order low-pass filter and the third high-pass filter is used as the first bandpass signal link.

[0069] The overall bandpass response based on the second high-pass filter, the second third-order low-pass filter, and the fourth high-pass filter is used as the second bandpass signal link.

[0070] Specifically, the first bandpass signal link performs positive half-part signal processing, and the second bandpass signal link performs negative half-part signal processing.

[0071] Specifically, based on the aforementioned configured signal acquisition circuit, the complete filtering channel formed by the cascaded first high-pass filter, first third-order low-pass filter, and third high-pass filter is defined as the first bandpass signal link. This link relies on the first high-pass filter of the front-stage input coupling unit to achieve primary DC isolation and low-frequency filtering, the first third-order low-pass filter of the fully differential amplifier unit to achieve high-frequency interference suppression and anti-aliasing filtering, and then the third high-pass filter of the rear-stage output coupling unit to perform secondary low-frequency filtering and DC isolation. The three filtering structures work together to form a unified overall bandpass response. Its passband range is determined by the larger of the low-frequency cutoff frequency f_L1 of the first high-pass filter and the low-frequency cutoff frequency f_L3 of the third high-pass filter, and the high-frequency cutoff frequency f_H of the first third-order low-pass filter. It can accurately achieve the target passband characteristics of 10Hz~5kHz without the need for additional independent filter chips and dedicated notch circuits, thus meeting the design requirements of a 20kHz sampling rate signal acquisition system for low power consumption, high anti-interference, and low distortion vertical differential signal processing.

[0072] The symmetrical overall bandpass response formed by the cascading of a second high-pass filter, a second-third-order low-pass filter, and a fourth high-pass filter is defined as the second bandpass signal link. This link is a negative differential signal processing channel in the signal acquisition circuit with the same structure and parameters as the first bandpass signal link. The second high-pass filter in the pre-stage input coupling unit provides primary DC isolation and extremely low-frequency noise filtering for the negative input signal. The second-third-order low-pass filter in the fully differential amplifier unit provides high-frequency interference suppression and anti-aliasing filtering to adapt to the 20kHz sampling rate. The secondary low-frequency filtering and DC isolation are achieved by the fourth high-pass filter of the output coupling unit. The three-stage filtering structure works together to form a stable and consistent overall bandpass characteristic. Its passband range is determined by the larger value of the low-frequency cutoff frequency f_L2 of the second high-pass filter and the low-frequency cutoff frequency f_L4 of the fourth high-pass filter, and the high-frequency cutoff frequency f_H of the second and third-order low-pass filters. It can accurately achieve the target passband of 10Hz~5kHz. It can meet the working requirements of low power consumption, high common-mode rejection and strong power frequency interference suppression without the need for additional filter chips and notch circuits.

[0073] The first bandpass signal link is specifically responsible for performing complete bandpass processing on the positive half of the differential analog signal output by the signal source, while the second bandpass signal link is specifically responsible for performing completely symmetrical bandpass processing on the negative half of the differential analog signal. The two links adopt the same topology and matching electrical parameters, and independently complete the entire signal conditioning process from high-pass filtering, third-order low-pass filtering to output-stage high-pass filtering, maintaining a high degree of consistency in the amplitude, phase, and bandwidth of the positive and negative signals. They work together to achieve a target passband of 10Hz~5kHz and power frequency interference suppression, providing a stable, low-distortion, and highly anti-interference differential input signal for the analog-to-digital converter, and adapting to the low-power, symmetrical differential processing requirements of a 20kHz sampling rate signal acquisition system.

[0074] In one possible implementation, such as Figure 2 As shown, step S500 further includes: The positive half signal of the signal source is input into the first bandpass signal link to obtain the positive half processed signal. The signal source is a differential output sensor or a single-ended output analog signal source that has been differentially driven and converted.

[0075] The negative half signal of the signal source is input into the second bandpass signal link to obtain the negative half processed signal.

[0076] The positive half-processed signal and the negative half-processed signal are input into an analog-to-digital converter to obtain a reconstructed signal.

[0077] Specifically, the positive half-signal output by the signal source is input into the first bandpass signal link. This is achieved by matching the output impedance of the signal source with the capacitance values ​​of the first and second coupling capacitors to ensure that the actual cutoff frequency of the input stage high-pass filter is consistent with the target cutoff frequency of the circuit design. After complete bandpass processing by the first bandpass signal link, the positive half-processed signal is obtained. The signal source is a differential output sensor or an analog signal source obtained by converting a single-ended output signal through a differential drive circuit. This provides the signal acquisition circuit with an input signal that meets the requirements of fully differential processing, adapting to the low power consumption and high anti-interference requirements of a 20kHz sampling rate system.

[0078] The negative half-signal output from the signal source is input into a second bandpass signal link that is completely symmetrical in structure and parameters to the first bandpass signal link. It then passes through a second high-pass filter, a second third-order low-pass filter, and a fourth high-pass filter in sequence for coordinated bandpass processing. This completes DC isolation, low-frequency filtering, high-frequency anti-aliasing suppression, and power frequency interference filtering of the negative half-signal. Finally, a negative half-processed signal that is symmetrically matched with the positive half-processed signal and has a stable passband range of 10Hz~5kHz is obtained. This provides a symmetrical, low-distortion negative analog signal for subsequent differential signal synthesis and digital acquisition by the analog-to-digital converter, meeting the requirements of fully differential processing and high anti-interference operation of a 20kHz sampling rate signal acquisition system.

[0079] The positive half-processed signal, processed by the first bandpass signal link, and the negative half-processed signal, processed by the second bandpass signal link, are synchronously input to the differential input port of the analog-to-digital converter (ADC). The differential input characteristics enable signal reconstruction and common-mode noise cancellation. Through differential sampling, subtraction, and digitization within the ADC, the two symmetrical analog signals are synthesized into a complete, distortion-free digital signal with significantly suppressed common-mode interference, ultimately yielding the reconstructed signal. This reconstructed signal has a stable target passband of 10Hz to 5kHz, effectively meeting the high anti-interference, low-noise, and low-power signal acquisition requirements of a 20kHz sampling rate signal acquisition system. It can suppress power frequency interference without the need for additional notch filters.

[0080] In one possible implementation, step S500 further includes: The analog-to-digital converter obtains the reconstructed signal through internal subtraction.

[0081] The analog-to-digital converter reconstructs two complementary half-signals into a complete single-ended digital output value. The common-mode noise components with equal amplitude and phase in the positive half-processed signal and the negative half-processed signal cancel each other out, while the differential-mode signal component is retained and doubled.

[0082] Specifically, after acquiring the positive half-processed signal and the negative half-processed signal of the symmetrical input, the analog-to-digital converter uses its internal differential processing unit to perform a subtraction operation to calculate the difference between the two signals. While completing the common-mode noise cancellation, it restores the complete and effective signal, thereby obtaining a reconstructed signal with a high signal-to-noise ratio and a passband of 10Hz~5kHz. This processing method is fully adapted to the anti-aliasing and high anti-interference requirements of a 20kHz sampling rate signal acquisition system, and can achieve low-power, high-fidelity digital signal output without additional filter chips or notch circuits.

[0083] The analog-to-digital converter (ADC) utilizes its differential signal processing architecture to integrate and reconstruct the two complementary half-signals, the positive half-processed signal and the negative half-processed signal, respectively, ultimately outputting a complete single-ended digital output value. During this signal reconstruction process, the common-mode noise components with equal amplitude and phase contained in the positive and negative half-processed signals can cancel each other out, while the differential-mode signal components carrying effective acquisition information are completely preserved and their amplitude is doubled. This effectively improves the common-mode rejection capability and effective signal-to-noise ratio of the overall signal acquisition system, ensuring the acquisition accuracy and transmission stability of the subsequently reconstructed signal.

[0084] In one possible implementation, step S500 further includes: The positive half signal of the signal source is input into the first bandpass signal link, and DC offset isolation is performed through the first high-pass filter to obtain the first-order processed signal.

[0085] The first-order processed signal is input into a first-third-order low-pass filter to perform differential signal amplification and high-frequency filtering to obtain a second-order processed signal.

[0086] The second-order processed signal is input into a third high-pass filter to perform low-frequency filtering, resulting in a positive half-processed signal.

[0087] The first high-pass filter, the first third-order low-pass filter, and the third high-pass filter are assembled by linking component units.

[0088] Specifically, the positive half-signal output from the signal source is fully connected to the input of the first bandpass signal link. This positive half-signal is first fed into the first high-pass filter deployed before the first bandpass signal link. With the help of the capacitor DC blocking topology and impedance matching characteristics of the first high-pass filter, the DC offset component and ultra-low frequency interference component superimposed on the positive half-signal are specifically blocked and filtered out, blocking the DC potential from being conducted to the subsequent circuit. Only the effective AC signal that meets the design passband requirements is allowed to pass through normally. After the first-stage signal conditioning, which completes the DC offset isolation and low-frequency noise filtering, the first-order processed signal is stably output. This completes the first-stage signal preprocessing of the first bandpass signal link, providing a compliant pre-input signal for the high-frequency noise reduction filtering operation of the subsequent first and third-order low-pass filters.

[0089] The first-order processed signal, generated after the first high-pass filter isolates DC offset and filters out ultra-low frequency interference, is completely sent to the first third-order low-pass filter configured in the first bandpass signal link. Relying on the circuit topology of the first third-order low-pass filter, which is composed of a second-order multi-feedback low-pass filter unit and a first-order RC low-pass filter unit cascaded together, and in conjunction with the amplification characteristics of the fully differential amplifier, the differential signal amplification of the input first-order processed signal is completed simultaneously. At the same time, high-frequency noise, radio frequency interference, and aliasing interference signals that exceed the set passband range are accurately filtered out. The effective differential signal is amplitude normalized and high-frequency noise is suppressed. After the above-mentioned amplification, integration, and high-frequency filtering secondary signal conditioning processing, the second-order processed signal is stably output, thereby providing a reliable intermediate stage input signal for the final DC isolation and low-frequency optimized filtering of the subsequent third high-pass filter.

[0090] The second-order processed signal, generated after differential signal amplification and high-frequency clutter filtering by the first third-order low-pass filter, is sequentially input into the third high-pass filter at the end of the first bandpass signal link. This third high-pass filter, relying on the passive high-pass filter topology formed by the output coupling capacitor and the input impedance of the load, accurately filters out and performs secondary DC isolation on the residual low-frequency spurious components, residual DC components, and useless ultra-low frequency interference signals in the second-order processed signal. It further optimizes the signal passband characteristics, eliminates invalid low-frequency components outside the passband, and retains only the effective AC differential signal that meets the system design specifications. After the third high-pass filter completes the final conditioning process of low-frequency filtering and signal shaping at the end, the positive half-processed signal is finally stably output, thus fully realizing the multi-level collaborative filtering and signal optimization of the entire first bandpass signal link.

[0091] Among them, the first high-pass filter, the first third-order low-pass filter and the third high-pass filter are all selected from the basic component unit library with corresponding resistors and programmable capacitors. They are connected in series and parallel according to the predetermined topology arrangement and interconnected with nodes. The electrical connection between the component units constitutes the complete hardware topology of the three types of filter devices, thereby meeting the circuit operation requirements of their respective DC isolation, high and low frequency filtering and differential amplification.

[0092] In one possible implementation, step S400 further includes: By verifying the reconstructed signal, a symmetrical failure judgment is made between the first bandpass signal link and the second bandpass signal link.

[0093] Among them, when there is signal amplitude attenuation or abnormal increase in noise level, it is judged as a symmetrical failure.

[0094] Specifically, by real-time acquisition and detection of the reconstructed signal output from the analog-to-digital converter, the operating status and symmetry integrity of the first and second bandpass signal links are verified and analyzed, and symmetry failure is determined. The amplitude and noise level characteristics of the reconstructed signal are used as the core judgment criteria. When a significant amplitude attenuation or an abnormal increase in overall noise level is detected in the reconstructed signal, it can be determined that the two bandpass signal links have experienced symmetry failure. The reason for this is that once a fault such as an open circuit or device damage occurs in the positive or negative half-branch, the multi-stage filtering, signal amplification, and signal transmission processes of the faulty branch will be abnormal or the effective signal will be interrupted. This causes the positive and negative half-processed signals at the differential input of the analog-to-digital converter to lose their equal amplitude and opposite phase matching symmetry, resulting in a significant reduction in the output amplitude of the reconstructed signal compared to normal operating conditions. The common-mode noise cancellation function of the differential architecture is lost, and asymmetric interference noise cannot be effectively suppressed, causing an increase in the system noise floor. This achieves link symmetry integrity detection and accurate fault identification based on changes in reconstructed signal parameters.

[0095] In the process of real-time sampling and parameter detection of the reconstructed signal output by the analog-to-digital converter, if the measured results show a significant attenuation of the effective signal amplitude or an abnormal increase in the overall background noise level compared to the normal operating reference parameters, it can be determined that a symmetrical failure has occurred between the first bandpass signal link and the second bandpass signal link. This type of abnormal condition is usually caused by faults such as open circuits or device failures in the positive or negative half-branch. The faulty branch will experience signal transmission interruption or abnormal signal conditioning, causing the positive half-processed signal and the negative half-processed signal input to the analog-to-digital converter to lose their differential symmetry characteristics of equal amplitude and opposite phase. This weakens the differential amplification and common-mode cancellation effect, and ultimately manifests as a decrease in the amplitude of the output reconstructed signal, accumulation of asymmetric noise, and a significant increase in noise level. This is used as a quantitative judgment basis to complete the identification of link symmetry failure.

[0096] It should be noted that the order of the embodiments described above is for descriptive purposes only and does not represent the superiority or inferiority of the embodiments. Specific embodiments of this specification have been described above. Furthermore, the processes depicted in the accompanying drawings do not necessarily require a specific or sequential order to achieve the desired results. In some embodiments, multitasking and parallel processing are possible or may be advantageous.

[0097] The above description is only a preferred embodiment of this application and is not intended to limit this application. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the protection scope of this application.

[0098] This specification and accompanying drawings are merely illustrative examples of this application and are intended to cover any and all modifications, variations, combinations, or equivalents within the scope of this application. Clearly, those skilled in the art can make various alterations and modifications to this application without departing from its scope. Therefore, if such modifications and variations fall within the scope of this application and its equivalents, this application intends to include such modifications and variations.

Claims

1. A method for constructing a bandpass signal link based on front-to-back stage coupling, characterized in that, The method includes: Based on the basic circuit topology of the signal acquisition circuit, the unit elements in the basic circuit topology are reconstructed through the connection topology structure under the coupling planning of the preceding and following stages and the order allocation planning to form cascaded, parallel or mixed reconfigurable links. Based on the basic circuit topology, a link planning model is built, wherein the link planning model includes a first connection pattern matching module and a second projection matching module. Identify signal processing scenarios, and determine target parameters by performing quantitative index analysis based on the spectral characteristics and interference characteristics required by the scenarios. The target parameters are determined by the signal center frequency, bandwidth, stopband attenuation, and dynamic range. The target parameters are imported into the link planning model, and the filtering mode topology analysis and parameter scaling configuration based on the scenario preset rules are performed to determine the target signal link. The scenario preset rules are divided into corresponding link structure constraint items according to different application conditions. The measured filtering indicators, bandwidth range and attenuation thresholds corresponding to various scenarios are pre-entered into the standard link template. During the link selection stage, the total number of filtering links, the number of filters under each link and the topology form that each filtering unit can use, such as cascade, parallel or mixed connection, are limited from the structural level. At the same time, the interface matching rules of the front and rear stages and the differential link layout specifications are constrained. Based on the target signal link, the coupling connection strategy and unit element numerical matrix are determined, and the corresponding unit element and programmable analog switch matrix in the signal acquisition circuit are responded to to obtain the reconstructed acquisition circuit. Perform filtering mode topology analysis and parameter scaling configuration based on scene-preset rules to determine the target signal link, including: According to the first connection mode matching module, the target parameters are identified and the filter order and structural form are matched according to the scene preset rules to determine the first construction data; Based on the first construction data, the basic circuit topology is initialized to determine the initialization circuit topology; The initialization circuit topology is transferred to the second projection matching module to perform simplified reconstruction projection and determine the second configuration vector. The target signal link is generated based on the first constructed data and the second configuration vector; The basic circuit topology is initialized, and the initialization circuit topology is determined, including: The first connection pattern matching module interacts with the filter parameter template to perform template matching on the target parameters, thereby obtaining the basic circuit framework; Based on the first construction data, the connection mode and series configuration of each filter substructure in the basic circuit framework are adaptively performed to obtain the initial filter structure. For the initial filter structure, the smallest unit components under the filter line are allocated, selected, and linked to obtain the initialization circuit topology, wherein the link adjustment is performed between the basic circuit topology and the initialization circuit topology. Perform a simplified reconstruction projection to determine the second configuration vector, including: Based on the target parameters, the parameters are decomposed into the target center frequency and target bandwidth of each filter substructure in the initialization circuit topology; The target center frequency and the target bandwidth are converted into pole position requirements. Based on the pre-stored filter coefficient library, the frequency scaling factor and impedance scaling factor are obtained through a first frequency-impedance projection calculation. Based on the frequency scaling factor and impedance scaling factor, the programmable capacitance value, resistance value and switch on / off state of each unit element in the corresponding filter substructure are generated as the second configuration vector.

2. The method as described in claim 1, characterized in that, The scenario-preset rules are used for link structure mode constraints; Among them, the communication scenario corresponds to narrowband high-Q characteristics, so a cascaded structure is selected; the bioelectric signal scenario corresponds to low-mid frequency wide bandwidth, so an embedded notch filter branch structure is selected; and the vibration signal scenario corresponds to multi-frequency characteristics, so a parallel bandpass structure is selected.

3. The method as described in claim 1, characterized in that, The reconstructed acquisition circuit includes a scenario link, comprising: A signal acquisition circuit is deployed, wherein the signal acquisition circuit includes a first bandpass signal link and a second bandpass signal link constructed based on a front-end input coupling unit, a fully differential amplifier unit, a rear-end output coupling unit and an analog-to-digital converter unit connected in sequence; Establish a connection between the signal terminal and the signal acquisition circuit, and obtain the signal source based on the signal terminal; The positive half signal of the signal source is input into the first bandpass signal chain, and the negative half signal is input into the second bandpass signal chain. Three-stage signal processing is performed in parallel. The obtained positive half processed signal and negative half processed signal are input into the analog-to-digital converter to obtain the reconstructed signal. Specifically, based on the reconstructed signal, symmetrical failure verification of the first bandpass signal link and the second bandpass signal link is performed in reverse.

4. The method for constructing a bandpass signal link based on front-to-back stage coupling as described in claim 1, characterized in that, The reconstructed signal is obtained, including: The positive half signal of the signal source is input into the first bandpass signal link to obtain the positive half processed signal, wherein the signal source is a differential output sensor or a single-ended output analog signal source after differential drive conversion; The negative half signal from the signal source is input into the second bandpass signal link to obtain the negative half processed signal; The positive half-processed signal and the negative half-processed signal are input into an analog-to-digital converter to obtain a reconstructed signal.

5. The method for constructing a bandpass signal link based on front-to-back stage coupling as described in claim 4, characterized in that, The analog-to-digital converter obtains the reconstructed signal through internal subtraction. The analog-to-digital converter reconstructs two complementary half-signals into a complete single-ended digital output value. The common-mode noise components with equal amplitude and phase in the positive half-processed signal and the negative half-processed signal cancel each other out, while the differential-mode signal component is retained and doubled.

6. The method for constructing a bandpass signal link based on front-to-back stage coupling as described in claim 5, characterized in that, The positive half signal from the signal source is input into the first bandpass signal link to obtain the positive half processed signal, including: The positive half signal of the signal source is input into the first bandpass signal link, and DC offset isolation is performed through the first high-pass filter to obtain the first-order processed signal; The first-order processed signal is input into the first and third-order low-pass filters to perform differential signal amplification and high-frequency filtering to obtain the second-order processed signal. The second-order processed signal is input into a third high-pass filter to perform low-frequency filtering, resulting in a positive half-processed signal. The first high-pass filter, the first third-order low-pass filter, and the third high-pass filter are assembled by linking component units.

7. The method for constructing a bandpass signal link based on front-to-back stage coupling as described in claim 5, characterized in that, Symmetrical failure verification of the first bandpass signal link and the second bandpass signal link is performed, including: By verifying the reconstructed signal, a symmetrical failure judgment is made between the first bandpass signal link and the second bandpass signal link. Among them, when there is signal amplitude attenuation or abnormal increase in noise level, it is judged as a symmetrical failure.

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