Gateway for fieldbus system

Abstract

A gateway (2) for a fieldbus system (100), wherein the gateway (2) comprises a first processor (6) with a first operating system (62), a second processor (7) with a second operating system (72) which is different from the first operating system (62) and has a virtual Ethernet interface (73), and an inter-processor communication interface (9) which is designed to enable an Ethernet protocol-based inter-process communication between the first operating system (62) and the second operating system (72) using the virtual Ethernet interface (73).

Description

Technical Field

[0001] This disclosure relates to a gateway for a fieldbus system and a fieldbus system having the gateway. Background Technology

[0002] This disclosure pertains to the field of industrial automation or automation technology for industrial applications.

[0003] A fieldbus system can be understood as a bus system that connects field devices (such as measurement sensors or sensors and / or regulating elements or actuators) in a factory to communicate with automation equipment or control units.

[0004] A gateway can be understood as a bridging module that connects two fieldbus networks. For example, a gateway might connect an upstream control unit or control system to one or more fieldbus modules, which in turn could connect to one or more field devices. It's conceivable that the gateway uses a different communication standard for communicating with the control unit than it does for communicating with the fieldbus modules.

[0005] Furthermore, it is conceivable that data exchanged between field devices and the gateway is processed by the gateway using an operating system with real-time capabilities (such as embedded OS firmware, like a (free) RTOS). It is also conceivable that data exchanged between the control system and the gateway is processed by the gateway using an operating system without real-time capabilities (such as Linux).

[0006] Conventionally, real-time operating systems can only be cumbersomely integrated into devices with non-real-time operating systems, such as Linux-based devices. Firmware must be ported to the non-real-time operating system at high cost. However, with the introduction of processor platforms, which include at least one processor for the real-time operating system and another for the non-real-time operating system, both can run or execute in parallel.

[0007] Even if both operating systems have real-time capabilities, because RTLinux, for example, is used as a variant with essentially real-time capabilities, inter-process communication between operating systems running on different processors in a regular system can only be costly.

[0008] Therefore, it also presents a challenge to provide a suitable interface for inter-process communication between an operating system running on one of these processors and another operating system running on the other of these processors. Summary of the Invention

[0009] In the context of the prior art, the purpose of this disclosure is to provide an apparatus suitable for enhancing the prior art.

[0010] The specific objective can be viewed as providing a possibility for inter-process communication between a gateway that can be used in industrial automation technology and two operating systems running in parallel on two different processors, in which proprietary protocols can be omitted.

[0011] This objective is achieved through the features of the independent claim. The tandem main claim and dependent claims each have alternative modifications of this disclosure.

[0012] Accordingly, this objective is achieved through a gateway for a fieldbus system, wherein the gateway includes: a first processor having a first operating system; a second processor having a second operating system, which is different from the first operating system and has a virtual Ethernet interface; and an inter-processor communication interface designed to enable inter-process communication between the first and second operating systems based on the Ethernet protocol when using the virtual Ethernet interface.

[0013] In other words, a gateway for a fieldbus system can be provided, wherein the gateway may include a first processor having a first operating system and a second processor having a second operating system different from the first operating system. The gateway may include an inter-processor communication interface designed to enable inter-process communication based on the Ethernet protocol between the first operating system (optionally executing applications on the first operating system) and the second operating system (optionally executing applications on the second operating system). Here, from the perspective of the second operating system, the first operating system may be a field device.

[0014] For the definitions of gateways and fieldbus systems, please refer to the above text.

[0015] A computer processor can be understood as a programmable calculator, that is, an electronic circuit, which executes actions according to transmitted instructions.

[0016] An operating system can be understood as software or a (computer) program that controls and monitors the execution of tasks or (software) programs through a processor.

[0017] An application (also known as a task or program instance) can be understood as a computer program in execution. An application can be viewed as a specific instance of a program's execution process within a computer system, supplementing that execution process with additional (management) information and resource allocation from the operating system.

[0018] Interprocess communication (IPC) can be understood as a method of exchanging information between processes (within this gateway) on a system (within this operating system). In other words, IPC can be defined as data exchange between two operating systems.

[0019] An inter-processor communication interface (IPC) can be understood as an interface that enables inter-process communication or data exchange between two processors. An interface is part of a system used for communication or data exchange. This interface can be implemented using software and / or hardware. An IPC can have shared memory or be implemented as such memory in hardware, where both processors can access the memory separately for (optionally bidirectional) data exchange.

[0020] The Ethernet protocol can be understood as a standardized or predetermined communication protocol. The Ethernet protocol defines the structure of an Ethernet frame. In addition to the source and destination MAC addresses, data packets or Ethernet frames contain user data, which is currently transmitted via an inter-processor communication interface using inter-process communication.

[0021] As explained in detail above, from the perspective of the second operating system, the first operating system can be a field device in inter-process communication via the inter-processor communication interface. In other words, from the perspective of the second operating system, the operating system of the first processor can be an external IP device. Specifically, this can mean that an operating system with its own MAC address and its own (logical) IP is running on the first processor, such that this operating system can be responded to in the same way as a field device from the perspective of another operating system (which may also be referred to as the host operating system), which is connected to the gateway via a cable and thus to the processor with the host operating system.

[0022] In other words, operating systems running on the same platform can connect via an (internal) IP interface, making them appear to another operating system running on that platform as an IP-based device external to the gateway, or as a field device connected to the gateway. This allows for a high degree of application abstraction, enabling the routing of IP connections using the standard mechanisms of the other operating system. Furthermore, an Ethernet interface can also be established on the connected operating system side to route to the other operating system, which can also be achieved via one or more interfaces associated with the connected operating system.

[0023] Furthermore, through inter-process communication between processors, one processor can benefit from the greater computing power of the other. Therefore, it is conceivable that one of these two processors (e.g., the second processor) has greater computing power than the other (e.g., the first processor). Consequently, compute-intensive applications can be offloaded to the processor with the greater computing power, thus processing data faster.

[0024] The following section details the possible improvements to the aforementioned gateway.

[0025] The inter-processor communication interface may include two message queues. The first message queue can be designed to allow the first operating system to receive data from the second operating system. The second message queue can be designed to allow the first operating system to send data to the second operating system.

[0026] In other words, bidirectional inter-process communication (IPC) between the two processors can be achieved. This bidirectional IPC can be implemented using Ethernet message queues, which are part of the inter-processor communication interface. In a message queue, messages from one process can be sent to one message queue, and messages can be retrieved from that queue by another process. That is, for bidirectional communication, processes in the second operating system can send data to the first message queue, and processes in the first operating system can retrieve that data. Furthermore, processes in the first operating system can send data to the second message queue within the scope of bidirectional communication, and processes in the second operating system can retrieve that data. Since these two message queues are currently part of the inter-processor communication interface, data can be transferred from the first processor to the second processor (and vice versa) via the inter-processor communication interface through inter-process communication.

[0027] It's conceivable that one or two of these message queues could be managed as linked lists. Each of these message queues could have a unique identifier, allowing different processes to identify the queue. It's conceivable that they would operate according to the First-In-First-Out (FIFO) principle. However, these messages could also have priorities. When a process, for example, retrieves a message with priority N, it's conceivable that the process would retrieve the first message with priority N from the queue, even if that first message was, for example, added last.

[0028] The advantage of using message queues is that access to the corresponding message queues can be done through an application programming interface (API) that is already anchored or set up in the corresponding operating system. Therefore, for example, the Ethernet-based wait queue in the Linux operating system already has a corresponding interface. The same applies to real-time operating systems (RTOS).

[0029] It is conceivable that the first operating system is an operating system with real-time capabilities.

[0030] A real-time operating system (RTOS) can be understood as an operating system designed to meet the real-time requirements of applications. This means that the arrival of applications or application requests or signals via the hardware interface must occur within a predetermined time (timeout t). max The data is processed safely within a specified timeframe. The decisive factor here is not the length of time or the deadline, but the existence of a deadline that can be guaranteed to be met. With the help of a real-time operating system, the computer can interact with the physical world, such as with field devices connected to the computer in a measurement and / or control manner.

[0031] The second operating system can be an operating system without real-time capabilities.

[0032] Unlike operating systems with real-time capabilities, operating systems without real-time capabilities can be understood as those where the arrival of applications or signals via hardware interfaces does not occur within a predetermined time (timeout t). max It is processed securely within the system. One advantage of the solution according to this disclosure is that such a non-real-time operating system, typically used for communicating with control systems, can be used with a real-time operating system on a platform.

[0033] It is also conceivable that the first and second operating systems are both real-time operating systems. Additionally or alternatively, one of these two operating systems may be firmware.

[0034] It is conceivable that a separate destination address, IP address, and / or MAC address be assigned to the first and / or second operating systems respectively (at least for inter-process communication).

[0035] An IP address can be understood as an address based on the Internet Protocol (IP). An IP address can be a 32-bit (IPv4) or 128-bit (IPv6) binary number. An IP address can be assigned to a device connected to a network, thus making the device addressable and accessible. An IP address can specify a single recipient or a group of recipients (multicast, broadcast). Conversely, multiple IP addresses can be assigned to a single device. Here, a separate IP address can be assigned to each device—an IP address uniquely assigned to that single device.

[0036] A MAC address (Media Access Control address, also known as a Media Access Code address), or physical address or device address, can be understood as a number assigned to a device (in this case, a processor) on a data connection. This number allows data to be assigned to a device over the data connection. A MAC address is a hardware address that serves as a unique identifier for a device within a computer network.

[0037] In other words, a separate destination address can be assigned to each device (i.e., the processor and / or operating system). Therefore, all operating systems can be reached not only through inter-process communication but also from external sources via fieldbus.

[0038] The gateway may have a first Ethernet interface that is connected to a first processor and an inter-processor communication interface and is designed to connect a first operating system to the inter-processor communication interface for bidirectional inter-process communication.

[0039] In other words, processes of the first operating system can send data to the inter-processor communication interface via the Ethernet interface. This provides the advantage, as mentioned above, that the possibility of outputting data via the Ethernet protocol is already implemented in most operating systems, thus eliminating the need to set up a proprietary interface.

[0040] The first Ethernet interface can be designed to connect a first operating system and, optionally, a second operating system, to the fieldbus for bidirectional data communication.

[0041] Therefore, the (physical) Ethernet interface setup offers another advantage, as it can be used not only for inter-process communication but also for communication with fieldbuses. The Ethernet interface can then be used as a router and determine which device or bus should output the data to based on the destination address contained in the received data.

[0042] The gateway may have a virtual Ethernet interface or a virtual network kernel driver, which is designed to connect a second operating system to an inter-process communication interface for bidirectional inter-process communication.

[0043] Such virtual network kernel drivers are often referred to as TUN / TAP. TUN and TAP are virtual network kernel drivers emulated by network devices in software. TUN stands for network tunnel and TAP stands for network TAP, i.e., network splitter. Although the corresponding hardware in the form of a network interface card (NIC) is usually hidden directly behind the network device (such as eth0), packets sent to the TUN / TAP device are forwarded to programs in user space in the opposite way. To allow user-space programs or applications to also access TUN / TAP devices, they have device files named tunN or tapN under / dev, unlike real Ethernet NICs. TUN emulates an end-to-end network device (OSI Layer 3) and communicates with software via IP packets, while TAP emulates a point-to-point connection via an Ethernet device (OSI Layer 2) and communicates with software via Ethernet frames.

[0044] The gateway may include shared memory, in which the inter-processor communication interface is implemented. In other words, shared memory can be used as an inter-process communication interface for inter-process communication.

[0045] The gateway may have a second Ethernet interface connected to a second processor and designed to connect the first and second operating systems to a fieldbus for bidirectional data communication.

[0046] Furthermore, this disclosure relates to a fieldbus system including the aforementioned gateway.

[0047] The fieldbus system may include field devices and a control center (Leitstelle), wherein the control center is connected to the field devices via the gateway and at least one fieldbus.

[0048] The description of the gateway above also applies to this field device, and vice versa. Attached Figure Description

[0049] The following reference Figure 1 and Figure 2 This disclosure describes alternative embodiments.

[0050] Figure 1 A fieldbus system according to this disclosure is shown, having a gateway according to this disclosure, and

[0051] Figure 2 Detailed Figure 1 Gateway in the system.

[0052] The same reference numerals in the various figures denote the same objects. Detailed Implementation

[0053] exist Figure 1 The diagram schematically illustrates a fieldbus system 100, which includes field devices 1, a gateway 2, and a control center 3. Field device 1 is connected to gateway 2 via a first fieldbus 4 for bidirectional data communication. Control center 3 is connected to gateway 2 via a second fieldbus 5 for bidirectional data communication. The aforementioned devices 1, 2, and 3 of fieldbus system 100 can be networked with each other using industrial Ethernet. Gateway 2 is designed to receive, process, and output data from field device 1 to control center 3 via the first fieldbus 4. Gateway 2 is also designed to receive, process, and output data from control center 3 to field device 1 via the second fieldbus 5. For communication with field device 1, gateway 2 can use a different communication protocol than the one used for communication with control center 3.

[0054] The following reference Figure 2 Gateway 2 will be described in further detail.

[0055] Gateway 2 includes a first processor 6 having a first operating system 62, a second processor 7 having a second operating system 72 different from the first operating system 62, and a shared memory 8, in which an inter-processor communication interface 9 is implemented.

[0056] The first operating system, 62-bit (e.g., RTOS), is a real-time operating system. The second operating system, 72-bit (e.g., Linux), is not a real-time operating system.

[0057] The inter-processor communication interface 9 is designed to enable inter-process communication between the first operating system 62 and the second operating system 72 based on the Ethernet protocol, wherein, from the perspective of the second operating system 72, the first operating system 62 is an external IP device or field device.

[0058] Application 61 can be executed using the first operating system 62. Another application 71 can be executed using the second operating system 72. Information exchanged within the scope of inter-process communication between the two operating systems 62 and 72 can be used by applications 61 and 71, thus enabling inter-process communication between applications 61 and 71, at least indirectly.

[0059] For this purpose, the inter-processor communication interface 9 includes two message queues 91 and 92 (which are attached to the message queues of the TUN / TAP module). The first message queue 91 is designed to allow the first operating system 62 to receive data from the second operating system 72. The second message queue 92 is designed to allow the first operating system 62 to send data to the second operating system 72.

[0060] In order to exchange data with the inter-processor communication interface 9, the first processor 6 and therefore the first operating system 62 are connected to the first (physical) Ethernet interface 10 for bidirectional data communication.

[0061] The first Ethernet interface 10 is also connected to the first fieldbus 4, the inter-processor communication interface 9, and the second processor 72.

[0062] The first Ethernet interface 10 is a router. That is, the first Ethernet interface 10 is designed to determine whether data including the destination address should be output to the first processor 6, the inter-processor communication interface 9, the first fieldbus 4, or the second processor 7 based on the destination address, optionally the MAC address, and / or the IP address received at the first Ethernet interface 10.

[0063] In order to enable the first operating system 62 and the second operating system 72 to be addressed not only from the outside (i.e. via fieldbus 4) but also by means of communication (especially inter-process communication) within the gateway 4, separate destination addresses are assigned to the first operating system 62 and the second operating system 72 respectively.

[0064] In other words, the first Ethernet interface 10 is designed to connect the first operating system 62 to the inter-process communication interface 9 for bidirectional inter-process communication.

[0065] In addition, the first Ethernet interface 10 is designed to connect the first operating system 62 to the first fieldbus 4 for bidirectional data communication.

[0066] Furthermore, the first Ethernet interface 10 is designed to connect the second operating system 72 to the first fieldbus 4 for bidirectional data communication. For this purpose, data is output from the second processor 7 to the first Ethernet interface 10 via the memory 8 and the first processor 6, and the first Ethernet interface then outputs this data to the fieldbus 4. Similarly, data received at the first interface 10 via the fieldbus 4 is output from the first Ethernet interface 10 to the second processor 7 via the first processor 6 and the memory 8.

[0067] Gateway 2, and more specifically, the second processor 7, also includes a virtual network kernel driver 73, which is designed to connect the second operating system 72 to the inter-processor communication interface 9 for bidirectional inter-process communication. Therefore, the virtual network kernel driver 73 is a counterpart to the first Ethernet interface 10 on the second processor 7 side (involving inter-process communication via the inter-processor communication interface 9). The virtual network kernel driver 73 can therefore also be referred to as a virtual Ethernet interface.

[0068] Gateway 2 also includes a second (physical) Ethernet interface 11 connected to the second processor 7. The second Ethernet interface 11 is also a router, just like the first Ethernet interface 10. That is, the second Ethernet interface 11 is designed to determine whether data including the destination address should be output to the first processor 6, the second fieldbus 5, or the second processor 7 based on the destination address, optionally the MAC address, and / or the IP address received at the second Ethernet interface 11.

[0069] In other words, the second Ethernet interface 11 is designed to connect the second operating system 72 to the second fieldbus 4 for bidirectional data communication.

[0070] Furthermore, the second Ethernet interface 11 is designed to connect the first operating system 6 to the second fieldbus 5 for bidirectional data communication. For this purpose, data is output from the first processor 6 via the memory 8 and the second processor 7 to the second Ethernet interface 11, which in turn outputs this data to the fieldbus 5. Similarly, data received at the second interface 11 via the fieldbus 5 is output from the second Ethernet interface 11 to the first processor 6 via the second processor 7 and the memory 8.

[0071] That is, through the above design scheme, inter-process communication between two operating systems running on different processors becomes possible, and in addition, both operating systems can communicate with field device 1 and control center 3.

[0072]

Claims

1. A gateway (2) for a fieldbus system (100), wherein, The gateway (2) includes: - A first processor (6) having a first operating system (62), and - A second processor (7) having a second operating system (72) different from the first operating system (62) and having a virtual Ethernet interface (73). Its features are, - The gateway (2) includes an inter-processor communication interface (9) which is designed to enable inter-process communication between the first operating system (62) and the second operating system (72) based on the Ethernet protocol when using the virtual Ethernet interface (73).

2. The gateway (2) according to claim 1, characterized in that, - The inter-processor communication interface (9) includes two message queues (91, 92). - Wherein, the first message queue (91) of the two message queues is designed to allow the first operating system (62) to receive data from the second operating system, and - The second message queue (92) of the two message queues is designed to allow the first operating system (62) to send data to the second operating system (72).

3. The gateway (2) according to claim 1 or 2, characterized in that, The first operating system (62) and / or the second operating system (72) are real-time operating systems.

4. The gateway (2) according to any one of claims 1 to 3, characterized in that, The first operating system (62) and / or the second operating system (72) are not real-time operating systems.

5. The gateway (2) according to any one of claims 1 to 4, characterized in that, Assign separate destination addresses to the first operating system (62) and / or the second operating system (72).

6. The gateway (2) according to any one of claims 1 to 5, characterized in that, The gateway (2) has a first Ethernet interface (10) which is connected to the first processor (6) and the inter-processor communication interface (9) and is designed to connect the first operating system (62) to the inter-processor communication interface (9) for bidirectional inter-processor communication.

7. The gateway (2) according to claim 6, characterized in that, The first Ethernet interface (10) is designed to connect the first operating system (62) and optionally the second operating system (72) to the fieldbus (4) for bidirectional data communication.

8. The gateway (2) according to any one of claims 1 to 7, characterized in that, The virtual Ethernet interface (73) has a virtual network kernel driver or is implemented as a virtual network kernel driver, which is designed to connect the second operating system (72) to the inter-processor communication interface (9) for bidirectional inter-processor communication.

9. The gateway (2) according to any one of claims 1 to 8, characterized in that, The gateway (2) includes a shared memory (8) in which the inter-processor communication interface (9) is implemented.

10. The gateway (2) according to any one of claims 1 to 9, characterized in that, The gateway (2) has a second Ethernet interface (11) which is connected to the second processor (7) and is designed to connect the second operating system (72) to the fieldbus (5) for bidirectional data communication.

11. A fieldbus system (100), characterized in that, The fieldbus system (100) includes a gateway (2) according to any one of claims 1 to 10.

12. The fieldbus system (100) according to claim 11, characterized in that, The fieldbus system (100) includes field devices (1) and a control center (3), wherein the control center (3) is connected to the field devices (1) via the gateway (2) and at least one fieldbus (4, 5).

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