Polar to cartesian coordinate conversion method, apparatus and device for near memory computing

Abstract

The application discloses a polar coordinate to Cartesian coordinate conversion method, device and equipment based on near memory computing. Relates to the technical field of data processing, especially relates to the polar coordinate to Cartesian coordinate conversion method, device and equipment based on near memory computing. Including: receiving the read transaction initiated by the computing core, if the access address of the read transaction hits the upstream visible address window; generate downstream read transaction through the compression group serial number determined according to the offset of the access address, send the downstream read transaction to the memory controller; the memory controller obtains the compressed data group from the external memory based on the downstream read transaction, and sends the compressed data group to the near memory coordinate conversion device; the near memory coordinate conversion device converts the multiple polar coordinate complex vectors in the compressed data group into Cartesian coordinate components on the return data path, formats and outputs the Cartesian coordinate components according to the target output format, and returns the unfolded standard read data to the computing core. Improve the computing efficiency.

Description

Technical Field

[0001] This invention relates to the field of data processing technology, and in particular to a method, apparatus, and device for near-memory computation of polar coordinate to Cartesian coordinate transformation. Background Technology

[0002] In the inference phase of large language models and other artificial intelligence models, the access bandwidth and storage capacity of the KV Cache (Key-Value Cache) are the core bottlenecks restricting the improvement of system throughput. As the number of parameters and the length of input sequences in large models continue to increase, the amount of video memory required by the KV Cache rises sharply, putting enormous pressure on hardware deployment and severely limiting the efficiency and deployment flexibility of large model inference.

[0003] To alleviate the aforementioned memory pressure, vector compression techniques such as extremely low bit quantization are widely used in the field to compress and store vector data in KV Cache, thereby reducing memory usage. Among these, polar coordinate encoding, due to its unique representation, has become an effective compression scheme—this technique converts complex or two-dimensional vectors into a combination of radii and angles for storage. Compared to traditional Cartesian coordinate representation, it can significantly reduce the constant term overhead of vector storage, further improving compression efficiency, and has significant application potential in KV Cache memory optimization. However, the storage benefits brought by vector compression can only be fully realized when the overhead of the decompression process is within a controllable range.

[0004] In existing technologies, when decompressing and restoring polar coordinates to Cartesian coordinates via software instructions within the computing core of a GPU (Graphics Processing Unit) or NPU (Natural Processing Unit), it is necessary to frequently call special functions such as sine and cosine. This process leads to an imbalance in computing power supply between the special function units within the computing core and core computing units such as multipliers and tensor units. This results in problems such as queuing of computing units, pipeline cavitation, and decreased hardware energy efficiency. This not only offsets the memory optimization benefits brought by vector compression but also seriously affects the overall performance of large model inference. Summary of the Invention

[0005] This invention provides a method, apparatus, and device for polar to Cartesian coordinate conversion based on near-memory computation. It eliminates the need for Cartesian coordinate conversion within the computational core, avoiding frequent calls to sine and cosine functions within the computational core, thus improving computational efficiency.

[0006] According to a first aspect of the present invention, a polar coordinate to Cartesian coordinate transformation method based on near-memory computation is provided, applied in a near-memory coordinate transformation device, wherein the near-memory coordinate transformation device is presented as a read interface slave device upstream and as a read interface master device downstream, the method comprising: Receive configuration parameters, which include at least the upstream visible address window, the downstream compressed storage base address, and the target output format; After receiving a read transaction initiated by the computing core, determine whether the access address of the read transaction matches the upstream visible address window; If so, the corresponding compression group number is determined according to the offset of the access address relative to the upstream visible address window, and a downstream read transaction pointing to the downstream compressed storage address area is generated according to the compression group number. The downstream read transaction is sent to the memory controller so that the memory controller can obtain the compressed data group from the external memory based on the downstream read transaction and send the compressed data group to the near memory coordinate transformation device. Upon receiving the compressed data set, the multiple polar coordinate complex vectors in the compressed data set are converted into Cartesian coordinate components on the return data path. The Cartesian coordinate components are then formatted and reassembled according to the target output format to obtain a standard read data frame, which is then returned to the computing core.

[0007] According to another aspect of the present invention, a near-memory coordinate conversion device is provided, wherein the near-memory coordinate conversion device is presented as a read interface slave device upstream and as a read interface master device downstream, the device comprising: The configuration module is used to receive configuration parameters, which include at least the upstream visible address window, the downstream compressed storage base address, and the target output format; The hit determination module is used to determine whether the access address of the read transaction hits the upstream visible address window after receiving the read transaction initiated by the computing core. The address mapping module is used to determine the corresponding compression group number based on the offset of the access address of the read transaction relative to the upstream visible address window, and generate a downstream read transaction pointing to the downstream compressed storage address area based on the compression group number. The downstream read transaction is then sent to the memory controller so that the memory controller can obtain the compressed data group from the external memory based on the downstream read transaction and send the compressed data group to the near memory coordinate transformation device. The coordinate transformation module is used to convert multiple polar coordinate complex vectors in the compressed data group into Cartesian coordinate components on the return data path after receiving the compressed data group. The output reconstruction and target formatting module is used to format and reconstruct the Cartesian coordinate components according to the target output format to obtain the standard read data frame, and return the expanded standard read data frame to the calculation core.

[0008] According to another aspect of the present invention, an electronic device is provided, including a computing core and a near-memory coordinate transformation device; the near-memory coordinate transformation device is connected to the computing core; wherein: The computing core is used to initiate read transactions; After receiving the read transaction, the near-memory coordinate transformation device executes the polar coordinate to Cartesian coordinate transformation method based on near-memory calculation as described in the first aspect.

[0009] According to another aspect of the present invention, a computer-readable storage medium is provided, the computer-readable storage medium storing computer instructions, the computer instructions being configured to cause a processor to execute and implement the polar coordinate to Cartesian coordinate transformation method based on near-memory computation as described in any embodiment of the present invention.

[0010] According to another aspect of the present invention, a computer program product is also provided, including a computer program that, when executed by a processor, implements the steps of the near-memory computation-based polar coordinate to Cartesian coordinate transformation method as described in any embodiment of the present invention.

[0011] The technical solution of this invention receives configuration parameters through an interface. After receiving a read transaction initiated by the computing core, it determines whether the access address of the read transaction hits the upstream visible address window. If so, the near-memory coordinate conversion device determines the corresponding compression group number based on the offset of the access address relative to the upstream visible address window, and generates a downstream read transaction pointing to the downstream compressed storage address area based on the compression group number. The downstream read transaction is then sent to the memory controller. The memory controller retrieves a compressed data group from the external memory based on the downstream read transaction and sends the compressed data group to the near-memory coordinate conversion device. Then, the near-memory coordinate conversion device converts multiple sets of polar coordinate complex vectors in the compressed data group into Cartesian coordinate components on the return data path. The Cartesian coordinate components are then formatted and reassembled according to the target output format to obtain a standard read data frame, which is then returned to the computing core. Therefore, this invention does not require Cartesian coordinate conversion in the computing core, avoiding frequent calls to sine and cosine functions in the computing core, thus improving computational efficiency.

[0012] It should be understood that the description in this section is not intended to identify key or essential features of the embodiments of the present invention, nor is it intended to limit the scope of the invention. Other features of the invention will become readily apparent from the following description. Attached Figure Description

[0013] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0014] Figure 1 This is a schematic diagram of the structure of an electronic device provided according to an embodiment of the present invention; Figure 2 This is a flowchart of a polar coordinate to Cartesian coordinate transformation method based on near-memory computation provided by an embodiment of the present invention; Figure 3 This is a schematic diagram of the direction code decoding and multiplication coefficient reconstruction process provided in an embodiment of the present invention; Figure 4 This is a schematic diagram of a near-memory coordinate transformation device provided according to an embodiment of the present invention. Detailed Implementation

[0015] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.

[0016] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of the invention described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0017] Currently, when decompressing and restoring polar coordinates to Cartesian coordinates using software instructions within the computing cores of GPUs or NPUs, special functions such as sine and cosine are frequently invoked. This process leads to an imbalance in computational power supply between the special function units within the computing core and core computing units such as multipliers and tensor units. This results in problems such as queuing of computing units, pipeline idling, and decreased hardware energy efficiency. This not only offsets the memory optimization benefits brought by vector compression but also seriously affects the overall performance of large model inference.

[0018] Therefore, this invention discloses a polar coordinate conversion method. Upon receiving configuration parameters and a read transaction initiated by the computing core, the method determines whether the access address of the read transaction hits the upstream visible address window. If so, a near-memory coordinate conversion device determines the corresponding compression group number based on the offset of the access address relative to the upstream visible address window. Based on the compression group number, a downstream read transaction pointing to the downstream compressed storage address area is generated and sent to the memory controller. The memory controller, based on the downstream read transaction, retrieves a compressed data group from external memory and sends the compressed data group to the near-memory coordinate conversion device. The near-memory coordinate conversion device converts multiple polar coordinate complex vectors in the compressed data group into Cartesian coordinate components on the return data path. The Cartesian coordinate components are then formatted and reassembled according to the target output format to obtain a standard read data frame, which is then returned to the computing core. Thus, in this embodiment of the invention, Cartesian coordinate conversion is not required in the computing core, avoiding frequent calls to sine and cosine functions in the computing core, thereby improving computational efficiency.

[0019] Below, we will first introduce the electronic device corresponding to the polar coordinate to Cartesian coordinate transformation method based on near-memory computation in the embodiments of the present invention. Figure 1 This is a schematic diagram of an electronic device corresponding to a near-memory computation-based polar coordinate to Cartesian coordinate transformation method. From... Figure 1 As can be seen, the electronic device includes a computing core 101, an on-chip interconnect bus 102, a near-memory coordinate transformation device 103, a memory controller 104, and an external memory 105. The near-memory coordinate transformation device 103 is located between the on-chip interconnect bus 102 and the memory controller 104. The other end of the on-chip interconnect bus 102 is connected to the computing core 101, and the other end of the memory controller 104 is connected to the external memory 105. The near-memory coordinate transformation device 103 functions as a read interface slave device upstream and a read interface master device downstream. In this embodiment, the upstream components are the computing core 101 and the on-chip interconnect bus 102. The downstream components are the memory controller 104 and the external memory 105. Wherein: Configuration parameters are received through the configuration interface of the near-memory coordinate transformation device 103. The configuration parameters include at least the upstream visible address window, the downstream compressed storage base address, and the target output format. A read transaction is initiated through the computing core 101; the read transaction is forwarded to the near-memory coordinate transformation device 103 through the on-chip interconnect bus 102; After receiving the read transaction through the near memory coordinate conversion device 103, it is determined whether the access address of the read transaction hits the upstream visible address window; If so, the near memory coordinate conversion device 103 determines the corresponding compression group number based on the offset of the access address relative to the upstream visible address window, generates a downstream read transaction pointing to the downstream compressed storage address area based on the compression group number, and sends the downstream read transaction to the memory controller 104. The memory controller 104 retrieves a compressed data group from the external memory 105 based on the downstream read transaction and sends the compressed data group to the near memory coordinate transformation device 103. The near-memory coordinate transformation device 103 converts multiple sets of polar coordinate complex vectors in the compressed data group into Cartesian coordinate components on the return data path, and formats and reassembles the Cartesian coordinate components according to the target output format to obtain a standard read data frame, and returns the expanded standard read data frame to the computing core 101.

[0020] The polar coordinate to Cartesian coordinate transformation method based on near-memory computation in the embodiments of the present invention will be described in detail below. Figure 2 A flowchart of a polar coordinate to Cartesian coordinate transformation method based on near-memory computation provided in this embodiment of the invention is shown below. Figure 2 As can be seen from this, it may specifically include the following steps: S210: Receive configuration parameters through the configuration interface of the near-memory coordinate transformation device, the configuration parameters including at least the upstream visible address window, the downstream compressed storage base address and the target output format; The configuration parameters in this embodiment of the invention also include compression group mapping rules (descriptor table), compression group granularity, shared scale granularity, and angle bit width.

[0021] S220: Initiate a read transaction through the computing core; S230: Forward the read transaction to the near-memory coordinate conversion device via the on-chip interconnect bus; S240: After receiving the read transaction through the near memory coordinate conversion device, determine whether the access address of the read transaction hits the upstream visible address window; if yes, execute S250; if no, execute S295. S250: The near-memory coordinate transformation device determines the corresponding compression group number based on the offset of the access address relative to the upstream visible address window, and generates a downstream read transaction pointing to the downstream compressed storage address area based on the compression group number; In one possible embodiment, S250 can be implemented in the following two ways: Method 1: Obtain the compression group number based on the offset and the preset reconstruction group output granularity; generate the downstream read address based on the compression group number, the preset compression group storage granularity, and the downstream compressed storage base address; and generate the downstream read transaction based on the downstream read address.

[0022] In one possible embodiment, the downstream read address is generated by multiplying the compression group number and the compression group storage granularity to obtain an intermediate value, and then adding the intermediate value to the downstream compressed storage base address to obtain the downstream read address.

[0023] Method 2: Based on the offset and the preset reconstruction group output granularity, obtain the compression group number; based on the access address, obtain the intra-block compression offset of the compression group number in the target downstream physical block; based on the compression group number, query the compression group mapping rule to obtain the target downstream physical block base address corresponding to the compression group number; based on the target downstream physical block base address and the intra-block compression offset of the compression group number in the target downstream physical block, obtain the downstream read address; and generate the downstream read transaction based on the downstream read address.

[0024] In this embodiment of the invention, the intra-block compression offset of the compression group number in the target downstream physical block is determined by using the pre-set relationship between each access address and the intra-block compression offset.

[0025] In one possible embodiment, the compression group number and the intra-block compression offset of the compression group number in the target downstream physical block are determined by dividing the offset by the output granularity of the reconstruction group to obtain an integer value and a remainder, and determining the integer value as the compression group number; and determining the remainder as the intra-block compression offset of the compression group number in the target downstream physical block.

[0026] The compression group mapping rule in this embodiment of the invention includes the correspondence between the compression group number and the base address of the downstream physical block.

[0027] In one possible embodiment, the downstream read address is determined by adding the base address of the target downstream physical block to the intra-block compression offset of the compression group number in the target downstream physical block to obtain the downstream read address.

[0028] In one possible embodiment, after executing S250, the transaction context of the downstream read transaction is recorded. The transaction context includes the original transaction identifier, the upstream returned number of ticks, the downstream actual number of ticks, the spread ratio, the last tick mark, the response binding relationship, the group sequence number, and the shared scale attribution information.

[0029] Furthermore, the near-memory coordinate transformation device supports concurrent processing of multiple incomplete read transactions based on the transaction context, and transparently returns the read response upstream according to the original transaction identifier, beat order, last beat mark, and response binding relationship.

[0030] S260: The downstream read transaction is sent to the memory controller via the near-memory coordinate transformation device; S270: The memory controller sends the downstream read transaction to the external memory based on the downstream read transaction; S280: The external memory acquires the compressed data group based on the downstream read transaction; The compressed data set in this embodiment of the invention includes multiple radius codes, multiple direction codes, and shared scale information. The radius code represents the radius of the corresponding two-dimensional vector in the compressed data set, the direction code represents the discrete direction of the two-dimensional vector, and the shared scale information is used for inverse quantization of the radius code.

[0031] Furthermore, the compressed data group in this embodiment of the invention includes eight 8-bit radius codes, eight 3-bit direction codes, and at least one shared scale factor or shared exponent, and is stored in 128-bit alignment; the corresponding output data consists of eight pairs of x and y components in the target format, forming a 256-bit standard read data frame.

[0032] In one possible embodiment, the granularity of the shared scale information is one of per group, per attention head, or per block; if the granularity of the shared scale information is per group, then the shared scale information is stored inline with the compressed data group; or, if the granularity of the shared scale information is per attention head or per block, then the shared scale information is stored in a preset metadata table or descriptor entry.

[0033] S290: The external storage sends the compressed data set to the memory controller; S291: The memory controller sends the compressed data group to the near-memory coordinate transformation device; S292: The near-memory coordinate transformation device converts multiple polar coordinate complex vectors in the compressed data group into Cartesian coordinate components on the return data path, and formats and reassembles the Cartesian coordinate components according to the target output format to obtain a standard read data frame. In one possible embodiment, S292 can be specifically implemented as follows: the memory controller performs radius code and direction code unpacking, shared scale extraction, direction code decoding and constant coefficient reconstruction on the compressed data group to obtain the Cartesian coordinate components.

[0034] The following describes the direction code decoding and multiplication coefficient reconstruction methods in the embodiments of the present invention. Figure 3 The flowchart illustrates the process of decoding the direction code and reconstructing it by multiplying by the coefficients. Specifically, it may include the following steps: S310: The direction code is decoded and translated into quadrant symbols and diagonal symbols, wherein the diagonal symbols are used to indicate that the Cartesian coordinates are axial or diagonal. In one possible implementation, S310 can be specifically implemented as follows: using a pre-set correspondence between the direction code decoding and the quadrant parameters, the target quadrant parameters corresponding to the direction code decoding are determined, wherein the quadrant parameters include a quadrant symbol and a diagonal mark.

[0035] S320: If the diagonal mark is the axial direction, then the sign of the dequantized radius value is determined according to the quadrant sign, one coordinate component value of the Cartesian coordinate component is obtained, and the other coordinate component of the Cartesian coordinate component is set to 0, wherein the dequantized radius value is obtained by unpacking the radius code; S330: If the diagonal marker is the diagonal direction, then perform the following on the dequantized radius value: The constant coefficients are transformed to obtain the transformed values, and the Cartesian coordinate components are obtained using the quadrant sign and the transformed values.

[0036] Therefore, in this embodiment of the invention, the sign of the dequantized radius value can be determined according to the quadrant sign to obtain one coordinate component value in the Cartesian coordinate components, and another coordinate component in the Cartesian coordinate components can be set to a specified value. Compared with the sin / cos lookup table + multiple sets of parallel multiplication schemes, the required area and power consumption can be significantly reduced. Furthermore, a constant coefficient transformation is performed on the dequantized radius value to obtain the transformed value, and the Cartesian coordinate component is obtained using the quadrant sign and the transformed value. This method is suitable for scenarios where it is desirable to maximize timing margin and reduce critical path depth.

[0037] In one possible implementation, S292 can be specifically implemented as follows: using a pre-set correspondence between compressed data parameters and coordinate components, determining the coordinate components corresponding to the compressed data parameters in the compressed data group, wherein the compressed data parameters include the radius code and the direction code, and the coordinate components include the x component and the y component; and obtaining the Cartesian coordinate components based on the x component and the y component.

[0038] S293: The unfolded standard read data is sent to the on-chip interconnect bus via the near-memory coordinate transformation device; S294: The on-chip interconnect bus returns the unfolded standard read data frame to the computing core.

[0039] S295: The read transaction is transmitted to the memory controller via the bypass channel through the near-memory coordinate transformation device; S296: The read transaction is processed by the memory controller to obtain the processing result; S297: The processing result is sent to the near-memory coordinate transformation device via the memory controller; S298: The processing result is transmitted to the computing core through the near-memory coordinate transformation device.

[0040] In one possible embodiment, for read transactions that are not aligned to the preset reconstruction group boundary, the near-memory coordinate conversion device initiates downstream reads by rounding down according to the reconstruction group boundary, and trims or rearranges the first and last data according to the starting address offset and the preset target return length during the output reorganization stage; when back pressure is generated in the upstream read data channel, the near-memory coordinate conversion device buffers the completed output data through an elastic FIFO, and initiates back pressure on the downstream data channel or downstream read transactions when the elastic FIFO is close to full.

[0041] Based on the same inventive concept, embodiments of the present invention also provide a near-memory coordinate transformation device. Figure 4 This is a schematic diagram of the near-memory coordinate transformation device in an embodiment of the present invention. Figure 4 As can be seen from this, the device 400 includes: Configuration module 410 is used to receive configuration parameters, which include at least the upstream visible address window, the downstream compressed storage base address, and the target output format; The hit determination module 420 is used to determine whether the access address of the read transaction hits the upstream visible address window after receiving the read transaction initiated by the computing core. The address mapping module 430 is used to determine the corresponding compression group number based on the offset of the access address relative to the upstream visible address window if the condition is met, and to generate a downstream read transaction pointing to the downstream compressed storage address area based on the compression group number, and to send the downstream read transaction to the memory controller so that the memory controller can obtain the compressed data group from the external memory based on the downstream read transaction, and send the compressed data group to the near memory coordinate transformation device. The coordinate transformation module 440 is used to convert multiple polar coordinate complex vectors in the compressed data group into Cartesian coordinate components on the return data path after receiving the compressed data group. The output reconstruction and target formatting module 450 is used to format and reconstruct the Cartesian coordinate components according to the target output format to obtain the standard read data frame, and return the expanded standard read data frame to the calculation core.

[0042] In one possible implementation, the device further includes: The pass-through module 460 is used to pass through the bypass channel to the memory controller if the access address of the read transaction does not hit the upstream visible address window, so that the memory controller can process the read transaction, obtain the processing result, and send the processing result to the near memory coordinate transformation device; after receiving the processing result, the processing result is passed through to the computing core.

[0043] In one possible implementation, the address mapping module 430 is specifically used for: Based on the offset and the preset reconstruction group output granularity, the compression group number is obtained; based on the compression group number, the preset compression group storage granularity, and the downstream compression storage base address, a downstream read address is generated, and a downstream read transaction is generated based on the downstream read address; or, Based on the offset and the preset reconstruction group output granularity, the compression group number is obtained. The intra-block compression offset of the compression group number in the target downstream physical block is obtained based on the access address. The compression group mapping rule is queried based on the compression group number to obtain the target downstream physical block base address corresponding to the compression group number. A downstream read address is generated based on the target downstream physical block base address and the intra-block compression offset of the compression group number in the target downstream physical block. The downstream read transaction is generated based on the downstream read address.

[0044] In one possible implementation, the compressed data set includes multiple radius codes, multiple direction codes, and shared scale information; wherein the radius codes are used to represent the radius of the corresponding two-dimensional vector in the compressed data set, the direction codes are used to represent the discrete direction of the two-dimensional vector, and the shared scale information is used to inverse quantize the radius codes.

[0045] In one possible implementation, the granularity of the shared scale information is one of per group, per attention point, or per block; If the granularity of the shared scale information is per group, then the shared scale information is stored inline with the compressed data group; or, If the granularity of the shared scale information is per attention point or per block, then the shared scale information is stored in a preset metadata table or descriptor entry.

[0046] In one possible implementation, the coordinate transformation module 440 is specifically used for: The compressed data group is subjected to radius and direction code unpacking, shared scale extraction, direction code decoding, and constant coefficient reconstruction to obtain the Cartesian coordinate components.

[0047] The coordinate transformation module 440 in this embodiment of the invention includes a data unpacking and scale extraction unit 4401 and a direction decoding and constant coefficient reconstruction unit 4402. The data unpacking and scale extraction unit 4401 is used to unpack the radius code and direction code and extract the shared scale from the compressed data group. The direction decoding and constant coefficient reconstruction unit 4402 is used to perform direction code decoding and constant coefficient reconstruction on the compressed data group.

[0048] In one possible implementation, the direction decoding and constant coefficient reconstruction unit 4402 is specifically used for: If the radius code is 0, then the Cartesian coordinate component is set to zero; or, The direction code is decoded into quadrant symbols and diagonal symbols, wherein the diagonal symbols are used to indicate that the Cartesian coordinates are axial or diagonal. If the diagonal marker corresponds to the axial direction, then based on the quadrant sign, the sign of the dequantized radius value is determined to obtain one coordinate component value in the Cartesian coordinate components, and the other coordinate component in the Cartesian coordinate components is set to 0. The dequantized radius value is obtained by unpacking the radius code; or... If the diagonal marker is in the diagonal direction, then the dequantized radius value is processed. The constant coefficients are transformed to obtain the transformed values, and the Cartesian coordinate components are obtained using the quadrant sign and the transformed values.

[0049] In one possible implementation, the direction decoding and constant coefficient reconstruction unit 4402 is specifically used for: Using a pre-set correspondence between compressed data parameters and coordinate components, the coordinate components corresponding to the compressed data parameters in the compressed data group are determined, wherein the compressed data parameters include the radius code and the direction code, and the coordinate components include the x component and the y component; The Cartesian coordinate components are obtained based on the x and y components.

[0050] In one possible implementation, the device further includes: The transaction tracking module 470 is used to record the transaction context of the downstream read transaction. The transaction context includes the original transaction identifier, the upstream returned number of ticks, the downstream actual number of ticks, the unrolling ratio, the last tick mark, the response binding relationship, the group number, and the shared scale attribution information.

[0051] In one possible implementation, the device further includes: The elastic FIFO and backpressure control module 480 are used to initiate downstream reading by rounding down according to the reconstruction group boundary for read transactions that are not aligned to the preset reconstruction group boundary, and to trim or rearrange the first and last data according to the starting address offset and the preset target return length during the output reconstruction stage; when backpressure is generated in the upstream read data channel, the near memory coordinate conversion device buffers the completed output data through the elastic FIFO, and initiates backpressure on the downstream data channel or downstream read transaction when the elastic FIFO is close to full level.

[0052] The collection, storage, use, processing, transmission, provision, and disclosure of user personal information involved in the technical solution disclosed herein comply with the provisions of relevant laws and regulations and do not violate public order and good morals.

[0053] In some embodiments, the near-in-memory computational polar-to-Cartesian coordinate transformation method can be implemented as a computer program tangibly contained in a computer-readable storage medium, such as a storage unit. In some embodiments, part or all of the computer program can be loaded and / or installed on an electronic device via ROM and / or a communication unit. When the computer program is loaded into RAM and executed by a processor, one or more steps of the near-in-memory computational polar-to-Cartesian coordinate transformation method described above can be performed. Alternatively, in other embodiments, the processor can be configured to perform the near-in-memory computational polar-to-Cartesian coordinate transformation method by any other suitable means (e.g., by means of firmware).

[0054] Various embodiments of the systems and techniques described above herein can be implemented in digital electronic circuit systems, integrated circuit systems, field-programmable gate arrays (FPGAs), application-specific integrated circuits (ASICs), application-specific standard products (ASSPs), systems-on-a-chip (SoCs), payload-programmable logic devices (CPLDs), computer hardware, firmware, software, and / or combinations thereof. These various embodiments may include implementations in one or more computer programs that can be executed and / or interpreted on a programmable system including at least one programmable processor, which may be a dedicated or general-purpose programmable processor, capable of receiving data and instructions from a storage system, at least one input device, and at least one output device, and transmitting data and instructions to the storage system, the at least one input device, and the at least one output device.

[0055] Computer programs used to implement the methods of the present invention may be written in any combination of one or more programming languages. These computer programs may be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device, such that when executed by the processor, the computer programs cause the functions / operations specified in the flowcharts and / or block diagrams to be performed. The computer programs may be executed entirely on a machine, partially on a machine, or as a standalone software package, partially on a machine and partially on a remote machine, or entirely on a remote machine or server.

[0056] In the context of this invention, a computer-readable storage medium can be a tangible medium that may contain or store a computer program for use by or in conjunction with an instruction execution system, apparatus, or device. A computer-readable storage medium may include, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, apparatus, or devices, or any suitable combination thereof. Alternatively, a computer-readable storage medium may be a machine-readable signal medium. More specific examples of machine-readable storage media include electrical connections based on one or more wires, portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fibers, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination thereof.

[0057] To provide interaction with a user, the systems and techniques described herein can be implemented on an electronic device having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user; and a keyboard and pointing device (e.g., a mouse or trackball) through which the user provides input to the electronic device. Other types of devices can also be used to provide interaction with the user; for example, feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user can be received in any form (including sound input, voice input, or tactile input).

[0058] The systems and technologies described herein can be implemented in computing systems that include backend components (e.g., as data servers), or middleware components (e.g., application servers), or frontend components (e.g., user computers with graphical user interfaces or web browsers through which users can interact with implementations of the systems and technologies described herein), or any combination of such backend, middleware, or frontend components. The components of the system can be interconnected via digital data communication of any form or medium (e.g., communication networks). Examples of communication networks include local area networks (LANs), wide area networks (WANs), blockchain networks, and the Internet.

[0059] A computing system can include clients and servers. Clients and servers are generally located far apart and typically interact through communication networks. The client-server relationship is created by computer programs running on the respective computers and having a client-server relationship with each other. The server can be a cloud server, also known as a cloud computing server or cloud host, which is a hosting product within the cloud computing service system to address the shortcomings of traditional physical hosts and VPS services, such as high management difficulty and weak business scalability.

[0060] It should be understood that the various forms of processes shown above can be used, with steps reordered, added, or deleted. For example, the steps described in this invention can be executed in parallel, sequentially, or in different orders, as long as the desired result of the technical solution of this invention can be achieved, and this is not limited herein.

[0061] The specific embodiments described above do not constitute a limitation on the scope of protection of this invention. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this invention should be included within the scope of protection of this invention.

Claims

1. A polar coordinate to Cartesian coordinate transformation method based on near-memory computation, characterized in that, The method, applied in a near-memory coordinate transformation device, wherein the near-memory coordinate transformation device functions as a read interface slave device upstream and a read interface master device downstream, includes: Receive configuration parameters, which include at least the upstream visible address window, the downstream compressed storage base address, and the target output format; After receiving a read transaction initiated by the computing core, determine whether the access address of the read transaction matches the upstream visible address window; If so, the corresponding compression group number is determined according to the offset of the access address of the read transaction relative to the upstream visible address window, and a downstream read transaction pointing to the downstream compressed storage address area is generated according to the compression group number. The downstream read transaction is then sent to the memory controller so that the memory controller can obtain the compressed data group from the external memory based on the downstream read transaction and send the compressed data group to the near memory coordinate transformation device. Upon receiving the compressed data set, the multiple polar coordinate complex vectors in the compressed data set are converted into Cartesian coordinate components on the return data path. The Cartesian coordinate components are then formatted and reassembled according to the target output format to obtain a standard read data frame, which is then returned to the computing core.

2. The method according to claim 1, characterized in that, The method further includes: If the access address of the read transaction does not match the upstream visible address window, the read transaction is passed through the bypass channel to the memory controller so that the memory controller can process the read transaction, obtain the processing result, and send the processing result to the near memory coordinate transformation device. After receiving the processing result, the processing result is passed through to the computing core.

3. The method according to claim 1, characterized in that, The step of determining the corresponding compression group number based on the offset of the access address of the read transaction relative to the upstream visible address window, and generating a downstream read transaction pointing to the downstream compressed storage address area based on the compression group number, includes: Based on the offset and the preset reconstruction group output granularity, the compression group number is obtained; based on the compression group number, the preset compression group storage granularity, and the downstream compression storage base address, a downstream read address is generated, and a downstream read transaction is generated based on the downstream read address; or, Based on the offset and the preset reconstruction group output granularity, the compression group number is obtained. Based on the access address, the intra-block compression offset of the compression group number in the target downstream physical block is obtained. Based on the compression group number, the compression group mapping rule is queried to obtain the target downstream physical block base address corresponding to the compression group number. The downstream read address is generated based on the target downstream physical block base address and the intra-block compression offset of the compression group number in the target downstream physical block. The downstream read transaction is generated based on the downstream read address.

4. The method according to claim 1, characterized in that, The compressed data set includes multiple radius codes, multiple direction codes, and shared scale information; wherein, the radius code is used to represent the radius of the corresponding two-dimensional vector in the compressed data set, the direction code is used to represent the discrete direction of the two-dimensional vector, and the shared scale information is used to inverse quantize the radius code.

5. The method according to claim 4, characterized in that, The granularity of the shared scale information is one of per group, per attention point, or per block; If the granularity of the shared scale information is per group, then the shared scale information is stored inline with the compressed data group; or, If the granularity of the shared scale information is per attention point or per block, then the shared scale information is stored in a preset metadata table or descriptor entry.

6. The method according to claim 4, characterized in that, On the return data path, multiple sets of polar coordinate complex vectors in the compressed data group are converted into Cartesian coordinate components, including: The compressed data group is subjected to radius code and direction code unpacking, shared scale extraction, direction code decoding and constant coefficient reconstruction to obtain the Cartesian coordinate components.

7. The method according to claim 6, characterized in that, The direction code decoding and constant coefficient reconstruction include: If the radius code is 0, then the Cartesian coordinate component is set to zero; or, The direction code is decoded into quadrant symbols and diagonal symbols, wherein the diagonal symbols are used to indicate that the Cartesian coordinates are axial or diagonal. If the diagonal marker corresponds to the axial direction, then based on the quadrant sign, the sign of the dequantized radius value is determined to obtain one coordinate component value in the Cartesian coordinate components, and the other coordinate component in the Cartesian coordinate components is set to 0. The dequantized radius value is obtained by unpacking the radius code; or... If the diagonal marker is in the diagonal direction, then the dequantized radius value is processed. The constant coefficients are transformed to obtain the transformed values, and the Cartesian coordinate components are obtained using the quadrant sign and the transformed values.

8. The method according to claim 6, characterized in that, The direction code decoding and constant coefficient reconstruction include: Using a pre-set correspondence between compressed data parameters and coordinate components, the coordinate components corresponding to the compressed data parameters in the compressed data group are determined, wherein the compressed data parameters include the radius code and the direction code, and the coordinate components include the x component and the y component; The Cartesian coordinate components are obtained based on the x and y components.

9. A near-memory coordinate transformation device, characterized in that, The near-memory coordinate transformation device functions as a read interface slave device upstream and a read interface master device downstream. The device includes: The configuration module is used to receive configuration parameters, which include at least the upstream visible address window, the downstream compressed storage base address, and the target output format; The hit determination module is used to determine whether the access address of the read transaction hits the upstream visible address window after receiving the read transaction initiated by the computing core. The address mapping module is used to determine the corresponding compression group number based on the offset of the access address of the read transaction relative to the upstream visible address window if the condition is met, and to generate a downstream read transaction pointing to the downstream compressed storage address area based on the compression group number. The downstream read transaction is then sent to the memory controller so that the memory controller can obtain the compressed data group from the external memory based on the downstream read transaction and send the compressed data group to the near memory coordinate transformation device. The coordinate transformation module is used to convert multiple polar coordinate complex vectors in the compressed data group into Cartesian coordinate components on the return data path after receiving the compressed data group. The output reconstruction and target formatting module is used to format and reconstruct the Cartesian coordinate components according to the target output format to obtain the standard read data frame, and return the expanded standard read data frame to the calculation core.

10. An electronic device, characterized in that, It includes a computing core and a near-memory coordinate transformation device; the near-memory coordinate transformation device is connected to the computing core; wherein: The computing core is used to initiate read transactions; After receiving the read transaction, the near-memory coordinate transformation device executes the polar coordinate to Cartesian coordinate transformation method based on near-memory calculation as described in any one of claims 1-8.

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