Graphics processor and resource access method, medium and device for out-of-order access to views

Abstract

A graphics processor and a resource access method, medium and device for out-of-order access to a view; the graphics processor comprises: a scheduler configured to transmit a target instruction; the target instruction comprises any one of the following: a unified load instruction and a unified store instruction; an access unit comprising a UAV description information register group and a loop cache area; the access unit is configured to receive the target instruction, obtain a target description information register corresponding to the target instruction, and perform the target instruction, including: in response to the type of the target instruction being a first type, obtaining the target description information register from the UAV description information register group; in response to the type of the target instruction being a second type, obtaining the target description information register from the loop cache area. The above scheme can improve the performance of the graphics processor.

Description

Technical Field

[0001] This invention relates to the field of graphics processor technology, and in particular to a graphics processor and a method, medium, and device for unordered access to view resources. Background Technology

[0002] An unordered access view (UAV) resource is an unordered readable and writable resource with different resource types. These different resource types have different memory layouts and starting addresses, and their corresponding layout parameters and other parameters affecting storage may also differ. Typically, some descriptive information registers are needed to store the resource subtype and layout-related parameters of a UAV resource.

[0003] In modern graphics processing unit (GPU) hardware drivers, the DirectX 11 and OpenGL standards, the number of unordered access view (UAV) description registers is finite. In the DirectX 12 and Vulkan standards, the number of UAV description registers increases to an infinite number.

[0004] When the number of UAV description information registers is infinite, it will cause a serious degrade in the performance of the graphics processor, and may even cause the program to fail to run properly. Summary of the Invention

[0005] The purpose of this invention is at least to provide a graphics processor and a method, medium, and device for unordered access to view resources, which can improve the performance of the graphics processor.

[0006] In a first aspect, the present invention provides a graphics processor, comprising: a scheduler for issuing a target instruction; the target instruction including any one of the following: a unified load instruction, a unified store instruction; a memory access unit including a UAV description information register set and a circular buffer; the memory access unit being configured to receive the target instruction and obtain a target description information register corresponding to the target instruction, including: in response to the target instruction being of a first type, obtaining the target description information register from the UAV description information register set; in response to the target instruction being of a second type, obtaining the target description information register from the circular buffer; and executing the target instruction.

[0007] After receiving the target instruction, the memory access unit retrieves the target description information register corresponding to the target instruction. If the target instruction is of type 1, the target description information register is retrieved from the UAV description information register group; if the target instruction is of type 2, the target description information register is retrieved from the circular buffer. By adding a circular buffer to the memory access unit, the description information registers in the circular buffer can cyclically store description information, thus increasing the number of description information registers used to store description information and improving the performance of the graphics processor.

[0008] Optionally, the type of the target instruction is determined by the driver based on the usage frequency of the target description information register; wherein, if the usage frequency of the target description information register is among the top N positions of all used description information registers, the type of the corresponding target instruction is the first type; if the usage frequency of the target description information register is not among the top N positions, the type of the corresponding target instruction is the second type; N is not greater than the number of description information registers in the UAV description information register group.

[0009] Optionally, the target instruction includes a type indicator field and a general-purpose register index field, wherein: the type indicator field is used to indicate that the type of the target instruction is the first type or the second type; and the general-purpose register index field is used to indicate the index of the target general-purpose register in the general-purpose register group.

[0010] A type indicator field and a general-purpose register index field are added to the target instruction. When the type indicator field indicates that the target instruction is of type two, the general-purpose register index field carries the index of the target general-purpose register in the general-purpose register group to indicate the general-purpose register storing the target description information. This achieves the indication of the target instruction type and the target general-purpose register.

[0011] Optionally, the number of registers corresponding to the circular buffer is not less than the number of stages in the execution pipeline of the memory access unit.

[0012] Optionally, the memory access unit is configured to, when the type of the target instruction is the second type, obtain a target general-purpose register from the general-purpose register group, wherein the target general-purpose register stores target description information associated with the target instruction; store the target description information in a corresponding register in the circular buffer, and use the corresponding register as the target description information register.

[0013] Optionally, the graphics processor further includes: memory; when the type of the target instruction is the second type, the target description information is stored in the memory as a constant buffer view resource; the memory access unit obtains the target general-purpose register from the general-purpose register group, including: the memory access unit receives a constant data load instruction, obtains the target description information from the memory, and loads the target description information into the target general-purpose register; the memory access unit reads the target description information from the target general-purpose register.

[0014] Optionally, the graphics processor further includes: memory; when the type of the target instruction is the second type, the target description information is stored in the memory as a shader resource view resource; the memory access unit obtains the target general-purpose register from the general-purpose register group, including: the memory access unit receives a shader load instruction, obtains the target description information from the memory, and loads the target description information into the target general-purpose register; the memory access unit reads the target description information from the target general-purpose register.

[0015] When the target instruction is of type 2, the target description information is stored in memory as a CBV or SRV resource. Before executing the target instruction, the memory access unit reads the target description information from memory via indirect addressing and stores it in the corresponding register in the circular cache. This can further improve the performance of the graphics processor.

[0016] Optionally, the target instruction is a unified load instruction; the memory access unit executes the target instruction, including: the memory access unit requests the target description information from the target description information register; the target instruction is a unified store instruction; the memory access unit executes the target instruction, including: the memory access unit stores the target description information in the target description information register.

[0017] Secondly, the present invention provides a resource memory access method for an unordered access view, comprising: receiving a target instruction; the target instruction includes any one of the following: a unified load instruction, a unified store instruction; requesting a target description information register corresponding to the target instruction, comprising: in response to the target instruction being of a first type, obtaining the target description information register from a UAV description information register group; in response to the target instruction being of a second type, obtaining the target description information register from a circular buffer; the UAV description information register group and the circular buffer are both located in a memory access unit; and executing the target instruction.

[0018] Optionally, the type of the target instruction is determined by the driver based on the usage frequency of the target description information register; wherein, if the usage frequency of the target description information register is among the top N positions of all used description information registers, the type of the corresponding target instruction is the first type; if the usage frequency of the target description information register is not among the top N positions, the type of the corresponding target instruction is the second type; N is not greater than the number of description information registers in the UAV description information register group.

[0019] Optionally, the target instruction includes a type indicator field and a general-purpose register index field, wherein: the type indicator field is used to indicate that the type of the target instruction is the first type or the second type; and the general-purpose register index field is used to indicate the index of the target general-purpose register in the general-purpose register group.

[0020] Optionally, the number of registers corresponding to the circular buffer is not less than the number of stages in the execution pipeline of the memory access unit.

[0021] Optionally, obtaining the target description information register from the circular buffer includes: obtaining a target general-purpose register from a general-purpose register group, wherein the target general-purpose register stores target description information associated with the target instruction; storing the target description information into a corresponding register in the circular buffer, and using the corresponding register as the target description information register.

[0022] Thirdly, the present invention provides a terminal device including any of the graphics processors described above.

[0023] Fourthly, the present invention provides a computer-readable storage medium, which is a non-volatile storage medium or a non-transient storage medium, on which a computer program is stored, wherein the computer program, when executed by a processor, performs the steps of any of the above-described unordered access view resource access methods. Attached Figure Description

[0024] Figure 1 This is a schematic diagram of the structure of a graphics processor according to an embodiment of the present invention; Figure 2 This is a flowchart of a resource access method for an unordered access view in an embodiment of the present invention. Detailed Implementation

[0025] In the hardware driver standards DirectX 11 and OpenGL, the number of Unordered Access View (UAV) description information registers is finite. In existing technologies, UAV description information registers are stored in the load store module. These registers are typically configured via a driver. When the load store module receives a load / store instruction, it reads the contents of the corresponding description information register based on the UAV resource identifier (UID) on the instruction. Then, it performs further calculations based on the coordinates and data of the resource required by the load / store instruction, and writes the calculation results to a general-purpose register or memory.

[0026] However, when the number of UAV description information registers is infinite, it will cause a serious degrade in the performance of the graphics processor, and may even cause the program to fail to run properly.

[0027] In this embodiment of the invention, after receiving a target instruction, the memory access unit obtains the target description information register corresponding to the target instruction. If the target instruction is of type 1, the target description information register is obtained from the UAV description information register group; if the target instruction is of type 2, the target description information register is obtained from the circular buffer. By adding a circular buffer to the memory access unit, the description information registers in the circular buffer can cyclically store description information, thus increasing the number of description information registers used to store description information and improving the performance of the graphics processor.

[0028] To make the above-mentioned objectives, features and beneficial effects of the present invention more apparent and understandable, specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0029] This invention provides a graphics processor, referring to... Figure 1 .

[0030] In this embodiment of the invention, the graphics processor may include a scheduler 1 and a memory access unit 2.

[0031] In practical implementation, the scheduler can be used to launch target instructions, which can include any of the following: unified loading instructions and unified storage instructions.

[0032] The Load Store (LS) unit includes an Out-of-Order Access View (UAV) description register (reg) group and a circular buffer. Upon receiving a target instruction from the scheduler, the LS unit retrieves the target description register corresponding to that instruction. Specifically, if the target instruction is of type 1, the LS unit retrieves the target description register from the UAV description register group; if the target instruction is of type 2, the LS unit can retrieve the target description register from the circular buffer.

[0033] In some embodiments, such as for modern GPU hardware driver standards DirectX 11 and OpenGL, the UAV description information register group may include 64 description information registers.

[0034] In other embodiments, the UAV description information register set may also include other numbers of description information registers.

[0035] In this embodiment of the invention, the number of registers in the circular buffer can be set according to the number of stages in the execution pipeline of the memory access unit. Specifically, the number of registers in the circular buffer can be no less than the number of stages in the execution pipeline of the memory access unit.

[0036] In some embodiments, the number of stages in the execution pipeline of the memory access unit is 32. Therefore, the number of registers in the circular buffer can be set to 32. In other embodiments, the number of registers in the circular buffer can be set to 64 or other values.

[0037] In practical implementation, when it is necessary to store new description information in the circular buffer, and all the registers in the circular buffer have been used, one register can be selected to store the new description information, thereby realizing the function of circular buffer.

[0038] In this embodiment of the invention, during the application programming interface (API) compilation stage, the driver can divide the description information registers in the API into two categories based on the usage frequency of each description information register sent by the compiler.

[0039] In some embodiments, the target description information register may be among the top N bits of all used description information registers, and the corresponding target instruction type is type one; if the target description information register is not among the top N bits of all used description information registers, the corresponding target instruction type is type two. N is not greater than the number of description information registers in the UAV description information register group.

[0040] In practical implementation, the description information registers with the highest frequency among all used description information registers can be designated as high-frequency description information registers, while the other description information registers can be designated as low-frequency description information registers.

[0041] Therefore, when the target description information register is a high-frequency description information register, the corresponding target instruction type is the first type; when the target description information register is a low-frequency description information register, the corresponding target instruction type is the second type. For the high-frequency description information register, it is configured to be written to the UAV description information register group during the execution phase; for the low-frequency description information register, it is configured to be written to the circular buffer during the execution phase.

[0042] In some embodiments, N can be the number of description information registers in the UAV description information register group.

[0043] For example, if the number of description registers in the UAV description register group is 64, then the number of high-frequency description registers is 64. That is, the driver configuration places the description registers used most frequently in the API in the UAV description register group, and the configuration places the description registers used less frequently in the API in the circular buffer.

[0044] In this embodiment of the invention, the target instruction may include a type indicator field and a general-purpose register index field.

[0045] In practical implementation, when the target instruction is a unified load instruction, a type indicator field and a general-purpose register index field can be added to the existing unified load instruction. That is, compared to existing unified load instructions, the unified load instruction provided in this embodiment of the invention additionally includes a type indicator field and a general-purpose register index field.

[0046] When the target instruction is a unified store instruction, a type indicator field and a general-purpose register index field can be added to the existing unified store instruction. That is, compared to existing unified store instructions, the unified store instruction provided in this embodiment of the invention additionally includes a type indicator field and a general-purpose register index field.

[0047] In practical implementation, the type indicator field can be used to indicate whether the target instruction is of type 1 or type 2. The general-purpose register index field can be used to indicate the index of the target general-purpose register in the general-purpose register group, which stores target description information.

[0048] In practice, the length of the type indicator field can be set to 1 bit. When the type indicator field takes the first value, it indicates that the type of the target instruction is of the first type, that is, the corresponding target description information register is set to the high-frequency description information register; when the type indicator field takes the second value, it indicates that the type of the target instruction is of the second type, that is, the corresponding target description information register is set to the low-frequency description information register.

[0049] In some embodiments, the first value described above is 1, and the second value described above is 0.

[0050] In practice, the length of the general-purpose register index field can be determined based on the number of general-purpose registers in the general-purpose register group.

[0051] For example, if there are 64 general-purpose registers in the general-purpose register group, then the length of the general-purpose register index field is 6 bits.

[0052] In practice, when the type indicator field takes the first value, it indicates that the type of the target instruction is the first type. The general-purpose register index field can take the empty value, or a specific value such as all 0s or all 1s, to indicate that the general-purpose register index field is invalid.

[0053] In this embodiment of the invention, when the memory access unit receives the target instruction, it can determine whether the target instruction is of the first type or the second type based on the type indicator field in the target instruction.

[0054] In practice, when the memory access unit detects that the type indicator field in the target instruction is the second value, the memory access unit can obtain the index of the target general-purpose register from the general-purpose register index field, obtain the target general-purpose register from the general-purpose register group, and obtain the target description information stored in the target general-purpose register.

[0055] Simultaneously, the memory access unit requests a loop identifier, which indicates which register in the circular buffer the target description information needs to be stored in. Then, the memory access unit stores the acquired target description information into the register corresponding to the loop identifier.

[0056] In this embodiment of the invention, when the target instruction is a unified load instruction, the memory access unit can request target description information from the target description information register; when the target instruction is a unified store instruction, the memory access unit can store target description information in the target description information register.

[0057] In specific implementation, when the target instruction is a unified load instruction and the unified load instruction is of type 1, the memory access unit requests the target description information register from the UAV description information register group; when the unified load instruction is of type 2, it requests the register storing the target description information from the circular buffer.

[0058] When the target instruction is a unified store instruction and the unified store instruction is of type 1, the memory access unit obtains the register storing the target description information from the UAV description information register group; when the unified store instruction is of type 2, it obtains the register storing the target description information from the circular buffer.

[0059] In this embodiment of the invention, the graphics processor may further include memory 3. The driver may store the target description information corresponding to the low-frequency description information register in memory as a constant buffer view (CBV) resource. Alternatively, the driver may store the target description information corresponding to the low-frequency description information register in memory as a shader resource view (SRV) resource.

[0060] When the target description information is stored in memory as a CBV resource, the memory access unit can send a constant data load instruction to memory to read the target description information from memory and load it into the target general-purpose register. Afterward, the memory access unit retrieves the target description information from the target general-purpose register.

[0061] When the target description information is stored in memory as an SRV resource, the memory access unit can send a shader load instruction to memory to read the target description information from memory and load it into the target general-purpose register. Afterward, the memory access unit retrieves the target description information from the target general-purpose register.

[0062] The following is combined with Figure 1 The graphics processor provided in the document will be used to illustrate the resource memory access method provided in the embodiments of the present invention. (Refer to...) Figure 2 This invention provides a resource access method in an embodiment of the invention.

[0063] In this embodiment of the invention, the resource memory access methods corresponding to steps 201 to 203 below can be executed by the memory access unit in the graphics processor described above.

[0064] Step 201: Receive target instructions.

[0065] In practice, the target instruction can be a unified load instruction or a unified store instruction.

[0066] Step 202: Obtain the target description information register corresponding to the target instruction.

[0067] Step 203: Execute the target instruction.

[0068] In this embodiment of the invention, the memory access unit can obtain the type of the target instruction.

[0069] When the target instruction is of type 1, the memory access unit can obtain the target description information register from the UAV description information register group; when the target instruction is of type 2, the memory access unit can read the target general-purpose register storing the target description information from the general-purpose register group, and store the read target description information into the target general-purpose register in the circular buffer, and use the target general-purpose register as the target description information register.

[0070] In this embodiment of the invention, the target instruction may include a type indicator field and a general-purpose register index field.

[0071] In practical implementation, when the target instruction is a unified load instruction, a type indicator field and a general-purpose register index field can be added to the existing unified load instruction. That is, compared to existing unified load instructions, the unified load instruction provided in this embodiment of the invention additionally includes a type indicator field and a general-purpose register index field.

[0072] When the target instruction is a unified store instruction, a type indicator field and a general-purpose register index field can be added to the existing unified store instruction. That is, compared to existing unified store instructions, the unified store instruction provided in this embodiment of the invention additionally includes a type indicator field and a general-purpose register index field.

[0073] In practice, the length of the type indicator field can be set to 1 bit. When the type indicator field takes the first value, it indicates that the type of the target instruction is of the first type, that is, the corresponding target description information register is set to the high-frequency description information register; when the type indicator field takes the second value, it indicates that the type of the target instruction is of the second type, that is, the corresponding target description information register is set to the low-frequency description information register.

[0074] In this embodiment of the invention, the type of the target instruction is determined by the driver based on the usage frequency of the target description information register; the usage frequency of the target description information register may be provided to the driver by the compiler.

[0075] Furthermore, the target description information register for the first type of target instruction is used more frequently than the target description information register for the second type of target instruction.

[0076] In practical implementation, the description information registers with the highest frequency among all used description information registers can be designated as high-frequency description information registers, while the other description information registers can be designated as low-frequency description information registers.

[0077] Therefore, when the target description information register is a high-frequency description information register, the corresponding target instruction type is the first type; when the target description information register is a low-frequency description information register, the corresponding target instruction type is the second type. For the high-frequency description information register, it is configured to be written to the UAV description information register group during the execution phase; for the low-frequency description information register, it is configured to be written to the circular buffer during the execution phase.

[0078] In this embodiment of the invention, the number of registers in the circular buffer can be set according to the number of stages in the execution pipeline of the memory access unit. Specifically, the number of registers in the circular buffer can be no less than the number of stages in the execution pipeline of the memory access unit.

[0079] In this embodiment of the invention, when the target instruction is of the second type, the target description information can be stored in memory as a CBV resource or as an SRV resource. When the memory access unit executes the target instruction, it can use the CLD instruction to read the target description information from memory and write it to the circular buffer; or, it can use the SLD instruction to read the target description information from memory and write it to the circular buffer.

[0080] In specific implementation, the execution process of the aforementioned memory access unit can be referred to the above. Figure 1 The descriptions in the relevant embodiments are not repeated here.

[0081] In summary, after receiving a target instruction, the memory access unit retrieves the target description information register corresponding to that instruction. If the target instruction is of type 1, the target description information register is retrieved from the UAV description information register group; if the target instruction is of type 2, the target description information register is retrieved from the circular buffer. By adding a circular buffer to the memory access unit, the description information registers in the circular buffer can cyclically store description information, thus increasing the number of description information registers used to store description information and improving the performance of the graphics processor.

[0082] In specific implementation, the modules / units included in the various devices and products described in the above embodiments can be software modules / units, hardware modules / units, or a combination of both.

[0083] For example, for various devices and products applied to or integrated into a chip, each module / unit can be implemented using hardware methods such as circuits, or at least some modules / units can be implemented using software programs that run on a processor integrated within the chip, while the remaining (if any) modules / units can be implemented using hardware methods such as circuits; for various devices and products applied to or integrated into a chip module, each module / unit can be implemented using hardware methods such as circuits, and different modules / units can be located in the same component (e.g., chip, circuit module, etc.) or different components of the chip module, or at least some modules / units can be implemented using hardware methods such as circuits. The components can be implemented using software programs that run on the processor integrated within the chip module. The remaining (if any) modules / units can be implemented using hardware methods such as circuits. For various devices and products applied to or integrated into the terminal, each of its components / units can be implemented using hardware methods such as circuits. Different modules / units can be located in the same component (e.g., chip, circuit module, etc.) or in different components within the terminal. Alternatively, at least some modules / units can be implemented using software programs that run on the processor integrated within the terminal, while the remaining (if any) modules / units can be implemented using hardware methods such as circuits.

[0084] This invention also provides a computer-readable storage medium, which is a non-volatile storage medium or a non-transient storage medium, on which a computer program is stored. When the computer program is run by a processor, it executes the steps of the resource access method of the out-of-order access view provided in any of the above embodiments.

[0085] This invention also provides a terminal device, including the graphics processor provided in any of the above embodiments.

[0086] Those skilled in the art will understand that all or part of the steps in the various methods of the above embodiments can be performed by a program instructing related hardware. The program can be stored in a computer-readable storage medium, which may include ROM, RAM, disk, or optical disk, etc.

[0087] While the present invention has been disclosed above, it is not limited thereto. Any person skilled in the art can make various modifications and alterations without departing from the spirit and scope of the invention; therefore, the scope of protection of the present invention should be determined by the scope defined in the claims.

Claims

1. A graphics processor, characterized in that, include: A scheduler is used to transmit target commands; the target commands include any one of the following: a unified loading command, a unified storage command; The memory access unit includes a UAV description information register group and a circular buffer. The memory access unit is configured to receive the target instruction and obtain the target description information register corresponding to the target instruction, including: in response to the target instruction being of a first type, obtaining the target description information register from the UAV description information register group; in response to the target instruction being of a second type, obtaining the target description information register from the circular buffer; executing the target instruction; when the target instruction is of the second type, obtaining a target general-purpose register from a general-purpose register group, the target general-purpose register storing target description information associated with the target instruction; storing the target description information in a register in the circular buffer, and using this register as the target description information register. The type of the target instruction is determined by the driver based on the usage frequency of the target description information register; wherein, if the usage frequency of the target description information register is among the top N positions of all used description information registers, the type of the corresponding target instruction is the first type; if the usage frequency of the target description information register is not among the top N positions, the type of the corresponding target instruction is the second type; N is the number of description information registers in the UAV description information register group.

2. The graphics processor as described in claim 1, characterized in that, The target instruction includes a type indicator field and a general-purpose register index field, wherein: The type indicator field is used to indicate whether the type of the target instruction is the first type or the second type; The general-purpose register index field is used to indicate the index of the target general-purpose register in the general-purpose register group.

3. The graphics processor as described in claim 1, characterized in that, The number of registers corresponding to the circular buffer is not less than the number of stages in the execution pipeline of the memory access unit.

4. The graphics processor as described in claim 1, characterized in that, Also includes: Memory; when the type of the target instruction is the second type, the target description information is stored in the memory as a constant buffer view resource; The memory access unit obtains the target general-purpose register from the general-purpose register group, including: the memory access unit receiving a constant data load instruction, obtaining the target description information from the memory, and loading the target description information into the target general-purpose register; the memory access unit reading the target description information from the target general-purpose register.

5. The graphics processor as described in claim 1, characterized in that, Also includes: Memory; when the type of the target instruction is the second type, the target description information is stored in the memory as a shader resource view resource; The memory access unit obtains the target general-purpose register from the general-purpose register group, including: the memory access unit receives a shader load instruction, obtains the target description information from the memory, and loads the target description information into the target general-purpose register; The memory access unit reads the target description information from the target general-purpose register.

6. The graphics processor as described in claim 1, characterized in that, The target instruction is a unified load instruction; the memory access unit executes the target instruction, including: the memory access unit requests the target description information from the target description information register; The target instruction is a unified storage instruction; the memory access unit executes the target instruction, including: the memory access unit stores the target description information in the target description information register.

7. A resource access method for an unordered access view, characterized in that, include: Receive target instructions; The target instruction includes any one of the following: unified loading instruction, unified storage instruction; Obtaining the target description information register corresponding to the target instruction includes: in response to the target instruction being of a first type, obtaining the target description information register from the UAV description information register group; in response to the target instruction being of a second type, obtaining the target description information register from the circular buffer; both the UAV description information register group and the circular buffer are located in the memory access unit; The step of obtaining the target description information register from the circular buffer includes: obtaining a target general-purpose register from a general-purpose register group, wherein the target general-purpose register stores target description information associated with the target instruction; storing the target description information into a corresponding register in the circular buffer, and using the corresponding register as the target description information register; Execute the target instruction; The type of the target instruction is determined by the driver based on the usage frequency of the target description information register; wherein, if the usage frequency of the target description information register is among the top N positions of all used description information registers, the type of the corresponding target instruction is the first type; if the usage frequency of the target description information register is not among the top N positions, the type of the corresponding target instruction is the second type; N is the number of description information registers in the UAV description information register group.

8. The resource access method as described in claim 7, characterized in that, The target instruction includes a type indicator field and a general-purpose register index field, wherein: The type indicator field is used to indicate whether the type of the target instruction is the first type or the second type; The general-purpose register index field is used to indicate the index of the target general-purpose register in the general-purpose register group.

9. The resource access method as described in claim 7, characterized in that, The number of registers corresponding to the circular buffer is not less than the number of stages in the execution pipeline of the memory access unit.

10. A terminal device, characterized in that, Including the graphics processor as described in any one of claims 1 to 6.

11. A computer-readable storage medium, said computer-readable storage medium being a non-volatile storage medium or a non-transient storage medium, having stored thereon a computer program, characterized in that, The computer program, when executed by the processor, performs the steps of the resource access method of the unordered access view as described in claim 7 or 9.

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