An active region, a laser diode, and a method of fabricating a laser diode

Abstract

The application discloses an active region, a laser diode and a preparation method of the laser diode, and belongs to the technical field of semiconductors. The active region comprises a quantum well and a barrier layer; the quantum well comprises an N-type tunnel injection layer, an N-side strain compensation layer, a quantum dot layer in a well, a P-side strain compensation layer and a P-type tunnel injection layer which are stacked in sequence; the material of the N-type tunnel injection layer comprises heavily doped N-type GaAs, and the material of the P-type tunnel injection layer comprises heavily doped P-type GaAs; the application further relates to a laser diode comprising the active region and a preparation method of the laser diode. According to the application, the strain compensation layer and the tunnel injection layer are introduced on both sides of the quantum dot structure in the well, the synergistic effect of three-dimensional strong localization effect, local strain compensation and resonant tunnel injection mechanism is realized, the threshold current of the device is significantly reduced, and the working voltage is optimized while the characteristic temperature is greatly improved.

Description

Technical Field

[0001] This invention relates to the field of semiconductor technology, and in particular to an active region, a laser diode, and a method for fabricating the laser diode. Background Technology

[0002] Infrared laser diodes are widely used in fiber optic communication, laser sensing, medical diagnostics, and solid-state laser pumping. With the increasing demand for high-performance, low-power, and high-reliability light sources in various applications, achieving lower threshold current, higher temperature stability, and better electro-optic conversion efficiency in laser devices has become a core objective for technological development in this field. In recent years, the industry has conducted extensive research on the active region structure design of laser diodes, aiming to overcome the performance bottlenecks of traditional laser diodes.

[0003] Based on the structural differences in the active region, current high-performance laser diode technologies are mainly divided into two categories: quantum well structures and quantum dot structures. Among them, quantum well structures based on InGaAs / GaAs heterojunction materials are currently the mainstream technology. They rely on the energy barrier of the heterojunction to achieve two-dimensional confinement of charge carriers, offering advantages such as mature manufacturing processes and high optical gain. However, this structure has limitations in its ability to confine charge carriers, especially at high temperatures where electron leakage is prone to occur, leading to a lower device characteristic temperature and a significant increase in threshold current with increasing temperature. Furthermore, insufficient valence band shift limits hole injection efficiency, and Auger recombination under high carrier density exacerbates the effect, further restricting the improvement of electro-optical conversion efficiency. To address these issues, optimization schemes such as asymmetric waveguides and gradient refractive index cladding have been applied to the fabrication of high-performance laser diodes. However, these improvements mainly focus on the optical field management level and cannot fundamentally enhance the three-dimensional quantum confinement capability of charge carriers, resulting in limited improvement in threshold current reduction. Quantum dot structures, on the other hand, possess strong three-dimensional localization effects, theoretically enabling the formation of discrete energy levels, and exhibit outstanding advantages such as ultra-low threshold current, excellent temperature stability, and narrow linewidth. However, applying it to infrared devices faces many technical challenges: there is a significant lattice mismatch between quantum dots and GaAs substrates, which introduces high-density strain and defects, impairing the luminescence quality of the material; the size, shape and distribution uniformity of quantum dots are difficult to control precisely, resulting in poor consistency of the optical gain spectrum of the device; in addition, the carrier injection barrier between quantum dots and wide bandgap barrier layers is high, usually requiring higher driving voltages to ensure normal device operation.

[0004] To leverage the advantages of both quantum wells and quantum dots, the quantum dot-in-well (DWELL) structure has emerged, which embeds quantum dots within a quantum well layer. However, applying this structure to infrared devices still presents several unresolved challenges. For instance, if the local strain introduced by the quantum dots cannot be effectively compensated and released within the well layer, it will still degrade the quality of the active region crystal. The quantum well layer may become a lateral diffusion channel for charge carriers rather than an ideal trapping center, reducing the three-dimensional confinement effect. Furthermore, existing structures often rely on thermal excitation mechanisms to transport charge carriers from the well to the point, resulting in low injection efficiency and difficulty in meeting the requirements for low-voltage, high-efficiency operation. Therefore, for existing quantum dot-in-well laser diodes, achieving synergistic optimization among "strong three-dimensional charge carrier confinement," "effective strain compensation," and "efficient, low-power charge carrier injection" is a core challenge that urgently needs to be addressed. Summary of the Invention

[0005] This invention aims to at least solve one of the aforementioned technical problems existing in the prior art. To this end, one objective of this invention is to provide an active region. The active region of this invention, based on a quantum dot-in-a-well structure, forms a composite active region structure with three-dimensional carrier confinement and efficient injection functions by introducing a strain compensation layer and a tunneling injection layer on both sides of the quantum dot-in-a-well structure, thereby achieving lower threshold current, higher temperature stability, and better electro-optical conversion efficiency. A second objective of this invention is to provide a laser diode including the active region described in the first aspect. A third objective of this invention is to provide a method for fabricating the laser diode described in the second aspect.

[0006] To achieve the above objectives, the technical solution adopted by the present invention is as follows: A first aspect of the present invention is to provide an active region comprising a quantum well and a barrier layer; the quantum well comprising a quantum dot layer in the well, a strain compensation layer, and a tunneling injection layer; the strain compensation layer comprising an N-side strain compensation layer and a P-side strain compensation layer respectively disposed on the N-side and P-side surfaces of the quantum dot layer in the well; the tunneling injection layer comprising an N-type tunneling injection layer and a P-type tunneling injection layer respectively disposed on the surface of the N-side strain compensation layer and the surface of the P-side strain compensation layer; the material of the N-type tunneling injection layer comprising heavily doped N-type GaAs, and the material of the P-type tunneling injection layer comprising heavily doped P-type GaAs.

[0007] The DWELL layer comprises a potential well layer and an array of quantum dots disposed within the potential well layer.

[0008] N-type doping refers to the introduction of impurity atoms with more valence electrons than the replaced atom, typically elements such as Si, S, and Se; P-type doping refers to the introduction of impurity atoms with fewer valence electrons than the replaced atom, typically elements such as Zn, C, and Be.

[0009] The active region described in this invention is a composite structure formed by combining a quantum dot structure in a well with a strain compensation layer and a tunneling injection layer. The strain compensation layer provides compensation and release for the local strain of the quantum dot. The tunneling injection layer is located between the quantum well and the barrier layer and is made of heavily doped N-type GaAs or heavily doped P-type GaAs material. It improves the injection efficiency of carriers from the barrier layer to the quantum well / quantum dot through the resonant tunneling effect, thereby reducing the injection voltage. Based on the combination of the quantum dot structure in the well, the strain compensation layer, and the tunneling injection layer, a three-dimensional strong localization effect, the synergistic effect of local strain compensation and resonant tunneling injection mechanism are achieved, significantly reducing the device threshold current and optimizing the operating voltage while greatly increasing its characteristic temperature.

[0010] In some preferred embodiments, the active region comprises a plurality of stacked quantum wells connected by barrier layers; for example, the multiplicity of the stacks can be triplet, quintuplets, or heptaplets.

[0011] In some preferred embodiments, the material of the potential well layer includes In x Ga 1-x As, where x is the molar percentage In / (In+Ga), and x satisfies 0.15≤x≤0.25; for example, x can take any value from 0.15, 0.17, 0.19, 0.20, 0.22, 0.24, 0.25 or any value in between.

[0012] In some preferred embodiments, the potential well layer thickness is 6-10 nm; more preferably 7-9 nm; and even more preferably 7.5-8.5 nm.

[0013] In some preferred embodiments, the quantum dot is made of InAs or InGaAs.

[0014] As quantum dot materials, InAs or InGaAs emit light at wavelengths slightly longer than the quantum well, forming localized energy levels. This allows for rapid carrier transfer from the well to the dot via a tunneling mechanism, suppressing Auger recombination and nonradiative recombination.

[0015] In some preferred embodiments, the diameter of the quantum dot is 8-15 nm; more preferably 10-13 nm; and even more preferably 11-12 nm.

[0016] In some preferred embodiments, the height of the quantum dot is 3-6 nm; more preferably 3.5-5.5 nm; and even more preferably 4-5 nm.

[0017] In some preferred embodiments, the number density of the quantum dots is (2-7) × 10⁻⁶. 10 cm -2 .

[0018] In some preferred embodiments, the thickness of the N-type tunneling injection layer is 2-4 nm; more preferably 2.5-3.5 nm.

[0019] In some preferred embodiments, the thickness of the P-type tunneling injection layer is 2-4 nm; more preferably 2.5-3.5 nm.

[0020] In some preferred embodiments, the doping concentrations of both the heavily doped N-type GaAs and the heavily doped P-type GaAs are greater than 1 × 10⁻⁶. 19 cm -3 .

[0021] In some preferred embodiments, the material of the strain compensation layer includes InGaP or GaAsP.

[0022] Existing technologies typically use GaAs and InAs as substrate materials and quantum dot materials, respectively. The lattice constant of InGaP or GaAsP is between that of GaAs substrate and InAs quantum dot, which can buffer the local compressive strain introduced by quantum dots, prevent the generation of dislocation defects, and optimize carrier capture efficiency through band engineering.

[0023] In some preferred embodiments, the thickness of the strain compensation layer is 1-3 nm; more preferably 1.5-2.5 nm.

[0024] A second aspect of the present invention is to provide a laser diode comprising the active region described in the first aspect.

[0025] In some preferred embodiments, the laser diode includes a substrate, a buffer layer, an N-type lower cladding layer, an N-type lower waveguide layer, an active region, a P-type upper waveguide layer, an electron blocking layer, a P-type upper cladding layer, and a contact layer, which are stacked sequentially.

[0026] In some preferred embodiments, the electron blocking layer is made of Al. y Ga 1-y As, where y is the molar percentage Al / (Al+Ga), and y satisfies 0.3≤y≤0.6; for example, y can take any value from 0.30, 0.32, 0.35, 0.38, 0.40, 0.43, 0.45, 0.47, 0.50, 0.55, 0.60 or any value in between.

[0027] In some preferred embodiments, the thickness of the electron blocking layer is 10-20 nm; more preferably 12-18 nm; and even more preferably 14-16 nm.

[0028] In some preferred embodiments, the electron blocking layer has a doping concentration of (0.8-2)×10⁻⁶. 18 cm -3 .

[0029] The electron blocking layer is used to prevent electrons from leaking into the P-type region.

[0030] In some preferred embodiments, the material of the N-type undercladding comprises N-type Al with a gradually varying Al content. w Ga 1- w As, the Al content gradually decreases along the thickness direction from the surface of the buffer layer to the surface of the N-type lower waveguide layer, where w is the molar percentage Al / (Al+Ga).

[0031] In some preferred embodiments, the N-type Al w Ga 1-w The As doping concentration is (0.8-1.5)×10 18 cm -3 .

[0032] In some preferred embodiments, the lower limit w of the molar percentage of Al in the material of the N-type lower cladding is... min Satisfying 0.2≤w min ≤0.4, upper limit of molar percentage of Al w max Satisfies 0.4 <w max ≤0.6; the further preferred lower limit satisfies 0.25≤w min ≤0.35, the upper limit satisfies 0.45≤w max ≤0.55.

[0033] In some preferred embodiments, the material of the P-type cladding comprises P-type Al with a gradually varying Al content. z Ga 1- z As, the Al content gradually increases along the thickness direction from the electron blocking layer surface to the contact layer surface, where z is the molar percentage Al / (Al+Ga).

[0034] In some preferred embodiments, the P-type Al z Ga 1-z The doping concentration of As is (1-1.5)×10 18 cm -3 .

[0035] In some preferred embodiments, the lower limit z of the molar percentage of Al in the material of the P-type cladding is... min Satisfying 0.2≤z min ≤0.4, upper limit of the molar percentage of Al z max Satisfying 0.5≤zmax ≤0.7; the further preferred lower limit satisfies 0.25≤z min ≤0.35, the upper limit satisfies 0.55≤z max ≤0.65.

[0036] The N-type lower cladding and the P-type upper cladding form a refractive index gradient by setting an Al composition gradient, thereby enhancing the lateral confinement of the light field.

[0037] In some preferred embodiments, the thickness of the N-type lower cladding is 1-3 μm; more preferably 1.5-2.5 μm.

[0038] In some preferred embodiments, the thickness of the P-type cladding is 1-3 μm; more preferably 1.0-2.0 μm.

[0039] In some preferred embodiments, the doping concentration of the N-type lower waveguide layer is (2-6) × 10⁻⁶. 17 cm -3 .

[0040] In some preferred embodiments, the doping concentration of the P-type upper waveguide layer is (3-8) × 10⁻⁶. 17 cm -3 .

[0041] In some preferred embodiments, the P-type doping concentration of the contact layer is (1-5) × 10⁻⁶. 19 cm -3 .

[0042] A third aspect of the present invention is to provide a method for fabricating a laser diode as described in the second aspect of the present invention, comprising the following steps: (1) A buffer layer, an N-type lower cladding layer, an N-type lower waveguide layer and a barrier layer are sequentially grown on the substrate surface; (2) Growth of the active region; including: a) sequentially growing an N-type tunneling injection layer, an N-side strain compensation layer, a quantum dot layer in the well, a P-side strain compensation layer, a P-type tunneling injection layer and a barrier layer on the surface of the barrier layer; b) repeating step a) according to the designed stack number. (3) A P-type waveguide layer, an electron blocking layer, a P-type upper cladding layer, and a contact layer are sequentially grown on the surface of the last generated barrier layer; (4) The laser diode is obtained after packaging.

[0043] The beneficial effects of this invention are: (1) This invention provides an active region. Based on the quantum dot structure in the well, a strain compensation layer and a tunneling injection layer are introduced on both sides of the quantum dot structure in the well. The strong localization effect of the quantum dot in three dimensions significantly enhances the ability to confine the charge carriers and suppresses the carrier leakage and Auger recombination at high temperature. The strain compensation layer set on both sides of the quantum well realizes local strain compensation. Without destroying the original structure optical field distribution and without sacrificing the quantum well gain, it effectively reduces the lattice mismatch between the quantum dot and the substrate, improves the crystal quality of the active region, and thus improves the reliability and lifetime of the device. The refractive index difference formed by the strain compensation layer and the quantum well layer can further concentrate the optical field in the quantum well region and improve the optical gain of the quantum well. The heavily doped tunneling injection layer set between the barrier layer and the quantum well significantly improves the injection efficiency of the charge carriers from the barrier layer to the quantum well / quantum dot through the resonant tunneling effect. The tunneling injection layer forms a built-in electric field at the quantum well interface. On the one hand, it promotes the rapid migration of the charge carriers. On the other hand, it absorbs the high-order mode and low-energy light, which plays the role of a saturable absorber, effectively suppressing the high-order mode oscillation and improving the beam quality.

[0044] (2) The present invention also achieves the transfer of charge carriers from the quantum well to the quantum dot by designing the quantum dot size (diameter 8-15nm) and the quantum well thickness (6-10nm) to form a local state energy level difference; at the same time, the synergistic effect of the strain compensation layer and the tunneling injection layer further increases the height of the barrier layer, so that electrons and holes form a storage effect at the quantum well interface, which enhances the ability to confine charge carriers, promotes the carrier migration rate, and improves the temperature characteristics and reliability of the device.

[0045] (3) The present invention also provides a laser diode based on the active region. Based on the composite active region structure of the present invention with three-dimensional carrier confinement and efficient injection function, the laser diode device containing the active region has lower threshold current, higher temperature stability and better electro-optic conversion efficiency.

[0046] (4) The present invention also provides a method for preparing the laser diode, which does not require the introduction of other special or large equipment, can be directly prepared by adapting to existing device deposition equipment, is compatible with existing process preparation conditions, and has the potential for industrial production. Attached Figure Description

[0047] Figure 1 This is a schematic diagram of the active region structure in Embodiment 1 of the present invention; Figure 2 This is a schematic diagram of the active region structure in Embodiment 2 of the present invention; Figure 3 This is a schematic diagram of the structure of the laser diode in Embodiment 3 of the present invention; Figure 4These are the VI characteristic diagrams of the laser diodes after packaging in Embodiments 3-5 and Comparative Example 1 of the present invention; Figure 5 The diagram shows the VI characteristics of the laser diodes after packaging in Embodiment 3 and Comparative Examples 2-5 of this invention. Figure 6 The diagram shows the VI characteristics of the laser diodes packaged according to Embodiments 3 and 6-8 of the present invention. Figure 7 The diagrams show the VI characteristics of the laser diodes after packaging in Embodiments 3-8 and Comparative Examples 1-5 of this invention. Figure 8 The diagram shows the VI characteristics of the laser diodes after packaging according to embodiments 3 and 9 of the present invention. Figure 9 The PI characteristic diagrams of the laser diodes after packaging in Embodiments 3-5 and Comparative Example 1 of the present invention are shown. Figure 10 The diagram shows the PI characteristics of the laser diodes after packaging in Embodiment 3 and Comparative Examples 2-5 of this invention. Figure 11 The diagram shows the PI characteristics of the laser diodes after packaging in Embodiments 3 and 6-8 of this invention. Figure 12 The PI characteristic diagrams are shown for the laser diodes after packaging in Embodiments 3-8 and Comparative Examples 1-5 of this invention. Figure 13 The diagram shows the PI characteristics of the laser diodes after packaging in Embodiments 3 and 9 of this invention. Figure 14 The diagram shows the operating voltage variation of the laser diodes packaged in Embodiments 3-9 and Comparative Examples 1-5 of this invention at different temperatures. Figure 15 The graphs show the power variation of the laser diodes packaged in Embodiments 3-9 and Comparative Examples 1-5 of the present invention at different temperatures. Figure 16 The graphs show the threshold current variations of the laser diodes packaged in Embodiments 3-9 and Comparative Examples 1-5 of this invention at different temperatures. Figure 17 The graphs show the slope efficiency variations of the packaged laser diodes in Embodiments 3-9 and Comparative Examples 1-5 of this invention at different temperatures. Figure 18 These are comparison diagrams of the characteristic temperatures of the laser diodes after packaging in Embodiments 3-9 and Comparative Examples 1-5 of the present invention.

[0048] Figure reference numerals: 1-Quantum dot layer in the well; 2-Potential well layer; 3-Quantum dot; 4-Strain compensation layer; 5-N-type tunneling injection layer; 6-P-type tunneling injection layer; 7-Barrier layer; 8-Substrate; 9-Buffer layer; 10-N-type lower cladding; 11-N-type lower waveguide layer; 12-Active region; 13-P-type upper waveguide layer; 14-P-type electron blocking layer; 15-P-type upper cladding; 16-Contact layer; 17-N-type electrode; 18-P-type electrode. Detailed Implementation

[0049] The present invention will be further described in detail below through specific embodiments.

[0050] Unless otherwise specified, the raw materials, reagents, or apparatus used in the following examples and comparative examples are all available from conventional commercial sources or can be obtained by existing technical methods. Unless otherwise specified, the test or experimental methods are conventional methods in the art.

[0051] Unless otherwise specified, the term "about" in this invention actually means that the error is allowed to be within ±2%, for example, about 100 is actually 100 ± 2% × 100.

[0052] Example 1 This embodiment relates to an active region, see Appendix Figure 1 The active region includes a single quantum well, which includes a quantum dot layer 1 in the well, a potential well layer 2, and an array of quantum dots 3 disposed within the potential well layer. The potential well layer 2 is made of InGaAs, and the quantum dots 3 are made of InAs. Strain compensation layers 4 are disposed on the N-side and P-side of the potential well layer 2, respectively. The strain compensation layers 4 are made of InGaP or GaAsP. An N-type tunneling injection layer 5 is disposed on the surface of the N-side strain compensation layer 4, and a P-type tunneling injection layer 6 is disposed on the surface of the P-side strain compensation layer 4. Barrier layers 7 are disposed on the surfaces of the N-type tunneling injection layer 5 and the P-type tunneling injection layer 6, respectively. The N-type tunneling injection layer 5 is made of heavily doped N-type GaAs, and the P-type tunneling injection layer 6 is made of heavily doped P-type GaAs.

[0053] Example 2 This embodiment relates to an active region comprising a periodic superposition of three weighted sub-wells, see appendix. Figure 2The single quantum well includes a quantum dot layer 1 in the well, which includes a potential well layer 2 and an array of quantum dots 3 disposed within the potential well layer. The potential well layer 2 is made of InGaAs, and the quantum dots 3 are made of InAs. Strain compensation layers 4 are disposed on the N-side and P-side of the potential well layer 2, respectively. The strain compensation layers 4 are made of InGaP or GaAsP. An N-type tunneling injection layer 5 is disposed on the surface of the N-side strain compensation layer 4, and a P-type tunneling injection layer 6 is disposed on the surface of the P-side strain compensation layer 4. The N-type tunneling injection layer 5 is made of heavily doped N-type GaAs, and the P-type tunneling injection layer 6 is made of heavily doped P-type GaAs.

[0054] The stacked quantum wells are connected by barrier layers 7. Barrier layers 7 are respectively disposed on the surfaces of the outermost N-type tunneling injection layer 5 and the outermost P-type tunneling injection layer 6 in the active region.

[0055] Example 3 This embodiment relates to a laser diode based on a quantum dot structure in a well; see appendix. Figure 3 It includes an N-type electrode 17, a substrate 8, a buffer layer 9, an N-type lower cladding layer 10, an N-type lower waveguide layer 11, an active region 12, a P-type upper waveguide layer 13, a P-type electron blocking layer 14, a P-type upper cladding layer 15, a contact layer 16, and a P-type electrode 18 stacked in sequence. The active region 12 is the active region involved in Example 2.

[0056] In this embodiment, trimethylgallium (TMGa) is used as the gallium source, trimethylaluminum (TMAl) as the aluminum source, trimethylindium (TMIn) as the indium source, arsine (AsH3) as the arsenic source, phosphine (PH3) as the phosphorus source, silane (SiH4) as the N-type dopant source, and carbon tetrabromide (CBr4) as the P-type dopant source.

[0057] The method for fabricating this laser diode includes the following steps: (1) Substrate preparation; Si-doped N-type GaAs(100) was selected as the substrate, with a carrier concentration of (0.4-2.5)×10⁻⁶. 18 cm -3 The room temperature resistivity is (1.2-9.9)×10⁻⁶. -3 Ω·cm, electron mobility >1500cm 2 / (V·s), the substrate is placed in a metal-organic chemical vapor deposition (MOCVD) reaction chamber, heated to 750°C in H2 atmosphere, baked at this temperature for 15 min to remove surface adsorbates, and then cooled to 500°C and AsH3 is introduced for surface passivation treatment.

[0058] (2) Buffer layer growth: Using trimethylgallium (TMGa) as gallium source and arsine (AsH3) as arsenic source, a GaAs buffer layer was epitaxially grown on a GaAs substrate at a growth temperature of 600℃ and a growth thickness of 500nm.

[0059] (3) N-type lower cladding growth; N-type AlGaAs with a graded Al composition is epitaxially grown on the buffer layer with a doping concentration of 1.2 × 10⁻⁶. 18 cm -3 The growth temperature is 700℃. The Al content gradually decreases from the surface of the buffer layer to the surface of the N-type lower waveguide layer along the thickness direction. The molar content of Al (Al / (Al+Ga)) decreases linearly from 0.5 to 0.3. The thickness of the lower cladding layer is 2.0μm.

[0060] (4) Growth of N-type lower waveguide layer; maintaining the growth temperature at 700℃, grow an N-type AlGaAs waveguide layer on the surface of the N-type lower cladding, with a doping concentration of 2.5×10⁻⁶. 17 cm -3 The Al composition is 0.3, and the thickness is 200 nm.

[0061] (5) Growth of the barrier layer in the active region: The growth temperature is reduced to 600℃, and an intrinsic GaAs barrier layer with a thickness of 80nm is grown on the surface of the N-type lower waveguide layer.

[0062] (6) Growth of N-type tunneling injection layer; growth temperature reduced to 550℃, and growth of heavily doped N-type GaAs (N + -GaAs), with a doping concentration of 2×10⁻⁶. 19 cm -3 The growth thickness is 3nm.

[0063] (7) Growth of the strain compensation layer: The growth temperature is kept at 550℃. GaAsP layer is grown on the surface of N-type tunneling injection layer. The molar percentage of P component (P / (As+P)) is 0.2 and the growth thickness is 2.5nm.

[0064] (8) Quantum dot layer growth in the well: The growth temperature was reduced to 510℃. A 4nm thick InGaAs layer was first deposited using an alternating growth method. Then, TMI and AsH3 were introduced. An InAs quantum dot array was formed by Stranski-Krastanov (SK) epitaxial growth self-assembly mode. The average diameter of the InAs quantum dots was 11-12nm, the average height was 4-5nm, and the number density was (4-5)×10 10 cm -2 After the quantum dots are formed, a 4nm thick InGaAs layer is deposited.

[0065] By adjusting the well width and In composition, the emission wavelength is locked within the range of 940±10nm. It should be noted that this wavelength is an exemplary wavelength of the present invention, and is the emission wavelength obtained in this embodiment by adjusting parameters such as In composition, well width, and InAs quantum dots. In principle, this structure can also be used in other infrared bands. The emission wavelength can be adjusted by changing relevant parameters such as In content of InGaAs potential well, well width, quantum dot size, or quantum dot material. In this embodiment, the In composition is 0.18 and the well width is 8nm.

[0066] (9) Growth of the strain compensation layer; maintain the growth temperature at 510℃, and grow a GaAsP layer on the surface of the final InGaAs layer, with a molar percentage of P component (P / (As+P)) of 0.2 and a growth thickness of 2.5nm.

[0067] (10) Growth of P-type tunneling injection layer; growth temperature increased to 550℃, and heavily doped P-type GaAs (P-type GaAs) was grown on the surface of the upper strain compensation layer. + -GaAs), with a doping concentration of 2×10⁻⁶. 19 cm -3 The growth thickness is 3nm.

[0068] (11) Growth of barrier layer under active region; the growth temperature is raised to 600℃, and an intrinsic GaAs barrier layer with a thickness of 80nm is grown on the surface of P-type tunneling injection layer.

[0069] (12) Growth of multiple quantum wells; repeat steps (6)-(11) twice to form a three-period quantum dot composite structure in the well.

[0070] (13) Growth of P-type waveguide layer: The growth temperature is raised to 680℃, and a P-type AlGaAs layer is grown on the surface of the last grown GaAs barrier layer with a doping concentration of 5.5×10⁻⁶. 17 cm -3 The molar percentage of Al component is 0.3, and the thickness is 150 nm.

[0071] (14) Growth of a P-type electron blocking layer; maintaining the growth temperature at 680℃, a P-type AlGaAs layer is grown on the surface of the P-type waveguide layer with a doping concentration of 1.4×10⁻⁶. 18 cm -3 The molar percentage of Al component is 0.6, and the thickness is 15 nm.

[0072] (15) P-type cladding growth; maintaining the growth temperature at 680℃, grow P-type AlGaAs with a graded Al composition on the surface of the electron blocking layer, with a doping concentration of 1.25×10⁻⁶. 18 cm -3The Al content gradually increases along the thickness direction from the electron blocking layer surface to the contact layer surface, and the molar content of Al (Al / (Al+Ga)) increases linearly from 0.3 to 0.6, with a lower cladding thickness of 1.5 μm.

[0073] (16) Contact layer growth; the growth temperature is reduced to 600℃, and heavily doped P-type GaAs (P-type GaAs) is grown on the surface of the P-type cladding layer. + -GaAs) is used as the ohmic contact layer, with a doping concentration of 3×10⁻⁶. 19 cm -3 The thickness is 300nm.

[0074] (17) Ridge waveguide fabrication: After epitaxial growth, a 300 nm thick SiO2 mask layer is deposited on the surface using plasma-enhanced chemical vapor deposition (PECVD); the ridge waveguide pattern is defined by photolithography and dry etching, with a ridge width of 3 μm; the ridge structure is formed by inductively coupled plasma etching technology, with the etching depth reaching the middle of the upper cladding.

[0075] (18) Passivation and electrode windowing: A 200 nm thick SiO2 passivation layer was deposited using PECVD to cover the entire surface; a window was opened at the top of the ridge using photolithography to expose the contact layer.

[0076] (19) Electrode fabrication; Electrode fabrication was performed by electron beam evaporation; N-type electrode was AuGe / Ni / Au, grown on the surface of GaAs substrate; P-type electrode was Ti / Pt / Au, grown on the surface of P-type contact layer, formed by electron beam evaporation and ohmic contact by rapid thermal annealing; The thickness of N-type electrode AuGe / Ni / Au was 100 / 20 / 200nm, and the thickness of P-type electrode Ti / Pt / Au was 20 / 30 / 200nm, with Au being the outermost layer.

[0077] (20) The laser diode is obtained after packaging.

[0078] Example 4 This embodiment relates to a laser diode based on a quantum dot structure in a trap. The only difference between this embodiment and Embodiment 3 is that the InAs quantum dot diameter is approximately 9 nm and the quantum dot height is approximately 3.5 nm. The rest is the same as in Embodiment 3.

[0079] Example 5 This embodiment relates to a laser diode based on a quantum dot structure in a trap. The only difference between this embodiment and Embodiment 3 is that the quantum dot diameter is approximately 14 nm and the quantum dot height is approximately 5.5 nm. The rest is the same as in Embodiment 3.

[0080] Example 6 This embodiment relates to a laser diode based on a quantum dot structure in a well. The only difference between this embodiment and Embodiment 3 is that the In content of the potential well layer is reduced to 0.18, the thickness of the quantum well is reduced to 6 nm, the strain compensation layer is reduced to 1 nm, and the thickness of the tunneling injection layer is reduced to 2 nm. The rest is the same as in Embodiment 3.

[0081] Example 7 This embodiment relates to a laser diode based on a quantum dot structure in a well. The only difference between this embodiment and Embodiment 3 is that the In content of the potential well layer is increased to 0.25, the thickness of the quantum well is increased to 10 nm, the thickness of the strain compensation layer is increased to 3 nm, and the thickness of the tunneling injection layer is increased to 4 nm. The rest is the same as in Embodiment 3.

[0082] Example 8 This embodiment relates to a laser diode based on a quantum dot structure in a well. The only difference between this embodiment and Embodiment 3 is that the In content of the potential well layer is increased to 0.25, the quantum well thickness is reduced to 6 nm, the strain compensation layer thickness is increased to 3 nm, and the tunneling injection layer thickness is increased to 4 nm. The rest is the same as in Embodiment 3.

[0083] Example 9 This embodiment relates to a laser diode based on a quantum dot structure in a trap. The only difference between this embodiment and Embodiment 3 is that the quantum dot material is InGaAs, while the rest is the same as in Embodiment 3.

[0084] Comparative Example 1 This comparative example relates to a laser diode based on a quantum well structure. The difference between its preparation method and that of Example 3 is that step (8) only includes the potential well layer and does not include the InAs quantum dot array. The rest is the same as that of Example 3.

[0085] Comparative Example 2 This comparative example relates to a laser diode based on a quantum well structure. The difference between its preparation method and that of Example 3 is that steps (7) and (9) are not included, that is, the upper and lower strain compensation layers are not included. The rest is the same as that of Example 3.

[0086] Comparative Example 3 This comparative example relates to a laser diode based on a quantum well structure. The difference between its preparation method and that of Example 3 is that steps (6) and (10) are not included, that is, the N / P tunneling injection layer is not included. The rest is the same as that of Example 3.

[0087] Comparative Example 4 This comparative example relates to a laser diode based on a quantum well structure. The difference between its preparation method and that of Example 3 is that steps (6), (7), (9), and (10) are not included, that is, the N / P type tunneling injection layer and the upper / lower strain compensation layer are not included. The rest is the same as that of Example 3.

[0088] Comparative Example 5 This comparative example relates to a laser diode based on a quantum well structure. The difference between its preparation method and that of Example 3 is that steps (6), (7), (9), and (10) and InAs quantum dots are not included. That is, the N / P type tunneling injection layer, upper / lower strain compensation layer and InAs quantum dots are not included. The rest is the same as that of Example 3.

[0089] The VI and PI characteristics of the laser diodes packaged in Examples 3-9 and Comparative Examples 1-5 were measured. The measurement results are shown in the appendix. Figure 4-13 The relevant parameters are shown in Table 1. The test results of the operating voltage, power, threshold current, and slope efficiency of the laser diode after packaging at different temperatures are shown in the appendix. Figure 14-17 See attached chart for characteristic temperature comparison. Figure 18 According to the measurement results, compared with Comparative Examples 1-5, Examples 3-9 effectively reduced the threshold current and improved the slope efficiency and laser diode output power by introducing a tunneling injection layer, a strain compensation layer and InAs quantum dots in the active region.

[0090] Table 1. Relevant parameters of the laser diodes prepared in Examples 3-9 and Comparative Examples 1-5.

[0091] The above embodiments are preferred embodiments of the present invention, but the embodiments of the present invention are not limited to the above embodiments. Any changes, modifications, substitutions, combinations, or simplifications made without departing from the spirit and principle of the present invention shall be considered equivalent substitutions and shall be included within the protection scope of the present invention.

Claims

1. An active region, characterized in that, The system includes a quantum well and a barrier layer. The quantum well comprises a quantum dot layer in the well, a strain compensation layer, and a tunneling injection layer. The strain compensation layer comprises an N-side strain compensation layer and a P-side strain compensation layer respectively disposed on the N-side and P-side surfaces of the quantum dot layer in the well. The tunneling injection layer comprises an N-type tunneling injection layer and a P-type tunneling injection layer respectively disposed on the surface of the N-side strain compensation layer and the surface of the P-side strain compensation layer. The material of the N-type tunneling injection layer includes heavily doped N-type GaAs, and the material of the P-type tunneling injection layer includes heavily doped P-type GaAs. The material of the strain compensation layer includes InGaP or GaAsP; The doping concentrations of both the heavily doped N-type GaAs and the heavily doped P-type GaAs are greater than 1 × 10⁻⁶. 19 cm -3 .

2. An active region according to claim 1, characterized in that, The active region includes a plurality of stacked quantum wells, which are connected by barrier layers.

3. An active region according to claim 1, characterized in that, The quantum dot layer in the well comprises a potential well layer and an array of quantum dots disposed within the potential well layer, and has one or more of the following characteristics: The material of the potential well layer includes In x Ga 1-x As, where x satisfies 0.15≤x≤0.25; The potential well layer has a thickness of 6-10 nm; The quantum dots are made of materials including InAs or InGaAs; The quantum dots have a diameter of 8-15 nm; The quantum dot has a height of 3-6 nm.

4. An active region according to claim 1, characterized in that, The thicknesses of the N-type tunneling injection layer and the P-type tunneling injection layer are 2-4 nm, respectively.

5. An active region according to claim 1, characterized in that, The thickness of the strain compensation layer is 1-3 nm.

6. A laser diode, characterized in that, Includes the active region as described in any one of claims 1-5.

7. A laser diode according to claim 6, characterized in that, It includes a substrate, a buffer layer, an N-type lower cladding layer, an N-type lower waveguide layer, an active region, a P-type upper waveguide layer, an electron blocking layer, a P-type upper cladding layer, and a contact layer, all stacked together.

8. A laser diode according to claim 7, characterized in that, The electron blocking layer is made of Al. y Ga 1-y As, where y satisfies 0.3≤y≤0.6; and / or, the thickness of the electron blocking layer is 10-20nm.

9. A laser diode according to claim 7, characterized in that, The material of the N-type lower cladding includes N-type Al with gradually varying Al content. w Ga 1-w The As and Al content gradually decreases along the thickness direction from the surface of the buffer layer to the surface of the N-type lower waveguide layer, where w satisfies 0.2 ≤ w min ≤0.4, 0.4 <w max ≤0.6; and / or, The material of the P-type cladding includes P-type Al with a gradually varying Al content. z Ga 1-z The As and Al contents gradually increase along the thickness direction from the electron blocking layer surface to the contact layer surface, where z satisfies 0.2 ≤ z min ≤0.4, 0.5≤z max ≤0.

7.

10. A method for fabricating a laser diode according to any one of claims 7-9, characterized in that, Includes the following steps: (1) A buffer layer, an N-type lower cladding layer, an N-type lower waveguide layer and a barrier layer are sequentially grown on the substrate surface; (2) Growth of the active region; including: a) sequentially growing an N-type tunneling injection layer, an N-side strain compensation layer, a quantum dot layer in the well, a P-side strain compensation layer, a P-type tunneling injection layer and a barrier layer on the surface of the barrier layer; b) repeating step a) according to the designed stack number. (3) A P-type waveguide layer, an electron blocking layer, a P-type upper cladding layer, and a contact layer are sequentially grown on the surface of the last generated barrier layer; (4) The laser diode is obtained after packaging.

Images