A compilation deployment method, system and electronic device

Abstract

This application discloses a compilation and deployment method, system, and electronic device. The method includes: acquiring a trained control policy network and identifying its computational graph; extracting and solidifying differentiable optimization subgraphs from the computational graph to obtain solidified differentiable optimization subgraphs; fusing cross-layer operators between the solidified differentiable optimization subgraphs and static subgraphs to obtain several composite operators; allocating memory for each composite operator to obtain a processed computational graph; compiling to generate an executable file; and then deploying it to an embedded platform. This enables the compilation of a control policy network containing dynamic computation and differentiable optimization layers into a computational graph with solidified operation sequences containing deterministic execution, which can then be deployed to an embedded platform to achieve reliable control of the embedded platform with deterministic timing, zero fluctuations, and extremely low operating overhead.

Description

Technical Field

[0001] This application belongs to the field of embedded artificial intelligence, compilation technology and real-time systems, and specifically relates to a compilation and deployment method, system and electronic device. Background Technology

[0002] With the increasing application of embodied intelligence in edge devices, deploying complex AI control strategies on embedded platforms has become a key challenge. Current mainstream deployment solutions employ a general neural network inference framework, load standard model files, and perform layer-by-layer interpretation or pre-compilation execution at runtime.

[0003] When faced with complex control strategy networks, the inventors found that the existing technology has at least the following problems: complex control strategy networks contain complex iterations and branches, resulting in uncertain dynamic changes in the computation graph and limited resource allocation. Summary of the Invention

[0004] The embodiments of this application mainly address the technical problem of uncertain computational graphs and limited resource allocation when compiling and deploying control policy networks.

[0005] To address the aforementioned technical problems, one technical solution adopted in this application is: providing a compilation and deployment method applied to an embedded platform, the method comprising: acquiring a trained control policy network; wherein the control policy network includes several computational graphs, the computational graphs including static subgraphs and differentiable optimization subgraphs; identifying the computational graphs in the control policy network, extracting the differentiable optimization subgraphs from the computational graphs, and solidifying the differentiable optimization subgraphs to obtain solidified differentiable optimization subgraphs; performing cross-layer operator fusion operations on the solidified differentiable optimization subgraphs and static subgraphs to obtain several composite operators; allocating memory for the several composite operators to obtain a processed computational graph; compiling the processed computational graph to generate an executable file, and deploying the executable file to the embedded platform so that the embedded platform runs based on the executable file.

[0006] Optionally, identifying the computational graph in the control strategy network, extracting the differentiable optimization subgraph from the computational graph, and solidifying the differentiable optimization subgraph to obtain a solidified differentiable optimization subgraph includes: identifying the computational graph in the control strategy network and extracting the differentiable optimization subgraph from the computational graph; parsing the differentiable optimization subgraph to obtain a loop structure with a defined iteration boundary in the differentiable optimization subgraph; expanding the loop structure based on the defined iteration boundary to generate a branchless linear operation sequence, and obtaining the solidified differentiable optimization subgraph; wherein the solidified differentiable optimization subgraph contains several branchless linear operation sequences.

[0007] Optionally, after obtaining the solidified differentiable optimization subgraph, the fixed parameters in the solidified differentiable optimization subgraph are identified and folded into constant values; the constant values ​​are embedded into the constant table of the computation graph, and the parameter processing operations in the solidified differentiable optimization subgraph are removed.

[0008] Optionally, a cross-layer operator fusion operation is performed on the solidified differentiable optimization subgraph and the static subgraph to obtain several composite operators, including: merging and compiling several continuous calculation instructions in the solidified differentiable optimization subgraph and / or several continuous calculation instructions in the static subgraph into several composite calculation instructions to obtain several composite operators.

[0009] Optionally, memory allocation is performed on several composite operators to obtain a processed computation graph, including: analyzing the instruction data of each composite operator to obtain the execution data of the tensors of each composite operator; wherein the tensors include input tensors, output tensors, and intermediate tensors; allocating fixed physical memory for each input tensor, output tensor, and intermediate tensor to plan the memory path of each composite operator and obtain the memory allocation result; removing memory allocation and deallocation operations from the computation graph and compiling the memory allocation result into the computation graph to obtain the processed computation graph.

[0010] Optionally, the embedded platform includes a storage module and a simplified runtime interface; compiling the processed computation graph into an executable file and deploying the executable file to the embedded platform so that the embedded platform runs based on the executable file includes: compiling the processed computation graph into an executable file; wherein the executable file includes a single kernel object and linear running code; deploying the executable file to the storage module of the embedded platform so that the embedded platform runs through the simplified runtime interface, based on a single kernel object and linear running code; wherein the simplified runtime interface includes data copying, execution triggering, and result reading functions.

[0011] To address the aforementioned technical problems, another technical solution adopted in this application is: providing a compilation and deployment system, the system comprising: an acquisition module for acquiring a trained control policy network; wherein the control policy network contains several computational graphs, the computational graphs including static subgraphs and differentiable optimization subgraphs; a solidification module for identifying the computational graphs in the control policy network, extracting the differentiable optimization subgraphs from the computational graphs, and solidifying the differentiable optimization subgraphs to obtain solidified differentiable optimization subgraphs; a fusion module for performing cross-layer operator fusion operations on the solidified differentiable optimization subgraphs and static subgraphs to obtain several composite operators; an allocation module for allocating memory for the several composite operators to obtain a processed computational graph; and a deployment module for compiling the processed computational graph into an executable file and deploying the executable file to an embedded platform so that the embedded platform runs based on the executable file.

[0012] Optionally, the solidification module includes: an extraction unit for identifying the computation graph in the control strategy network and extracting the differentiable optimization subgraph from the computation graph; a parsing unit for parsing the differentiable optimization subgraph to obtain a loop structure with a defined iteration boundary in the differentiable optimization subgraph; and a solidification unit for expanding the loop structure based on the defined iteration boundary to generate a sequence of unbranched linear operations and obtain the solidified differentiable optimization subgraph; wherein the solidified differentiable optimization subgraph contains several sequences of unbranched linear operations.

[0013] To solve the above-mentioned technical problems, another technical solution adopted in the embodiments of this application is: to provide an electronic device, characterized in that the electronic device includes: at least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores instructions executable by the at least one processor, the instructions being executed by the at least one processor to enable the at least one processor to perform any of the above-mentioned methods.

[0014] To solve the above-mentioned technical problems, another technical solution adopted in the embodiments of this application is: to provide a non-volatile computer-readable storage medium, characterized in that the non-volatile computer-readable storage medium stores computer-executable instructions, which, when executed by an electronic device, cause the electronic device to perform any of the above-mentioned methods.

[0015] Unlike related technologies, this application provides a compilation and deployment method, system, and electronic device. It acquires a trained control policy network, identifies the computational graph within the network, further extracts differentiable optimization subgraphs from the computational graph, and solidifies these subgraphs to obtain a solidified differentiable optimization subgraph, thus enabling the static processing of complex and dynamic subgraphs. Cross-layer operator fusion operations are performed on the solidified subgraph and the static subgraph to obtain several composite operators. Memory allocation is then performed on these composite operators to obtain a processed computational graph, simplifying operation steps, reducing memory access frequency, and ensuring rational resource allocation. Finally, the processed computational graph is compiled into an executable file, which is then deployed to an embedded platform, allowing the platform to run based on the executable. This allows a control policy network containing dynamic computation and differentiable optimization layers to be compiled into a solidified computational graph containing deterministic execution operation sequences, which can then be deployed to an embedded platform to achieve reliable control of the embedded platform with deterministic timing, zero fluctuations, and extremely low operating overhead. Attached Figure Description

[0016] One or more embodiments are illustrated by way of example with reference to the accompanying drawings. These illustrations do not constitute a limitation on the embodiments. Elements having the same reference numerals in the drawings are denoted as similar elements. Unless otherwise stated, the figures in the drawings are not to be limited by scale.

[0017] Figure 1 This is an application scenario of a compilation and deployment method provided in the embodiments of this application.

[0018] Figure 2 This is a flowchart illustrating a compilation and deployment method provided in an embodiment of this application.

[0019] Figure 3 This is a schematic diagram of the solidification process of a differentiable and optimizeable subgraph provided in an embodiment of this application.

[0020] Figure 4 This is a flowchart illustrating how a loop structure is expanded into a branchless linear operation sequence, as provided in an embodiment of this application.

[0021] Figure 5 This is a schematic diagram of the generation process of a composite operator provided in an embodiment of this application.

[0022] Figure 6 This is a schematic diagram of a composite operator memory allocation process provided in an embodiment of this application.

[0023] Figure 7 This is a schematic diagram of memory allocation for a composite operator provided in an embodiment of this application.

[0024] Figure 8 This is a schematic diagram of the structure of a compilation and deployment system provided in an embodiment of this application.

[0025] Figure 9 This is a schematic diagram of the structure of a solidification module provided in an embodiment of this application.

[0026] Figure 10 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application. Detailed Implementation

[0027] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0028] It should be noted that, unless there is a conflict, the various features in the embodiments of this application can be combined with each other, all of which are within the protection scope of this application. Furthermore, although functional modules are divided in the schematic diagrams and a logical order is shown in the flowcharts, in some cases, the steps shown or described can be performed in a different module division or in a different order than that shown in the schematic diagrams or the flowcharts.

[0029] Unless otherwise defined, all technical and scientific terms used in this specification have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used in this specification is for the purpose of describing particular embodiments only and is not intended to limit the scope of this application. The term "and / or" as used in this specification includes any and all combinations of one or more of the associated listed items.

[0030] An embedded platform is a resource-constrained dedicated computing system, typically integrated into larger devices (such as robots and automobiles) to perform specific control or processing tasks. Embedded platforms generally have limited computing power and memory, and require precise timing for control operations. A control strategy network is a neural network model used to output control signals, such as the rotation angle of a robot. It typically contains different control layers that take in sensor data and output control commands.

[0031] With the deep application of embodied intelligence, autonomous driving, and industrial robots on edge devices, how to efficiently deploy complex AI control strategy networks on resource-constrained embedded platforms has become a key technical challenge. Currently, the mainstream approach to deploying neural network models trained in the cloud or on workstations to embedded platforms is to use a general neural network inference framework, load standard model files, and perform layer-by-layer interpretation or pre-compilation execution at runtime. These neural network inference frameworks typically assume that the computation graph of the neural network is static, meaning that the network structure is completely determined at compile or loading time and does not change with other data.

[0032] Differentiable optimization layers are a special type of layer in neural networks. They contain iterative optimization algorithms, and this optimization process is differentiable, meaning gradients can propagate to previous layers of the network, forming a recurrent structure. This includes a computational graph representation of the computational steps within the neural network. Therefore, when deploying a control policy network that integrates a differentiable optimization layer, common deployment methods reveal some serious drawbacks. Conditional iterations or complex branches in differentiable optimization layers cause dynamic changes in the computational graph, preventing general frameworks from performing in-depth optimization. Furthermore, due to the dynamic changes in the computational graph, the inference time of the control policy network on embedded platforms becomes uncertain, causing the system to be unable to maintain stable execution throughout. In addition, the significant memory overhead further consumes resources on resource-constrained embedded platforms.

[0033] Therefore, while advanced differentiable optimization algorithms bring advantages in computation and performance, their dynamic computation and complexity make it difficult to execute deterministically and efficiently on embedded platforms, which presents a fundamental contradiction to the traditional cloud training-edge deployment approach.

[0034] Based on this, this application proposes a compilation and deployment method that solves the technical problem that the embedded platform cannot run stably when compiling and deploying control policy networks due to the uncertainty of the computation graph and the limited resource allocation. By fixing the dynamic computation graph, the method solves the problem of the embedded platform not running stably.

[0035] Please see Figure 1 , Figure 1 The application scenarios for the compilation and deployment method provided in this application are as follows: Figure 1 As shown, the application scenario includes an embedded platform 10 and an electronic device 20, with the embedded platform 10 connected to the electronic device 20.

[0036] Specifically, during compilation and deployment, the electronic device 20 first acquires the trained control policy network, which contains several computational graphs. The electronic device 20 extracts and solidifies the dynamic, differentiable optimization layer subgraphs, making them static subgraphs that can be directly executed. Subsequently, the electronic device 20 fuses all subgraphs and performs memory processing to obtain the processed computational graph, compiles it to generate an executable file, and sends the executable file to the embedded platform 10. Upon receiving the executable file, the embedded platform 10 runs it directly. At this point, the embedded platform 10 does not need to deal with the complex control policy network or consider resource allocation issues, allowing for direct, simple, fast, and deterministic operation, significantly improving efficiency.

[0037] Please see Figure 2 , Figure 2 This is a flowchart illustrating a compilation and deployment method provided in an embodiment of this application, such as... Figure 2 As shown, the method includes, but is not limited to, the following steps: 101: Obtain the trained control policy network.

[0038] The control policy network comprises several computational graphs, including static subgraphs and differentiable optimization subgraphs. The control policy network is a neural network model obtained through end-to-end training, such as reinforcement learning or imitation learning, and includes computational graphs for various operations. Within the computational graphs, static subgraphs do not contain loop structures, conditional branches, or other content that changes based on other data; their execution paths are unique and deterministic. Differentiable optimization subgraphs contain iterative optimization algorithms, and the optimization process is differentiable. They generally contain loop structures and / or conditional branches, meaning their structure is dynamically changeable.

[0039] 102: Identify the computational graph in the control strategy network, extract the differentiable optimization subgraphs in the computational graph, and solidify the differentiable optimization subgraphs to obtain the solidified differentiable optimization subgraphs.

[0040] After obtaining the control strategy network, the computation graph in the control strategy network is identified. The nodes of the computation operators in the control strategy network and the relationships between different nodes can be extracted. The computation graph is divided into several subgraphs according to the type of operator and the relationship.

[0041] Specifically, the computation graph can be further divided into static subgraphs and differentiable optimization subgraphs based on the logical layer to which the operator belongs (e.g., static layer, differentiable optimization layer). Alternatively, it can be pre-labeled and distinguished by the operator's name, for example, by setting a list of differentiable optimization operator names; if the operator is in this list, it is a differentiable optimization subgraph, such as DiffMPCLayer, ADMM, etc. Another approach is to check if the subgraph contains loop structures and / or conditional branches to determine if it is a dynamic structure; if it is a dynamic structure, it is determined to be a differentiable optimization subgraph. Thus, the differentiable optimization subgraphs in the computation graph can be extracted and further solidified.

[0042] In some embodiments, please refer to Figure 3 , Figure 3 This application provides a schematic diagram of the curing process for a differentiable, optimizeable layer subgraph, as shown in the embodiments below. Figure 3 As shown, step 102 also includes, but is not limited to, the following steps: 1021: Identify the computational graph in the control strategy network and extract the differentiable optimization subgraphs from the computational graph.

[0043] 1022: Analyze the differentiable optimization subgraph to obtain the loop structure with a defined iteration boundary in the differentiable optimization subgraph.

[0044] 1023: Based on the determined iteration boundary, the loop structure is expanded to generate a branchless linear operation sequence and obtain a solidified differentiable optimization subgraph.

[0045] Understandably, a set of nodes and edges in a computation graph constitutes a set of control operations. A loop structure in a computation graph consists of at least one set of control operations that are repeatedly executed until a certain condition is met. Determining the iteration boundary means that the number of iterations in the loop structure can be determined. A loop structure with a defined iteration boundary can be expanded into a branchless linear operation sequence. A branchless linear operation sequence consists of operations arranged in a fixed order. These operations have no influence from conditions, loop execution, or other branches. During execution, starting from the first operation in the branchless linear operation sequence, they are executed sequentially to the last operation without skipping or repeating any operations. The time and length of each executed operation sequence are fixed.

[0046] Specifically, the computational graph in the control strategy network is first identified, and then the differentiable optimization subgraphs within the computational graph are extracted. For the extracted differentiable optimization subgraphs, a deep analysis of their internal control paths is performed to detect the existence of cyclic control paths (i.e., loop structures), and the iteration boundaries of the loop structures are analyzed. If a definite iteration boundary exists, this dynamic loop structure is expanded into a static linear sequence, i.e., a branchless linear operation sequence: the iteration number of the iteration boundary is locked, the operation sequence within the loop structure (nodes of the computational graph in one iteration) is copied by the number of iterations, nodes with loop judgments within the loop structure are deleted, and the output of the previous copied operation sequence is used as the input of the next copied operation sequence, concatenating them according to the iteration order to ensure that various variables within the loop structure can be correctly transmitted in different copied operation sequences. This results in several long sequences containing the number of iterations of continuous operation sequences. These long sequences do not contain any loop or jump instructions and are branchless linear operation sequences, connected to the static layer subgraphs. Figure 1 The sample is in a completely static state. Integrating several unbranched linear operation sequences together results in the solidified differentiable optimization subgraph.

[0047] For example, please refer to Figure 4 , Figure 4 This is a flowchart illustrating how a loop structure is expanded into a branchless linear operation sequence, as provided in an embodiment of this application.

[0048] like Figure 4 As shown, in the original loop structure, the initial input value x = Starting from i=0, for Parameter calculations were performed to obtain This completes the update of the x parameter, making i = i + 1 = 1. At this point, it is set that if i < 5, then return to continue updating the new x parameter. Perform parameter calculations until i ≥ 5, which is the final result. Output x= This is the final result. The entire original loop structure consists of a loop from the end of the loop (updating parameter x) to the beginning of the loop (inputting a new value for parameter x), and the iteration boundary is explicitly defined as ending when i ≥ 5.

[0049] Then, the original loop structure is copied, expanding into a branchless linear operation sequence. In this branchless linear operation sequence, the input x = In the first copy operation sequence, for Parameter calculations were performed to obtain In the second copy operation sequence, for Parameter calculations were performed to obtain And so on, to obtain the final output. We can see that in this branchless linear operation sequence, the loop node is removed, there are no longer any decision nodes where i < 5, the iteration operation is copied five times, resulting in five copy operation sequences, and these five copy operation sequences are concatenated together. The input of each copy operation sequence is the output of the previous copy operation sequence. to ...to The entire data flow path is linear, without branches or jumps, and the execution path is completely fixed.

[0050] In some embodiments, after performing step 102 and obtaining a solidified differentiable optimization subgraph, the method further includes: identifying fixed parameters in the solidified differentiable optimization subgraph and folding the parameters into constant values; embedding the constant values ​​into a constant table of the computation graph and removing the parameter processing operations in the solidified differentiable optimization subgraph.

[0051] Understandably, in the solidified differentiable optimization subgraph, some parameter values ​​no longer change with other data or execution, such as trained weights, biases, and the cost matrix of the MPC (Model Predictive Control) layer. In this case, these invariant parameters are folded into constant values. Constant values ​​are specific numerical values ​​extracted from the fixed parameters; they can be scalars, vectors, or matrices, etc. Converting parameters into constant values ​​and embedding these folded constant values ​​into the constant table of the computation graph allows parameter operations that previously needed to be processed at runtime to be directly operable numerical values. The constant table is a read-only data structure within the computation graph, containing constant values ​​from all control policy networks. During final embedded platform computation, the constant table is read to run the computation graph. By using the constant table, parameter loading and calculation can be eliminated, allowing direct access to the constant table and reducing runtime overhead.

[0052] Specifically, after completing the loop structure expansion step to obtain the solidified differentiable optimization subgraph, the solidified differentiable optimization subgraph is analyzed to identify all parameters that no longer change. For the identified parameters, their values ​​are directly extracted and stored in a constant table using a direct embedding method, with each constant assigned an identifier in the constant table. Thus, in locations on the computation graph where parameters would normally require processing, the process can directly redirect to the constant table for retrieval, eliminating the need for further parameter processing.

[0053] 103: Perform cross-layer operator fusion operations on the solidified differentiable optimization subgraph and the static subgraph to obtain several composite operators.

[0054] The solidified differentiable optimization subgraph and the static subgraph both contain multiple operators. Different operators contain different control instructions. Some control instructions have certain correlations, so they can be fused to generate composite operators, thereby reducing the overhead of operation while making the control instructions complete and concise.

[0055] In some embodiments, step 103 includes, but is not limited to: merging and compiling several consecutive computation instructions in the solidified differentiable optimization subgraph and / or several consecutive computation instructions in the static subgraph into several composite computation instructions to obtain several composite operators.

[0056] Understandably, both the solidified differentiable optimization subgraph and the static subgraph contain multiple computational instructions executed sequentially, i.e., consecutive computational instructions. In some consecutive computational instructions, the preceding instruction can directly serve as the input for the following instruction. If these are separated into different instructions, unnecessary memory usage will occur. Therefore, merging them into composite computational instructions can reduce redundant memory consumption. In terms of control logic, a composite computational instruction is the sum of its constituent consecutive computational instructions, encompassing all original functions. During runtime, it operates as a whole, and several composite computational instructions can ultimately generate a composite operator.

[0057] Specifically, continuous computation instructions can originate from either the solidified differentiable optimization subgraph or the static subgraph. Specific composite computation instructions can include, for example, matrix inversion + addition; multiple consecutive computational operations; gradient calculation + projection operations, etc. During merging, it is determined whether the continuous computation instructions are suitable for merging, i.e., whether there is any operational correlation. During fusion, it can be within the differentiable optimization layer: internal fusion within the differentiable optimization subgraph, that is, merging adjacent operations in the solidified linear operation sequence, for example, merging matrix multiplication in gradient calculation with addition in parameter update; or it can be cross-layer fusion: merging the solidified differentiable optimization subgraph with adjacent static subgraphs, for example, merging the output projection of the differentiable MPC layer with the subsequent fully connected layer.

[0058] For example, please refer to Figure 5 , Figure 5 This is a schematic diagram illustrating the generation process of a composite operator provided in an embodiment of this application. Figure 5As shown, after a cyclic expansion operation on a differentiable optimization subgraph, a linear sequence contains the following consecutive computational instructions: Operation 1: Matrix multiplication to obtain parameter A; Operation 2: Adding a bias to parameter A to obtain parameter B; Operation 3: Multiplying parameter B by parameter C to obtain the updated parameter A; Operation 4: Projecting the updated parameter A. In this case, each operation requires writing to memory once, and the next operation reads from memory after completing one operation, resulting in a total of four memory writes and reads.

[0059] like Figure 5 As shown, operations 1-4 are fused to obtain a composite operator containing only one control instruction: matrix multiplication yields parameter A, which is then added with a bias to obtain parameter B. Parameter B is then multiplied by parameter C to obtain the updated parameter A. Finally, the updated parameter A is projected. This integrates four operations into a single operation, requiring only one memory write and read, significantly improving execution efficiency.

[0060] 104: Memory allocation is performed on several composite operators to obtain the processed computation graph.

[0061] Different composite operators require separate memory writes and reads during runtime. Therefore, the memory writes of several composite operators need to be arranged reasonably during runtime to prevent the embedded platform from being unable to efficiently allocate memory resources for operation.

[0062] In some embodiments, please refer to Figure 6 , Figure 6 This application provides a schematic diagram of a composite operator memory allocation process, as illustrated in the embodiments of this application. Figure 6 As shown, step 104 includes, but is not limited to, the following steps: 1041: Analyze the instruction data of each composite operator to obtain the execution data of the tensors of each composite operator; wherein, the tensors include input tensors, output tensors and intermediate tensors.

[0063] 1042: Allocate fixed physical memory for each input tensor, output tensor, and intermediate tensor to plan the memory path for each composite operator and obtain the memory allocation result.

[0064] 1043: Remove memory allocation and deallocation operations from the computation graph and compile the memory allocation results into the computation graph to obtain the processed computation graph.

[0065] In this system, tensors are multidimensional arrays. Input tensors are those flowing into the composite operator, originating from the network's input or the output of the previous composite operator. Intermediate tensors are temporary data generated within or between composite operators, existing only for a limited period. Output tensors are those generated by the composite operator, either directly output or used as input for the next composite operator. The memory access sequence experienced by different tensors from generation to execution constitutes the memory path of the composite operator, including write memory addresses, read memory addresses, and the relationships between memory addresses. Finally, all memory paths, including the memory addresses of each tensor, are aggregated into the memory allocation result.

[0066] Specifically, after completing the cross-layer operator fusion, a computation graph composed of several composite operators is obtained. At this point, each composite operator contains several operation instructions, and the composite operators are directly connected through tensors. Each composite operator is traversed, and its input-output relationships are analyzed to obtain the execution data of the tensors of each composite operator. This includes, for example, which input tensors the composite operator needs, which output tensors it will produce, and whether there are intermediate tensors. For each tensor, the interval between writing and reading is analyzed to determine the lifespan of each tensor, and the specific data type, size, and other characteristics of each tensor are recorded.

[0067] Subsequently, based on the execution data of each tensor, a fixed amount of physical memory is allocated to each tensor. If the lifecycles of two tensors do not overlap at all, they can share a single physical memory region; if they overlap, different physical memory regions must be allocated. Allocating fixed physical memory determines how each composite operator accesses its corresponding tensor: from which physical memory address is the input, and from which address is the output written back—that is, planning the memory path for each composite operator. The final memory allocation result includes the physical memory address of each tensor and the memory path for each composite operator.

[0068] Finally, all operator nodes related to dynamic memory allocation and deallocation in the original computation graph are removed, such as runtime memory management, tensor creation and destruction, etc. The memory allocation results are embedded into the computation graph as constants, so that composite operators can directly use fixed addresses at runtime, eliminating the need for any dynamic memory allocation or deallocation operations.

[0069] For example, please refer to Figure 7 , Figure 7 This is a schematic diagram of memory allocation for a composite operator provided in an embodiment of this application. Figure 7 As shown, there are three composite operators D, E, and F. Composite operator D receives the input tensor x and generates the intermediate tensor y; composite operator E receives y and generates the intermediate tensor z; and composite operator F receives z and generates the output tensor k.

[0070] Before memory allocation, such as Figure 7 As shown, the operation of the three composite operators D, E, and F is as follows: 1. Read tensor x and allocate memory for tensor y; 2. Execute composite operator D and write tensor y; 3. Allocate memory for tensor z; 4. Execute composite operator E, read tensor y, and write tensor z; 5. Release memory for tensor y; 6. Allocate memory for tensor k; 7. Execute composite operator F, read tensor z, and write tensor k; 8. Release tensor z and release tensor k. It can be seen that each memory allocation incurs overhead, making the operation complex.

[0071] After memory allocation, such as Figure 7 As shown, the entire memory path is as follows: 1. Tensor x is read throughout the entire operation without being overwritten; 2. After the compound operator D runs, tensor y is read by the compound operator E and is no longer used, with a lifespan from the end of compound operator D to the end of compound operator E; 3. After the compound operator E runs, tensor z is read by the compound operator F and is no longer used; 4. After the compound operator F runs, tensor k is read. Specifically, tensors y and z can share the same physical memory because their lifespans do not overlap, i.e., tensor y's lifespan ends before tensor z's is generated. Therefore, the final physical memory allocation is as follows: memory address L stores tensor x; memory address M stores tensor k; and memory address N stores tensors y and z. During runtime, memory address L is read, compound operator D writes to memory address N, compound operator E reads from memory address N and overwrites it again, and compound operator F reads from memory address N and writes it to memory address M.

[0072] 105: Compile the processed computation graph into an executable file, and deploy the executable file to the embedded platform so that the embedded platform can run based on the executable file.

[0073] The executable file is compiled from the processed computation graph and can be directly loaded and run by the embedded platform. It can be a binary file; for resource-constrained embedded platforms, the binary file format allows for direct memory execution. The execution of the executable file does not depend on any network computation.

[0074] In some embodiments, the embedded platform includes a storage module and a simplified runtime interface. Step 105 includes, but is not limited to: compiling the processed computation graph into an executable file; deploying the executable file to the storage module of the embedded platform so that the embedded platform can run through the simplified runtime interface, based on a single kernel object and linear runtime code.

[0075] The executable file comprises a single kernel object and linear execution code. Within the executable, the entire network is compiled into a single kernel object, rather than multiple scattered operator libraries. Unlike general frameworks that involve multiple operator calls, this embodiment integrates the kernel object into a single unit for execution. Since the processed computation graph undergoes loop-based expansion, the kernel object's execution code is linear, executing each instruction sequentially until completion, thus ensuring a completely deterministic execution time. After the executable file is deployed to the embedded platform's storage module, the storage module can run the executable file to start the embedded platform, which is then started via a simplified runtime interface. This simplified interface allows for rapid execution of the executable file, efficiently starting the embedded platform. Therefore, it only includes data copying, execution triggering, and result reading functions, excluding general neural network graph interpretation or scheduling functions. However, in some cases, other functions can be added. This embodiment is merely a specific example of maximum efficiency, and the specific functions included are not limited.

[0076] Specifically, after memory allocation is completed, a static computation graph with fixed memory addresses is obtained. All data in this computation graph is encapsulated to generate an executable file containing a single kernel object and linear running code. This executable file is written to the embedded platform's storage module using a programming tool. During loading, the embedded platform runs the executable file through a simplified runtime interface, performing the following in real time: copying data to the embedded platform's input buffer area, triggering the AI ​​processor (such as NPU / BPU) to execute commands, reading control instructions from the output buffer area, and finally reading the result, ensuring that the entire process is extremely simple and has a fixed time consumption.

[0077] In some embodiments, this application can also be used in control policy networks that do not contain differentiable optimization layers. In the specific compilation and deployment method, the solidification process of the differentiable optimization layer subgraph is removed, while the remaining steps remain unchanged. This application is applicable to control policy networks containing only static layer subgraphs, control policy networks containing both static and differentiable optimization layer subgraphs, and control policy networks containing only differentiable optimization layer subgraphs. The embodiments in this application are merely illustrative examples, and the specific configuration of the control policy network is not limited.

[0078] Unlike related technologies, this application provides a compilation and deployment method, system, and electronic device. It acquires a trained control policy network, identifies the computational graph within the network, further extracts differentiable optimization subgraphs from the computational graph, and solidifies these subgraphs to obtain a solidified differentiable optimization subgraph, thus enabling the static processing of complex and dynamic subgraphs. Cross-layer operator fusion operations are performed on the solidified subgraph and the static subgraph to obtain several composite operators. Memory allocation is then performed on these composite operators to obtain a processed computational graph, simplifying operation steps, reducing memory access frequency, and ensuring rational resource allocation. Finally, the processed computational graph is compiled into an executable file, which is then deployed to an embedded platform, allowing the platform to run based on the executable. This allows a control policy network containing dynamic computation and differentiable optimization layers to be compiled into a solidified computational graph containing deterministic execution operation sequences, which can then be deployed to an embedded platform to achieve reliable control of the embedded platform with deterministic timing, zero fluctuations, and extremely low operating overhead.

[0079] For example, taking a specific embodiment of a policy network containing a differentiable MPC layer for terrain adaptation in quadruped robots as an example, this application's compilation and deployment method is explained in detail, illustrating how it needs to be compiled and deployed to the Horizon Journey series BPU. The application objective is confirmed to be: deploying the trained "Perception-Differentiable MPC" network to the quadruped robot's main control board to achieve real-time stable control with a 10ms cycle.

[0080] First, the "Perception-Differentiable MPC" end-to-end model trained in PyTorch is exported as a ".pt" file. This file is read, and the custom operator name "DiffMPCLayer" is detected. Based on operator name matching, this operator is identified as a differentiable optimization layer subgraph and extracted. Then, this differentiable optimization layer subgraph is analyzed, revealing a loop structure that defines the iteration boundary: 5 projection gradient iterations with an iteration boundary of 5. This loop structure is fully expanded, generating a long linear operation sequence containing 5 consecutive "computation-projection" operation sequences. After obtaining this long linear operation sequence, the following parameters are identified as no longer changing: weights, the Q and R matrices of the MPC layer, etc. All parameters that no longer change are folded into constant values ​​and embedded in a constant table, while all processing operations related to these parameters are removed.

[0081] Then, analysis revealed that matrix multiplication, addition, and nonlinear projection steps in each iteration of the long linear operation sequence could be fused. Each such operation was then fused into a composite operator, named the Fused_MPC_Block composite operator. The instruction data of this composite operator was analyzed to obtain the execution data of each tensor, i.e., the lifecycle of each tensor. All physical memory was allocated in one go to ensure no overlapping conflicts. The processed computation graph was then obtained and output as a binary executable file named robot_terrain_adaptive_control.bin, which can be directly loaded and run by the Journey BPU driver.

[0082] Finally, the binary executable file robot_terrain_adaptive_control.bin is burned into the Flash memory of the robot's main control board, and the main control CPU runs a C program of approximately 200 lines. The robot then runs this executable file, following the following process: The CPU reads data from the camera and IMU (Inertial Measurement Unit), performs simple standardization preprocessing, which takes about 1.2ms; The CPU copies the processed data to the BPU's input buffer (fixed address). The CPU writes to a register to trigger the BPU to start executing the firmware kernel, which is then executed by the BPU, taking approximately 0.8ms. The CPU reads 12 foot force instructions from the BPU output buffer, which takes less than 0.05ms. The final total latency is 1.2 + 0.8 + 0.05 = 2.05ms, and the time consumption is guaranteed not to fluctuate significantly. There is also enough room to schedule other tasks, and due to reasonable compilation and deployment, overlapping errors are avoided during operation.

[0083] For further details, please refer to Figure 8 , Figure 8 This is a schematic diagram of the structure of a compilation and deployment system provided in an embodiment of this application, such as... Figure 8 As shown, the system 30 includes: an acquisition module 31, a solidification module 32, a fusion module 33, an allocation module 34, and a deployment module 35.

[0084] The acquisition module 31 is used to acquire the trained control policy network, which contains several computation graphs, including static subgraphs and differentiable optimization subgraphs. The solidification module 32 is used to identify the computation graphs in the control policy network, extract the differentiable optimization subgraphs from the computation graphs, and solidify the differentiable optimization subgraphs to obtain solidified differentiable optimization subgraphs. The fusion module 33 is used to perform cross-layer operator fusion operations on the solidified differentiable optimization subgraphs and static subgraphs to obtain several composite operators. The allocation module 34 is used to allocate memory for the several composite operators to obtain the processed computation graph. The deployment module 35 is used to compile the processed computation graph into an executable file and deploy the executable file to the embedded platform so that the embedded platform runs based on the executable file.

[0085] In some embodiments, please refer to Figure 9 , Figure 9 This is a schematic diagram of the structure of a solidification module provided in an embodiment of this application, as shown below. Figure 9 As shown, the curing module 32 includes an extraction unit 321, a parsing unit 322, and a curing unit 323.

[0086] The extraction unit 321 is used to identify the computation graph in the control strategy network and extract the differentiable optimization subgraph in the computation graph; the parsing unit 322 is used to parse the differentiable optimization subgraph to obtain the loop structure with a defined iteration boundary in the differentiable optimization subgraph; the solidification unit 323 is used to expand the loop structure based on the defined iteration boundary to generate a branchless linear operation sequence and obtain the solidified differentiable optimization subgraph; wherein the solidified differentiable optimization subgraph contains several branchless linear operation sequences.

[0087] Please see Figure 10 , Figure 10 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application. The electronic device 20 includes one or more processors 21 and a memory 22. The memory 22 is connected to one or more processors 21, for example, via a bus.

[0088] Processor 21 is configured to support the electronic device 20 in performing the corresponding functions in the methods described in the above method embodiments. Processor 21 may be a central processing unit (CPU), a network processor (NP), a hardware chip, or any combination thereof. The aforementioned hardware chip may be an application-specific integrated circuit (ASIC), a programmable logic device (PLD), or a combination thereof. The aforementioned PLD may be a complex programmable logic device (CPLD), a field-programmable gate array (FPGA), a generic array logic (GAL), or any combination thereof.

[0089] Memory 22 is used to store program code, etc. Memory 22 may include volatile memory (VM), such as random access memory (RAM); memory 22 may also include non-volatile memory (NVM), such as read-only memory (ROM), flash memory, hard disk drive (HDD), or solid-state drive (SSD); memory 22 may also include combinations of the above types of memory.

[0090] The memory 22 can be used to store non-volatile software programs, non-volatile computer-executable programs, and modules, such as the program instructions / modules corresponding to the compilation and deployment method in the embodiments of this application. The processor 21 executes various functional applications and data processing of the compilation and deployment method and the compilation and deployment system by running the non-volatile software programs, instructions, and modules stored in the memory 22, that is, it implements the functions of each module or unit of the compilation and deployment method and the compilation and deployment system provided in the above method embodiments.

[0091] The memory 22 may include a program storage area and a data storage area, wherein the program storage area may store the operating system and applications required for at least one function. The data storage area may store data created by the use of the implementation system according to the compilation and deployment method. In some embodiments, the memory 22 may include memory 22 remotely located relative to the processor 21, and these remote memories may be connected to the compilation and deployment system via a network. Examples of such networks include, but are not limited to, the Internet, corporate intranets, local area networks, mobile communication networks, and combinations thereof.

[0092] The one or more modules are stored in the memory 22. When executed by the one or more processors 21, they execute the compilation and deployment methods in any of the above method embodiments. For example, they execute the method steps described in the above method embodiments to realize the functions of the modules described in the above device embodiments.

[0093] The electronic device in this application embodiment may specifically be a compiler, a motor controller, an MCU or DSP chip, etc.

[0094] This application provides a non-volatile computer-readable storage medium storing computer-executable instructions that are executed by one or more processors 21, for example... Figure 10 One of the processors 21 can be configured to execute the compilation and deployment methods in any of the above method embodiments, for example, to perform the above-described... Figure 2 Steps 101 to 105 of the method are as follows. Figure 3 Steps 1021 to 1023 in the method are as follows. Figure 6 Steps 1041 to 1043 in the method are implemented. Figure 8 Functions of modules 31-35 in the text Figure 9 Functions 321-323 in the module.

[0095] The above-disclosed embodiments are merely preferred embodiments of this application and should not be construed as limiting the scope of this application. Therefore, any equivalent variations made in accordance with the claims of this application shall still fall within the scope of this application.

Claims

1. A compilation and deployment method applied to an embedded platform, characterized in that, The method includes: Obtain the trained control policy network; wherein the control policy network comprises several computation graphs, and the computation graphs include static subgraphs and differentiable optimization subgraphs; Identify the computation graph in the control strategy network, extract the differentiable optimization subgraph from the computation graph, and solidify the differentiable optimization subgraph to obtain the solidified differentiable optimization subgraph. A cross-layer operator fusion operation is performed on the solidified differentiable optimization subgraph and the static subgraph to obtain several composite operators; Memory is allocated for the aforementioned composite operators to obtain the processed computation graph; The processed computation graph is compiled into an executable file, and the executable file is deployed to the embedded platform so that the embedded platform runs based on the executable file.

2. The method according to claim 1, characterized in that, The process of identifying the computation graph in the control policy network, extracting the differentiable optimization subgraph from the computation graph, and solidifying the differentiable optimization subgraph to obtain a solidified differentiable optimization subgraph includes: Identify the computation graph in the control policy network and extract the differentiable optimization layer subgraph from the computation graph; The differentiable optimization subgraph is analyzed to obtain a loop structure with a defined iteration boundary in the differentiable optimization subgraph; Based on the determined iteration boundary, the loop structure is expanded to generate a branchless linear operation sequence and obtain a solidified differentiable optimization subgraph. The solidified differentiable optimization subgraph contains several of the branchless linear operation sequences.

3. The method according to claim 1, characterized in that, The method further includes: Given a solidified differentiable optimization subgraph, identify the fixed parameters in the solidified differentiable optimization subgraph and fold the parameters into constant values. The constant values ​​are embedded into the constant table of the computation graph, and the processing operations of the parameters in the solidified differentiable optimization subgraph are removed.

4. The method according to claim 1, characterized in that, The cross-layer operator fusion operation is performed on the solidified differentiable optimization subgraph and the static subgraph to obtain several composite operators, including: Several consecutive computation instructions in the solidified differentiable optimization subgraph and / or several consecutive computation instructions in the static subgraph are merged and compiled into several composite computation instructions to obtain several composite operators.

5. The method according to claim 1, characterized in that, The process of allocating memory for the plurality of composite operators to obtain the processed computation graph includes: The instruction data of each composite operator is analyzed to obtain the execution data of the tensor of each composite operator; wherein, the tensor includes an input tensor, an output tensor, and an intermediate tensor; A fixed amount of physical memory is allocated to each of the input tensors, the output tensors, and the intermediate tensors to plan the memory path for each of the composite operators and obtain the memory allocation result. Remove memory allocation and deallocation operations from the computation graph, and compile the memory allocation results into the computation graph to obtain the processed computation graph.

6. The method according to claim 1, characterized in that, The embedded platform includes a storage module and a simplified operating interface; The step of compiling the processed computation graph into an executable file and deploying the executable file to the embedded platform so that the embedded platform runs based on the executable file includes: The processed computation graph is compiled to generate an executable file; wherein the executable file includes a single kernel object and linear running code; The executable file is deployed to the storage module of the embedded platform, so that the embedded platform can run through the simplified runtime interface, based on the single kernel object and the linear runtime code; The simplified operation interface includes data copying, execution triggering, and result reading functions.

7. A compilation and deployment system, characterized in that, The system includes: An acquisition module is used to acquire the trained control policy network; wherein the control policy network contains several computation graphs, and the computation graphs include static layer subgraphs and differentiable optimization layer subgraphs; The solidification module is used to identify the computation graph in the control strategy network, extract the differentiable optimization subgraph in the computation graph, and solidify the differentiable optimization subgraph to obtain the solidified differentiable optimization subgraph. The fusion module is used to perform cross-layer operator fusion operations on the solidified differentiable optimization subgraph and the static subgraph to obtain several composite operators; The allocation module is used to allocate memory for the plurality of composite operators to obtain the processed computation graph; The deployment module is used to compile the processed computation graph into an executable file and deploy the executable file to the embedded platform so that the embedded platform runs based on the executable file.

8. The system according to claim 7, characterized in that, The curing module includes: An extraction unit is used to identify the computation graph in the control strategy network and extract the differentiable optimization layer subgraph in the computation graph; The parsing unit is used to parse the differentiable optimization subgraph to obtain a loop structure with a defined iteration boundary in the differentiable optimization subgraph. A solidification unit is used to expand the loop structure based on the determined iteration boundary, generate a branchless linear operation sequence, and obtain a solidified differentiable optimization subgraph. The solidified differentiable optimization subgraph contains several of the branchless linear operation sequences.

9. An electronic device, characterized in that, The electronic device includes: At least one processor; and, A memory communicatively connected to the at least one processor; wherein, The memory stores instructions that can be executed by the at least one processor to enable the at least one processor to perform the method of any one of claims 1 to 6.

10. A non-volatile computer-readable storage medium, characterized in that, The non-volatile computer-readable storage medium stores computer-executable instructions that, when executed by an electronic device, cause the electronic device to perform the method of any one of claims 1 to 6.

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