A perception adaptive task execution co-processor for ai cognitive system

Abstract

This invention discloses a perception-adaptive task execution system and method for AI cognitive systems. The system comprises four main modules: a cognitive rhythm synchronizer, which receives cognitive attention domain indices and cognitive intensity values ​​actively pushed from the upper layer, achieving phase locking between the execution rhythm and the cognitive cycle; a residual state tracker, which maintains a reverse index from memory blocks to execution units, accurately locating affected units with O(1) efficiency and providing targeted notifications when logical deletion events occur; a dynamic verification level regulator, which integrates cognitive rhythm, residual effects, and task load, independently setting differentiated security verification strengths from basic to fully verified levels for each execution unit in real time; and a differentiated execution unit manager, which maintains a pool of heterogeneous execution units with different verification capabilities, dynamically switching unit roles based on the regulator output while remaining transparent to the upper layer. This invention makes the system a reflexive neural system connecting the upper-layer AI cognitive engine and the lower-layer deterministic execution environment.

Description

[Technical Field]

[0001] This invention relates to the field of computer system software and artificial intelligence, specifically to an intermediate execution coprocessor and method for bridging upper-level cognitive strategies and lower-level deterministic execution environments in an AI native semantic cognitive system, possessing local cognitive perception and adaptive scheduling capabilities. [Background Technology]

[0002] As artificial intelligence technology deeply penetrates the field of system software, a new layered AI system architecture is gradually taking shape: the bottom layer is a deterministic execution environment, providing a secure foundation such as memory management, access control, and execution tracing; the upper layer is an AI semantic cognition engine, responsible for program semantic understanding, global policy planning, and security evolution management. However, the execution layer of existing technologies has four fundamental defects between the upper and lower layers.

[0003] (I) Structural Defects in Information Flow Direction: The execution layer reports its load upwards instead of receiving cognitive signals. This is the most fundamental difference between existing technologies and this invention. The information flow direction of existing execution layers (such as parallel computing frameworks and task schedulers) is essentially a one-way upward reporting from the execution layer to the upper layer: the execution layer collects its own load indicators such as CPU utilization and task queue length, reports them to the upper-layer scheduler, and the scheduler summarizes them to make coarse-grained task allocation decisions. This information flow architecture determines that the execution layer can only perceive "whether it is busy or not," and cannot perceive "what the upper-layer AI cognitive engine is currently focusing on"—because the upper layer never sends its cognitive state as a scheduling signal to the execution layer; when the upper-layer cognitive engine is in a high-intensity review cycle of memory allocation security, the execution layer, due to a complete lack of understanding of this cognitive context, may still allocate a large amount of computing resources to irrelevant background cleanup tasks, resulting in critical verification tasks not being processed in a timely manner. This information flow direction defect is not a simple design choice problem, but determines the upper limit of the execution layer's intelligence: an execution layer that can only "report its load upwards" is always passive and blind, and it cannot achieve resonance with the upper-layer cognitive strategy. The prerequisite for achieving "cognition-execution synchronization" is to reverse the direction of this information flow—to let cognitive signals flow from top to bottom.

[0004] (ii) The execution layer is slow to react to changes in the underlying environment: In a deterministic execution environment, the lifecycle of a memory block is tied to the cascading reclamation mechanism of its region. When a memory region is destroyed, its active memory blocks are physically reclaimed, but their semantic metadata may be retained by the upper-layer AI semantic cognition engine (referred to as "lazy semantic retention"). Although these logically deleted blocks are physically invalid, their residual dependencies may still affect execution units that once referenced or cached this block data. The existing execution layer lacks the ability to perceive such underlying state events. When a logical deletion event occurs, the execution layer either broadcasts the notification to all execution units (caching oscillations in a large number of unrelated units) or does not notify at all, waiting for the execution units to encounter errors during actual access and then passively handle the situation. Neither of these approaches is acceptable: the former wastes computational resources, and the latter exposes the system to data consistency risks in security-sensitive scenarios.

[0005] (iii) Security verification levels cannot be dynamically adjusted: The security verification mechanisms provided by the existing execution environment are usually configured globally and statically. All tasks, regardless of their current cognitive importance level, are subject to the same level of security checks. This "one-size-fits-all" strategy leads to a dilemma: if a high level of verification is adopted globally, the system throughput will be severely affected; if the verification level is reduced, there will be insufficient protection when the AI ​​system performs critical security evolution operations.

[0006] (iv) Homogeneous Execution Unit Roles: In traditional parallel task execution environments, worker threads or processes are functionally homogeneous "general-purpose computing units." They process all types of tasks in the same way, without distinguishing the security sensitivity of the task or its relevance to the current cognitive focus. This homogeneous design leads to the inability to allocate security resources on demand, and the execution security of critical tasks is limited by the "minimum configuration" of general-purpose workers.

[0007] In summary, existing technologies lack an intermediate layer with "perceptual capabilities" and "reflexive intelligence" between the strategy and mechanism layers of cognitive systems. This intermediate layer should be able to receive upper-layer cognitive rhythm signals, perceive the underlying environmental state, and transform these signals into adaptive scheduling and differentiated configuration of execution units, thereby bridging the technological gap between "passive execution" and "active coordination." [Summary of the Invention]

[0008] I. Overall Technical Solution: The core innovation of this invention lies in reversing the information flow direction between the execution layer and the upper-level cognitive engine. The information flow in the traditional solution is: execution layer → upper layer (reporting load indicators for the upper layer to make coarse-grained scheduling decisions). The information flow in this invention is: upper layer → execution layer (sending cognitive rhythm signals to the execution layer, enabling it to acquire local cognitive perception capabilities). This information flow reversal allows the execution layer to upgrade from "passively reporting load" to "actively perceiving cognitive context," thereby automatically tightening verification when the upper layer is intensely scrutinizing security and automatically releasing performance when the upper layer's attention shifts—that is, achieving "safe breathing" type self-adaptation. This invention proposes a perception-adaptive task execution coprocessor for AI cognitive systems (hereinafter referred to as "this coprocessor"). It runs between the upper-layer AI semantic cognitive engine and the lower-layer deterministic execution environment. By perceiving the cognitive rhythm signals actively pushed by the upper layer and the state change events generated by the lower layer, it adaptively schedules and adjusts the configuration of multiple execution units. The core design philosophy of this coprocessor is "perception rather than decision-making"—it does not replace the global policy-making function of the upper-level cognitive engine, nor does it repeat the security mechanism implementation of the underlying execution environment. Instead, it obtains local perception capabilities of the upper-level policies and the underlying states at the execution layer, and makes fast, reflective adjustments to the execution policy accordingly. This coprocessor contains the following core modules: Module 1: Cognitive Rhythm Synchronizer. This module receives cognitive rhythm signals pushed from the upper-layer cognitive engine. These signals include at least a cognitive attention domain index and a cognitive intensity value. Based on this, the coprocessor synchronizes its own task batching strategy, resource allocation priority, and scheduling tick. Module 2: Residual State Tracker. This tracker monitors logical deletion events of memory blocks in the underlying deterministic execution environment and maintains a reverse index structure for residual effects. The index structure uses the unique identifier of the logically deleted memory block as the key and a list of execution unit identifiers affected by the deletion as the value. Index entries are created when an execution unit first caches or references the memory block. When a new logical deletion event occurs, the affected execution units are precisely located using this reverse index, and targeted cache invalidation notifications are sent only to these affected units. Execution units not appearing in the list do not receive any notifications and continue normal execution. Module 3: Dynamic Verification Level Adjuster. This is used to independently set the execution verification level for each execution unit in real time, based at least on the cognitive rhythm signal acquired by the cognitive rhythm synchronizer and the logical deletion event notification generated by the residual state tracker; wherein the verification level of execution units affected by logical deletion events is preferentially increased. Module 4: Differentiated Execution Unit Manager. This module maintains a pool of execution units containing at least two roles and switches between the first and second roles based on the execution verification level output by the dynamic verification level adjuster. Role switching is transparent to the upper-level task submitter. The first role corresponds to general task processing at the basic verification level, while the second role corresponds to high-security task processing at the enhanced verification level. The execution unit of this role also maintains an anchor value verification cache and a residual awareness flag. (This section supports claims 1 and 8); The four modules described above work together to make this coprocessor a "reflexive nervous system" connecting the "AI cognitive brain" and the "deterministic and safe body"—capable of sensing both the brain's focus of attention and changes in the body's state, and adjusting its execution posture in real time accordingly. (See also...) Figure 1 , Figure 2 .

[0009] II. Cognitive Rhythm Synchronization Mechanism: The cognitive rhythm synchronizer is the core component of this coprocessor, enabling it to "resonate with upper-level cognition," and is also a key module embodying the "information flow direction reversal" feature of this invention. In a typical upper-level AI cognitive engine, consciousness flow scheduling periodically traverses multiple combinations of attention domains and granularity levels according to a deterministic formula. For example, when the number of attention domains is 'a' and the number of granularity levels is 'b', a complete meta-cycle contains a × b clock cycles. Within each clock cycle, AI attention is focused on a unique (attention domain, granularity level) combination, corresponding to a specific cognitive intensity value. The number of attention domains and granularity levels are dynamically re-evaluated and determined at the end of each meta-cycle based on the scale characteristics of the monitored software. This coprocessor achieves rhythm synchronization through the following steps: Step 1: Establish a rhythm parameter subscription channel. During initialization, the coprocessor registers a rhythm parameter subscription request with the upper-layer AI cognitive engine. After accepting the subscription, the upper layer actively pushes the current rhythm parameters to the coprocessor at the beginning of each clock cycle, including the current domain of interest index, the current granularity level index, and the current cognitive intensity value. This "upper-layer proactive push" mode is a concrete manifestation of the reversal of the information flow direction in this invention. Step Two: Cognitive Intensity Threshold Comparison and Signal Generation. The coprocessor compares the received cognitive intensity value with preset high-intensity and low-intensity thresholds. When the cognitive intensity value is higher than the high-intensity threshold, a high-intensity rhythmic signal is generated and output to the dynamic verification level regulator to trigger an increase in the verification level of the relevant execution unit. When the cognitive intensity value is lower than the low-intensity threshold, a low-intensity rhythmic signal is generated to trigger a decrease in the verification level of non-critical execution units, releasing verification overhead. Step 3: Meta-cycle boundary synchronization. At each meta-cycle boundary (i.e., when the upper-layer cognitive engine re-evaluates the number of attention domains and granularity levels), the coprocessor synchronously updates its internal rhythm alignment parameters to ensure that the execution cycle and the cognitive cycle remain phase-locked. Through the above synchronization mechanism, the coprocessor's task scheduling no longer blindly "does its best," but rhythmically "dances with cognition"—tightening execution verification when AI is highly focused on safety, and releasing performance when AI's attention shifts to low-risk areas.

[0010] III. Residual State Tracking and Precise Impact Localization: The residual state tracker is a key component of this coprocessor's ability to perceive the underlying environment's state. Its core innovation lies in maintaining inverted indexes to achieve pinpoint precision notification, unlike traditional broadcast cache invalidation schemes. In the underlying deterministic execution environment, memory management adopts a region-based allocation strategy: memory blocks are explicitly bound to memory regions with specific lifecycles during allocation; when the lifecycle of a memory region ends, all memory blocks under that region are cascaded and reclaimed at once. The upper-layer AI semantic cognition engine may retain the semantic metadata of deleted blocks (such as their boundary hashes, semantic types, dependencies with other blocks, etc.) during physical reclamation to support semantic tracing and lazy repair across lifecycles. These physically deleted but semantically preserved memory blocks pose a potential "residual impact" on the execution units managed by this coprocessor—the execution units may still hold data copies or token references of these blocks in their local caches; The workflow of the residual state tracker is as follows: Step 1: Residual Event Listening. Establish an event listening channel with the underlying deterministic execution environment to receive notifications of logical memory block deletion events. The notification contains a unique identifier of the deleted memory block. Step 2: Reverse Index Maintenance. A residual effect reverse index structure is maintained internally by the coprocessor. This index uses the unique identifier of the logically deleted memory block as the key and a list of execution unit identifiers affected by the deletion as the value. Index entries are created when: when an execution unit first caches or references a token copy, data copy, or a derived computation result dependent on that block, the execution unit's identifier is recorded in the memory block's index entry; and when a logical deletion event occurs on that memory block, the index entry is activated. It is important to explain the meaning of "reverse index" here: Traditional execution layers maintain a forward mapping of "execution unit → list of resources it holds". When it is necessary to find "which execution units hold a certain resource", all execution units must be traversed for an O(n) search. This invention maintains a reverse mapping of "resource → list of affected execution units". This structural reversal reduces the processing of logical deletion events from O(n) traversal to O(1) search - the complete list of affected units can be obtained directly using the ID of the deleted memory block as the key; Step 3: Precise Impact Notification. Upon receiving a new logical deletion event notification, the inverted index is queried using the deleted memory block ID as the key to obtain a list of all affected execution units. For each execution unit in the list, a targeted cache invalidation notification and / or state reset instruction is sent. Execution units not appearing in the list do not receive any notification and continue normal execution. This is fundamentally different from existing broadcast schemes (where all execution units receive notification and perform cache checks) or passive waiting schemes (where execution units only discover data invalidation when accessing it). Step 4: Index Aging and Reclamation. Set the lifecycle for entries in the inverted index. When the semantic metadata of a logically deleted block is completely reclaimed or the preset retention period is exceeded, remove the corresponding entry from the index and release storage resources; Through the above process, this residual state tracker achieves "point-to-point cleanup" cache consistency management—only the truly affected execution units (usually only a small fraction of the total) need to be notified, while unrelated units remain completely unaffected; (This section supports claims 1 and 4) See also Figure 3 .

[0011] IV. Dynamic Adjustment of Execution Verification Level: The dynamic verification level adjuster is the core component of this coprocessor to achieve the "safe breathing" effect—the strength of security verification dynamically expands and contracts with the system state, tightening when needed and relaxing when not needed. The execution verification level is a parameter independently set by this coprocessor for each execution unit, used to determine the strength of the security verification strategy adopted by that execution unit when processing tasks. Verification levels are divided into the following levels: Basic level: Performs token validity checks, suitable for routine tasks with low risk and low cognitive intensity; Standard level: Building upon the basic level, it adds input parameter type and boundary checks, suitable for general tasks; Enhanced level: Above the standard level, it adds anchor value consistency checks for input data and contract checks for output results, suitable for tasks related to current AI high-interest domains; Full Verification Level: Above the Enhanced Level, it enables full execution tracing and reproducibility verification, recording and comparing the execution sequence differences between the current execution and historical baseline executions. This is suitable for tasks involving residual block repair or critical security evolution operations. The dynamic verification level adjuster executes a multi-source signal fusion decision process within each scheduling cycle.

[0012] First, multiple input signals are collected. These input signals include: a rhythm signal from the cognitive rhythm synchronizer (containing at least the current domain of interest index and cognitive strength value); a residual impact signal from the residual state tracker (whether the execution unit is in the affected list of a logical deletion event); and a load signal from the execution unit manager (the current task queue status of the execution unit). Then, the execution level of each execution unit is evaluated independently. If the execution unit is in an active entry of the residual impact index, its verification level is directly increased to the fully verified level or the enhanced level. This is the highest priority trigger condition. If the rhythm signal indicates that the current cognitive strength is higher than a preset threshold, and the task being processed by the execution unit is related to the current domain of interest anchoring, the verification level of the execution unit is increased to the enhanced level or higher. If the rhythm signal indicates that the current cognitive strength is lower than a preset threshold, and the execution unit is not affected by residual impact, its verification level is gradually reduced to the standard level or the basic level to release verification overhead. Finally, real-time verification level outputs for each execution unit are generated and sent to the differentiated execution unit manager to trigger corresponding role switching. Through the multi-source signal fusion decision-making process described above, each execution unit obtains a verification strength that matches its real-time "situation"—execution units handling high-risk tasks automatically receive high-strength security protection, while execution units handling low-risk background tasks save verification overhead. This fine-grained dynamic adjustment is something that existing global static verification configurations cannot achieve; (This section supports claims 1 and 5).

[0013] V. Differentiated Execution Unit Management: The Differentiated Execution Unit Manager is responsible for maintaining an execution unit pool, in which the execution units are no longer general computing units with completely homogeneous functions, but heterogeneous units that can be assigned different roles and have different verification capabilities and processing strategies.

[0014] The execution unit pool contains two roles: **Ordinary Execution Unit (Role 1):** Configured with a basic or standard verification level, it executes general computational tasks. It does not maintain additional security check data structures internally, resulting in minimal execution overhead. **Enhanced Verification Execution Unit (Role 2):** Configured with an enhanced or full verification level, it is specifically designed to handle the following types of tasks: tasks whose associated data anchor values ​​are highly consistent with the anchor values ​​of the current AI domain of interest; tasks whose input data involves logically deleted blocks marked by the residual state tracker; and tasks originating from upper-layer security evolution paths (such as new implementation verification, contract verification, etc.).

[0015] Enhanced internal maintenance within the verification execution unit includes: Anchor value verification cache: used for quickly comparing the input anchor value of the task to be processed with the reference anchor value. Residue-aware flag: used to perform additional security pre-checks when processing tasks involving the logical deletion of residual data. The role switching of the execution unit is driven by the output of the dynamic verification level regulator. Switching trigger conditions include: Enhancement Trigger: When a normal execution unit is evaluated by the dynamic verification level adjuster as requiring enhanced or higher level verification, the coprocessor switches the execution unit to an enhanced verification execution unit, giving it additional verification data structures and processing strategies; Degradation Trigger: When all residual impact tasks processed by an enhanced verification execution unit are completed, and the current cognitive rhythm signal indicates that it is entering a low-intensity cycle, the coprocessor reclaims its additional verification resources and switches its role back to a normal execution unit. Role switching is transparent to the upper-level task submitter. Tasks continue to be routed to the same execution unit identifier, but the internal validation behavior of that execution unit has changed based on the role switching result. This transparency ensures that the upper-level cognitive engine does not need to be aware of the specific role state within the execution unit, maintaining a clear separation between layers. (This section supports claims 1 and 8), see [link to relevant documentation]. Figure 4 . [Attached Image Description]

[0016] Figure 1 This diagram illustrates the position and role of the coprocessor in the AI ​​cognitive system. The arrows in the diagram clearly indicate the information flow direction from the upper layer to the execution layer.

[0017] Figure 2 The internal module structure and key logic diagram of this coprocessor show the data flow and interaction relationship between the four modules. Among them, the cognitive rhythm synchronizer module marks the key steps of subscription reception, threshold comparison and metacycle synchronization, and the dynamic verification level regulator module marks the decision path of three input sources: rhythm signal, residual influence signal and load signal and verification level output.

[0018] Figure 3 The flowchart of the reverse index maintenance and targeted impact notification of the residual state tracker shows the complete process from residual event listening, reverse index construction, O(1) query location to sending targeted notifications only to affected execution units, while unaffected units are not disturbed.

[0019] Figure 4 The role state transition diagram of the Differentiated Execution Unit Manager shows the promotion and demotion trigger conditions between ordinary execution units and enhanced verification execution units, as well as the mechanism by which role switching is transparent to the upper-level task submitter.

[0020] Figure 5 The timing diagram of the collaborative work of each module of this coprocessor within a complete scheduling cycle clearly shows the complete timing from the upper layer actively pushing rhythm parameters, the targeted notification triggered by residual events, to the dynamic upgrading and downgrading of the verification level of each execution unit, as well as the information flow direction of "upper layer → execution layer".

Detailed Implementation Methods

[0021] To make the objectives, technical solutions, and advantages of this invention clearer, the technical solutions of this invention will be described in detail below with reference to specific embodiments. Embodiment 1 corresponds to claims 1-3, Embodiment 2 corresponds to claims 1, 4-5, and Embodiment 3 corresponds to claims 1-8. In the following embodiments, the upper-layer AI semantic cognition engine is referred to as "Guizang," the lower-layer deterministic execution environment is referred to as "Lianshan," and the perceptual adaptive task execution coprocessor of this invention is referred to as "Zhoutian Coprocessor." The above names are merely code names used for ease of description and do not constitute a limitation on the scope of protection of this invention.

[0022] Example 1: Adaptive Security Level Adjustment Based on Cognitive Rhythms: This example illustrates how the Zhou Tian coprocessor receives rhythmic signals actively pushed by the upper-layer cognitive engine and dynamically adjusts the security verification level of the execution unit accordingly. This example highlights the technical feature of "information flow direction reversal" of this invention.

[0023] Scenario Setting: The upper-level Guicang cognitive engine is performing continuous semantic monitoring and optimization exploration on a medium-sized software system. The system has 6 domains of interest (a=6, including memory allocation, capability transfer, data flow, security boundaries, etc.) and 9 granularity levels (b=9, from global overview to basic block level). The meta-cycle length is a×b=54 clock cycles. Guicang's consciousness stream scheduler calculates the current domain of interest and granularity level each clock cycle according to the core rhythm formula and actively pushes it to the Zhou Tian coprocessor. Step 1: Establish a rhythm synchronization channel and receive rhythm parameters pushed from the upper layer: During initialization, the cognitive rhythm synchronizer of the Zhou Tian coprocessor registers a rhythm parameter subscription request with Guicang through a semantic call bridge. After accepting the subscription, Guicang actively pushes the current rhythm parameters to the Zhou Tian coprocessor at the beginning of each clock cycle. The pushed parameter structure includes: the current domain of interest index (domain_id=4, corresponding to "capability transfer analysis"), the current cognitive intensity value (intensity=0.85, belonging to high intensity), and other auxiliary parameters such as the current clock cycle (tick=28) and the current granularity level. It is important to note that this parameter push is actively initiated by the upper layer, and the Zhou Tian coprocessor is the passive receiver. This is completely opposite to the information flow direction in traditional schemes where the execution layer actively reports CPU utilization and queue length to the scheduler. Step Two: Cognitive Intensity Threshold Comparison and Rhythm Signal Generation: The cognitive rhythm synchronizer compares the received cognitive intensity value (0.85) with a preset threshold. In this embodiment, the high-intensity threshold is set to 0.8, and the low-intensity threshold is set to 0.3. Since 0.85 > 0.8, it is currently determined to be a "high-intensity cognitive cycle". The synchronizer generates a high-intensity rhythm signal, outputs it to the dynamic verification level regulator, and includes the current domain of interest index (4, capability transfer analysis). Step 3: Execution Unit Verification Level Adjustment: The dynamic verification level regulator traverses all execution units in the current execution unit pool (in this embodiment, it is assumed that there are 8 execution units, numbered W0 to W7). The following evaluation is performed on each execution unit: (1) For execution unit W3, check its current task queue. It is found that the metadata of its head task T42 is marked as "processing capability token 0x4F2A transmission chain analysis", which is consistent with the current domain of concern (capability transmission analysis, domain_id=4). The regulator determines that W3 should increase its verification level. (2) For execution unit W5, check its current task queue. It is found that its tasks are all background maintenance tasks such as "log buffer cleanup" and "historical statistics data sorting", which are not associated with the current domain of concern. The regulator determines that W5 can maintain its current verification level or appropriately reduce it; Step 4: Role Switching Execution: Based on the evaluation results of Step 3, the Differentiated Execution Unit Manager performs a role promotion operation on W3: switching W3 from a normal execution unit to an enhanced verification execution unit, and upgrading its verification level from standard to enhanced. The switch includes: allocating an anchor value verification cache to W3, loading the reference anchor value set corresponding to the 4th concern domain; and enabling output result contract checks for its subsequent task processing. W5 maintains its role as a normal execution unit, and its verification level remains at the standard level. It's important to emphasize that the role change of W3 is completely transparent to its upper-level task submitters—tasks continue to be routed to W3's identifier, but the internal verification behavior of W3 has changed according to the role change. The upper layer does not need to be aware of W3's current role; Step 5: Meta-cycle Boundary Synchronization and Readjustment: Upon entering the 55th clock cycle (the start of a new meta-cycle), the repository completes the re-evaluation of the domains of interest and granularity levels. Assume that due to the addition of a module, the number of domains of interest (a) is adjusted to 7, and the granularity level (b) is adjusted to 10. The repository actively pushes the updated rhythm parameters to the cyclic coprocessor. The cognitive rhythm synchronizer receives the parameter change notification and updates its internal rhythm alignment parameters. At the start of the new meta-cycle, the dynamic verification level adjuster re-evaluates the level of all execution units. W3, which was promoted due to high-intensity rhythms in the previous cycle, is downgraded back to a normal execution unit if its current task queue no longer contains high-risk tasks related to the new current domain of interest anchoring, and its anchor value verification cache is reclaimed. Effect Description: Through the above process, the Zhou Tian coprocessor automatically tightens the verification level of the relevant execution unit W3 during the period of high-intensity review capability transmission security; and automatically releases the additional verification resources of W3 after the cognitive intensity decreases or the domain of concern switches. The entire process is automatically completed by the coprocessor according to the rhythmic signals actively pushed by the upper layer, without the need for the Zhou Tian coprocessor to issue "increase / decrease verification level" instructions one by one, and without manual intervention. This adaptive capability of "tightening when needed and relaxing when not needed" is the core benefit brought about by the reversal of the information flow direction of this invention.

[0024] Example 2: Precise Cache Expiration Based on Residual State Reverse Index: This example illustrates how the ZhouTian coprocessor perceives logical deletion events of memory blocks in the underlying deterministic execution environment and accurately locates the affected execution units through reverse indexing. This example highlights the superiority of the "reverse index-based targeted notification" of this invention over traditional broadcast schemes. Scenario: In the LianShan underlying environment, the lifecycle of a certain memory region, "Configuration Data Area" (Region ID=0x08), ends, and its 128 memory blocks are cascaded for reclamation. Among them, memory block B (Token ID=0x3B12) is a key configuration structure that is depended on by multiple active memory blocks before reclamation. The upper-layer cache cognition engine performs semantic metadata retention on block B, marking block B as logically deleted but semantically retained. Step 1: Historical Construction of the Reverse Index: Before block B was logically deleted, the Zhou Tian coprocessor, during normal task scheduling, had already recorded the following mapping relationship in the residual state tracker using a reverse index structure (note that the index direction is from resource to execution unit, not from execution unit to resource); When execution unit W1 processes the task "Read configuration data block B", W1's local cache stores a copy of the block B token and the capability proof hash. The tracker records W1 in its influence list using the block B ID (0x3B12) as the key: 0x3B12 → [W1]; When execution unit W4 processes another task, its calculation result depends on the data of block B, and the intermediate result based on the content of block B is retained in the derived calculation cache. The tracker appends W4 to the index: 0x3B12 → [W1, W4]; Step 2: Logical Deletion Event Reception: After completing the physical reclamation of block B and notifying the repository of semantic metadata retention, the Lianshan underlying environment sends a logical deletion event notification to the residual state tracker of the Zhou Tian coprocessor: (1) Event type: LOGICAL_DELETION. (2) Memory block ID: 0x3B12. (3) Memory block boundary hash: A3F2...901C. (4) Semantic type: Configuration data; Step 3: Reverse Index O(1) Query: After receiving the event notification, the residual state tracker directly queries the internal reverse index using memory block ID 0x3B12 as the key. Since the index structure itself is organized using memory block ID as the key, this query is an O(1) operation. The query hits, obtaining the list of affected execution units: [W1, W4]. Here, we need to compare with the traditional solution: if the forward mapping of "execution unit → its held resources" is adopted, it is necessary to traverse all 8 execution units and check whether their resource list contains 0x3B12, with a query complexity of O(n). The performance advantage of the reverse index in this scenario becomes more and more significant as the number of execution units increases; Step 4: Precise Targeted Notification (Notifying only affected units): The tracker sends targeted cache invalidation notifications to execution units W1 and W4 respectively: (1) For W1: Instructs it to invalidate the entries related to 0x3B12 in its local token cache and marks the status of this block in the W1 task context as "residual". (2) For W4: Instructs it to invalidate the derived cache entries calculated based on the 0x3B12 data and marks the relevant task context. At the same time, the tracker explicitly does not send any notifications to execution units W0, W2, W3, W5, W6, and W7, because they are not in the affected list and do not hold any cache related to 0x3B12. These 6 execution units are completely unaffected by this logical deletion event and continue to execute their respective tasks normally. Compared with the broadcast scheme: If the broadcast notification is used, all 8 execution units will receive the invalidation notification, of which 6 execution units need to pause their current work, check their local cache, confirm that there is no impact before resuming work, causing a large-scale invalid cache oscillation. The targeted notification scheme of the present invention precisely limits the affected scope to 2 execution units (accounting for only 25% of the total), saving the computing resources of the remaining 6 execution units; Step 5: Status Adjustment of Affected Units: After receiving the status update of W1 and W4 affected by the residue, the Differentiated Execution Unit Manager automatically switches both from ordinary execution unit roles to enhanced verification execution units, temporarily raising the verification level to full verification. In subsequent task processing, W1 and W4 perform full anchor value verification and execution tracing reproduction verification on operations involving residual data of block B to ensure that calculations are not based on invalid data; Step Six: Index Aging and Reclaiming: When the semantic metadata of block B is lazily repaired or finally reclaimed after an appropriate period of time, the residual state tracker receives a corresponding notification. Upon receiving the notification, the residual state tracker marks the index entry corresponding to 0x3B12 as "pending reclamation" and removes it from the inverted index in the next index cleanup cycle, releasing storage resources; Effect Description: By maintaining a reverse index, the Zhou Tian coprocessor achieves "point-to-point response" to logical deletion events—only two truly affected units (W1 and W4) need to be notified out of the eight execution units, instead of broadcasting a failure notification to all eight units. This not only avoids invalid cache oscillations caused by broadcast failures (the six unrelated units remain completely unaffected), but also demonstrates that the O(1) lookup efficiency of the reverse index is far superior to the O(n) traversal of the traditional forward mapping. More importantly, the affected W1 and W4 will not continue to use the invalidated data for computation without their knowledge, fundamentally eliminating the data consistency risk caused by residual blocks.

[0025] Example 3: Collaborative Work of Four Modules within a Complete Scheduling Cycle: This example demonstrates the collaborative work process of the four modules of the Zhou Tian coprocessor within a complete scheduling cycle in a timeline format, focusing on the information flow direction and inter-module interactions. Initial State: The execution unit pool contains 8 execution units. W0 to W5 are ordinary execution units (verification level: standard), and W6 and W7 are enhanced verification execution units (verification level: enhanced, currently processing residual tasks related to the anchoring of the domain of interest in the previous cycle): T=0 (cycle start): The Guicang cognitive engine actively pushes the current rhythm parameters to the cognitive rhythm synchronizer of the Zhou Tian coprocessor: domain_id=3 (data flow analysis), granularity=2, intensity=0.92, tick=120; T=1: The cognitive rhythm synchronizer determines that intensity=0.92 > 0.8 (high intensity threshold), generates a high-intensity rhythm signal, and outputs it to the dynamic verification level regulator. The regulator traverses the execution unit pool and identifies that the current tasks of W2 and W5 are anchored to domain of interest 3 (data flow analysis). An adjustment decision is generated: W2 and W5 are promoted to enhanced verification execution units; T=2: The Differentiated Execution Unit Manager performs a role switch between W2 and W5: allocates anchor value verification cache, and upgrades the verification level to the enhanced level. The switch is transparent to the upper layer; T=3: The residual state tracker receives a logical deletion event from Lianshan (memory block 0x7C01 is logically deleted). A reverse index query is performed using 0x7C01 as the key (O(1) operation), hitting execution unit W3. Only W3 receives a directed cache invalidation notification; the other 7 execution units do not receive any notifications. T=4: The Differentiated Execution Unit Manager urgently promotes W3 to an Enhanced Verification Execution Unit (Full Verification Level) to handle its residual impact state; T=5 to T=10: Each execution unit performs task scheduling and processing according to the adjusted role and verification level. W6 and W7 complete the residual tasks from the previous cycle. Since there are no new residual effects in the current cycle, the dynamic verification level regulator downgrades them back to normal execution units. T=5\4 (End of Meta-cycle): The meta-cycle reassessment is completed, and a parameter change notification is proactively pushed to the cognitive rhythm synchronizer. Parameter changes: a is adjusted from 6 to 7, b is adjusted from 9 to 10. The synchronizer updates its internal rhythm parameters; T=5\5 (New cycle begins): All execution units (W2, W5, W3) temporarily promoted in this cycle will be gradually downgraded back to ordinary execution units by the dynamic verification level regulator if there are no persistent high-risk factors. This marks the start of the new cycle's scheduling rhythm. Effect description: Throughout the scheduling cycle, the information flow always maintains the direction of "upper layer → execution layer" - the Guicang actively pushes rhythm parameters, and the Zhou Tian co-processor passively receives and adaptively adjusts accordingly. The security verification level of the execution unit dynamically "breathes" with the cognitive rhythm and the underlying state - automatically tightening during the critical review stage from T = 1 to T = 4 and automatically releasing at the start of the new cycle at T = 55. During the whole process, the adjustment decision is automatically completed by the co-processor based on the multi-source signal fusion, without the need for the upper layer to issue instructions item by item, fully reflecting the design principle of "perception rather than decision-making". See Figure 5 .

[0026] Comparison with the prior art: The present invention will be compared with the prior art below, highlighting the two fundamental differences of "reverse information flow direction" and "reverse index fixed-point notification" of the present invention.

[0027] (I) Fundamental difference in information flow direction: Compared with the existing task scheduler: The information flow direction of the existing task scheduler (such as the operating system scheduler, parallel computing framework scheduler) is "execution layer → upper layer": The execution layer collects load metrics such as CPU utilization and queue length and reports them upward, and the scheduler makes coarse-grained allocation decisions after summarizing. The execution layer in this information flow architecture is "blind" - it only knows whether it is busy or not and has no idea what the upper-layer AI is focusing on. The information flow direction of the present invention is "upper layer → execution layer": The upper-layer AI cognitive engine actively pushes its cognitive rhythm parameters (attention domain, granularity, cognitive intensity) to the execution layer. Based on this, the execution layer obtains the cognitive context of "which field the upper layer is highly concerned about at this moment and how high the scrutiny intensity is". This reverse information flow upgrades the execution strategy from "blindly doing one's best" to "perception-based adaptation" - automatically tightening verification when the AI highly concerns security and automatically releasing performance when the AI's attention shifts.

[0028] (II) Fundamental difference in notification strategy: Compared with the existing cache coherence protocol: The existing cache coherence protocol (such as the MESI protocol and its variants) maintains cache coherence among multiple cores by broadcasting or directory methods. When a cache line becomes invalid, the protocol notifies all processor cores that may hold the cache line through bus broadcasting or directory query. This "all-cast or all-query" method generates significant broadcast storms or directory query overhead when the number of cores is large. The residual state tracker of the present invention maintains a reverse index - using the logically deleted memory block as the key and the list of affected execution units as the value. When a logical deletion event occurs, a direct O(1) lookup is performed with the block ID as the key, and a targeted notification is sent only to the execution units that actually hold the affected data, and the irrelevant units are completely undisturbed. The difference from the existing solution lies not only in the index direction (reverse instead of forward), but more in the hierarchical difference of the tracked objects - the present invention tracks the semantic data dependencies (token cache, derived calculation result cache) at the AI cognitive system level, rather than the hardware cache line.

[0029] (III) Fundamental Difference in Adjustment Granularity: Compared with Existing Dynamic Adjustment Schemes for Security Policies: Existing dynamic adjustment schemes for security policies are mainly applied in industrial automation and automotive electronics. Their triggering conditions are usually the detection of equipment failure or operator misconduct, and the adjustment granularity is global or at the device level. This invention applies dynamic adjustment of security verification levels to the execution layer of AI cognitive systems. Its triggering conditions come from AI cognitive rhythms and underlying semantic state events (rather than equipment failures). The adjustment granularity is precise to each execution unit instance (rather than globally), and the adjustment decision is driven by multi-source signal fusion—considering cognitive strength, residual effects, and load status simultaneously, rather than a single threshold trigger.

[0030] Beneficial effects

[0031] Compared with the prior art, the present invention has at least the following beneficial effects: 1. By reversing the information flow direction, rhythmic coordination between the execution layer and the cognitive layer is achieved. Traditional solutions, with their information flow "execution layer → upper layer," dictate that the execution layer can only proactively report its load and wait for scheduling. This invention reverses the information flow to "upper layer → execution layer," enabling the execution layer to perceive the cognitive state of the upper-layer AI for the first time. When the AI ​​is highly focused, the execution layer automatically tightens verification and increases priority; when the AI's attention shifts, it automatically releases resources. This "cognition-execution synchronization" capability is something that traditional passive executors cannot achieve due to the limitations of their information flow architecture. 2. Achieving perception and precise response to underlying state events through reverse indexing. Using a residual state tracker and its maintained reverse index structure, this coprocessor can perceive memory block logical deletion events in the underlying deterministic execution environment and accurately locate all affected execution units for targeted processing with O(1) efficiency. This avoids the scalability problem of traditional broadcast notifications (irrelevant units are protected from cache oscillation interference) and eliminates the risk of execution units using expired data in passive waiting schemes. Affected units automatically receive a security level upgrade, while unaffected units continue to operate efficiently; 3. Achieving "safe breathing" dynamic scaling of verification intensity through multi-source signal fusion. Through a dynamic verification level adjuster, the verification intensity of each execution unit is no longer a static global configuration, but rather independently and dynamically adjusted based on the fusion of three source signals: its real-time cognitive importance (from rhythmic signals), residual risk status (from the residual tracker), and task load (from the execution unit manager). This fine-grained adaptive verification strategy maximizes overall system throughput while ensuring the safety of critical tasks—it "defends" during critical times and "allows for flexibility" during non-critical times. 4. On-demand professional configuration of security resources is achieved through differentiated execution unit management. This coprocessor breaks through the limitations of traditional homogeneous Workers by using a differentiated execution unit manager. Execution units can dynamically switch roles as needed, gaining enhanced verification capabilities (anchor value verification cache, residual awareness marking) when handling high-risk tasks, and reverting to lightweight operation after the risk is resolved. Role switching is transparent to the upper layer, and security resources can be precisely allocated to the most needed execution units and tasks; 5. Clear architecture, well-defined responsibilities, and independent evolution of each layer. This coprocessor adheres to the design principle of "perception rather than decision-making," maintaining clear boundaries of responsibility with the upper-layer cognitive engine: the upper layer is responsible for global strategy formulation, while the coprocessor is responsible for local adaptive execution. A complete information flow loop is maintained—the upper layer pushes cognitive rhythm signals, and the coprocessor adaptively adjusts and provides feedback on its execution status accordingly. This clear hierarchical division allows the three-layer architecture (cognitive strategy layer - perception coprocessor layer - security mechanism layer) to evolve independently, and the coprocessor itself can be replaced or upgraded without affecting the stability of the upper and lower layers.

Claims

1. A perception adaptive task execution method for an AI cognitive system, running between an upper AI semantic cognitive engine and a lower deterministic execution environment, characterized in that, The information flow direction of the method is as follows: the execution layer passively receives cognitive rhythm signals from the upper layer to adjust its own execution strategy, which differs from the traditional scheme in that the execution layer actively reports its own load indicators and waits for scheduling instructions from the upper layer; the method includes the following steps: (1) Rhythm synchronization step: passively receive cognitive rhythm signals pushed down by the upper cognitive engine, wherein the cognitive rhythm signals include at least a cognitive attention domain index and a cognitive intensity value; (2) Residual state tracking steps: Listen for logical deletion events of memory blocks in the underlying deterministic execution environment and maintain a residual impact inverted index structure; the index structure uses the unique identifier of the logically deleted memory block as the key and the list of execution unit identifiers affected by the deletion as the value. The index entries are established when the execution unit first caches or references the memory block; when a new logical deletion event is detected, the index structure is queried, and only the affected execution units are sent targeted cache invalidation notifications. Execution units not appearing in the list do not receive any notifications. (3) Dynamic verification level adjustment step: Based at least on the cognitive rhythm signal obtained in step (1) and the logical deletion event notification generated in step (2), the execution verification level is set independently in real time for each execution unit; among them, the verification level of the execution unit affected by the logical deletion event is given priority to be raised; (4) Differentiated execution steps: According to the execution verification level set in step (3), the execution unit is switched between at least two roles. The role switching is transparent to the upper-level task submitter. The first role corresponds to the general task processing of the basic verification level, and the second role corresponds to the high security requirement task processing of the enhanced verification level. The execution unit of the second role also maintains the anchor value verification cache and residual awareness mark.

2. The method of claim 1, wherein, The cognitive rhythm signal mentioned in step (1) is periodically generated by the upper-level cognitive engine according to the deterministic rhythm formula. The deterministic rhythm formula is calculated based on the number of attention domains, the number of granular levels and the current clock cycle, so that all combinations of attention domains and granular levels are traversed within a complete meta-cycle. The number of attention domains and the number of granular levels are dynamically re-evaluated and determined at the end of each meta-cycle based on the scale characteristics of the monitored software.

3. The method of claim 1, wherein, Step (1) further includes: The acquired cognitive intensity value is compared with preset high intensity threshold and low intensity threshold; When the cognitive intensity value is higher than the high intensity threshold, a high intensity rhythm signal is generated, triggering step (3) to improve the verification level of the execution unit related to the current domain of interest anchoring; When the cognitive intensity value is lower than the low intensity threshold, a low intensity rhythm signal is generated, triggering step (3) to reduce the verification level of non-critical execution units to release verification overhead.

4. The method of claim 1, wherein, Step (2) further includes an index aging and recycling step: A lifecycle is set for each entry in the inverted index structure that has residual effects; when the semantic metadata of the logically deleted memory block is completely reclaimed or exceeds the preset retention period, the corresponding entry is removed from the index structure.

5. The method of claim 1, wherein, The verification levels described in step (3) include the following levels: Basic level: Perform token validity checks; Standard level: Building upon the basic level, it adds type and boundary checks for input parameters; Enhanced level: Above the standard level, it adds anchor value consistency checks for input data and contract checks for output results; Full Verification Level: Above the Enhanced Level, enables full execution tracing and reproduction verification; The first role corresponds to the basic or standard verification level, and the second role corresponds to the enhanced or full verification level.

6. The method according to claim 1, characterized in that, The underlying deterministic execution environment satisfies the following characteristics: Memory management employs a region-based allocation strategy: memory blocks are explicitly bound to memory regions with specific lifecycles during allocation; when the lifecycle of a memory region ends, all memory blocks under that region are cascaded and reclaimed at once. Resource access is conducted through an unforgeable access token, which contains a monotonically increasing version number, token derivation follows the principle of least privilege, and the tokens form a directed acyclic graph. A deterministic execution tracing mechanism with completely fixed algorithm logic is adopted to ensure the deterministic reproducibility of task execution sequences under the same initial state.

7. An AI cognitive system oriented perception adaptive task execution coprocessor, located between an upper AI semantic cognitive engine and a lower deterministic execution environment, characterized in that, The information flow direction of the coprocessor is as follows: the coprocessor passively receives cognitive rhythm signals from the upper layer to adjust its own execution strategy, which differs from the traditional solution where the execution layer actively reports its own load indicators and waits for upper-layer scheduling instructions; the coprocessor includes: (1) Cognitive rhythm synchronizer: used to receive cognitive rhythm signals pushed down by the upper cognitive engine, wherein the cognitive rhythm signals include at least a cognitive attention domain index and a cognitive intensity value; (2) Residual State Tracker: Used to monitor memory block logical deletion events of the underlying deterministic execution environment, maintain a residual impact inverted index structure, and query the index structure to provide targeted notification to the affected execution units when a new logical deletion event is detected; the index structure uses the unique identifier of the logically deleted memory block as the key and the list of execution unit identifiers affected by the deletion as the value, and the index entries are established when the execution unit first caches or references the memory block; the targeted notification means that only the execution units in the list are sent cache invalidation notifications, and execution units not in the list do not receive any notifications. (3) Dynamic verification level adjuster: used to independently set the execution verification level for each execution unit in real time, based at least on the cognitive rhythm signal obtained by the cognitive rhythm synchronizer and the logical deletion event notification generated by the residual state tracker; wherein, the verification level of the execution unit affected by the logical deletion event is given priority to be raised; (4) Differentiated Execution Unit Manager: Used to maintain an execution unit pool containing at least two roles, and switch execution units between the first role and the second role according to the execution verification level output by the dynamic verification level adjuster. The role switching is transparent to the upper-level task submitter. The first role corresponds to the general task processing of the basic verification level, and the second role corresponds to the high security requirement task processing of the enhanced verification level. The execution unit of the second role also maintains the anchor value verification cache and the residual awareness tag.

8. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the program is executed by the processor, it implements the method as described in any one of claims 1 to 6.

9. An electronic device comprising a memory, a processor, and a computer program stored on the memory and executable on the processor, characterized in that, The processor implements the method recited in any one of claims 1 to 6 when executing the program.

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