SPI communication method
By introducing a high-frequency clock on the SPI master side, moving the sampling point and adaptively adjusting it, the problem of low SPI communication efficiency is solved, and highly efficient communication with high flexibility and resource conservation is achieved.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- OMNIVISION TECH (SHANGHAI) CO LTD
- Filing Date
- 2026-05-07
- Publication Date
- 2026-07-31
AI Technical Summary
Existing SPI communication methods are inefficient at high frequencies, and existing improved methods are not flexible, have poor universality, or consume a lot of resources.
A high-frequency clock is introduced on the SPI master device side. By moving the original sampling point, the sampling point is adaptively adjusted to ensure that at least 3 sampling points can sample the correct data. The center sampling point is used as the expected value, and the data consistency of the left and right sampling points is compared to adjust the sampling point.
It improves the flexibility and transmission efficiency of SPI communication, reduces resource consumption, adapts to PVT changes, and simplifies the debugging process.
Smart Images
Figure CN122489480A_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of communication technology, specifically relating to an SPI communication method. Background Technology
[0002] SPI (Serial Peripheral Interface) is a synchronous serial communication interface that uses a master-slave control mode. Typically, the bus contains one master device and multiple slave devices. The SPI interface generally uses four lines: MOSI (Master Data Output, Slave Data Input), MISO (Master Data Input, Slave Data Output), SCK (Serial Clock Signal, generated by the master device), and CS (Chip Select). The master device controls and communicates with multiple slave devices by providing the clock signal SCK and the chip select signal CS.
[0003] SPI has four transmission protocols (CPOL, CPHA) = (0,0), (0,1), (1,0), and (1,1). The master device uses one clock edge to send data, and the other clock edge of the same clock cycle samples the data sent back by the slave device. Taking (CPOL=0, CPHA=1) as an example... Figure 1 The SPI transmission timing diagram (without delay) is as follows: Figure 1 As shown, the master device sends data on the rising edge of the clock cycle and samples data on the falling edge. Figure 2 The timing diagram for SPI read operation is as follows: Figure 2 As shown, due to path delays both inside and outside the chip, the MISO signal, after passing t delay The delay is followed by sampling by the master device on the falling edge of SCK, only when T... SCK / 2-t delay >T setup Only then can the master device correctly sample the MISO signal. For the master device to correctly sample the MISO signal sent by the slave device, T must be satisfied. SCK >2*(t delay +T setup If no action is taken following the standard SPI protocol, then after a delay of t... delay The larger T is SCK The larger the value, the lower the SPI communication clock frequency will be, thus affecting transmission efficiency.
[0004] To address this issue, several methods have been proposed. The first communication method's core technology involves the slave device receiving a read command and clock signal from the master device, then sending a synchronization data signal containing valid reference data, followed by the transmission of the read data signal. The master device analyzes the sampling sequence of the synchronization data signal to determine the intermediate sampling point of the readback data bits and receives valid data based on this point. This first method requires the slave device to send a specific synchronization sequence to the master device, resulting in low flexibility, and each read operation involves a "synchronization data phase," wasting bandwidth.
[0005] The core technology of the second communication method is to introduce the CLK_S signal generated by the slave device, so that the transitions and sampling of the MISO data signal are synchronized with CLK_S, rather than relying entirely on the master device's SCK signal. By decoupling the MISO's dependence on the master device's SCK, timing interference is reduced and the transmission rate is improved. This second method structurally improves the SPI protocol, but it has significant limitations on both the master and slave devices. Most master and slave devices do not have a "CLK_S" interface, making it uncommon.
[0006] The core technology of the third communication method is that various SPIs in MCU products use chip auxiliary pads (virtual pins) to retrieve the emitted clock signals (loopback). This loopback mode compensates for various path delays, achieving accurate data sampling at high frequencies. However, as the number of SPIs on the chip increases, the number of auxiliary pads required also increases, leading to increased area and cost.
[0007] Therefore, it is crucial to design a high-speed SPI communication method / device that is highly flexible, universal, and consumes few resources. Summary of the Invention
[0008] The purpose of this invention is to provide an SPI communication method that introduces a high-frequency clock on the SPI master device side to move the original sampling point. During normal transmission, the SPI master device adaptively adjusts the sampling point in hardware, unaffected by PVT and slave devices, offering high flexibility. This invention eliminates the need for auxiliary pads in the chip to compensate for various delays within the SPI master device, reducing resource consumption. Furthermore, it eliminates the need for slave devices to send specific training sequence data, and the adaptive adjustment of the sampling point simplifies debugging.
[0009] This invention provides an SPI communication method, comprising:
[0010] A high-frequency clock is introduced on the side closer to the master device. The master device moves the original sampling points in the SPI protocol with a preset step size to obtain the moved sampling point group. The data returned from the device is sampled to obtain the actual value of each sampling point in the moved sampling point group; ensuring that at least 3 of the sampling points can sample the correct data.
[0011] Using the data sampled at the center sampling point as the expected value, the sampling point is adaptively adjusted during SPI transmission as follows:
[0012] If the actual values of the sampling points near the left end and the sampling points near the right end in the moved sampling point group are both consistent with the expected value, it is determined that the delay of the data returned from the device remains basically unchanged, and the moved sampling point group continues to sample.
[0013] If the actual value of the sampling point near the left end in the moved sampling point group is inconsistent with the expected value, it is determined that the delay of the data returned from the device is gradually increasing. Then, the moved sampling point group is shifted to the right by a certain number of steps. In the next sampling, the center sampling point in the right-shifted sampling point group will be used as the new expected value.
[0014] If the actual value of the sampling point near the right end of the moved sampling point group is inconsistent with the expected value, it is determined that the delay of the data returned from the device is gradually decreasing. Then, the moved sampling point group is shifted to the left by a certain number of steps. In the next sampling, the center sampling point in the left-shifted sampling point group will be used as the latest expected value.
[0015] Furthermore, the master device and the slave device are configured with software programs for implementing SPI communication and calibration software programs; before the master device moves the original sampling point in the SPI protocol with a preset step size, it also includes: software power-on reset configuration to read the command and corresponding expected value of the slave device, and trigger calibration.
[0016] Furthermore, the preset step size is 0.5 logic clock cycles of the master device.
[0017] Furthermore, the SPI communication includes a chip select signal line, a clock signal line, and several data signal lines; the data signal lines can be any one of 1, 2, or 4.
[0018] Furthermore, the master device outputs the high-frequency clock to the slave device, the slave device outputs miso data to the master device, and the master device samples the miso data according to the high-frequency clock.
[0019] Furthermore, the ratio of the effective sampling window time for the miso data returned from the device to the preset step size is greater than or equal to 3, to ensure that at least 3 of the sampling points can sample the correct data.
[0020] Furthermore, the frequency of the high-frequency clock is an integer multiple of the frequency of the logic clock of the master device.
[0021] Furthermore, a first correction method was set up for SPI to transmit again after the previous transmission ended: the software reads and records the temperature during the two transmissions through a sensor, and decides whether initial calibration is required based on the temperature difference between the two transmissions.
[0022] Furthermore, a second correction method is set for SPI to re-transmit after the previous transmission ends: the software enables the hardware timeout automatic calibration function and sets an appropriate timeout value; when SPI is not transmitting, the hardware will record the SPI idle time. After the timeout, the hardware will automatically send a calibration command to communicate with the slave device and perform initialization calibration.
[0023] Furthermore, when the PVT change causes the miso delay to change, resulting in changes in read data sampling, a high-frequency clock is introduced into the SPI master device to move the original sampling point. The data sampled at the center sampling point is used as the expected value. The data obtained from the center sampling point is compared with the data obtained from the sampling points on the left and right sides to determine whether the delay of the data returned from the device has increased or decreased. The hardware then adaptively adjusts the sampling point.
[0024] Compared with the prior art, the present invention has the following beneficial effects:
[0025] This invention provides an SPI communication method. By introducing a high-frequency clock on the SPI master device side to move the original sampling points, a moved sampling point group is obtained. Data returned from the slave device is sampled to obtain the actual value of each sampling point in the moved sampling point group; ensuring that at least three of the sampling points can sample correct data. Since the latency within the chip does not change drastically, the data sampled at the center sampling point can be used as the expected value. The data obtained from the center sampling point is compared with the data obtained from the sampling points on the left and right sides to determine whether the latency of the data returned from the slave device has increased or decreased. The hardware then adaptively adjusts the sampling points. During normal transmission, the SPI master device adaptively adjusts the sampling points, unaffected by PVT and slave devices, offering high flexibility. This invention eliminates the need for auxiliary pads in the chip to compensate for various internal latency issues of the SPI master device, reducing resource consumption. It also eliminates the need for the slave device to send specific training sequence data, simplifying debugging through adaptive sampling point adjustment. Attached Figure Description
[0026] Figure 1 This is a timing diagram for SPI transmission (without delay).
[0027] Figure 2 This is the timing diagram for an SPI read operation (with delay).
[0028] Figure 3 This is a schematic diagram of the SPI communication method according to an embodiment of the present invention.
[0029] Figure 4This is a schematic diagram of hardware adaptive adjustment of sampling points in the SPI communication method of this embodiment of the invention, where the miso delay remains basically unchanged.
[0030] Figure 5 This is a schematic diagram illustrating the hardware adaptive adjustment of sampling points as the miso delay gradually increases in the SPI communication method of this invention.
[0031] Figure 6 This is a schematic diagram illustrating the hardware adaptive adjustment of sampling points to gradually reduce the miso delay in the SPI communication method of this invention.
[0032] Figure 7a This is a schematic diagram illustrating the hardware adaptive adjustment of sampling points as the miso delay gradually increases in the SPI communication method of this invention.
[0033] Figure 7b This is a schematic diagram showing the correspondence between the maximum sampling point and the target count in the SPI communication method of this invention.
[0034] Figure 8 This is a schematic diagram illustrating the hardware adaptive adjustment of sampling points to gradually reduce the miso delay in the SPI communication method of this invention. Detailed Implementation
[0035] The present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. The advantages and features of the present invention will become clearer from the following description. It should be noted that the drawings are in a very simplified form and use non-precise proportions, and are only used to facilitate and clarify the illustration of the embodiments of the present invention.
[0036] For ease of description, some embodiments of this application may use spatially relative terms such as “above,” “below,” “top,” and “under” to describe the relationship between one element or component and another (or more) elements or components as shown in the accompanying drawings. It should be understood that, in addition to the orientations described in the drawings, spatially relative terms are also intended to include different orientations of the device during use or operation. For example, if the device in the drawings is flipped, it is described as an element or component “below” or “under” other elements or components, and will subsequently be positioned “above” or “on” other elements or components. The terms “first,” “second,” etc., used below are used to distinguish between similar elements and are not necessarily used to describe a particular order or temporal sequence. It should be understood that these terms, as used, may be replaced where appropriate.
[0037] This invention provides an SPI communication method, including:
[0038] A high-frequency clock is introduced on the side closer to the master device. The master device moves the original sampling points in the SPI protocol with a preset step size to obtain the moved sampling point group. The data returned from the device is sampled to obtain the actual value of each sampling point in the moved sampling point group; ensuring that at least 3 sampling points can sample the correct data.
[0039] Using the data sampled at the center sampling point as the expected value, the sampling point is adaptively adjusted during SPI transmission as follows:
[0040] If the actual values of the sampling points near the left end and the sampling points near the right end in the moved sampling point group are consistent with the expected values, it is determined that the delay of the data returned from the device remains basically unchanged, and the sampling point group continues to be sampled after the move.
[0041] If the actual value of the sampling point near the left end of the sampling point group after the move is inconsistent with the expected value, it is determined that the delay of the data returned from the device is gradually increasing. Then, the sampling point group after the move is shifted to the right by a certain number of steps. In the next sampling, the center sampling point in the sampling point group after the right shift will be used as the new expected value.
[0042] If the actual value of the sampling point near the right end of the sampling point group after the move is inconsistent with the expected value, it is determined that the delay of the data returned from the device is gradually decreasing. Then, the sampling point group after the move is shifted to the left by a certain number of steps. In the next sampling, the center sampling point in the left-shifted sampling point group will be used as the latest expected value.
[0043] The SPI communication method of this invention, according to embodiments of the present invention, will be described in detail below with reference to the accompanying drawings.
[0044] This invention provides an SPI communication method applied to an SPI communication system including a master device and a slave device. Both the master and slave devices can include terminal units, chips, or processing components. In one example, the chip or processing component includes, but is not limited to, a separate processor, discrete components, or a combination of a processor and discrete components. The processor can include a controller in an electronic device with instruction execution capabilities. The processor can be implemented in any suitable manner, for example, by one or more application-specific integrated circuits (ASICs), digital signal processors, digital signal processing devices, programmable logic devices, field-programmable gate arrays (FPGAs), controllers, microcontrollers, microprocessors, or other electronic components. Internally, executable instructions can be executed through hardware circuits such as logic gates, switches, ASICs, programmable logic controllers, and embedded microcontrollers. Both the master and slave devices are configured with software programs for implementing SPI communication and calibration software programs.
[0045] In the SPI communication method of this invention embodiment, such as Figure 3 As shown, it includes:
[0046] Software-triggered calibration: Upon power-on reset, the software reads commands and corresponding expected values from the slave device, triggering hardware calibration. Calibration is performed via the Read_ID command, eliminating the need for the slave device (e.g., flash memory) to send specific training sequence data, simplifying debugging.
[0047] The hardware calibration process yields the original sampling point sequence: the master device moves the original sampling points specified in the SPI protocol at a preset step size (each adjustment step size is 0.5 spi_clk cycles) to obtain several sampling points, samples the data returned from the device, and obtains several sets of actual values; at the end of data reception, the expected value is compared with several sets of actual values to ensure that at least 3 sampling points can sample the correct data. It should be understood that when the moving step size is small enough, at least 3 sampling points can always be found in the sampling point sequence falling within the effective sampling window during the calibration process.
[0048] During normal SPI transmission, the hardware adaptively adjusts the sampling point: After calibration, normal SPI transmission begins, and the hardware internally adaptively adjusts the sampling point during transmission. The master device outputs a high-frequency clock signal to the slave device, and the slave device outputs miso (master data input, slave data output) data to the master device. The master device samples the miso data according to the high-frequency clock. Since the delay of the miso data returned by the slave device does not change drastically, the value obtained from the center sampling point is used as the expected value for each sample. The data obtained from the center sampling point is compared with the data obtained from the sampling points on the left and right sides to determine whether the delay of the data returned by the slave device has increased or decreased, and the hardware then adaptively adjusts the sampling point. If the miso delay increases, causing sampling errors near the left sampling point, the sampling point is shifted to the right, and the center sampling point in the right-shifted sampling point group will be used as the new expected value for the next sample. If the miso delay decreases, causing sampling errors near the right sampling point, the sampling point is shifted to the left, and the center sampling point in the left-shifted sampling point group will be used as the latest expected value for the next sample. The master device dynamically determines the middle sampling point of the miso data bits by analyzing the actual values of the sampling sequence.
[0049] SPI communication typically includes one chip select signal line (CS), one clock signal line (SCK), and several data signal lines. There can be one, two, four, or more data signal lines. The schematic diagrams and timing diagrams of this invention use the single data signal line mode of SPI as an example. This invention is also applicable to peripherals such as SDIO interfaces, where the SPI master device transmits SCK and the slave device returns data.
[0050] The effective sampling window time for data returned from the device is tvalid_sample. The step size for each adjustment of the sampling point is 0.5Tspi_clk. To ensure that at least 3 sampling points fall within the effective window, tvalid_sample / 0.5Tspi_clk≥3, i.e., Tspi_clk≤2*tvalid_sample / 3. If the frequency of SCK on the line is 50MHz, then Tspi_clk≤8ns, fspi_clk≥125MHz. SCK is usually obtained by dividing the logic clock spi_clk of the SPI master device by an even number, i.e., fspi_clk = 2n*fSCK. Combining the above inequality, the smallest integer value of n under the case of even division is 2, i.e., fspi_clk is 200MHz.
[0051] Figure 4 This is a schematic diagram illustrating the hardware adaptive adjustment of sampling points with essentially constant miso delay in the SPI communication method of this invention. Figure 4 As shown, a high-frequency clock (e.g., 200MHz) is introduced near the master device. The master device outputs a high-frequency clock signal to the slave device, and the slave device outputs miso data to the master device. The master device samples the miso data according to the high-frequency clock. Internally, the master device moves the original sampling points in the SPI protocol with a preset step size to obtain the moved sampling point group. The preset step size is, for example, 0.5 master device logic clock cycles. The original sampling point is the sampling edge specified in the SPI protocol. Taking cpol=0 and cpha=0 as an example, the original sampling point is the rising edge of each SCK. The actual value of each sampling point in the moved sampling point group is obtained by sampling the data returned by the slave device; it is ensured that at least 3 sampling points can sample the correct data. If the actual values of the sampling points near the left end and the sampling points near the right end in the moved sampling point group are consistent with the expected values, it is determined that the delay of the data returned by the slave device is basically unchanged, and the moved sampling point group continues to sample. In fact, when the delay is basically unchanged, all sampling points in the moved sampling point group can sample the correct value. Figure 4 The diagram illustrates a scenario where five sampling points (e.g., sampling points 7, 8, 9, 10, and 11) fall within the valid sampling window. Considering that the miso delay does not change drastically during normal transmission, the value sampled at the center point of the previous sampling is used as the expected value in the next sampling. After initial calibration, for example, using sampling point 9 as the center point, if the miso delay remains essentially unchanged, sampling points 7 through 11 will all sample the correct value in the next sampling; in this case, sampling point 9 is still used as the center point.
[0052] Figure 5 This is a schematic diagram illustrating the hardware adaptive adjustment of sampling points as the miso delay gradually increases in the SPI communication method of this invention. Figure 5As shown, with the increase in miso latency, the stability window of miso also shifts to the right due to the increased latency of SCK reaching the slave device. If the actual value of the sampling point near the left end of the sampling point group after the shift is inconsistent with the expected value, it is determined that the latency of the data returned from the slave device is gradually increasing. Therefore, the sampling point group is shifted to the right by a certain number of steps. In the next sampling, the center sampling point in the shifted sampling point group will be used as the new expected value. For example, considering that the latency will not change drastically, sampling point 9 will still be able to sample the correct value in the next sampling. However, due to the rightward shift of the stability window, sampling point 7 near the left end of the shifted sampling point group will sample an unstable value. If sampling point 7 samples the correct value, the center sampling point 9 will still be used as the expected value. If sampling point 7 samples an incorrect value, it is determined that the miso latency has increased, so the sampling point needs to be shifted to the right by one step. In the next sampling, sampling point 10 will be used as the center point. If erroneous values are obtained at sampling points near the left end (such as sampling point 7 and sampling point 8), the sampling point will be shifted to the right by 2 steps, and sampling point 11 will be used as the center point for the next sampling.
[0053] Figure 6 This is a schematic diagram illustrating the hardware adaptive adjustment of sampling points to gradually reduce the miso delay in the SPI communication method of this invention. Figure 6 As shown, when the miso latency decreases, the stability window of the miso also shifts to the left because the latency of SCK reaching the slave device decreases. If the actual value of the sampling point near the right end of the sampling point group after the shift is inconsistent with the expected value, it is determined that the latency of the data returned from the slave device is gradually decreasing, and the sampling point group after the shift shifts to the left by a certain number of steps. In the next sampling, the center sampling point in the left-shifted sampling point group will be used as the latest expected value. For example, considering that the latency will not change drastically, sampling point 9 can still sample the correct value in the next sampling, but due to the left shift of the stability window, sampling point 11 near the right end of the sampling point group after the shift will sample an unstable value. If sampling point 11 samples the correct value, sampling point 9 will still be the center point; if sampling point 11 samples the incorrect value, it is determined that the miso latency has decreased, so the sampling point needs to be shifted to the left by 1 step, and sampling point 8 will be used as the center point in the next sampling. If erroneous values are obtained at sampling points near the right end (such as sampling point 10 and sampling point 11), the sampling point will be shifted to the left by 2 steps, and sampling point 7 will be used as the center point for the next sampling.
[0054] Figure 7a This is a schematic diagram illustrating the hardware adaptive adjustment of sampling points as the miso delay gradually increases in the SPI communication method of this invention. Figure 7b This is a schematic diagram illustrating the correspondence between the maximum sampling point and the target count in the SPI communication method of this invention. For example... Figure 7a and Figure 7bAs shown, the hardware adaptive adjustment of sampling points adopts a "data sampling first, then comparison and judgment" strategy. That is, after all sampling points in the internally recorded sampling sequence have been sampled, the data (expected value) is compared and judged with the data sampled from the center sampling point. For example, after initial calibration, the range of sampling points in the internally recorded sampling points that can sample the correct value is (e.g., sampling point 7 to sampling point 11), with sampling point 9 as the center sampling point. The maximum sampling point that samples the correct value is sampling point 11. Figure 7b The target count is 5.
[0055] During the first adjustment, since the miso delay remains relatively constant, sampling points 7-11 can all sample correct data, requiring no adjustment of the sampling points. During the second adjustment, as the miso delay gradually increases, sampling point 7 will sample unstable data. If the values obtained from sampling point 7 (left end of the comparison period, with compare_flag set to 1) and the center sampling point 9 are inconsistent, it is determined that the miso delay has increased, and the sampling points are shifted one step to the right, becoming 8-12. The next adjustment will use the data sampled from the center sampling point 10 as the expected value. If the values obtained from sampling point 7 and the center sampling point 9 are consistent during the comparison period, no adjustment of the sampling points is required.
[0056] Figure 8 This is a schematic diagram illustrating the hardware adaptive adjustment of sampling points to gradually reduce the miso delay in the SPI communication method of this invention. Figure 8 As shown, after initial calibration, the internal hardware records a range of 7-11 sampling points from which correct values can be sampled, with a center sampling point of 9. The maximum sampling point from which correct values are sampled is 11. Figure 7b The target count is 5.
[0057] During the first adjustment, as the miso delay gradually decreases, sampling point 11 on the right will sample unstable data. If the values obtained from sampling point 11 and the center sampling point 9 are inconsistent during the comparison period, it is determined that the miso delay has decreased. The sampling points are shifted to the left by one step, becoming 6-10, and the target count becomes 4. The next adjustment process will use the data sampled from the center sampling point 8 as the expected value. If the values obtained from sampling point 11 and the center sampling point 9 are consistent during the comparison period, no adjustment of the sampling points is required.
[0058] During SPI master-slave transmission, various delays exist, making it difficult for the original sampling points based on the SPI protocol to fall within the effective sampling window, especially in high-speed transmission. This invention introduces a high-frequency clock into the SPI master to move the original sampling points. When the movement step size is sufficiently small, 2n+1 (n≥1) sampling points can always be found within the effective window during calibration. Since the delay of the data returned from the slave device does not change drastically during transmission and only involves 0-1 transitions, the data sampled at the center sampling point is used as the expected value. The data obtained from the center sampling point is compared with the data obtained from the sampling points on the left and right sides to determine whether the delay of the data returned from the slave device has increased or decreased. The hardware then adaptively adjusts the sampling points accordingly.
[0059] This invention enables the SPI master device to adaptively adjust the sampling point during normal transmission, unaffected by PVT (process, voltage, and temperature) and slave devices, thus offering high flexibility. Furthermore, this invention eliminates the need for auxiliary pads (virtual pins) on the chip to compensate for various internal delays of the SPI master device, reducing resource consumption.
[0060] The high-speed SPI communication method of hardware adaptive adjustment of sampling points of the present invention can compensate for various path delays between SPI master and slave devices after calibration, realize real-time adjustment of the central sampling point during normal transmission, ensure correct sampling of data returned by slave devices, and effectively improve the clock frequency and transmission efficiency of SPI interface communication.
[0061] This invention provides two correction methods for SPI retransmissions after the previous transmission: ① The software reads and records the temperature during both transmissions using sensors, and determines whether initial calibration is needed based on the temperature difference between the two transmissions; ② The software enables the hardware timeout automatic calibration function and sets an appropriate timeout value. When SPI is not transmitting, the hardware internally records the SPI idle time. After the timeout, the hardware automatically sends a calibration command to communicate with the slave device and performs initial calibration. When PVT changes cause miso delay changes, leading to changes in read data sampling, the same method as this invention is used. A high-frequency clock is introduced into the SPI master device to move the original sampling point. The data sampled at the center sampling point is used as the expected value. The data obtained from the center sampling point is compared with the data obtained from the sampling points on the left and right sides to determine whether the delay of the data returned by the slave device has increased or decreased. The hardware then adaptively adjusts the sampling point. This invention solves the problem of troublesome and difficult read data sampling debugging caused by delay changes with PVT. The SPI master device can perform hardware adaptive adjustment under different PVT conditions, exhibiting good flexibility and robustness.
[0062] This invention discloses a high-speed SPI communication method with hardware adaptive adjustment of sampling points, applicable to various products containing SPI interfaces. It improves the communication clock frequency and transmission efficiency of SPI under various PVT conditions, enhancing product competitiveness. The SPI communication method of this invention is applied to SPI communication systems including master and slave devices. Both the master and slave devices can include terminals or chips. For example, the terminal can be a user terminal, mobile phone, user terminal, handheld device, computer, or vehicle-mounted device. Examples of terminals include: mobile phones, tablets, laptops, PDAs, mobile internet devices, wearable devices, virtual reality devices, augmented reality devices, wireless terminals in industrial control, wireless terminals in autonomous driving, wireless terminals in remote surgery, wireless terminals in smart grids, wireless terminals in transportation safety, wireless terminals in smart cities, wireless terminals in smart homes, and wireless terminals in vehicle networks. For example, the server can be a local server or a cloud server.
[0063] In summary, this invention provides an SPI communication method that introduces a high-frequency clock on the SPI master device side to move the original sampling points, resulting in a moved sampling point group. The actual values of each sampling point in the moved sampling point group are obtained by sampling the data returned from the slave device, ensuring that at least three of the sampling points can sample correct data. Since the latency within the chip does not change drastically, the data sampled at the center sampling point can be used as the expected value. The data obtained from the center sampling point is compared with the data obtained from the sampling points on the left and right sides to determine whether the latency of the data returned from the slave device has increased or decreased. The hardware then adaptively adjusts the sampling points. During normal transmission, the SPI master device adaptively adjusts the sampling points, unaffected by PVT and slave devices, offering high flexibility. This invention eliminates the need for auxiliary pads in the chip to compensate for various internal latency issues within the SPI master device, reducing resource consumption. It also eliminates the need for the slave device to send specific training sequence data, simplifying debugging through adaptive sampling point adjustment.
[0064] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on its differences from other embodiments. Similar or identical parts between embodiments can be referred to interchangeably. The methods disclosed in the embodiments are described simply because they correspond to the devices disclosed in the embodiments; relevant details can be found in the method section.
[0065] The above description is merely a description of preferred embodiments of the present invention and is not intended to limit the scope of the present invention. Any person skilled in the art can make possible changes and modifications to the technical solutions of the present invention by utilizing the methods and techniques disclosed above without departing from the spirit and scope of the present invention. Therefore, any simple modifications, equivalent changes and alterations made to the above embodiments based on the technical essence of the present invention without departing from the content of the technical solutions of the present invention shall fall within the protection scope of the technical solutions of the present invention.
Claims
1. A method of SPI communication, the method comprising: include: A high-frequency clock is introduced on the side closer to the master device. The master device moves the original sampling points in the SPI protocol with a preset step size to obtain a group of sampling points after the move. The actual value of each sampling point in the group of sampling points after the move is obtained by sampling the data returned from the device. It is ensured that at least 3 of the sampling points can sample the correct data. Using the data sampled at the center sampling point as the expected value, the sampling point is adaptively adjusted during SPI transmission as follows: If the actual values of the sampling points near the left end and the sampling points near the right end in the moved sampling point group are both consistent with the expected value, it is determined that the delay of the data returned from the device remains basically unchanged, and the moved sampling point group continues to sample. If the actual value of the sampling point near the left end in the moved sampling point group is inconsistent with the expected value, it is determined that the delay of the data returned from the device is gradually increasing. Then, the moved sampling point group is shifted to the right by a certain number of steps. In the next sampling, the center sampling point in the right-shifted sampling point group will be used as the new expected value. If the actual value of the sampling point near the right end of the moved sampling point group is inconsistent with the expected value, it is determined that the delay of the data returned from the device is gradually decreasing. Then, the moved sampling point group is shifted to the left by a certain number of steps. In the next sampling, the center sampling point in the left-shifted sampling point group will be used as the latest expected value.
2. The SPI communication method as described in claim 1, characterized in that, The master device and the slave device are configured with software programs for implementing SPI communication and calibration software programs; before the master device moves the original sampling point in the SPI protocol with a preset step size, it also includes: software power-on reset configuration to read the command and corresponding expected value of the slave device, and trigger calibration.
3. The SPI communication method as described in claim 1, characterized in that, The preset step size is 0.5 logic clock cycles of the master device.
4. The SPI communication method as described in claim 1, characterized in that, The SPI communication includes a chip select signal line, a clock signal line, and several data signal lines; the data signal lines can be any one of 1, 2, or 4.
5. The SPI communication method as described in claim 1, characterized in that, The master device outputs the high-frequency clock to the slave device, the slave device outputs miso data to the master device, and the master device samples the miso data according to the high-frequency clock.
6. The SPI communication method as described in claim 5, characterized in that, The ratio of the effective sampling window time for returning the miso data from the device to the preset step size is greater than or equal to 3, to ensure that at least 3 of the sampling points can sample the correct data.
7. The SPI communication method as described in claim 1, characterized in that, The frequency of the high-frequency clock is an integer multiple of the frequency of the logic clock of the master device.
8. The SPI communication method as described in claim 1, characterized in that, The first correction method is set up for SPI to transmit again after the previous transmission ends: the software reads and records the temperature at the time of the two transmissions through the sensor, and decides whether initialization calibration is required based on the temperature difference between the two transmissions.
9. The SPI communication method as described in claim 1, characterized in that, A second correction method is set for SPI to retransmit after the previous transmission ends: the software enables the hardware timeout automatic calibration function and sets an appropriate timeout value; when SPI is not transmitting, the hardware will record the SPI idle time. After the timeout, the hardware will automatically send a calibration command to communicate with the slave device and perform initialization calibration.
10. The SPI communication method as described in claim 1, characterized in that, When changes in process, voltage, and temperature cause variations in miso delay, leading to changes in read data sampling, the high-frequency clock introduced into the master device is used to move the original sampling point. The data obtained from the center sampling point is used as the expected value, and the data obtained from the center sampling point is compared with the data obtained from the sampling points on the left and right sides to determine whether the delay of the data returned by the slave device has increased or decreased. The hardware then adaptively adjusts the sampling point.