A signal compensation method and apparatus for hardware-in-the-loop simulation of power systems.

Abstract

This invention provides a signal compensation method and apparatus for hardware-in-the-loop simulation of a power system. The method includes: using a preset multi-step predictive correction subsystem simulation model, adjusting the current compensation coefficients in steps according to the original analog input signals of each signal channel to generate optimized compensation coefficients for each signal channel; using a preset feedforward compensation subsystem simulation model, performing delay signal compensation based on the original analog input signals and the optimized compensation coefficients for each signal channel to generate compensated output signals for each signal channel. Through the coordinated strategy of feedforward compensation and multi-step predictive correction, delay-induced harmonics can be effectively suppressed without changing the hardware structure, significantly improving the accuracy and waveform quality of hardware-in-the-loop simulation; the compensation coefficients adopt a step-by-step dynamic adjustment mechanism, enabling the system to have good operating condition adaptability and anti-interference capability, greatly improving simulation efficiency and system operation stability.

Description

Technical Field

[0001] This invention relates to the field of power system simulation technology, and in particular to a signal compensation method and apparatus for hardware-in-the-loop simulation of power systems. Background Technology

[0002] Hardware-in-the-loop (HIL) simulation of power systems is an important and widely used method for testing power equipment and verifying control strategies. It can simulate real-world operating environments and evaluate controller performance without connecting to the actual power grid. However, in actual simulations, physical limitations in signal acquisition, transmission, data processing, and feedback inevitably introduce delays into the system. These delays affect the original waveform characteristics of the simulated signals, leading to a large number of harmonic components in the system. This, in turn, affects the accuracy and real-time performance of the simulation, and in severe cases, can even cause the controller under test to malfunction.

[0003] Currently, the mainstream technical approach to addressing harmonic issues caused by latency in hardware-in-the-loop simulations primarily relies on hardware-level optimization and adjustments. Specifically, technicians need to conduct a comprehensive investigation of latency in each component of the simulation system, identifying key devices causing the latency, such as signal acquisition modules, data transmission lines, and data processing units. Once it's confirmed that the latency stems from insufficient hardware performance, it's necessary to reduce system latency at the physical level by replacing the processor with a higher-performance one, upgrading transmission cables, or optimizing interface devices, aiming to fundamentally reduce harmonic generation. This hardware adjustment approach is frequently used in practical engineering, but its operation is complex, involving multiple stages such as equipment selection, procurement, installation, and debugging. It is time-consuming, costly, and poses potential risks to system stability and compatibility.

[0004] In summary, existing technologies for addressing delay-induced harmonics in hardware-in-the-loop simulation rely on hardware-level adjustments, resulting in drawbacks such as long implementation cycles, high costs, poor flexibility, and compromised system stability. Therefore, effectively suppressing harmonic interference caused by delays and improving the accuracy and stability of simulation systems without altering the hardware structure has become a pressing technical challenge.

[0005] This section is intended to provide background or context for the embodiments of this application set forth in the claims. The description herein is not an admission that it is prior art simply because it is included in this section. Summary of the Invention

[0006] One objective of this invention is to provide a signal compensation method for hardware-in-the-loop simulation of power systems. Through a collaborative strategy of feedforward compensation and multi-step predictive correction, delay-induced harmonics can be effectively suppressed without altering the hardware structure, significantly improving the accuracy and waveform quality of the hardware-in-the-loop simulation. The compensation coefficients employ a step-by-step dynamic adjustment mechanism, enabling the system to possess good operating condition adaptability and anti-interference capabilities, greatly improving simulation efficiency and system operational stability. Another objective of this invention is to provide a signal compensation device for hardware-in-the-loop simulation of power systems. A further objective of this invention is to provide a computer-readable medium. A final objective of this invention is to provide a computer device.

[0007] To achieve the above objectives, this invention discloses a signal compensation method for hardware-in-the-loop simulation of a power system, comprising: Obtain the original analog input signals of each signal channel in the hardware-in-the-loop simulation of the power system; By using a pre-set multi-step prediction correction subsystem simulation model, the current compensation coefficients are adjusted stepwise according to the original analog input signals of each signal channel to generate optimized compensation coefficients for each signal channel. By using a pre-set feedforward compensation subsystem simulation model, delay signal compensation is performed based on the original analog input signal and the optimized compensation coefficients of each signal channel, generating the compensated output signals of each signal channel.

[0008] Preferably, the original analog input signals of each signal channel in the hardware-in-the-loop simulation of the power system are obtained, including: According to a preset time interval, the original analog input signals of each signal channel are acquired. The original analog input signals of each signal channel include multiple voltage signals and multiple current signals.

[0009] Preferably, using a pre-defined multi-step prediction and correction subsystem simulation model, the current compensation coefficients are adjusted in steps based on the original analog input signals of each signal channel to generate optimized compensation coefficients for each signal channel, including: The original analog input signal is preprocessed to obtain the preprocessed original analog input signal. Based on the current compensation coefficients and the preprocessed original analog input signal, a hardware-in-the-loop simulation of the power system is performed to obtain the signal waveform. If the harmonic distortion rate of the signal waveform does not meet the preset waveform quality conditions, the current compensation coefficient is increased according to the preset step threshold to obtain the updated compensation coefficient. Determine whether the updated compensation coefficient is greater than the preset upper limit of the coefficient; If so, the current compensation coefficients will be determined as the optimized compensation coefficients for each signal channel; If not, the updated compensation coefficient is determined as the current compensation coefficient, and the steps of running the power system hardware-in-the-loop simulation based on the current compensation coefficient and the original analog input signal are repeated to obtain the signal waveform.

[0010] Preferably, the method further includes: If the harmonic distortion rate of the signal waveform meets the preset waveform quality conditions, the current compensation coefficient is determined as the optimized compensation coefficient for each signal channel.

[0011] Preferably, the simulation model of the feedforward compensation subsystem includes a time delay module; Using a pre-defined simulation model of the feedforward compensation subsystem, delay signal compensation is performed based on the original analog input signal and the optimized compensation coefficients of each signal channel, generating the compensated output signals of each signal channel, including: The delay module calculates the delay component signal of each signal channel based on the original analog input signal. Based on the delayed component signal and the optimized compensation coefficients of each signal channel, the original analog input signal is compensated to generate the compensated output signal of each signal channel.

[0012] Preferably, the original analog input signal is compensated based on the delayed component signal and the optimized compensation coefficients of each signal channel to generate the compensated output signal of each signal channel, including: Based on the optimized compensation coefficients of each signal channel, feedforward compensation is performed on the original analog input signal to generate a feedforward term signal; Based on the optimized compensation coefficients and delay component signals of each signal channel, feedback compensation is performed on the original analog input signal to generate a feedback term signal; The feedforward and feedback signals are combined to generate the compensated output signals for each signal channel.

[0013] This invention also discloses a signal compensation device for hardware-in-the-loop simulation of a power system, comprising: The input signal acquisition unit is used to acquire the original analog input signals of each signal channel in the hardware-in-the-loop simulation of the power system; The multi-step prediction correction unit is used to adjust the current compensation coefficients in steps according to the original analog input signals of each signal channel through a preset multi-step prediction correction subsystem simulation model, and generate optimized compensation coefficients for each signal channel. The signal compensation unit is used to perform delay signal compensation based on the original analog input signal and the optimized compensation coefficients of each signal channel using a preset feedforward compensation subsystem simulation model, and to generate the compensated output signal of each signal channel.

[0014] The present invention also discloses a computer-readable medium having a computer program stored thereon, which, when executed by a processor, implements the method described above.

[0015] The present invention also discloses a computer device, including a memory and a processor, wherein the memory is used to store information including program instructions, and the processor is used to control the execution of the program instructions, wherein the processor executes the program to implement the method described above.

[0016] The present invention also discloses a computer program product, including a computer program / instruction, which, when executed by a processor, implements the method described above.

[0017] This invention acquires the original analog input signals of each signal channel in a power system hardware-in-the-loop simulation. Using a pre-defined multi-step prediction correction subsystem simulation model, it adjusts the current compensation coefficients in steps based on the original analog input signals of each signal channel, generating optimized compensation coefficients for each signal channel. Using a pre-defined feedforward compensation subsystem simulation model, it compensates for delay signals based on the original analog input signals and the optimized compensation coefficients for each signal channel, generating compensated output signals for each signal channel. Through a collaborative strategy of feedforward compensation and multi-step prediction correction, delay-induced harmonics can be effectively suppressed without altering the hardware structure, significantly improving the accuracy and waveform quality of the hardware-in-the-loop simulation. The compensation coefficients employ a step-by-step dynamic adjustment mechanism, giving the system good adaptability to operating conditions and anti-interference capabilities, greatly improving simulation efficiency and system stability. Attached Figure Description

[0018] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0019] Figure 1 A flowchart of a signal compensation method for hardware-in-the-loop simulation of a power system is provided as an embodiment of the present invention; Figure 2 A flowchart of another signal compensation method for power system hardware-in-the-loop simulation provided in this embodiment of the invention; Figure 3 This is a schematic diagram illustrating compensation calculations performed on a simulation model of a feedforward compensation subsystem provided in an embodiment of the present invention. Figure 4This is a schematic diagram of the structure of a signal compensation device for hardware-in-the-loop simulation of a power system, provided in an embodiment of the present invention. Figure 5 This is a schematic diagram of the structure of a computer device provided in an embodiment of the present invention. Detailed Implementation

[0020] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0021] To facilitate understanding of the technical solution provided in this application, the relevant content of the technical solution will be explained below. Hardware-in-the-loop (HIL) simulation of power systems is a technology that connects real physical devices (such as relay protection devices, new energy controllers, reactive power compensation devices, etc.) to a digital simulation model in real time for testing. By connecting the actual controller to a digital simulation environment capable of simulating the operating state of the power grid through a high-speed interface, this simulation method combines the flexibility of digital simulation with the realism of physical experiments. It can comprehensively test the performance of the controller under various operating conditions without affecting the safe operation of the actual power grid. The simulation system must operate strictly according to the real time scale, responding to the controller's input and feeding back the output within milliseconds or even microseconds. A closed loop is formed between the tested physical controller and the virtual power grid model, which can realistically reflect the dynamic interaction process between the controller and the power grid. Various complex and even severe power grid faults (such as short circuits, oscillations, etc.) can be simulated in a laboratory environment without the need for testing in a real power grid, reducing testing costs and risks. Currently, hardware-in-the-loop simulation has become an indispensable research tool in fields such as new energy grid connection testing and ultra-high voltage direct current transmission control and protection verification.

[0022] In hardware-in-the-loop (HIL) simulation of power systems, physical delays in signal acquisition, transmission, and processing can easily lead to waveform distortion and harmonic generation in the simulation signal, affecting the accuracy of simulation results and the stable operation of the controller. Traditional methods often rely on hardware upgrades to reduce delays, which suffer from high costs, long development cycles, and poor adaptability. This application provides a signal processing method based on feedforward compensation and multi-step predictive correction. By constructing a dynamic compensation mechanism in the simulation model, it effectively suppresses delay-induced harmonics without changing the hardware structure, thereby improving the overall performance of the simulation system. This aims to address the problem that delays in signal acquisition, transmission, data processing, and feedback during HIL simulation of power systems affect the original characteristics of the simulation signal, leading to a large number of harmonics in the simulation system and thus impacting the accuracy and real-time performance of the simulation results. By innovatively proposing the application of feedforward compensation and multi-step predictive correction strategies in the simulation model, it effectively suppresses harmonic interference caused by delays, improving the accuracy and stability of the simulation system.

[0023] The following example uses a signal compensation device for power system hardware-in-the-loop simulation as the execution subject to illustrate the implementation process of the signal compensation method for power system hardware-in-the-loop simulation provided in this embodiment of the invention. It is understood that the execution subject of the signal compensation method for power system hardware-in-the-loop simulation provided in this embodiment of the invention includes, but is not limited to, a signal compensation device for power system hardware-in-the-loop simulation.

[0024] Figure 1 A flowchart of a signal compensation method for hardware-in-the-loop simulation of a power system provided in an embodiment of the present invention is shown below. Figure 1 As shown, the method includes: Step 101: Obtain the original analog input signals of each signal channel in the hardware-in-the-loop simulation of the power system.

[0025] In this embodiment of the invention, the raw analog input signals of each signal channel are acquired in real time from the hardware-in-the-loop simulation system. The raw analog input signals of each signal channel include multiple voltage signals and multiple current signals, each processed as an independent input channel. The acquisition process can be completed through the data interface module built into the simulation platform. This data interface module can read the analog signals output by the controller under test or simulation model in real time according to a set sampling frequency and convert them into a digital signal format usable by subsequent processing modules.

[0026] This step provides the basic data source for subsequent compensation and correction, ensuring that the compensation strategy can be implemented independently for each signal.

[0027] Step 102: Using a preset multi-step prediction correction subsystem simulation model, the current compensation coefficients are adjusted stepwise based on the original analog input signals of each signal channel to generate optimized compensation coefficients for each signal channel.

[0028] In this embodiment of the invention, the original analog input signals of each signal channel are input in parallel to the simulation model of the multi-step prediction and correction subsystem. The simulation model preprocesses the signals, including but not limited to noise filtering and amplitude normalization, to ensure the stability of the input data. By monitoring the signal waveform quality (such as changes in harmonic content), a step-by-step adjustment strategy is adopted for the compensation coefficients: the initial value is usually set to zero, and it is gradually increased in unit steps. After each adjustment, the waveform change trend is observed until the waveform quality reaches the optimal state. If the waveform deteriorates after a certain adjustment, it is reverted to the previous value. This process can be completed manually or automatically, and finally, the optimal compensation coefficient corresponding to each signal channel is output.

[0029] The core function of this step is to determine the optimal compensation parameters through dynamic optimization, thereby ensuring the accuracy of feedforward compensation and avoiding undercompensation or overcompensation caused by fixed parameters.

[0030] Step 103: Using the preset feedforward compensation subsystem simulation model, delay signal compensation is performed based on the original analog input signal and the optimized compensation coefficients of each signal channel to generate the compensated output signal of each signal channel.

[0031] In this embodiment of the invention, the simulation model of the feedforward compensation subsystem includes a time delay module and a compensation calculation module.

[0032] Specifically, the original analog input signal and the optimized compensation coefficients for each signal channel are input into the feedforward compensation subsystem simulation model. This model integrates a delay construction module and a compensation calculation module. The original analog input signal enters the delay construction module, generating its corresponding delay component signal. The compensation calculation module calls the core compensation algorithm, combining the original analog input signal, the delay component signal, and the optimized compensation coefficients for each signal channel to perform a synthesis calculation, obtaining the compensated output signal for each signal channel. This output signal is the final signal after harmonic suppression processing, which can be directly used in the simulation system or fed back to the controller under test.

[0033] This step uses a feedforward mechanism to preemptively cancel harmonic interference caused by delay, significantly improving the waveform quality of the output signal. Thus, without changing the hardware structure, it effectively improves the accuracy and stability of the simulation system.

[0034] The technical solution provided in this invention obtains the original analog input signals of each signal channel in the hardware-in-the-loop simulation of a power system; through a preset multi-step prediction correction subsystem simulation model, the current compensation coefficients are adjusted in steps according to the original analog input signals of each signal channel to generate optimized compensation coefficients for each signal channel; through a preset feedforward compensation subsystem simulation model, delay signal compensation is performed according to the original analog input signals and the optimized compensation coefficients for each signal channel to generate compensated output signals for each signal channel. Through the collaborative strategy of feedforward compensation and multi-step prediction correction, delay-induced harmonics can be effectively suppressed without changing the hardware structure, significantly improving the accuracy and waveform quality of the hardware-in-the-loop simulation; the compensation coefficients adopt a step-by-step dynamic adjustment mechanism, enabling the system to have good operating condition adaptability and anti-interference capability, greatly improving simulation efficiency and system operation stability.

[0035] Figure 2 A flowchart of another signal compensation method for power system hardware-in-the-loop simulation provided by an embodiment of the present invention is shown below. Figure 2 As shown, the method includes: Step 201: According to the preset time interval, acquire the original analog input signals of each signal channel. The original analog input signals of each signal channel include multiple voltage signals and multiple current signals.

[0036] In this embodiment of the invention, each step is performed by a signal compensation device for power system hardware-in-the-loop simulation.

[0037] In this embodiment of the invention, the channel configuration for signal acquisition is defined in the hardware-in-the-loop simulation platform. Based on the requirements of the actual simulation system, the number of voltage signal channels M and current signal channels N to be monitored are set, with each independent voltage or current signal corresponding to a dedicated signal channel. These channels can be connected to the output port of the controller under test or the real-time simulator through the analog input interface of the simulation platform.

[0038] To ensure the real-time nature and continuity of the data, sampling operations are triggered at preset fixed time intervals (usually consistent with the simulation step size, such as 50 microseconds or 100 microseconds). At each sampling moment, the analog input signals (i.e., the original instantaneous voltage or current values) of each signal channel are simultaneously read, converted into digital quantities, and stored as the sampling data y at the current moment. i (k), where i is the channel number (i=1,2,…,M+N) and k is the sampling time sequence.

[0039] This step ensures that all signal channels are strictly synchronized in time through precise timing sampling, thus providing accurate and reliable basic data for subsequent compensation and correction. Through this process, the system can capture the dynamic changes of various electrical quantities during simulation operation in real time, laying the data foundation for subsequent harmonic suppression processing.

[0040] Step 202: Perform signal preprocessing on the original analog input signal to obtain the preprocessed original analog input signal.

[0041] In this embodiment of the invention, due to potential electromagnetic interference, sampling errors, or inconsistent signal amplitudes in the hardware-in-the-loop simulation environment, the original analog input signal often contains high-frequency noise or amplitude fluctuations. Direct use of this signal may affect the accuracy of subsequent waveform quality assessment, leading to deviations in the compensation coefficient tuning. Therefore, this invention includes a dedicated signal preprocessing step before the original analog input signal enters the simulation model of the multi-step prediction and correction subsystem. This signal preprocessing step includes, but is not limited to, noise filtering and amplitude normalization.

[0042] Noise filtering specifically involves using digital filtering algorithms to process the original signal and remove high-frequency noise components. The purpose of this operation is to smooth the waveform curve, avoid misjudgments caused by waveform distortion due to transient interference, and ensure that subsequent monitored harmonic changes accurately reflect the system's delay state.

[0043] Amplitude normalization specifically involves normalizing the amplitude of the original analog input signals from each signal channel, adjusting voltage or current signals of different magnitudes to a uniform amplitude range. The purpose of this operation is to eliminate amplitude inconsistencies caused by differences in the primary and secondary transformation ratios or sensor gains, enabling waveform quality comparison and judgment to be performed on the same scale.

[0044] The preprocessed original analog input signal retains the original phase and frequency characteristics while exhibiting better stability and consistency, providing a reliable data basis for subsequent waveform quality monitoring and step adjustment of compensation coefficients.

[0045] This invention effectively improves signal quality by filtering out interference and unifying amplitude scale, avoiding parameter tuning errors caused by noise or amplitude differences, thereby ensuring the accuracy and robustness of the multi-step prediction and correction process.

[0046] Step 203: Based on the current compensation coefficient and the preprocessed original analog input signal, run the power system hardware-in-the-loop simulation to obtain the signal waveform.

[0047] In this embodiment of the invention, based on the preprocessed original analog input signal and the current compensation coefficient Nd iThe hardware-in-the-loop simulation is initiated; real-time time-domain waveform data of key electrical quantities (such as voltage and current) are acquired and presented to engineers in a visual manner, or the algorithm automatically records waveform characteristic parameters (such as distortion rate and harmonic content), thereby obtaining the signal waveform under the current compensation coefficient. The signal waveform is the direct basis for judging the compensation effect.

[0048] It is worth noting that the compensation coefficient Nd i The initial value is set to 0.

[0049] In this embodiment of the invention, if the current compensation coefficient has not yet reached its optimal value, the signal waveform will still exhibit obvious harmonic distortion characteristics; as the compensation coefficient is gradually optimized, the waveform will gradually approach the ideal sine wave shape.

[0050] This invention supports the step-by-step optimization process of the compensation coefficient through a cyclical operation of "running simulation - outputting waveform - evaluating effect". The adjustment effect of the compensation coefficient is presented intuitively in waveform form, enabling engineers or automatic algorithms to accurately determine the adjustment direction and ensure that the compensation coefficient gradually approaches the optimal value, thereby avoiding the inefficiency or overcompensation problems caused by blind adjustment.

[0051] Step 204: Determine whether the harmonic distortion rate of the signal waveform meets the preset waveform quality conditions. If yes, proceed to step 205; otherwise, proceed to step 206.

[0052] In this embodiment of the invention, the evaluation method for whether the preset waveform quality conditions are met can be either automatic or manual.

[0053] If the automatic discrimination mode is used, the waveform quality condition is the waveform quality threshold. Specifically, the harmonic distortion rate (THD) or other quantitative indicators of the signal waveform are calculated in real time and compared with a preset waveform quality threshold (e.g., THD < 1%). If the harmonic distortion rate is lower than the waveform quality threshold, it is considered to meet the waveform quality condition, and step 205 is executed; if the harmonic distortion rate is higher than or equal to the waveform quality threshold, it is considered to not meet the waveform quality condition, and step 206 is executed.

[0054] If a manual judgment mode is used, the waveform is presented to the engineers in a graphical interface, allowing them to intuitively judge whether the waveform is close to the ideal sine wave and whether harmonics have been effectively suppressed based on their experience. If the engineers determine that the waveform quality has met the expectations, it is considered to meet the waveform quality conditions, and step 205 is continued; if the engineers determine that the waveform quality has not met the expectations, it is considered to meet the conditions, and step 206 is continued.

[0055] This invention provides a basis for adjusting the compensation coefficients based on the signal waveform quality, ensuring that only coefficients that meet the quality requirements are ultimately adopted.

[0056] Step 205: Determine the current compensation coefficient as the optimized compensation coefficient for each signal channel, and continue to execute step 210.

[0057] In this embodiment of the invention, if the current signal waveform is determined to meet the preset waveform quality conditions, it indicates that the current compensation coefficient Nd i It has been able to effectively suppress delay-induced harmonics, achieving satisfactory signal quality in the simulation. The current compensation coefficients are determined as the optimized compensation coefficients for each signal channel and output to the feedforward compensation subsystem simulation model for subsequent use.

[0058] This step marks the successful completion of the parameter tuning process, and the determined compensation coefficient is the optimal solution for the current system delay state.

[0059] Step 206: Increase the current compensation coefficient according to the preset step threshold to obtain the updated compensation coefficient.

[0060] In this embodiment of the invention, if it is determined that the current signal waveform does not meet the waveform quality conditions (e.g., harmonics are still obvious), it indicates that the current compensation coefficient is insufficient to fully compensate for the delay effect and needs to be further adjusted. At this time, the compensation coefficient is incremented according to a preset step threshold (e.g., a value of 1), that is: Ndi = Ndi + 1, to obtain the updated compensation coefficient.

[0061] It is worth noting that the step threshold can be set according to actual needs, and this embodiment of the invention does not limit it.

[0062] It should be noted that during the step adjustment process, if the waveform quality deteriorates after a certain increase (i.e., overcompensation), the system or engineering personnel should roll back the compensation coefficient to the previous value to avoid overcompensation leading to new waveform distortion. This rollback mechanism ensures that the adjustment process always converges to the optimal solution, rather than simply increasing incrementally.

[0063] Steps 204 to 206 of this invention together constitute a dynamic optimization closed loop for the compensation coefficient. Through quantitative quality judgment and step-by-step adjustment, the optimal compensation coefficient can be quickly and accurately approximated, ensuring that the feedforward compensation is always in the best working state, thereby effectively suppressing delay-induced harmonics, improving simulation accuracy and stability, and avoiding signal distortion caused by over-compensation or under-compensation.

[0064] Step 207: Determine whether the updated compensation coefficient is greater than the preset upper limit of the coefficient. If yes, proceed to step 208; otherwise, proceed to step 209.

[0065] In this embodiment of the invention, a lower limit value Nd is set for each signal channel. min (Nd) min =0) Upper limit of coefficient Nd max This upper limit can be set according to the maximum number of delay steps of the actual simulation system. For example, if the system may generate a delay of up to 5 simulation steps, the upper limit of the coefficient can be set to 5.

[0066] Specifically, the updated compensation coefficient is compared with the preset upper limit of the coefficient. If the updated compensation coefficient is greater than the upper limit of the coefficient, it means that continuing to increase the coefficient may lead to overcompensation or even cause new waveform distortion. Then, step 208 is executed. If the updated compensation coefficient is less than or equal to the upper limit of the coefficient, it means that it is still within the safe adjustment range. Then, step 209 is executed to continue the next round of iteration optimization.

[0067] This invention sets upper and lower limits for the coefficient, creating a "safety gate" for adjusting the compensation coefficient. This ensures that the adjustment process is always carried out within a reasonable range, avoiding a decline in system performance due to blind increases.

[0068] Step 208: Determine the current compensation coefficient as the optimized compensation coefficient for each signal channel, and continue to execute step 210.

[0069] In this embodiment of the invention, if it is determined that the updated compensation coefficient has exceeded the preset upper limit of the coefficient, it indicates that even if the current waveform quality may not have reached the ideal state, but due to the physical constraint of the maximum delay step of the system, it is meaningless to continue to increase the coefficient and may cause overcompensation risk, so step 210 is continued.

[0070] This step marks the termination of the parameter tuning process due to boundary conditions. The determined coefficients are the optimal feasible solution within the safe range. Through the coefficient upper limit protection mechanism, overcompensation caused by excessively large compensation coefficients is effectively avoided, preventing new distortions in the signal waveform or system oscillations, and ensuring the stable operation of the simulation system.

[0071] Step 209: Determine the updated compensation coefficient as the current compensation coefficient, and repeat step 203.

[0072] In this embodiment of the invention, if it is determined that the updated compensation coefficient does not exceed the preset upper limit of the coefficient, it means that the current coefficient is still within the safe adjustment range, but the waveform quality has not yet met the waveform quality conditions. The updated compensation coefficient is then determined as the current compensation coefficient, and step 203 is executed to rerun the simulation and observe the waveform. This closed-loop iterative process of "adjustment-simulation-judgment" will be repeated continuously until the waveform quality conditions are met or the upper limit of the coefficient is triggered to terminate the process.

[0073] This invention uses a cyclic iterative mechanism to enable the compensation coefficient to gradually approach the optimal value in a step-by-step manner, while ensuring that each adjustment is made within a safe range, ultimately achieving a balance between compensation effect and system stability.

[0074] Step 210: Using the time delay module, calculate the delay component signal of each signal channel based on the original analog input signal.

[0075] In this embodiment of the invention, the delay module is a packaged functional unit that integrates the operational logic for delaying signals.

[0076] Specifically, for each signal channel, the original analog input signal y is... i (k) The data is sent to the corresponding delay modules. The delay modules are configured according to the preset delay time T. d The input signal is processed to output the delayed component signal after precise delay, i.e.: y i (k)·e -sT Of. Among them, It is a mathematical expression (with non-independent numerical parameters) characterizing the time delay properties, corresponding to the time delay module encapsulated in practical applications. The core function of this module is to output the input signal after a set delay time, T. d It is set manually and usually keeps consistent with the simulation step size; its mathematical essence is through... Describe the signal after a delay time T d The subsequent delay characteristics provide a quantitative basis for compensation calculations related to delay.

[0077] It should be noted that the delay time T d It is typically set to match the simulation step size of the hardware-in-the-loop simulation to ensure that the accuracy of the delay processing matches the real-time cycle time of the simulation system.

[0078] In practical implementation, the working mechanism of the delay module can be understood as follows: when the input signal y... i (k) After entering the module, the delay module shifts the signal backward by T on the time axis according to the set delay parameters. d The delay module automatically calculates the delay duration, thus generating a new signal that has the same waveform as the original signal but is delayed in time. This process requires no manual intervention; the delay module automatically performs the delay calculation.

[0079] This invention accurately constructs the delay component of the original signal through a time delay module, providing a crucial negative reference signal for subsequent compensation and synthesis operations. The difference between this delay component and the original signal forms the basis for the feedforward compensation algorithm to cancel delay-induced harmonics. Furthermore, because the time delay module is independently configured for each signal channel, each signal can be delayed according to its own characteristics, enhancing the targetedness and flexibility of the compensation and laying the data foundation for ultimately achieving high-precision harmonic suppression.

[0080] Step 211: Based on the delay component signal and the optimized compensation coefficients of each signal channel, compensate the original analog input signal to generate the compensated output signal of each signal channel.

[0081] In this embodiment of the invention, step 211 specifically includes: Step 2111: Based on the optimized compensation coefficients of each signal channel, perform feedforward compensation on the original analog input signal to generate the feedforward term signal.

[0082] In this embodiment of the invention, for each signal channel, a determined optimized compensation coefficient Nd is invoked. i (Nd) i (where y is an integer greater than or equal to 0); input the original analog signal y. i (k) and (Nd) i +1) Perform multiplication to generate the feedforward signal. .

[0083] In this embodiment of the invention, the feedforward signal is equivalent to amplifying the original analog input signal by a certain factor. The amplification factor is determined by the compensation coefficient, and the purpose is to provide an energy basis for subsequent harmonic cancellation.

[0084] Step 2112: Based on the optimized compensation coefficients and delay component signals of each signal channel, perform feedback compensation on the original analog input signal to generate a feedback term signal.

[0085] In this embodiment of the invention, the delayed component signal y is invoked. i (k)·e -sT And the optimized compensation coefficient Nd of the same channel i The delayed component signal and the compensation coefficient Nd i Perform multiplication operations to generate feedback signal. .

[0086] In this embodiment of the invention, the feedback signal is the result of weighting the delay component, representing the magnitude of the harmonic components that need to be canceled from the original analog input signal.

[0087] Step 2113: Combine the feedforward signal and the feedback signal to generate the compensated output signals for each signal channel.

[0088] In this embodiment of the invention, the feedforward signal and the feedback signal of the same signal channel are subtracted to obtain the compensated output signals of each signal channel, denoted as . The compensation formula is:

[0089] in, The output signals of each signal channel after compensation; Nd i The compensation coefficient; For the original analog input signal; y i (k)·e -sT This is a delayed component signal.

[0090] When Nd i When = 1, single-step prediction compensation is achieved, and the compensation formula is:

[0091] The harmonics induced by the single-step delay of the original analog input signal are specifically compensated by single-step prediction compensation.

[0092] When Nd i When the value is greater than 1 (and is a positive integer), N-step advance prediction compensation is implemented, where N = Nd. i The compensation formula at this time is:

[0093] By increasing Nd i The value of allows the compensation formula to cover the harmonic effects caused by N-step delay, enabling advanced prediction and compensation for multi-step delay.

[0094] This calculation process is automatically completed in the simulation model through adders and subtractors. The synthesized signal is the output signal of each signal channel after compensation. The output signal of each signal channel after compensation has been processed by the feedforward compensation mechanism and can be directly output to the simulation system or fed back to the controller under test.

[0095] Figure 3 This is a schematic diagram illustrating compensation calculations using a simulation model of a feedforward compensation subsystem provided in an embodiment of the present invention. Figure 3 As shown, the original analog input signal set y(k) = {y i After entering the system, (k), i=M+N}} is divided into two paths: one path goes upward into the feedforward path, and the other path goes downward into the delay feedback path.

[0096] In the feedforward path, the original analog input signal set y(k) is multiplied by (Nd+1), where Nd is the set of compensation coefficients Nd={Nd i The result of the feedforward path calculation is the set of feedforward term signals. ={ ,i=M+N}.

[0097] In the feedback path, the original analog input signal set y(k) first enters the time delay module e. sT According to the preset delay time T d Generate a delayed component signal that lags behind the original signal, i.e.: y(k) e sT The delayed component signal is multiplied by the compensation coefficient set Nd to generate the feedback term signal set. .

[0098] The feedforward and feedback signal sets are combined using adders and subtractors to obtain the compensated output signal sets for each signal channel. .

[0099] It should be noted that the output signal of each signal channel after compensation is the final result itself, and there is no need to superimpose it with the original signal to avoid signal distortion caused by repeated processing.

[0100] This invention, through the difference calculation between the feedforward and feedback signals, can accurately cancel harmonic components introduced by signal delay, thereby significantly improving the waveform quality of the output signal while retaining the main characteristics of the original signal. This compensation process is entirely completed within the simulation model of the feedforward compensation subsystem, requiring no hardware modifications, and effectively suppressing delay-induced harmonics, thus improving the accuracy and stability of hardware-in-the-loop simulation.

[0101] This application achieves precise compensation for time-delay-induced harmonics through an innovative feedforward compensation algorithm. Simultaneously, the multi-step predictive correction subsystem dynamically adjusts the compensation coefficients to ensure the compensation signal always matches the real-time delay state of the system. The synergistic effect of these two mechanisms significantly improves the accuracy of hardware-in-the-loop simulation results. The construction of the delay model and the optimization of prediction parameters are both completed within the simulation platform, independent of hardware adjustments. This application can adapt in real-time to the dynamic changes in delay characteristics and operating conditions in power system simulations. Whether due to system load fluctuations, topology changes, or the introduction of external interference, the compensation strategy can be quickly corrected by adjusting model parameters to ensure harmonic suppression effectiveness. It is suitable for the simulation needs of AC, DC, and hybrid systems. Because it effectively suppresses delay-induced harmonic interference, abnormal interruptions or repetitive runs caused by waveform distortion during simulation are significantly reduced, resulting in a smoother simulation process and a significantly shorter overall simulation time. The feedforward compensation mechanism reduces the disturbance of delay to the system, and the multi-step predictive correction avoids the risk of system oscillation or instability caused by excessive harmonics. Combined with precise signal processing, it ensures the accuracy and reliability of the signal output to the controller. The combination of these three elements makes the dynamic response of the hardware-in-the-loop simulation system more stable and its anti-interference ability stronger, significantly improving the reliability and security of the simulation system.

[0102] It is worth noting that the acquisition, storage, use, and processing of data in the technical solution of this application all comply with relevant laws and regulations. The user information in the embodiments of this application was obtained through legal and compliant means, and the acquisition, storage, use, and processing of user information have been authorized and agreed upon by the client.

[0103] It is worth noting that the information collected in this application is information and data authorized by the user or fully authorized by all parties, and the collection, storage, use, processing, transmission, provision, disclosure and application of the relevant data all comply with the relevant laws, regulations and standards of the relevant countries and regions, necessary confidentiality measures have been taken, and they do not violate public order and good morals. Corresponding operation portals are provided for users to choose to authorize or refuse.

[0104] It is worth noting that the technical solution provided in this application provides users with a corresponding operation entry point, allowing users to choose to agree to or reject the automated decision-making result; if the user chooses to reject, the process will proceed to the expert decision-making process.

[0105] The signal compensation method for power system hardware-in-the-loop simulation provided in this invention involves acquiring the original analog input signals of each signal channel in the hardware-in-the-loop simulation; using a preset multi-step prediction correction subsystem simulation model, adjusting the current compensation coefficients in steps based on the original analog input signals of each signal channel to generate optimized compensation coefficients for each signal channel; using a preset feedforward compensation subsystem simulation model, compensating for delay signals based on the original analog input signals and the optimized compensation coefficients for each signal channel to generate compensated output signals for each signal channel. Through the collaborative strategy of feedforward compensation and multi-step prediction correction, delay-induced harmonics can be effectively suppressed without changing the hardware structure, significantly improving the accuracy and waveform quality of the hardware-in-the-loop simulation; the compensation coefficients adopt a step-by-step dynamic adjustment mechanism, enabling the system to have good operating condition adaptability and anti-interference capability, greatly improving simulation efficiency and system operation stability.

[0106] Figure 4 This is a schematic diagram of a signal compensation device for power system hardware-in-the-loop simulation provided in an embodiment of the present invention. This device is used to execute the aforementioned signal compensation method for power system hardware-in-the-loop simulation, such as... Figure 4 As shown, the device includes: an input signal acquisition unit 11, a multi-step prediction and correction unit 12, and a signal compensation unit 13.

[0107] The input signal acquisition unit 11 is used to acquire the original analog input signals of each signal channel in the hardware-in-the-loop simulation of the power system.

[0108] The multi-step prediction correction unit 12 is used to adjust the current compensation coefficients stepwise according to the original analog input signals of each signal channel through a preset multi-step prediction correction subsystem simulation model, and generate optimized compensation coefficients for each signal channel.

[0109] The signal compensation unit 13 is used to perform delay signal compensation based on the original analog input signal and the optimized compensation coefficients of each signal channel through a preset feedforward compensation subsystem simulation model, and generate the compensated output signal of each signal channel.

[0110] In this embodiment of the invention, the input signal acquisition unit 11 is specifically used to acquire the original analog input signals of each signal channel according to a preset time interval. The original analog input signals of each signal channel include multiple voltage signals and multiple current signals.

[0111] In this embodiment of the invention, the multi-step prediction and correction unit 12 is specifically used to preprocess the original analog input signal to obtain the preprocessed original analog input signal; run a power system hardware-in-the-loop simulation based on the current compensation coefficient and the preprocessed original analog input signal to obtain the signal waveform; if the harmonic distortion rate of the signal waveform does not meet the preset waveform quality conditions, increase the current compensation coefficient according to the preset step threshold to obtain the updated compensation coefficient; determine whether the updated compensation coefficient is greater than the preset coefficient upper limit; if yes, determine the current compensation coefficient as the optimized compensation coefficient for each signal channel; if no, determine the updated compensation coefficient as the current compensation coefficient, and repeat the step of running a power system hardware-in-the-loop simulation based on the current compensation coefficient and the original analog input signal to obtain the signal waveform.

[0112] In this embodiment of the invention, the multi-step prediction correction unit 12 is specifically used to determine the current compensation coefficient as the optimized compensation coefficient for each signal channel if the harmonic distortion rate of the signal waveform meets the preset waveform quality conditions.

[0113] In this embodiment of the invention, the simulation model of the feedforward compensation subsystem includes a time delay module; the signal compensation unit 13 is specifically used to calculate the delay component signal of each signal channel based on the original analog input signal through the time delay module; and to compensate the original analog input signal based on the delay component signal and the optimized compensation coefficient of each signal channel to generate the compensated output signal of each signal channel.

[0114] In this embodiment of the invention, the signal compensation unit 13 is specifically used to perform feedforward compensation on the original analog input signal according to the optimized compensation coefficients of each signal channel to generate a feedforward term signal; to perform feedback compensation on the original analog input signal according to the optimized compensation coefficients and delay component signals of each signal channel to generate a feedback term signal; and to synthesize the feedforward term signal and the feedback term signal to generate the compensated output signal of each signal channel.

[0115] In this embodiment of the invention, the original analog input signals of each signal channel in the hardware-in-the-loop simulation of the power system are obtained. Using a preset multi-step prediction correction subsystem simulation model, the current compensation coefficients are adjusted in steps based on the original analog input signals of each signal channel to generate optimized compensation coefficients for each signal channel. Using a preset feedforward compensation subsystem simulation model, delay signal compensation is performed based on the original analog input signals and the optimized compensation coefficients for each signal channel to generate compensated output signals for each signal channel. Through the collaborative strategy of feedforward compensation and multi-step prediction correction, delay-induced harmonics can be effectively suppressed without changing the hardware structure, significantly improving the accuracy and waveform quality of the hardware-in-the-loop simulation. The compensation coefficients adopt a step-by-step dynamic adjustment mechanism, enabling the system to have good operating condition adaptability and anti-interference capability, greatly improving simulation efficiency and system operational stability.

[0116] The systems, devices, modules, or units described in the above embodiments can be implemented by computer chips or entities, or by products with certain functions. A typical implementation device is a computer device, specifically, a computer device can be, for example, a personal computer, a laptop computer, a cellular phone, a camera phone, a smartphone, a personal digital assistant, a media player, a navigation device, an email device, a game console, a tablet computer, a wearable device, or any combination of these devices.

[0117] This invention provides a computer device, including a memory and a processor. The memory is used to store information including program instructions, and the processor is used to control the execution of the program instructions. When the program instructions are loaded and executed by the processor, they implement the steps of the above-described embodiment of the signal compensation method for power system hardware-in-the-loop simulation. For a detailed description, please refer to the above-described embodiment of the signal compensation method for power system hardware-in-the-loop simulation.

[0118] The following is for reference. Figure 5 It shows a schematic diagram of the structure of a computer device 600 suitable for implementing the embodiments of this application.

[0119] like Figure 5 As shown, the computer device 600 includes a central processing unit (CPU) 601, which can perform various appropriate tasks and processes based on programs stored in read-only memory (ROM) 602 or programs loaded from storage section 608 into random access memory (RAM) 603. The RAM 603 also stores various programs and data required for the operation of the computer device 600. The CPU 601, ROM 602, and RAM 603 are interconnected via a bus 604. An input / output (I / O) interface 605 is also connected to the bus 604.

[0120] The following components are connected to I / O interface 605: an input section 606 including a keyboard, mouse, etc.; an output section 607 including a cathode ray tube (CRT), liquid crystal feedback (LCD), etc., and speakers, etc.; a storage section 608 including a hard disk, etc.; and a communication section 609 including a network interface card such as a LAN card, modem, etc. The communication section 609 performs communication processing via a network such as the Internet. A drive 610 is also connected to I / O interface 605 as needed. A removable medium 611, such as a disk, optical disk, magneto-optical disk, semiconductor memory, etc., is installed on drive 610 as needed so that computer programs read from it can be installed in storage section 608 as needed.

[0121] In particular, according to embodiments of the present invention, the processes described above with reference to the flowcharts can be implemented as computer software programs. For example, embodiments of the present invention include a computer program product comprising a computer program tangibly embodied on a machine-readable medium, the computer program including program code for performing the methods shown in the flowcharts. In such embodiments, the computer program can be downloaded and installed from a network via communication section 609, and / or installed from removable medium 611.

[0122] Computer-readable media includes both permanent and non-permanent, removable and non-removable media that can store information by any method or technology. Information can be computer-readable instructions, data structures, modules of programs, or other data. Examples of computer storage media include, but are not limited to, phase-change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technologies, CD-ROM, digital versatile optical disc (DVD) or other optical storage, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other non-transferable medium that can be used to store information accessible by a computing device. As defined herein, computer-readable media does not include transient computer-readable media, such as modulated data signals and carrier waves.

[0123] For ease of description, the above devices are described separately by function as various units. Of course, in implementing this application, the functions of each unit can be implemented in one or more software and / or hardware.

[0124] This invention is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart illustrations and / or block diagrams. Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.

[0125] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.

[0126] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.

[0127] It should also be noted that the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0128] The acquisition, storage, use, and processing of data in this application all comply with the relevant provisions of national laws and regulations.

[0129] It should be noted that in the embodiments of this application, certain software, components, models and other existing solutions in the industry may be mentioned. These should be regarded as exemplary and are only intended to illustrate the feasibility of implementing the technical solution of this application. However, it does not mean that the applicant has used or necessarily used the solution.

[0130] Those skilled in the art will understand that embodiments of this application can be provided as methods, systems, or computer program products. Therefore, this application can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, this application can take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0131] This application can be described in the general context of computer-executable instructions, such as program modules, that are executed by a computer. Generally, program modules include routines, programs, objects, components, data structures, etc., that perform a specific task or implement a specific abstract data type. This application can also be practiced in distributed computing environments where tasks are performed by remote processing devices connected via a communication network. In distributed computing environments, program modules can reside in local and remote computer storage media, including storage devices.

[0132] The various embodiments in this specification are described in a progressive manner. Similar or identical parts between embodiments can be referred to interchangeably. Each embodiment focuses on describing the differences from other embodiments. In particular, the system embodiments are basically similar to the method embodiments, so the description is relatively simple; relevant parts can be referred to the descriptions in the method embodiments.

[0133] The above description is merely an embodiment of this application and is not intended to limit the scope of this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the scope of the claims of this application.

Claims

1. A signal compensation method for power system hardware-in-the-loop simulation, characterized by, The method includes: Obtain the original analog input signals of each signal channel in the hardware-in-the-loop simulation of the power system; By using a pre-set multi-step prediction correction subsystem simulation model, the current compensation coefficients are adjusted stepwise according to the original analog input signals of each signal channel to generate optimized compensation coefficients for each signal channel. Using a preset feedforward compensation subsystem simulation model, delay signal compensation is performed based on the original analog input signal and the optimized compensation coefficients of each signal channel to generate the compensated output signals of each signal channel.

2. The signal compensation method of power system hardware-in-the-loop simulation according to claim 1, characterized in that, The acquisition of the original analog input signals of each signal channel in the hardware-in-the-loop simulation of the power system includes: According to a preset time interval, the original analog input signals of each signal channel are acquired. The original analog input signals of each signal channel include multiple voltage signals and multiple current signals.

3. The method of claim 1, wherein, The process involves using a pre-defined multi-step prediction and correction subsystem simulation model to progressively adjust the current compensation coefficients based on the original analog input signals of each signal channel, generating optimized compensation coefficients for each signal channel. This includes: The original analog input signal is preprocessed to obtain the preprocessed original analog input signal. Based on the current compensation coefficient and the preprocessed original analog input signal, a hardware-in-the-loop simulation of the power system is performed to obtain the signal waveform. If the harmonic distortion rate of the signal waveform does not meet the preset waveform quality conditions, the current compensation coefficient is increased according to the preset step threshold to obtain the updated compensation coefficient. Determine whether the updated compensation coefficient is greater than the preset upper limit of the coefficient; If so, the current compensation coefficient is determined as the optimized compensation coefficient for each signal channel; If not, the updated compensation coefficient is determined as the current compensation coefficient, and the step of running the power system hardware-in-the-loop simulation based on the current compensation coefficient and the preprocessed original analog input signal to obtain the signal waveform is repeated.

4. The method of claim 3, wherein the signal compensation is performed by a signal compensation module. The method further includes: If the harmonic distortion rate of the signal waveform meets the preset waveform quality conditions, the current compensation coefficient is determined as the optimized compensation coefficient for each signal channel.

5. The method of claim 1, wherein, The simulation model of the feedforward compensation subsystem includes a time delay module; The process involves using a pre-defined feedforward compensation subsystem simulation model to perform delay signal compensation based on the original analog input signal and the optimized compensation coefficients for each signal channel, generating the compensated output signals for each signal channel. This includes: The delay module calculates the delay component signal of each signal channel based on the original analog input signal. The original analog input signal is compensated based on the delayed component signal and the optimized compensation coefficients of each signal channel to generate the compensated output signal of each signal channel.

6. The method of claim 5, wherein the signal compensation is performed by a signal compensation module. The step of compensating the original analog input signal based on the delayed component signal and the optimized compensation coefficients of each signal channel to generate the compensated output signals of each signal channel includes: Based on the optimized compensation coefficients of each signal channel, the original analog input signal is fed forward to generate a feedforward term signal. Based on the optimized compensation coefficients and delay component signals of each signal channel, the original analog input signal is subjected to feedback compensation to generate a feedback term signal; The feedforward and feedback signals are combined to generate the compensated output signals for each signal channel.

7. A signal compensation apparatus for power system hardware-in-the-loop simulation, characterized by, The device includes: The input signal acquisition unit is used to acquire the original analog input signals of each signal channel in the hardware-in-the-loop simulation of the power system; The multi-step prediction correction unit is used to adjust the current compensation coefficients in steps according to the original analog input signals of each signal channel through a preset multi-step prediction correction subsystem simulation model, and generate optimized compensation coefficients for each signal channel. The signal compensation unit is used to perform delay signal compensation based on the original analog input signal and the optimized compensation coefficients of each signal channel using a preset feedforward compensation subsystem simulation model, and generate the compensated output signal of each signal channel.

8. A computer readable medium having stored thereon a computer program, characterized in that, When executed by a processor, the program implements the signal compensation method for hardware-in-the-loop simulation of a power system as described in any one of claims 1 to 6.

9. A computer device comprising a memory for storing information including program instructions, and a processor for controlling execution of the program instructions, characterized in that, When the program instructions are loaded and executed by the processor, they implement the signal compensation method for power system hardware-in-the-loop simulation as described in any one of claims 1 to 6.

10. A computer program product comprising computer programs / instructions, characterized in that, When the computer program / instructions are executed by the processor, they implement the signal compensation method for power system hardware-in-the-loop simulation as described in any one of claims 1 to 6.

Images