Quantum Error Mitigation Learning Method and Device Based on Graph Neural Networks
By using a quantum error mitigation method based on graph neural networks, real quantum processor data is directly mapped to a directed graph and global features are extracted. This solves the problem of performance degradation of traditional methods in complex hardware environments and achieves efficient and low-cost quantum information extraction and error mitigation.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- ZHENGZHOU UNIV
- Filing Date
- 2026-03-26
- Publication Date
- 2026-07-31
AI Technical Summary
Existing quantum computing devices are limited by decoherence, gate operation defects, and measurement errors. Traditional error mitigation methods suffer from performance degradation and high costs in complex hardware environments, making it difficult to effectively extract useful information.
A quantum error mitigation method based on graph neural networks is adopted. By collecting real quantum circuit data, mapping it to a directed graph, extracting global statistical feature vectors, embedding and fusing graph structures, adaptively predicting and mitigating errors, outputting quantum circuit observations, avoiding idealized noise models, and capturing physical connection topology and noise distribution.
It improves the reliability and flexibility of quantum computing, reduces resource consumption, adapts to quantum circuits of different scales, reduces experimental costs, and enhances the stability and accuracy of models.
Smart Images

Figure CN122491537A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of quantum computing, and more particularly to a quantum error mitigation learning method based on graph neural networks, and a quantum error mitigation learning device based on graph neural networks. It is primarily used to extract useful information from current hardware without incurring excessive resource consumption. Background Technology
[0002] Quantum computing holds the potential for disruptive value in many fields; however, current Noisy Intermediate-Scale Quantum (NISQ) devices are fundamentally limited by decoherence (the process by which a quantum system loses its coherence, resulting in the disappearance of its quantum properties), gate operation defects, and measurement errors. Comprehensive quantum error correction techniques remain difficult to achieve, making quantum error mitigation (QEM) a crucial strategy for extracting useful information from current hardware without excessive resource consumption. QEM is a key support for the NISQ era, reducing noise interference without requiring fault-tolerant hardware.
[0003] Traditional error mitigation methods, such as zero-noise extrapolation (ZNE) and Clifford gate-based methods including probabilistic error cancellation (PEC) and Clifford data regression (CDR), typically rely on explicit noise assumptions or extensive calibration circuitry. While effective in controlled environments, their performance often degrades in the presence of complex hardware effects such as crosstalk and readout errors, and experimental costs increase exponentially or polynomially with increasing circuit size. Summary of the Invention
[0004] To overcome the shortcomings of existing technologies, the technical problem to be solved by this invention is to provide a quantum error mitigation learning method based on graph neural networks, which can extract useful information from recent hardware without generating excessive resource consumption, and whose performance does not degrade in the presence of complex hardware effects such as crosstalk and readout errors.
[0005] The technical solution of this invention is: a quantum error mitigation learning method based on graph neural networks, comprising the following steps: (1) Collect real quantum circuits; (2) Map the real quantum circuit to a directed graph; construct the node feature matrix; construct the edge feature set to characterize the error rate and coupling information of the two-bit gate; (3) Extract global statistical feature vectors; (4) Input the directed graph into the graph neural network model and pass messages to obtain the graph structure embedding vector; (5) The graph structure embedding vector and the global statistical vector are fused to obtain the joint representation vector; (6) Adaptive prediction based on joint representation vector, mapping the unified embedding to prediction quantities in different semantic spaces; (7) Quantum circuit observations after error mitigation.
[0006] This invention directly uses sampling data from real quantum processors, without relying on idealized noise models, avoiding the problem of model assumptions not matching real hardware. It can capture the physical connection topology in quantum systems, providing rich physical information for the model, effectively preventing the loss of macroscopic noise semantics, improving model stability, eliminating the need for manually designing complex rules, more comprehensively describing the noise distribution of quantum circuits, improving error mitigation, and adapting to new quantum error mitigation tasks by only adjusting the output layer, thus improving model flexibility and the credibility of quantum computing experiments.
[0007] A quantum error mitigation learning device based on a graph neural network is also provided, the device comprising: A collection module, configured to collect real quantum circuits; The module is configured to map real quantum circuits into directed graphs; a node feature matrix is constructed; and an edge feature set is constructed to characterize the two-qubit gate error rate and coupling information. The extraction module is configured to extract global statistical feature vectors. The encoding module is configured to perform message passing on the directed graph input graph neural network model to obtain graph structure embedding vectors. The fusion module is configured to fuse the graph structure embedding vector with the global statistical vector to obtain a joint representation vector; The prediction module is configured to perform adaptive prediction based on the joint representation vector, mapping the unified embedding to predictions in different semantic spaces. The output module is configured to output the quantum circuit observations after error mitigation. Attached Figure Description
[0008] Figure 1 A flowchart of a quantum error mitigation learning method based on graph neural networks according to the present invention is shown. Detailed Implementation
[0009] like Figure 1 As shown, this quantum error mitigation learning method based on graph neural networks includes the following steps: (1) Collect real quantum circuits; (2) Map the real quantum circuit to a directed graph; construct the node feature matrix; construct the edge feature set to characterize the error rate and coupling information of the two-bit gate; (3) Extract global statistical feature vectors; (4) Input the directed graph into the graph neural network model and pass messages to obtain the graph structure embedding vector; (5) The graph structure embedding vector and the global statistical vector are fused to obtain the joint representation vector; (6) Adaptive prediction based on joint representation vector, mapping the unified embedding to prediction quantities in different semantic spaces; (7) Quantum circuit observations after error mitigation.
[0010] This invention directly uses sampling data from real quantum processors, without relying on idealized noise models, avoiding the problem of model assumptions not matching real hardware. It can capture the physical connection topology in quantum systems, providing rich physical information for the model, effectively preventing the loss of macroscopic noise semantics, improving model stability, eliminating the need for manually designing complex rules, more comprehensively describing the noise distribution of quantum circuits, improving error mitigation, and adapting to new quantum error mitigation tasks by only adjusting the output layer, thus improving model flexibility and the credibility of quantum computing experiments.
[0011] The advantages of steps (1)-(7) are explained in detail below.
[0012] Advantages of step (1):
[0013] 1. Realistic noise modeling capability By directly using sampled data from real quantum processors, the model can learn complex noises such as decoherence, gate error, readout error, and crosstalk in actual hardware, without relying on idealized noise models.
[0014] 2. Avoid errors in the assumptions of the noise model Traditional error mitigation methods typically rely on pre-defined noise channels (such as depolarizing or amplitude damping), while noise in real devices exhibits temporal drift and non-local correlation. Training with real data can avoid the problem of model assumptions not matching real hardware.
[0015] 3. Improve the hardware adaptability of the method. By directly acquiring data from the target quantum processor, the learning model can be adaptively optimized for specific hardware architectures, thereby improving error mitigation.
[0016] Advantages of step (2):
[0017] 1. Preserve quantum circuit topology information By mapping quantum circuits to a graph structure, the coupling relationships between qubits and the action paths of two-qubit gates can be naturally represented, enabling the model to capture the physical connection topology in the quantum system.
[0018] 2. Explicitly express local physical parameters Node characteristics may include hardware calibration parameters for the qubits, such as relaxation time. Separation time This allows for the assessment of readout error rates and other factors, thereby providing the model with rich physical information.
[0019] 3. Characterizing the correlated noise of a two-bit gate Edge features can describe the error rate and coupling strength of the two-bit gate, enabling the model to learn the crosstalk noise and nonlocal error propagation laws introduced by the two-bit gate.
[0020] Advantages of step (3):
[0021] 1. Capture global noise drift information Global statistical features can reflect system-level noise changes, while local node features alone cannot perceive the overall temperature or environmental fluctuations of the entire quantum chip during operation. Extracting global statistical features (such as mean, variance, etc.) and complexity indices from the measurement distribution can effectively prevent the loss of macroscopic noise semantics.
[0022] 2. Enhance the model's ability to characterize complex quantum states. While preserving local topological information, introducing global statistical features can supplement the overall circuit complexity and statistical distribution information.
[0023] 3. Improve model robustness Combining global information can reduce the impact of noise fluctuations in individual nodes on prediction results, thereby improving model stability.
[0024] Advantages of step (4):
[0025] 1. Simulating the propagation of noise in quantum hardware topology Graph neural networks achieve message passing through neighborhood aggregation, enabling nodes to integrate information from neighboring qubits, thereby learning the diffusion patterns of noise in quantum circuits.
[0026] 2. Capture multi-body correlated noise By using multi-layer graph convolution, the model can be expanded layer by layer to capture the correlation noise between distant qubits.
[0027] 3. Implementing topology-aware feature learning Graph neural networks can automatically learn the structural features that are most conducive to error mitigation without the need for manually designing complex rules.
[0028] 4. Parameter sharing enhances generalization ability The parameters of a graph neural network are shared between different nodes, enabling the model to be transferred between quantum circuits of different sizes.
[0029] Advantages of step (5):
[0030] 1. Combining local and global information Graph embedding represents the relationship between local topology and qubits, while global statistical vectors reflect the system-level noise state. The fusion of the two can obtain a more complete circuit representation.
[0031] 2. Improve forecast accuracy The joint representation of local and global features can more comprehensively describe the noise distribution of quantum circuits, thereby improving the error mitigation effect.
[0032] Advantages of step (6):
[0033] 1. Supports multiple error mitigation tasks Unified embedding can be mapped to different types of outputs based on different tasks, such as probability distribution correction, expected value prediction, or error uncertainty estimation.
[0034] 2. Enable model sharing and task expansion By sharing the underlying graph representation, new quantum error mitigation tasks can be adapted simply by adjusting the output layer, thus improving model flexibility.
[0035] 3. Provide information on predicting uncertainty The model can output error estimates or confidence levels, thereby helping to identify high-noise circuits or abnormal measurement results.
[0036] Advantages of step (7):
[0037] 1. Improve the accuracy of quantum computing results By using models to predict observations that are closer to the ideal values, the credibility of quantum computing experiments can be improved.
[0038] 2. Reduce experimental sampling costs Compared to traditional methods (such as zero-noise extrapolation) that require multiple circuit runs, this method can achieve effective error mitigation under limited sampling conditions.
[0039] 3. Applicable to large-scale quantum systems Since the model learns the local noise propagation pattern, it is expected to be extended to larger-scale quantum circuits.
[0040] Preferably, in step (2), the quantum circuit is... Mapped to a directed graph with attributes , where the set of nodes Corresponding physical qubits, edge sets Describe the relationship between the two-bit gate and the coupling topology; node feature matrix Encoding local measurements and hardware calibration parameters, edge features Characterize the double-bit gate error and coupling strength.
[0041] Preferably, in step (2), the local measurement quantity and hardware calibration parameters include: single-bit observable, relaxation time, and readout error rate.
[0042] Preferably, in step (3), a global statistical vector is introduced. It is used to aggregate the measurement distribution and complexity characteristics of the entire line, thereby preserving the semantics of macroscopic noise at the graph level.
[0043] Preferably, in step (3), the measurement distribution and complexity characteristics include: measurement mean, measurement variance, extreme values or dispersion index, and gate number statistics.
[0044] Preferably, in step (4), the graph neural network model performs multi-layer message passing through the graph neural network to learn the nonlinear mapping relationship between noise and line structure. Let the first... Layer nodes are represented as Its update format is as follows: , in For the node's neighborhood, Representing edge features, For learnable edge condition mapping functions, The activation is nonlinear; after multi-layer propagation, the structure embedding is obtained through graph-level pooling operators. .
[0045] Preferably, in step (5), the global statistical vector Integration to form a joint representation At the same time, local noise context and overall circuit complexity information are preserved.
[0046] Preferably, in step (6), the graph neural network model uses a task-adaptive output head to map the unified embedding into predictions in different semantic spaces. in These can be scalar or distributed parameter vectors, thus supporting different types of error mitigation objectives. Dimensions As the task objective changes: When the objective is classic fidelity correction, Corresponding scalar logarithmic ratio prediction; when the objective is to mitigate observable errors. , representing the mean and uncertainty parameters.
[0047] Preferably, in step (7), the noisy observations are reweighted or regressed based on the prediction results to obtain an estimated value close to the ideal physical quantity, and the final quantum circuit result after error mitigation is output.
[0048] Those skilled in the art will understand that all or part of the steps in the methods of the above embodiments can be implemented by a program instructing related hardware. The program can be stored in a computer-readable storage medium. When executed, the program includes the steps of the methods of the above embodiments. The storage medium can be ROM / RAM, magnetic disk, optical disk, memory card, etc. Therefore, corresponding to the method of the present invention, the present invention also includes a quantum error mitigation learning device based on graph neural networks. This device is typically represented in the form of functional modules corresponding to the steps of the method. The device includes: A collection module, configured to collect real quantum circuits; The module is configured to map real quantum circuits into directed graphs; a node feature matrix is constructed; and an edge feature set is constructed to characterize the two-qubit gate error rate and coupling information. The extraction module is configured to extract global statistical feature vectors. The encoding module is configured to perform message passing on the directed graph input graph neural network model to obtain graph structure embedding vectors. The fusion module is configured to fuse the graph structure embedding vector with the global statistical vector to obtain a joint representation vector; The prediction module is configured to perform adaptive prediction based on the joint representation vector, mapping the unified embedding to predictions in different semantic spaces. The output module is configured to output the quantum circuit observations after error mitigation.
[0049] The specific embodiments of the present invention are described in more detail below. Example 1: Quantum Observable Measurement <z>Error mitigation
[0050] Application scenarios
[0051] In quantum algorithm experiments, it is often necessary to measure the expected value of certain observables, such as the expected value of the Pauli-Z operator. <z>However, in real quantum hardware, due to factors such as quantum gate errors, decoherence, and readout errors, the experimentally measured expected values usually deviate from their ideal values. This embodiment uses a graph neural network to model the quantum circuit structure and its physical noise information, thereby predicting the ideal expected value and mitigating errors in quantum observables.
[0052] Technical solution
[0053] (1) Collect real quantum circuit data
[0054] First, a set of 10-qubit random quantum circuits is generated. Each circuit is composed of a random combination of single-qubit rotation gates and two-qubit entanglement gates, with different circuit depths set.
[0055] These circuits were then executed on real quantum hardware, and the expected measurement value was obtained through multiple samplings. <z>_noisy Simultaneously, the ideal expected value of the corresponding circuit is calculated using a classical quantum circuit simulator. <z>_ideal The above data together constitute the dataset required for model training.
[0056] (2) Mapping quantum circuits as directed graphs
[0057] To characterize the structural information of quantum circuits, each circuit is represented as a directed graph. G = (V, E) in: V represents a quantum bit node. E represents the two-qubit gate connection between qubits. Based on this, construct the node feature matrix and edge feature set: Node features include T1 (Relaxation Time) T2 (dispersion time) Readout error (readout error rate) Edge features include Two-qubit gate error Coupling strength (qubit coupling strength) These features are used to describe the local noise environment in quantum circuits.
[0058] (3) Extract global statistical features
[0059] In addition to line topology information, global statistical features are extracted from experimental measurement data to describe the overall complexity of the line and the system-level noise status.
[0060] These features include circuit depth Two-qubit gate ratio gate density Measurement distribution statistics These statistics constitute the global feature vector.
[0061] (4) Graph Neural Network Message Passing
[0062] The directed graph constructed above is input into the graph neural network model, and message passing is performed through multi-layer graph convolution, so that node information is propagated on the topology of the quantum chip, thereby learning the noise correlation between qubits caused by two-bit gate operations.
[0063] After graph convolution calculation, the graph structure embedding vector of the circuit is obtained through graph pooling operation.
[0064] (5) Fusion graph structural features and global features
[0065] The graph embedding vector obtained from the graph neural network is fused with the global statistical feature vector to form a unified joint representation vector. This vector simultaneously contains: Quantum circuit topology information Local physical noise parameters Global statistical noise characteristics
[0066] (6) Prediction of ideal expected value
[0067] Using the joint representation vector input prediction module, the ideal expectation value of the quantum circuit is regressively predicted to obtain... <z>_pred The model training objective is to minimize the difference between the predicted value and the expected value. <z>Mean absolute error (MAE) between _ideal.
[0068] (7) Output error mitigation results
[0069] In practical applications, the expected value measured by quantum hardware will be... <z>_noisy is input into the model for prediction, and the predicted values are used... <z>_pred is the expected value after error mitigation.
[0070] Technical effect
[0071] In experiments with 10-qubit random circuits, this method exhibited low mean absolute error across different circuit depths. Compared to multilayer perceptron models that rely solely on node features, graph neural networks that incorporate circuit topology and edge features can more accurately characterize the nonlocal noise correlations introduced by two-qubit gates.
[0072] Furthermore, the uncertainty parameter sigma predicted by the model shows a significant positive correlation with the actual error, with a Pearson correlation coefficient of r = 0.3433.
[0073] This demonstrates that the model can reflect the intensity of noise impact on quantum circuits to a certain extent. Example 2: Applications across the quantum bit scale
[0074] Application scenarios
[0075] As the scale of quantum computing hardware continues to increase, the Hilbert space dimension of quantum circuits grows exponentially. When the number of qubits reaches tens or even hundreds, the cost of calculating ideal quantum states using classical simulators rises rapidly, making it difficult to obtain ideal labeled data for supervised learning. Therefore, error mitigation models trained on small-scale quantum circuits, if directly applied to larger-scale quantum circuits, can significantly reduce data acquisition costs and improve the scalability of the method in practical quantum computing.
[0076] This embodiment utilizes the structural generalization ability of graph neural networks to learn the local propagation law of quantum noise on small-scale quantum circuits, and then transfers the trained model to larger-scale quantum circuits to mitigate errors.
[0077] Technical solution
[0078] (1) Small-scale quantum circuit training
[0079] First, a dataset of 10-qubit random quantum circuits is constructed, and these circuits are run on real quantum hardware. The noisy expected value is obtained through multiple measurement samplings. <z>_noisy Simultaneously, the ideal expected value of the corresponding line is calculated using a classic simulator. <z>_ideal The above data was used as training samples to train the graph neural network error mitigation model.
[0080] (2) Constructing a quantum circuit diagram structure representation
[0081] During the training phase, each quantum circuit is converted into a graph structure representation. Specifically: Each qubit is represented as a node in a graph, and the node features contain local physical parameters of the quantum hardware, such as... T1 T2 Readout error (readout error rate) Two-qubit gate operations or coupling relationships between qubits are represented as edges in a graph, and the edge features include... Two-qubit gate error Coupling strength In this way, quantum circuits are represented as a graph structure that includes information about physical noise.
[0082] (3) Study the propagation patterns of local noise
[0083] Graph neural networks utilize multi-layered message passing mechanisms to propagate node information along the coupled topology of the quantum chip. During training, the model gradually learns the propagation patterns of quantum noise within the local topology, for example: The effect of two-qubit gate error on the measurement results of adjacent qubits The cumulative effect of decoherence on deep quantum circuits Crosstalk between qubits Because graph neural networks share parameters across different nodes, the model learns structural patterns that are independent of specific qubit numbers.
[0084] (4) Model migration to larger-scale quantum circuits
[0085] After training on a 10-qubit dataset, the trained model is directly applied to 16-qubit random quantum circuits without retraining or parameter fine-tuning.
[0086] For the new 16-qubit quantum circuit, the graph structure representation is constructed using the same method, including node features, edge features, and global statistical features. Because graph neural networks have inherent scalability, their message-passing mechanism can be directly applied to graph structures with more nodes, thus enabling the processing of larger-scale quantum circuits.
[0087] (5) Cross-scale error mitigation prediction
[0088] A 16-qubit quantum circuit is input into a pre-trained model, which outputs an ideal expected value prediction based on the circuit's graph structure and physical characteristics. <z>_pred Thus, the original measurement results <z>_noisy Error mitigation measures were implemented.
[0089] Technical effect
[0090] Experimental results show that the model trained on 10 bits of data can still significantly reduce measurement errors on 16-bit random quantum circuits.
[0091] Compared to traditional zero-noise extrapolation methods, this method exhibits greater stability in deep circuit regions, without significant error oscillations. Furthermore, its prediction results are close to the performance of models retrained on 16-bit data.
[0092] Furthermore, the transfer model maintains a low mean absolute error even in deep circuit scenarios, indicating that the model learns the local propagation mechanism of quantum noise in the quantum chip topology, rather than a simple memorization of specific training circuits.
[0093] Therefore, while maintaining a consistent underlying hardware topology, the error mitigation model trained on a small-scale quantum circuit can be extended to larger-scale quantum circuits, thereby reducing the cost of obtaining ideal labeled data and providing a scalable solution for error mitigation in large-scale quantum computing.
[0094] The above description is merely a preferred embodiment of the present invention and is not intended to limit the present invention in any way. Any simple modifications, equivalent changes, and alterations made to the above embodiments based on the technical essence of the present invention shall still fall within the protection scope of the present invention.< / z> < / z> < / z> < / z> < / z> < / z> < / z> < / z> < / z> < / z> < / z> < / z>
Claims
1. A quantum error mitigation learning method based on a graph neural network, characterized in that: The method includes the following steps: (1) Collect real quantum circuits; (2) Map the real quantum circuit to a directed graph; construct the node feature matrix; construct the edge feature set to characterize the error rate and coupling information of the two-bit gate; (3) Extract global statistical feature vectors; (4) Input the directed graph into the graph neural network model and pass messages to obtain the graph structure embedding vector; (5) The graph structure embedding vector and the global statistical vector are fused to obtain the joint representation vector; (6) Adaptive prediction based on joint representation vector, mapping the unified embedding to prediction quantities in different semantic spaces; (7) Quantum circuit observations after error mitigation.
2. The quantum error mitigation learning method based on graph neural networks according to claim 1, characterized in that: The step (2) in the quantum circuit is mapped as a directed graph with attributes where a set of nodes correspond to physical qubits, and a set of edges describe the two-qubit gate and coupling topological relations; a node feature matrix encodes local measurement quantities and hardware calibration parameters, and an edge feature characterizes two-qubit gate errors and coupling strengths.
3. The quantum error mitigation learning method based on graph neural networks according to claim 2, characterized in that: In step (2), the local measurement quantities and hardware calibration parameters include: single-bit observable, relaxation time, and readout error rate.
4. The quantum error mitigation learning method based on graph neural networks according to claim 3, characterized in that: In step (3), a global statistical vector is introduced. It is used to aggregate the measurement distribution and complexity characteristics of the entire line, thereby preserving the semantics of macroscopic noise at the graph level.
5. The quantum error mitigation learning method based on graph neural networks according to claim 4, characterized in that: In step (3), the measurement distribution and complexity characteristics include: measurement mean, measurement variance, extreme values or dispersion index, and gate number statistics.
6. The quantum error mitigation learning method based on graph neural networks according to claim 5, characterized in that: In step (4), the graph neural network model performs multi-layer message passing through the graph neural network to learn the nonlinear mapping relationship between noise and line structure. Let the first... Layer nodes are represented as Its update format is as follows: , in For the node's neighborhood, Representing edge features, For learnable edge condition mapping functions, The activation is nonlinear; after multi-layer propagation, the structure embedding is obtained through graph-level pooling operators. .
7. The quantum error mitigation learning method based on graph neural networks according to claim 6, characterized in that: In step (5), the global statistical vector Integration to form a joint representation At the same time, local noise context and overall circuit complexity information are preserved.
8. The quantum error mitigation learning method based on graph neural networks according to claim 7, characterized in that: In step (6), the graph neural network model uses a task-adaptive output head to map the unified embedding into predictions in different semantic spaces. in These can be scalar or distributed parameter vectors, thus supporting different types of error mitigation objectives. Dimensions As the task objective changes: When the objective is classic fidelity correction, Corresponding scalar logarithmic ratio prediction; when the objective is to mitigate observable errors. , representing the mean and uncertainty parameters.
9. The quantum error mitigation learning method based on graph neural networks according to claim 8, characterized in that: In step (7), the noisy observations are reweighted or regressed based on the prediction results to obtain an estimated value close to the ideal physical quantity, and the final quantum circuit result after error mitigation is output.
10. A quantum error mitigation learning device based on graph neural networks, characterized in that: The device includes: A collection module, configured to collect real quantum circuits; The module is configured to map real quantum circuits into directed graphs; a node feature matrix is constructed; and an edge feature set is constructed to characterize the two-qubit gate error rate and coupling information. The extraction module is configured to extract global statistical feature vectors. The encoding module is configured to perform message passing on the directed graph input graph neural network model to obtain graph structure embedding vectors. The fusion module is configured to fuse the graph structure embedding vector with the global statistical vector to obtain a joint representation vector; The prediction module is configured to perform adaptive prediction based on the joint representation vector, mapping the unified embedding to predictions in different semantic spaces. The output module is configured to output the quantum circuit observations after error mitigation.