Edge network-based high-density line image detection method and application
By using a high-density line image detection method based on edge networks, the problems of time-consuming and labor-intensive master plate production and insufficient detection accuracy in COF line detection are solved, achieving fast and accurate defect detection while reducing costs and hardware complexity.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- KGK PRECISION ELECTRONICS TECH DEV (SUZHOU) CO LTD
- Filing Date
- 2026-06-05
- Publication Date
- 2026-07-31
AI Technical Summary
Existing COF circuit inspection methods are time-consuming and labor-intensive during master plate production. Pixel-based methods are costly and require significant computing power, cannot accurately detect defects smaller than or close to pixel size, and lack robustness to mechanical disturbances, leading to missed detections, over-detections, or misclassifications.
A high-density circuit image detection method based on edge networks is adopted. By acquiring sub-pixel level edge networks, image matching and analysis are performed to simplify the master pattern production process. Virtual probes are used to detect open/short circuits, and sub-pixel level edge networks are combined for defect detection.
It significantly shortens the master template production time, reduces technical requirements, requires less data storage space, improves detection accuracy and mechanical vibration robustness, increases detection speed and efficiency, and reduces missed detections and misclassifications.
Smart Images

Figure CN122492673A_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of optical detection technology, and particularly relates to an image detection method and application of a semiconductor chip based on an edge network. Background Technology
[0002] Semiconductor circuit boards are a core component of modern electronic devices, carrying electronic components and widely used in various fields such as computers, communication equipment, consumer electronics, automotive electronics, and displays.
[0003] The quality of the circuitry on a semiconductor circuit board directly affects the performance, reliability, and lifespan of electronic products. Good circuit quality ensures stable signal transmission, circuit robustness, and interference resistance, while circuit defects can lead to circuit failures, performance degradation, or even damage to other components.
[0004] COF (Chip on Film), a chip miniaturization and coating printed circuit board packaging technology, offers higher integration and smaller package size compared to traditional packaging methods, meeting the requirements of LCDs for thinness and high definition. Therefore, COF technology has gradually become the mainstream packaging method for LCD driver chips. One characteristic of COF packaging is its high line density and small line spacing. This means that more lines can be accommodated in the same package area, thereby improving the integration and performance of the driver chip. However, the increased line density also leads to a higher frequency of defects during the manufacturing process, increasing the difficulty of line inspection. For example, COF lines can contain many types of defects such as open circuits, short circuits, bumps, and defects. Automated optical inspection plays a crucial role in COF line inspection. It is a method that uses mechanical conveyor belts, optical image acquisition, and image processing to perform fully automated line defect detection, enabling rapid and accurate location. Before testing begins, a master template for product testing is usually made based on a gold sample or CAD design drawing. To obtain an accurate master template, the template making process generally includes complex correction settings for line positions, line dimensions, line angles, etc., as well as custom settings for testing standards in different areas. Therefore, a lot of time and technical manpower are required for master template making.
[0005] Currently, template matching detection methods include those based on master images and those based on pixel images. Master image-based methods are overly sensitive to parameters such as the absolute position, size, and angle of the actual circuitry, requiring meticulous manual adjustments to these parameters during master image creation. This consumes significant time and technical resources, contradicting the requirements of automated detection. Pixel image-based methods, on the other hand, demand substantial computing power and memory. Achieving the required detection speed necessitates even greater computational resources, significantly increasing cost and hardware system complexity. Furthermore, this method cannot detect and classify defects smaller than or close to the image pixel size. The difficulty in subdividing detection categories and adjusting detection thresholds leads to missed detections, over-detections, or misclassifications in actual product inspection. Additionally, the algorithm lacks robustness to mechanical disturbances, easily causing over-detection of products.
[0006] Therefore, in order to achieve accurate detection and classification of minute defects, higher requirements are placed on the resolution of automated optical inspection systems and the speed and accuracy of detection algorithms. At the same time, with the continuous development of COF technology and the advancement of the display manufacturing industry, automated optical inspection technology also needs further evolution and improvement to meet the growing demands and challenges. Summary of the Invention
[0007] The purpose of this invention is to provide a high-density line image detection method and its application based on edge networks.
[0008] To achieve the above objectives, the present invention adopts the following technical solution: A high-density electronic circuit image detection method based on edge networks includes the following steps: S1. Acquire image information of the object to be inspected and convert it into a sub-pixel level edge network; S2. Based on the edge network, match and analyze whether the acquired images are qualified.
[0009] Preferably, step S1 includes acquiring and correcting image information of the object to be tested. The image information includes the coordinates of the image, and the image angle tilt and displacement information in the X and Y directions are calculated based on the image information.
[0010] Preferably, the S2 matching analysis includes the following steps: S21. Locate the marked areas in the acquired images and perform information fitting and matching with the CAD master to complete the edge network matching; S22. Perform open / short circuit detection on the above matching network; S23. Perform matching and detection on objects within the edge network after matching; S24. Match and detect the remaining objects in the network with the CAD master.
[0011] Preferably, the marking region in S21 includes a main marking region and a sub-marking region. The marking region refers to the part of the area within a defined region around the target network where there is no similar network. The range of the sub-marking region is smaller than the range of the main marking region.
[0012] Preferably, the matching in S21 is performed by first matching and dividing the main marking area with the CAD master, and then matching and dividing the sub-marking areas, contact parts, other network groups with common morphological features or similar distances, and the remaining non-the above types of network matching and dividing; so as to complete the division of edge network groups.
[0013] Preferably, the open / short circuit detection in S22 is achieved by setting virtual probes to detect whether the edge network connecting two virtual probes is a connected entity. If it is connected, it is a closed / short circuit; if it is not connected, it is an open / closed circuit.
[0014] Preferably, step S23 includes the following steps: S231. First, match the contact objects. If the match is successful, use the matched contact as the initial matching object and start matching other objects in a counterclockwise or clockwise direction. If the match fails in one direction, start matching other objects in the opposite direction from the matched contact. S232. If matching fails in both directions, start matching other objects from the next matching contact in the same network, and repeat the matching steps in direction S231 until all object pairs are matched or all objects are traversed. S233. Detect defects based on object type.
[0015] Preferably, the contact element in S231 includes a pad and a line end. Other objects in S231 include, but are not limited to, straight lines, corners, line ends, shapes, and cranks. The crank is a structure with a connecting segment that connects two vectors that are not on the same straight line end to end. The connecting segment is a straight line, a curve, or a combination of both. The length and width of the connecting segment meet the specified values.
[0016] Preferably, the detection method further includes pinhole and residue defect detection and internal pin circuit defect detection.
[0017] Preferably, the high-density electronic circuit image detection method based on edge networks described above is used for the fabrication and detection of semiconductor chip master templates.
[0018] The present invention has at least the following beneficial effects: 1. This method simplifies the traditional complex manual adjustment operation of master plate making into a one-click system operation. That is, the manual fitting and marking process that traditionally takes about 30 minutes to complete can be shortened to within 1-2 minutes. It eliminates the need for master plate making personnel to have professional product technical knowledge and image processing technology background, greatly simplifying the master plate making steps, shortening the master plate making time, and lowering the technical requirements for master plate making personnel.
[0019] 2. In the process of this invention, the master data is in binary form, which occupies a small amount of storage space, only 1 / 100 of the traditional method of processing master data in pixel image form.
[0020] 3. The detection method of the present invention improves the robustness of image disturbances caused by mechanical vibration, that is, image disturbances within a certain range caused by horizontal vibration of the mechanical conveyor belt will not have a substantial impact on the detection results of the present invention.
[0021] 4. In the method of the present invention, after converting the pixel image into an edge vector, the image data is reduced in dimensionality and structured, which significantly improves the data processing speed and makes the detection more efficient and faster.
[0022] 5. This invention can detect a variety of defect types in the master template and is more accurate in its detection. Attached Figure Description
[0023] To more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings used in the following description of the embodiments will be briefly introduced. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0024] Figure 1 This is a schematic diagram of the detection method of the present invention.
[0025] Figure 2 The flowchart of the edge network matching sequence of this invention is not shown.
[0026] Figure 3 This is a schematic diagram of the structure of other objects of the present invention. Detailed Implementation
[0027] This invention proposes a high-density electronic circuit image detection method based on edge networks and its application. To make the objectives, technical solutions, and advantages of this invention clearer, the following is in conjunction with the appendix. Figures 1-3 The present invention will be further described in detail below with reference to embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
[0028] A high-density electronic circuit image detection method based on edge networks includes the following steps: S1. Acquire image information of the object to be inspected and convert it into a sub-pixel level edge network; further, S1 includes acquiring image information of the object to be inspected and correcting it, the image information including the coordinates of the image, calculating the image angle tilt and displacement information in the X and Y directions through the image information, and finally converting it into a sub-pixel level edge network.
[0029] S2. Based on the edge network, match and analyze whether the acquired images are qualified.
[0030] Specifically, the S2 matching analysis includes the following steps: S21. Locate the marked regions in the acquired image and perform information fitting and matching with the CAD master to complete the edge network matching. In S21, the marked regions include main marked regions and sub-marked regions. The selection criterion for the marked regions is that there are no similar networks within a defined area surrounding the target network. The range of the sub-marked regions is smaller than the range of the main marked regions. Specifically, during matching, the main marked regions are first matched and divided with the CAD master, followed by matching and dividing with the sub-marked regions. Then, further division is performed through contact element matching, matching and dividing other network groups with common morphological features or close proximity, and finally matching and dividing the remaining networks not of the above types, ultimately completing the division of the edge network groups.
[0031] S22. Perform open / short circuit detection on the above matching network; the open / short circuit detection is performed by setting virtual probes to detect whether the edge network connecting two virtual probes is a connected entity. If it is connected, it is a path / short circuit; if it is not connected, it is an open circuit / disconnected circuit.
[0032] S23. Perform matching and detection on objects within the edge network after matching.
[0033] S24. Match and detect the remaining objects in the network with the CAD master.
[0034] S25. After the above tests, the edge network is further tested for pinholes, residues, and internal pin circuit defects. If the internal pin circuit is bent, it is considered a defect.
[0035] When applying the above methods in practice, after completing the above steps, the detected image can be further tested according to the actual application scenario and the requirements and thresholds given, in order to further filter out the parts that do not meet the conditions, thereby achieving accurate detection.
[0036] This invention employs a step of first matching objects and then performing detection. The purpose is that, after matching, detection only needs to consider whether there are differences in the main geometric features of the objects, without considering the x and y directional offsets of the objects' absolute positions. Therefore, it can effectively reduce the impact of detection errors caused by incomplete x and y position fitting in the previous step. Incomplete position fitting can cause over-detection in traditional master matching methods, but this invention avoids such problems.
[0037] Furthermore, step S23 includes the following steps: S231. First, match the contact objects. If the match is successful, use the matched contact as the initial matching object and proceed to match other objects in a counterclockwise or clockwise direction. If the match fails in one direction, start matching other objects in the opposite direction from the matched contact. In S231, the contact objects include pads and wire ends. Other objects include, but are not limited to, straight lines, corners, wire ends, shapes, and cranks. The shapes further include circles, curves, or other complex shapes.
[0038] To improve accuracy, object judgment and pairing will be further combined with vector form, that is, successful object pairing is achieved by matching both type and direction.
[0039] In this invention, the straight line is further defined as a straight line segment at the edge of a conductor, and its physical length exceeds a predetermined threshold. Based on the angle of the straight line, it can be categorized into horizontal, vertical, and diagonal lines. Alternatively, during detection, identification can also be based on the coordinates of the starting and ending points of the three types of line segments, or the slope of the line segment.
[0040] The corner can be a right angle, an obtuse angle, or an acute angle; it refers to the corner point formed by the intersection of two line segments. In detection, the corner is usually the intersection point formed by conductors in different directions.
[0041] The terminus refers to the end of a conductor, specifically the open end of a wire. It is formed by two approximately opposite parallel line segments originating from the two edges of the same conductor. In detection, a difference of approximately 180° between the incoming and outgoing lines can be used for identification. In open-circuit detection, the line end can serve as the endpoint for open-circuit detection. During object pairing, the orientation of the line end is further considered for comprehensive matching. In this invention, when the length of the wire end reaches a certain threshold, the line end will be split into a combination of corners, straight lines, and corners.
[0042] The crank's shape is more akin to a stepped design, featuring a connecting segment that links two vectors that are not on the same straight line. This connecting segment can be a straight line, a curve, or a combination of both, and its length and width conform to defined values. Further references can be made to the structure of the crank. Figure 3As shown, where Figure 3 Three different crank designs are illustrated, where the length and width of the connecting segment between the two vectors both meet the required limits.
[0043] The shape includes circles or curves. A circle refers to a complete closed loop, where the starting and ending points are closed and the angle is 360°. A curve refers to two line segments that have an arc or an angle change. In the inspection, when the object does not conform to any of the shapes of a straight line, corner, line end, or crank, it is usually judged as a shape.
[0044] S232. If matching fails in both directions, start matching other objects from the next matching contact in the same network, and repeat the matching steps in direction S231 until all object pairs are matched or all objects are traversed. S233. Defect detection is performed according to the object type. The defects typically include bumps, defects, open / short circuits, etc. In the semiconductor field, the bumps are typically bumps on the material or wafer surface.
[0045] Defect judgment in object detection is performed in the following manner: When the object to be detected is a straight line, a vertical deviation method is used for detection. For example, for a straight line object where both boundary objects on both sides are paired, first find the first paired non-straight line object on the left and the first paired non-straight line object on the right. The direction of the line segment is determined based on the object's angle. When the angle is 0°, 180°, or 360°, the line segment is considered horizontal. When the angle is 90° or 270°, the line segment is considered vertical; other angles are considered oblique. Then, along the line segment direction, from the paired point range, the collected edge points are projected onto an axis perpendicular to the guide line direction. The lateral deviation value of each point relative to the fitted center line is calculated. If the deviation exceeds a threshold, a protrusion or defect is identified. If an oblique line exists, it is first rotated to the vertical direction before detection. To ensure that no deviation is missed, both forward and directional scanning detection can be performed.
[0046] If an adjacent object is located at the edge of the image capture, the detection of that line is skipped. If the line successfully matches the edge of the image capture, the matching position is used as the detection boundary.
[0047] When inspecting objects such as corners, cranks, line ends, or shapes, the judgment is based on whether the change in angle deviation exceeds a threshold. If it does, it is judged as a protrusion or defect. When inspecting corners, multiple points are selected at both ends of the inspection area to avoid false detections caused by noise.
[0048] When processing cranks, since the crank has two vectors, meaning there are two different directions during processing, it is necessary to select one of the main directions and unify them. Open / short circuit detection further refers to a network segment having a broken circuit, which is identified as an open circuit defect. When an open circuit defect exists in the network, if it is impossible to scan all points on the line segments, the two endpoints can be determined by finding the ends, which are then used as the defect locations. If a metallic connection exists between two points (between two line segments, between two lines, or between line segments and lines), it is identified as a short circuit defect.
[0049] When processing line ends, if rotation preprocessing is required, the error in calculating the curvature of the line end will increase after selection. Therefore, in order to improve the detection accuracy, the angle threshold will be amplified during rotation.
[0050] When performing shape detection, if the shape is the only complete object within the edge network, the angle is calculated using a start-end point fitting method. To improve detection accuracy, detection is typically only performed when the number or length of contour points meets the requirements.
[0051] The high-density electronic circuit image detection method based on edge networks described above is applied to the fabrication and inspection of semiconductor chip master templates. The master templates mentioned above and below refer to CAD master templates with product designs.
[0052] Before inspection, CAD data is extracted and converted into specific structural data with sub-pixel precision, containing geometric information such as edge networks, marker networks, objects, contacts, and virtual probes, and saved as a binary file. This conversion is typically completed within 1-2 minutes, significantly reducing operation time compared to traditional manual fitting of marker points. Furthermore, due to the binary format, the processed file is only 2-30 MB, greatly reducing data space compared to the traditional original image method. The accurate extraction and fitting of this data further reduces process errors, optical curvature and resolution errors, and angular deviations caused by camera angles and sample transport directions. The fitted data is used to correct the marked area, and then, using the bounding rectangle method of the network, it is matched with the CAD master based on position and contour deviations. The network refers to the electrically connected area. The marked area includes a main marker area and sub-marker areas. In this embodiment, the main marker area is selected based on the absence of similar network features within a 2 mm radius of the target network area; typically, 10 points are selected for position registration and alignment. Sub-label region selection criteria: There are no similar network features within 0.5mm of the target network region, and 20 points can be selected for position registration and alignment.
[0053] Based on the marked areas, groups are formed. When similar features exist in the surrounding area, they are grouped together, and matching is performed on a group-by-group basis. Then, matching is performed sequentially from one end. First, matching and grouping are performed using the main marked area and the CAD master, followed by matching and grouping using sub-marked areas. Then, further matching and grouping are performed using contact elements, other network groups with common morphological features or close proximity, and the remaining non-the above types of network matching and grouping ultimately complete the division of the edge network groups.
[0054] Taking semiconductor chips as an example, the process begins with pad matching. Pads are matched sequentially, starting from one end: input pads, upper and lower layers, multi-segment pads, and output pads. At this point, over 90% of the nets will be matched. If the horizontal pixel size correction is incorrect, the matching is considered a failure. For the unmatched individual nets, the information from them is used to further match them with the remaining nets in the CAD master. The remaining unmatched nets are usually due to open / short circuits, pinholes, or residue. These are not matched, and the remaining unmatched nets are detected as defects.
[0055] Furthermore, during matching, if a pad match is successful, object matching begins counter-clockwise from the pad object; if it fails, the process returns to the starting position and starts matching clockwise. If there is no pad, net matching is performed based on corners or line ends. If matching fails in either the clockwise or counter-clockwise direction, the process jumps to the next matching contact type object within the net as the starting point and performs object matching in the clockwise / counter-clockwise direction until all objects within the net have been matched, or until all object matching attempts have been completed using all contact type objects within the net as starting points.
[0056] The remaining objects are matched against the remaining networks, excluding pinholes and remnants, and the networks that overlap with the remaining objects are matched. Since the remaining objects are more likely due to failed object matching, they are not statistically aggregated.
[0057] An open / short circuit check is performed by examining each sample edge network that matches the CAD master reference network. If two or more different sample edge networks are connected to the same CAD master reference network, it is considered an open circuit defect, and the breakpoint is located. (This process is repeated twice in the original text.)
[0058] The subsequent steps involve matching objects within the group and detecting defects based on object type according to step S233. These defects include protrusions, missing parts, etc. The objects include, but are not limited to, straight lines, corners, line ends, shapes, and cranks.
[0059] The detection further includes open / short circuit detection. Open circuit detection is only based on the comparison between adjacent networks. It includes comparisons in three directions: horizontal, vertical and diagonal. If the width of the conductor is less than the distance between two adjacent lines, it is judged as a possible near-open circuit defect. If the distance between adjacent conductors is less than the width of the conductor, it is judged as a possible near-short circuit defect.
[0060] Micro-short circuit detection involves finding a convex defect on a network, then searching for convex parts on adjacent networks that form A and B. It is determined whether the distance between A and B is less than a defined width, and whether the difference in the Y direction between the two line segments is less than a defined pixel value. If it is less than a defined value, then it is a micro-short circuit.
[0061] After completing the above checks, further screening of pinhole defects is performed: The remaining portions from the pinhole and residue judgment are filtered out from the edge network. This edge network refers to portions that attempted to match but failed to match the CAD master during the initial matching; these edge networks will then be considered candidate portions. In this screening, if a candidate meets a certain length requirement, it is determined to be a pinhole defect candidate. If the pinhole defect size is too large, it may have been missed in the first check; further inspection can be performed at this point.
[0062] After the initial inspection, the internal pin circuitry is inspected. The Y-coordinate value of the internal pin circuitry is the same on both the top and bottom sides, similar to a wire end. This area is the internal pin circuitry region, and the main function is to check for missing pins.
[0063] Finally, secondary checks can be performed on bumps or missing parts as needed. The image is cropped and refined for further analysis; if a defect is falsely identified, it is marked as such and filtered based on its size. This completes the inspection of the entire sample.
[0064] This invention also discloses a detection system for implementing the above detection method. The detection system includes an electrically connected image acquisition mechanism, an image conversion module, a network grouping module, and a network analysis module. The image acquisition mechanism is used to acquire images of the workpiece to be inspected; the image conversion module is used to convert the acquired images into sub-pixel-level edge networks; the network grouping module is used to match and group the edge networks with the CAD master template; and the network analysis module is used to perform internal object detection analysis on the grouped networks.
[0065] The foregoing has shown and described the basic principles, main features, and advantages of the present invention. Those skilled in the art should understand that the present invention is not limited to the above embodiments. The embodiments and descriptions in the specification are merely principles of the invention. Various changes and modifications can be made to the invention without departing from its spirit and scope, and all such changes and modifications fall within the scope of the claimed invention. The scope of protection claimed by the appended claims and their equivalents is defined.
Claims
1. A high-density electronic circuit image detection method based on edge networks, characterized in that, Includes the following steps: S1. Acquire image information of the object to be inspected and convert it into a sub-pixel level edge network; S2. Based on the edge network, match and analyze whether the acquired images are qualified.
2. The high-density electronic circuit image detection method based on edge networks as described in claim 1, characterized in that: S1 includes acquiring and correcting image information of the object to be inspected. The image information includes the coordinates of the image, and the image angle tilt and displacement information in the X and Y directions are calculated based on the image information.
3. The high-density electronic circuit image detection method based on edge networks as described in claim 2, characterized in that: The S2 matching analysis includes the following steps: S21. Locate the marked areas in the acquired images and perform information fitting and matching with the CAD master to complete the edge network matching; S22. Perform open / short circuit detection on the above matching network; S23. Perform matching and detection on objects within the edge network after matching; S24. Match and detect the remaining objects in the network with the CAD master.
4. The high-density electronic circuit image detection method based on edge networks as described in claim 3, characterized in that: The marking region in S21 includes a main marking region and a sub-marking region. The marking region refers to the part of the area around the target network where there is no similar network. The range of the sub-marking region is smaller than the range of the main marking region.
5. The high-density electronic circuit image detection method based on edge networks as described in claim 4, characterized in that: The matching in S21 is as follows: first, the main marking area is matched and divided with the CAD master, and then the sub-marking areas are matched and divided separately, contact parts are matched and divided, other network groups with common morphological features or similar distances are matched and divided, and the remaining networks that are not of the above types are matched and divided. This completes the division of edge network groups.
6. The high-density electronic circuit image detection method based on edge networks as described in claim 5, characterized in that: In S22, the open / short circuit detection is performed by setting up virtual probes to detect whether the edge network connecting two virtual probes is a connected entity. If it is connected, it is a closed / short circuit; if it is not connected, it is an open / closed circuit.
7. The high-density electronic circuit image detection method based on edge networks as described in claim 6, characterized in that: S23 includes the following steps: S231. First, match the contact objects. If the match is successful, use the matched contact as the initial matching object and start matching other objects in a counterclockwise or clockwise direction. If the match fails in one direction, start matching other objects in the opposite direction from the matched contact. S232. If matching fails in both directions, start matching other objects from the next matching contact in the same network, and repeat the matching steps in direction S231 until all object pairs are matched or all objects are traversed. S233. Detect defects based on object type.
8. The high-density electronic circuit image detection method based on edge networks as described in claim 7, characterized in that: The contact element in S231 includes a pad and a wire end; other objects in S231 include, but are not limited to, straight lines, corners, wire ends, cranks, and shapes. The crank is a structure with a connecting segment that connects two vectors that are not on the same straight line end to end. The connecting segment is a straight line, a curve, or a combination of both. The length and width of the connecting segment meet the specified values.
9. The high-density electronic circuit image detection method based on edge networks as described in claim 8, characterized in that: The detection method further includes pinhole and residue defect detection and internal pin circuit defect detection.
10. The high-density electronic circuit image detection method based on edge networks described in any one of the preceding claims is used to fabricate and inspect the master template of a semiconductor chip.