Display driving circuit, display driving method, and display panel

Abstract

This application belongs to the field of display technology, specifically relating to a display driving circuit, a display driving method, and a display panel. The display driving circuit includes a first transistor, a data writing unit, a light-emitting control unit, a storage unit, an initialization unit, and a reset unit. The first terminal of the first transistor is sequentially connected to a first power supply through a second node and the light-emitting control unit. The second terminal of the first transistor is sequentially connected to a second power supply through a third node, the light-emitting control unit, and a display light-emitting unit. The storage unit is connected to the first power supply, the first node, and the second node. The initialization unit is used to write a reference voltage line signal to the first node in response to a second scan line signal. The reset unit is used to connect and conduct the third node and the reset signal line in response to a third scan line signal. When compensating for the threshold voltage, the display driving circuit does not require data voltage participation, and the compensation time is not limited by the scan time, thus avoiding insufficient compensation of the threshold voltage and improving the problem of display unevenness.

Description

Technical Field

[0001] This application belongs to the field of display technology, and specifically relates to a display driving circuit, a display driving method, and a display panel. Background Technology

[0002] OLED (Organic Light Emitting Diode) display panels have many advantages such as self-illumination, flexibility, thinness, high brightness, low power consumption, fast response, and wide color gamut, and are widely used in electronic products such as televisions, mobile phones, and laptops.

[0003] Organic light-emitting diodes (OLEDs) are driven by current. The display driving circuit includes driving transistors, and the degree to which these transistors are turned on determines the current flowing into the OLED, which in turn determines its brightness. Because different driving transistors have different threshold voltages (Vth), the display driving circuit needs to compensate for these threshold voltage differences to eliminate display unevenness.

[0004] Currently, display driver circuits all utilize data signals to compensate for threshold voltage. However, the refresh rates of OLED display panels are becoming increasingly higher, and the scan time for each frame is becoming shorter. Using data signals to compensate for threshold voltage is limited by the scan time, resulting in insufficient compensation of the threshold voltage and consequently, uneven display on the panel. Summary of the Invention

[0005] The purpose of this application is to provide a display driving circuit, a display driving method, and a display panel to improve the problem of uneven display on the display panel.

[0006] To achieve the above objectives, this application provides a display driving circuit, including a first transistor, the display driving circuit comprising:

[0007] A data writing unit is connected to the control terminal of the first transistor via a first node. The data writing unit is used to write a data line signal into the first node in response to a first scan line signal. The first terminal of the first transistor is connected to the first power supply in sequence through the second node and the light-emitting control unit, and the second terminal of the first transistor is connected to the second power supply in sequence through the third node, the light-emitting control unit, and the display light-emitting unit. The storage unit is connected to the first power supply, the first node, and the second node shown. An initialization unit, connected to the first node, is used to write a reference voltage line signal into the first node in response to a second scan line signal; A reset unit is connected to the third node. The reset unit is used to connect and conduct the third node and the reset signal line in response to the third scan line signal, and to write the voltage of the reset signal line into the third node or release the charge of the second node through the first transistor.

[0008] Optionally, the storage unit includes a first capacitor and a second capacitor, wherein the first capacitor is connected to the first power supply and the second node, and the second capacitor is connected to the first node and the second node; The data writing unit includes a second transistor, the control terminal of the second transistor is connected to the first scan line, the first terminal of the second transistor is connected to the data line, and the second terminal of the second transistor is connected to the first node. The light-emitting control unit includes a third transistor and a fourth transistor. The control terminal of the third transistor is connected to the first light-emitting control line, the first terminal of the third transistor is connected to the first power supply, and the second terminal of the third transistor is connected to the second node. The control terminal of the fourth transistor is connected to the second light-emitting control line, the first terminal of the fourth transistor is connected to the third node, and the second terminal of the fourth transistor is connected to the display light-emitting unit.

[0009] Optionally, the initialization unit includes a fifth transistor, the control terminal of which is connected to the second scan line, the first terminal of which is connected to the reference voltage line, and the second terminal of which is connected to the first node; The reset unit includes a sixth transistor, the control terminal of which is connected to the third scan line, the first terminal of which is connected to the reset signal line, and the second terminal of which is connected to the third node.

[0010] Optionally, the display driving circuit further includes a mobility compensation unit, which is connected to the first node and the third node, and is used to turn on the first node and the third node in response to the fourth scan line signal.

[0011] Optionally, the display driving circuit further includes a hysteresis compensation unit connected to the third node. The hysteresis compensation unit is used to write a bias signal line signal into the third node in response to the fifth scan line signal, so that the first transistor is reverse-biased.

[0012] Optionally, the mobility compensation unit includes a seventh transistor, the control terminal of the seventh transistor is connected to the fourth scan line, the first terminal of the seventh transistor is connected to the third node, and the second terminal of the seventh transistor is connected to the first node; The hysteresis compensation unit includes an eighth transistor, the control terminal of which is connected to the fifth scan line, the first terminal of which is connected to the bias signal line, and the second terminal of which is connected to the third node.

[0013] This application also provides a display driving method for controlling the display driving circuit, the display driving method comprising: During the reset phase, the light-emitting control unit is controlled to turn on the third node and the display light-emitting unit, and at the same time, the reset unit is controlled to write the reset signal line signal into the third node; During the initialization phase, the light-emitting control unit is controlled to turn on the first power supply and the second node, and at the same time, the initialization unit is controlled to write the reference voltage line signal into the first node; During the threshold voltage compensation phase, the light-emitting control unit is controlled to disconnect the connection between the first power supply and the second node, and at the same time, the reset unit is controlled to turn on the third node and the reset signal line, releasing the charge of the second node until the first transistor is turned off. During the data writing phase, the data writing unit is controlled to write the data line signal to the first node; During the light-emitting phase, the light-emitting control unit controls the first power supply and the display light-emitting unit to turn on.

[0014] Optionally, the display driving circuit further includes a mobility compensation unit, which is connected to the first node and the third node, and the display driving method includes: In the migration rate compensation phase following the data writing phase, the migration rate compensation unit is controlled to connect the first node and the third node.

[0015] Optionally, the display driving circuit further includes a hysteresis compensation unit, which is connected to the third node and the bias signal line. The display driving method includes: In the hysteresis compensation stage following the mobility compensation stage, the hysteresis compensation unit is controlled to write the bias signal line signal into the third node, causing the first transistor to conduct in reverse.

[0016] This application also provides a display panel, including: Multiple display light-emitting units; The display driving circuit is connected to each of the display light-emitting units in a one-to-one correspondence.

[0017] The display driving circuit, display driving method, and display panel disclosed in this application have the following beneficial effects: In this application, the display driving circuit includes a first transistor, a data writing unit, a light-emitting control unit, a storage unit, an initialization unit, and a reset unit. The data writing unit is used to write data line signals to a first node in response to a first scan line signal. The first terminal of the first transistor is connected to a first power supply sequentially through a second node and a light-emitting control unit. The second terminal of the first transistor is connected to a second power supply sequentially through a third node, a light-emitting control unit, and a display light-emitting unit. The storage unit is connected to the first power supply, the first node, and the second node. The initialization unit is used to write a reference voltage line signal to the first node in response to a second scan line signal. The reset unit is used to connect and turn on the third node and the reset signal line in response to a third scan line signal. When compensating for the threshold voltage, the display driving circuit does not require the participation of data voltage, and the compensation time is not limited by the scan time, which can avoid insufficient compensation of the threshold voltage and improve the problem of uneven display on the display panel.

[0018] Other features and advantages of this application will become apparent from the following detailed description, or may be learned in part from practice of this application.

[0019] It should be understood that the above general description and the following detailed description are exemplary and explanatory only, and are not intended to limit this disclosure. Attached Figure Description

[0020] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this application and, together with the description, serve to explain the principles of this application. It is obvious that the drawings described below are merely some embodiments of this application, and those skilled in the art can obtain other drawings based on these drawings without any inventive effort.

[0021] Figure 1 This is a schematic diagram of the display driving circuit in Embodiment 1 of this application.

[0022] Figure 2 This is a timing diagram of the display driving circuit in Embodiment 1 of this application.

[0023] Figure 3 This is a schematic diagram of the display driving circuit in the reset phase in Embodiment 1 of this application.

[0024] Figure 4 This is a schematic diagram of the display driving circuit in the initialization stage of Embodiment 1 of this application.

[0025] Figure 5 This is a schematic diagram of the display driving circuit in the threshold voltage compensation stage in Embodiment 1 of this application.

[0026] Figure 6 This is a schematic diagram of the display driving circuit in the data writing stage of Embodiment 1 of this application.

[0027] Figure 7 This is a schematic diagram of the display driving circuit in the mobility compensation stage in Embodiment 1 of this application.

[0028] Figure 8 This is a schematic diagram of the display driving circuit in the hysteresis compensation stage in Embodiment 1 of this application.

[0029] Figure 9 This is a schematic diagram of the display driving circuit in the light-emitting stage in Embodiment 1 of this application.

[0030] Figure 10 This is a flowchart illustrating the display driving method in Embodiment 2 of this application.

[0031] Figure 11 This is a schematic diagram of the display panel structure in Embodiment 3 of this application.

[0032] Explanation of reference numerals in the attached figures: 100. Display driver circuit; 110. First transistor; 120. Data writing unit; 121. Second transistor; 130. Light-emitting control unit; 131. Third transistor; 132. Fourth transistor; 140. Storage unit; 141. First capacitor; 142. Second capacitor; 150. Initialization unit; 151. Fifth transistor; 160. Reset unit; 161. Sixth transistor; 170. Mobility compensation unit; 171. Seventh transistor; 180. Hysteresis compensation unit; 181. Eighth transistor; 200. Display light-emitting unit. Detailed Implementation

[0033] Exemplary embodiments will now be described more fully with reference to the accompanying drawings. However, these exemplary embodiments can be implemented in many forms and should not be construed as limited to the examples set forth herein; rather, these embodiments are provided to make this application more comprehensive and complete, and to fully convey the concept of the exemplary embodiments to those skilled in the art.

[0034] Furthermore, the described features, structures, or characteristics can be combined in any suitable manner in one or more embodiments. Numerous specific details are provided in the following description to give a thorough understanding of embodiments of this application. However, those skilled in the art will recognize that the technical solutions of this application can be practiced without one or more of the specific details, or other methods, components, apparatuses, steps, etc., can be employed. In other instances, well-known methods, apparatuses, implementations, or operations are not shown or described in detail to avoid obscuring various aspects of this application.

[0035] The present application will now be described in further detail with reference to the accompanying drawings and specific embodiments. It should be noted that the technical features involved in the various embodiments described below can be combined with each other as long as they do not conflict with each other. The embodiments described below with reference to the accompanying drawings are exemplary and intended to explain the present application, and should not be construed as limiting the present application.

[0036] Example 1 See Figure 1 As shown, in this embodiment, the display driving circuit 100 includes a first transistor 110, a data writing unit 120, a light-emitting control unit 130, a storage unit 140, an initialization unit 150, and a reset unit 160. The first transistor 110 is a driving transistor, and the first transistor 110 includes a P-type field-effect transistor.

[0037] The data writing unit 120 is connected to the control terminal of the first transistor 110 via the first node A. The data writing unit 120 writes the data line signal (i.e., the data voltage Vdata) to the first node A in response to the first scan line signal (i.e., the first scan signal G1). The first terminal of the first transistor 110 is connected to the first power supply sequentially via the second node B and the light-emitting control unit 130. The second terminal of the first transistor 110 is connected to the second power supply sequentially via the third node C, the light-emitting control unit 130, and the display light-emitting unit 200. The voltage Vdd of the first power supply is greater than the voltage Vss of the second power supply. The display light-emitting unit 200 includes an organic light-emitting diode (OLED).

[0038] Storage unit 140 is connected to the first power supply, first node A, and second node B, and is used to store charge. Initialization unit 150 is connected to first node A and is used to write a reference voltage line signal (i.e., reference voltage Vref) to first node A in response to a second scan line signal (i.e., second scan signal G2). Reset unit 160 is connected to third node C and is used to connect and conduct third node C and a reset signal line in response to a third scan line signal (i.e., third scan signal G3), where the reset signal line voltage is Vini. Reset unit 160 is used to write the reset signal line voltage to third node C or release charge at second node B through first transistor 110.

[0039] See Figures 2 to 5 As shown, when the display driver circuit 100 is working: During the reset phase T1, the light-emitting control unit 130 turns on the third node C and the display light-emitting unit 200. At the same time, the reset unit 160 responds to the third scan signal G3 and connects the third node C and the reset signal line. The reset signal line voltage Vini is written to the third node C.

[0040] The first transistor 110 can remain on or off at the end of the previous frame display. Taking the first transistor 110 remaining on at the end of the previous frame display as an example, since the light-emitting control unit 130 disconnects the connection between the first power supply and the second node B, no current flows through the first transistor 110. The anode of the display light-emitting unit 200 is connected to the third node C, and the cathode of the display light-emitting unit 200 is connected to the second power supply. The light-emitting control unit 130 turns on the third node C and the display light-emitting unit 200, and sets Vini-Vss to be less than the threshold voltage for the display light-emitting unit 200 to emit light, so the display light-emitting unit 200 does not emit light. The reset signal line voltage Vini can be less than the second power supply voltage Vss, causing the display light-emitting unit 200 to be reverse biased.

[0041] During the initialization phase T2, the light-emitting control unit 130 turns on the first power supply and the second node B, while the initialization unit 150 responds to the second scan signal G2 and writes the reference voltage Vref into the first node A.

[0042] The light-emitting control unit 130 turns on the first power supply and the second node B, charging the second node B. The voltage Vb of the second node B is equal to the voltage Vdd of the first power supply. The first transistor 110 remains in the on state of the previous stage, but the light-emitting control unit 130 disconnects the connection between the third node C and the display light-emitting unit 200, so the display light-emitting unit 200 does not emit light. The initialization unit 150 responds to the second scan signal G2 by writing the reference voltage Vref into the first node A, and the voltage Va of the first node A is equal to the reference voltage Vref.

[0043] During the threshold voltage compensation stage T3, the light-emitting control unit 130 disconnects the connection between the first power supply and the second node B. At the same time, the reset unit 160 responds to the third scan signal G3 by connecting and conducting the third node C and the reset signal line, releasing the charge of the second node B until the first transistor 110 is turned off.

[0044] At the start of the threshold voltage compensation stage T3, for the first transistor 110, the gate-source voltage difference Vgs = Vg - Vs = Va - Vb = Vref - Vdd. A reference voltage Vref is set so that Vref - Vdd is less than the threshold voltage Vth of the first transistor 110. The first transistor 110 is then turned on, and the charge at the second node B discharges through the first transistor 110, the third node C, and the reset unit 160 to the reset signal line until the first transistor 110 is turned off. When the first transistor 110 is turned off, Vgs = Vg - Vs = Va - Vb = Vth, and the voltage at the second node B, Vb, is Vref - Vth. During the threshold voltage compensation stage, the threshold voltage of the driving transistor is compensated, which can eliminate the display unevenness caused by the threshold voltage difference. At the same time, the threshold voltage compensation does not require the participation of data voltage, allowing the compensation of multiple rows of sub-pixels to be performed simultaneously. The compensation time is not limited by the scan time, which can avoid insufficient compensation of the threshold voltage.

[0045] In some technical solutions, the display driving circuit 100 uses data signals to compensate for the threshold voltage. However, as the refresh rate of OLED display panels increases, the scanning time for each frame becomes shorter. Using data signals to compensate for the threshold voltage is limited by the scanning time, resulting in insufficient compensation of the threshold voltage and consequently, uneven display on the display panel.

[0046] In this embodiment, the display driving circuit 100 includes a first transistor 110, a data writing unit 120, a light-emitting control unit 130, a storage unit 140, an initialization unit 150, and a reset unit 160. The data writing unit 120 is used to write a data line signal to a first node A in response to a first scan line signal. The first terminal of the first transistor 110 is connected to a first power supply in sequence through a second node B and the light-emitting control unit 130. The second terminal of the first transistor 110 is connected to a second power supply in sequence through a third node C, the light-emitting control unit 130, and the display light-emitting unit 200. The storage unit 140 is connected to the first power supply, the first node A, and the second node B. The initialization unit 150 is used to write a reference voltage line signal to the first node A in response to a second scan line signal. The reset unit 160 is used to connect and conduct the third node C and the reset signal line in response to a third scan line signal. When compensating for the threshold voltage, the display driving circuit 100 does not require the participation of the data voltage, and the compensation time is not limited by the scan time, which can avoid the threshold voltage not being fully compensated and improve the problem of uneven display on the display panel.

[0047] In some embodiments, the storage unit 140 includes a first capacitor 141 and a second capacitor 142, the first capacitor 141 being connected to a first power supply and a second node B, and the second capacitor 142 being connected to a first node A and a second node B.

[0048] The data writing unit 120 includes a second transistor 121. The control terminal of the second transistor 121 is connected to the first scan line, the first terminal of the second transistor 121 is connected to the data line, and the second terminal of the second transistor 121 is connected to the first node A. The second transistor 121 includes an N-type field-effect transistor.

[0049] The light-emitting control unit 130 includes a third transistor 131 and a fourth transistor 132. The control terminal of the third transistor 131 is connected to a first light-emitting control line, the signal of which is a first light-emitting control signal EM1. The first terminal of the third transistor 131 is connected to a first power supply, and the second terminal is connected to a second node. The control terminal of the fourth transistor 132 is connected to a second light-emitting control line, the signal of which is a second light-emitting control signal EM2. The first terminal of the fourth transistor 132 is connected to a third node C, and the second terminal is connected to the anode of the display light-emitting unit 200. Both the third transistor 131 and the fourth transistor 132 are P-type field-effect transistors.

[0050] The data writing unit 120 functions using a single transistor, simplifying the structure of the display driving circuit 100. The light-emitting control unit 130 functions using two transistors, which respectively control the connection between the two ends of the driving transistor and the power supply.

[0051] In some embodiments, the initialization unit 150 includes a fifth transistor 151. The control terminal of the fifth transistor 151 is connected to the second scan line, the first terminal of the fifth transistor 151 is connected to the reference voltage line, and the second terminal of the fifth transistor 151 is connected to the first node A. The fifth transistor 151 includes an N-type field-effect transistor.

[0052] The reset unit 160 includes a sixth transistor 161. The control terminal of the sixth transistor 161 is connected to the third scan line, the first terminal of the sixth transistor 161 is connected to the reset signal line, and the second terminal of the sixth transistor 161 is connected to the third node C. The sixth transistor 161 includes a P-type field-effect transistor.

[0053] The functions of the initialization unit 150 and the reset unit 160 are each implemented by a transistor, which simplifies the structure of the display driver circuit 100.

[0054] In some embodiments, the display driving circuit 100 further includes a mobility compensation unit 170, which is connected to the first node A and the third node C. The mobility compensation unit 170 is used to turn on the first node A and the third node C in response to the fourth scan line signal (i.e., the fourth scan signal G4).

[0055] See Figures 2 to 7 As shown, when the display driver circuit 100 is working: During the data writing phase T4, the data writing unit 120 responds to the first scan signal G1 and writes the data voltage Vdata into the first node A.

[0056] The voltage at node A changes from Vref to Vdata. Due to capacitive coupling, the voltage at node B changes synchronously, and the voltage Vb at node B is: Vb=Vref-Vth+(Vdata-Vref)×(C1 / (C1+C2)); Wherein, C1 is the capacitance of the first capacitor 141, and C2 is the capacitance of the second capacitor 142.

[0057] For the first transistor 110, it maintains the state of the previous stage at the start of the data writing phase T4. As the voltages of the first node A and the second node B change, the gate-source voltage difference Vgs of the first transistor 110 gradually decreases until it is less than the threshold voltage Vth. At this point, the first transistor 110 turns on again. At the end of this phase, the gate-source voltage difference Vgs of the first transistor 110 is: Vgs=Vdata-(Vref-Vth+(Vdata-Vref)×(C1 / (C1+C2))); Vgs=(Vdata-Vref)×(C2 / (C1+C2))+Vth.

[0058] During the mobility compensation phase T5, the mobility compensation unit 170 responds to the fourth scan signal G4 to turn on the first node A and the third node C.

[0059] For the first transistor 110, it maintains the state of the previous stage at the start of the mobility compensation stage T5. The charge at node B will charge node A through the first transistor 110 and the mobility compensation unit 170. The time t during which the mobility compensation unit 170 is turned on in the mobility compensation stage T5 determines the change in charge at nodes A and B. This change is equal to the current I0 flowing through the first transistor 110 multiplied by time t, i.e., I×t. Simultaneously, the potential rise at node A is ΔVa = I0×t / C2. This is based on the formula for calculating the current flowing through the first transistor 110. I0 = μ × k × (Vgs - Vth) 2 ; I0=μ×k×(Vdata-(Vref-Vth+(Vdata-Vref)×(C1 / (C1+C2)))-Vth) 2 ; I0=μ×k×((Vdata-Vref)×(C2 / (C1+C2))) 2 ; Where μ is the mobility, k = 1 / 2 × W / L, W is the channel width of the first transistor 110, and L is the channel length of the first transistor 110.

[0060] The second node B is located between the two capacitors. The charge of the first capacitor 141 remains unchanged, and the voltage Vb of the second node remains unchanged. Therefore, the voltage Va of the first node A is: Va = Vdata + ΔVa. At the same time, the greater the mobility, the larger ΔVa is, and the greater the increase in the voltage Va of the first node A.

[0061] Setting up a migration rate compensation unit 170 to compensate for the migration rate can further improve display uniformity.

[0062] In some embodiments, the display driving circuit 100 further includes a hysteresis compensation unit 180, which is connected to the third node C. The hysteresis compensation unit 180 is used to write the bias signal line signal (i.e., bias voltage Vbias) into the third node in response to the fifth scan line signal (i.e., the fifth scan signal G5), so that the first transistor 110 is reverse-biased.

[0063] See Figures 2 to 8 As shown, when the display driver circuit 100 is working: During the hysteresis compensation stage T6, the hysteresis compensation unit 180 responds to the fifth scan signal G5 by writing the bias voltage Vbias into the third node C, causing the first transistor 110 to conduct in reverse.

[0064] For the first transistor 110, it maintains the state of the previous stage during the mobility compensation phase T5. The hysteresis compensation unit 180 is turned on for a very short time (10μs~100μs) to set the bias voltage Vbias, causing the first transistor 110 to conduct in reverse, thereby canceling the original bias state of the first transistor 110. The bias state of the first transistor 110 is then reset. Since this process is very short, the charge change at the second node B can be ignored.

[0065] The hysteresis compensation unit 180 can improve the flickering caused by the hysteresis effect of the driving transistor.

[0066] In some embodiments, the mobility compensation unit 170 includes a seventh transistor 171. The control terminal of the seventh transistor 171 is connected to the fourth scan line, the first terminal of the seventh transistor 171 is connected to the third node C, and the second terminal of the seventh transistor 171 is connected to the first node A. The seventh transistor 171 includes an N-type field-effect transistor.

[0067] The hysteresis compensation unit 180 includes an eighth transistor 181. The control terminal of the eighth transistor 181 is connected to the fifth scan line, the first terminal of the eighth transistor 181 is connected to the bias signal line, and the second terminal of the eighth transistor 181 is connected to the third node C. The eighth transistor 181 includes a P-type field-effect transistor.

[0068] It should be noted that the third transistor 131, the fourth transistor 132, the sixth transistor 161, and the eighth transistor 181 can be P-type field-effect transistors, but are not limited to this. One or more of the third transistor 131, the fourth transistor 132, the sixth transistor 161, and the eighth transistor 181 can also be N-type field-effect transistors, depending on the specific circumstances. The second transistor 121, the fifth transistor 151, and the seventh transistor 171 can be N-type field-effect transistors, but are not limited to this. One or more of the second transistor 121, the fifth transistor 151, and the seventh transistor 171 can also be P-type field-effect transistors, depending on the specific circumstances.

[0069] The first transistor 110, the third transistor 131, the fourth transistor 132, the sixth transistor 161, and the eighth transistor 181 can be metal-oxide transistors (MOS transistors), which have low leakage current. The second transistor 121, the fifth transistor 151, and the seventh transistor 171 can be low-temperature polysilicon (LTPS) transistors, which have high mobility and stronger driving capability.

[0070] The functions of the mobility compensation unit 170 and the hysteresis compensation unit 180 are each implemented by a transistor, which simplifies the structure of the display driver circuit 100.

[0071] In summary, see Figures 2 to 9 As shown, when the display driver circuit 100 is working: During the reset phase T1, the first scan signal G1, the second scan signal G2, the third scan signal G3, the fourth scan signal G4, and the second light-emitting control signal EM2 are at low levels, while the fifth scan signal G5 and the first light-emitting control signal EM1 are at high levels. This causes the second transistor 121, the third transistor 131, the eighth transistor 181, the seventh transistor 171, and the fifth transistor 151 to turn off, while the fourth transistor 132 and the sixth transistor 161 to turn on. The third node C and the display light-emitting unit 200 are connected, and the third node C and the reset signal line are also connected. The reset signal line voltage Vini is written to the third node C.

[0072] During the initialization phase T2, the first scan signal G1, the fourth scan signal G4, and the first light emission control signal EM1 are at low level, while the second scan signal G2, the third scan signal G3, the fifth scan signal G5, and the second light emission control signal EM2 are at high level. The second transistor 121 is turned off, the eighth transistor 181, the fourth transistor 132, and the seventh transistor 171 are turned off, and the third transistor 131 and the fifth transistor 151 are turned on. The first power supply and the second node B are connected, and the reference voltage line and the first node A are connected. The reference voltage Vref is written to the first node A.

[0073] During the threshold voltage compensation stage T3, the first scan signal G1, the third scan signal G3, and the fourth scan signal G4 are at low levels, while the second scan signal G2, the fifth scan signal G5, the first light emission control signal EM1, and the second light emission control signal EM2 are at high levels. The second transistor 121, the third transistor 131, the eighth transistor 181, the seventh transistor 171, and the fourth transistor 132 are turned off, while the fifth transistor 151 and the sixth transistor 161 are turned on. The connection between the first power supply and the second node B is disconnected, and the connection between the third node C and the reset signal line is made on, releasing the charge of the second node B until the first transistor 110 is turned off.

[0074] During the data writing phase T4, the second scan signal G2 and the fourth scan signal G4 are at low level, while the first scan signal G1, the third scan signal G3, the fifth scan signal G5, the first light emission control signal EM1, and the second light emission control signal EM2 are at high level. The second transistor 121 is turned on, while the third transistor 131, the fourth transistor 132, the fifth transistor 151, the sixth transistor 161, the seventh transistor 171, and the eighth transistor 181 are turned off. The connection between the data line and the first node A is established, and the data voltage Vdata is written to the first node A.

[0075] During the mobility compensation stage T5, the first scan signal G1 and the second scan signal G2 are at low levels, while the third scan signal G3, the fourth scan signal G4, the fifth scan signal G5, the first light emission control signal EM1, and the second light emission control signal EM2 are at high levels. The seventh transistor 171 is turned on, while the second transistor 121, the third transistor 131, the fourth transistor 132, the fifth transistor 151, the sixth transistor 161, and the eighth transistor 181 are turned off. The connection between the first node A and the third node C is established.

[0076] During the hysteresis compensation phase T6, the first scan signal G1, the second scan signal G2, the fourth scan signal G4, and the fifth scan signal G5 are at low levels, while the third scan signal G3, the first light emission control signal EM1, and the second light emission control signal EM2 are at high levels. The eighth transistor 181 is turned on, while the second transistor 121, the third transistor 131, the fourth transistor 132, the fifth transistor 151, the sixth transistor 161, and the seventh transistor 171 are turned off. The bias voltage Vbias is written to the third node C, causing the first transistor 110 to conduct in reverse.

[0077] During the light-emitting stage T7, the first scan signal G1, the second scan signal G2, the fourth scan signal G4, the first light-emitting control signal EM1, and the second light-emitting control signal EM2 are at low levels, while the third scan signal G3 and the fifth scan signal G5 are at high levels. The third transistor 131 and the fourth transistor 132 are turned on, while the second transistor 121, the eighth transistor 181, the seventh transistor 171, the fifth transistor 151, and the sixth transistor 161 are turned off. The first transistor 110 remains in the previously turned-on state, making the second node voltage Vb equal to the first power supply voltage Vdd. Therefore, the first node A voltage Va becomes: Va=Vdata+△Va+(VDD-(Vref-Vth+(Vdata-Vref)×(C1 / (C1+C2)))); A current flows through the display light-emitting unit 200, causing it to emit light. The current I1 flowing through the display light-emitting unit 200 is: I1 = μ × k × (Vgs - Vth) 2 ; I1=μ×k×(Vdata+△Va+(Vdd-(Vref-Vth+(Vdata-Vref)×(C1 / (C1+C2))))-VDD-Vth) 2 ; I1=μ×k×((Vdata-Vref)×(C2 / (C1+C2))+△Va) 2 .

[0078] The part (Vdata-Vref)×(C2 / (C1+C2)) is negative, while ΔVa is positive, so the overall I1 will decrease. Simultaneously, the larger the mobility μ, the larger ΔVa, resulting in a greater decrease in I1, thus balancing the issue of a large I1 caused by a large mobility μ. Furthermore, it can be seen that the final current formula does not contain the threshold voltage Vth or the first supply voltage Vdd, thus eliminating the influence of Vth and the voltage drop of the first supply voltage Vdd.

[0079] Example 2 In this embodiment, the display driving method is used to control the display driving circuit disclosed in Embodiment 1. See also Figures 2 to 10 As shown, the display driving method includes: During the reset phase T1, the control unit 130 turns on the third node C and the display light-emitting unit 200, and at the same time controls the reset unit 160 to write the reset signal line signal to the third node C. During the initialization phase T2, the control unit 130 turns on the first power supply and the second node B, and at the same time controls the initialization unit 150 to write the reference voltage line signal into the first node A. During the threshold voltage compensation stage T3, the control unit 130 disconnects the first power supply and the second node B, and at the same time controls the reset unit 160 to turn on the third node C and the reset signal line, releasing the charge of the second node B until the first transistor 110 is turned off. During the data writing phase T4, the control data writing unit 120 writes the data line signal to the first node A; During the light-emitting stage T7, the light-emitting control unit 130 controls the first power supply and the display light-emitting unit 200 to turn on.

[0080] When the display driving circuit 100 compensates for the threshold voltage, it does not require the participation of the data voltage, and the compensation time is not limited by the scanning time. This avoids the threshold voltage not being fully compensated and improves the problem of uneven display on the display panel.

[0081] In some embodiments, the display driving circuit 100 further includes a mobility compensation unit 170, which is connected to the first node A and the third node C. The display driving method includes: In the migration rate compensation stage T5, following the data writing stage T4, the migration rate compensation unit 170 controls the first node A and the third node C to turn on.

[0082] Setting up a mobility compensation unit 170 to compensate for the mobility in the mobility compensation stage T5 after the data writing stage T4 can further improve display uniformity.

[0083] In some embodiments, the display driving circuit 100 further includes a hysteresis compensation unit 180, which is connected to the third node C and the bias signal line. The display driving method includes: In the hysteresis compensation stage T6 following the mobility compensation stage T5, the control hysteresis compensation unit 180 writes the bias signal line signal into the third node C, causing the first transistor 110 to conduct in reverse.

[0084] In the hysteresis compensation stage T6 after the mobility compensation stage T5, the bias signal line signal is written to the third node C, which reverses the conduction of the first transistor 110, thereby improving the flickering caused by the hysteresis effect of the driving transistor.

[0085] Example 3 See Figure 11 As shown, in this embodiment, the display panel includes multiple arrayed display light-emitting units 200 and multiple display driving circuits 100, with each display driving circuit 100 connected to a corresponding display light-emitting unit 200.

[0086] In this embodiment, the display panel includes a display driving circuit 100, which includes a first transistor 110, a data writing unit 120, a light-emitting control unit 130, a storage unit 140, an initialization unit 150, and a reset unit 160. The data writing unit 120 is used to write a data line signal to a first node A in response to a first scan line signal. The first terminal of the first transistor 110 is connected to a first power supply in sequence through a second node B and the light-emitting control unit 130. The second terminal of the first transistor 110 is connected to a second power supply in sequence through a third node C, the light-emitting control unit 130, and the display light-emitting unit 200. The storage unit 140 is connected to the first power supply, the first node A, and the second node B. The initialization unit 150 is used to write a reference voltage line signal to the first node A in response to a second scan line signal. The reset unit 160 is used to connect and conduct the third node C and the reset signal line in response to a third scan line signal. When compensating for the threshold voltage, the display driving circuit 100 does not require the data voltage to participate, and the compensation time is not limited by the scan time, which can avoid the threshold voltage not being fully compensated and improve the problem of uneven display on the display panel.

[0087] The terms "first," "second," etc., are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined with "first," "second," etc., may explicitly or implicitly include one or more of that feature. In the description of this application, "multiple" means two or more, unless otherwise explicitly specified.

[0088] In this application, unless otherwise expressly specified and limited, the terms "assembly," "connection," etc., should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this application according to the specific circumstances.

[0089] In the description of this specification, references to terms such as "some embodiments," "exemplarily," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of this application. The illustrative expressions of the above terms in this specification do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in a suitable manner in any one or more embodiments or examples. Moreover, without contradiction, those skilled in the art can combine and integrate the different embodiments or examples described in this specification, as well as the features of different embodiments or examples.

[0090] Although embodiments of this application have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting this application. Those skilled in the art can make changes, modifications, substitutions and variations to the above embodiments within the scope of this application. Therefore, any changes or modifications made in accordance with the claims and description of this application should fall within the scope of this patent application.

Claims

1. A display drive circuit comprising a first transistor, characterized by, The display driving circuit includes: A data writing unit is connected to the control terminal of the first transistor via a first node. The data writing unit is used to write a data line signal into the first node in response to a first scan line signal. The first terminal of the first transistor is connected to the first power supply in sequence through the second node and the light-emitting control unit, and the second terminal of the first transistor is connected to the second power supply in sequence through the third node, the light-emitting control unit, and the display light-emitting unit. The storage unit is connected to the first power supply, the first node, and the second node shown. An initialization unit, connected to the first node, is used to write a reference voltage line signal into the first node in response to a second scan line signal; A reset unit is connected to the third node. The reset unit is used to connect and conduct the third node and the reset signal line in response to the third scan line signal, and to write the voltage of the reset signal line into the third node or release the charge of the second node through the first transistor.

2. The display driving circuit according to claim 1, wherein The storage unit includes a first capacitor and a second capacitor, the first capacitor being connected to the first power supply and the second node, and the second capacitor being connected to the first node and the second node; The data writing unit includes a second transistor, the control terminal of the second transistor is connected to the first scan line, the first terminal of the second transistor is connected to the data line, and the second terminal of the second transistor is connected to the first node. The light-emitting control unit includes a third transistor and a fourth transistor. The control terminal of the third transistor is connected to the first light-emitting control line, the first terminal of the third transistor is connected to the first power supply, and the second terminal of the third transistor is connected to the second node. The control terminal of the fourth transistor is connected to the second light-emitting control line, the first terminal of the fourth transistor is connected to the third node, and the second terminal of the fourth transistor is connected to the display light-emitting unit.

3. The display driving circuit according to claim 1, wherein The initialization unit includes a fifth transistor, the control terminal of which is connected to the second scan line, the first terminal of which is connected to the reference voltage line, and the second terminal of which is connected to the first node. The reset unit includes a sixth transistor, the control terminal of which is connected to the third scan line, the first terminal of which is connected to the reset signal line, and the second terminal of which is connected to the third node.

4. The display driving circuit according to claim 1, wherein The display driving circuit further includes a mobility compensation unit, which is connected to the first node and the third node. The mobility compensation unit is used to turn on the first node and the third node in response to the fourth scan line signal.

5. The display driving circuit according to claim 4, wherein The display driving circuit further includes a hysteresis compensation unit, which is connected to the third node. The hysteresis compensation unit is used to write a bias signal line signal into the third node in response to the fifth scan line signal, so that the first transistor is reverse-biased.

6. The display driving circuit according to claim 5, wherein The mobility compensation unit includes a seventh transistor, the control terminal of which is connected to the fourth scan line, the first terminal of which is connected to the third node, and the second terminal of which is connected to the first node. The hysteresis compensation unit includes an eighth transistor, the control terminal of which is connected to the fifth scan line, the first terminal of which is connected to the bias signal line, and the second terminal of which is connected to the third node.

7. A display driving method, characterized in that, The display driving method is used to control the display driving circuit as described in any one of claims 1 to 6, and includes: During the reset phase, the light-emitting control unit is controlled to turn on the third node and the display light-emitting unit, and at the same time, the reset unit is controlled to write the reset signal line signal into the third node; During the initialization phase, the light-emitting control unit is controlled to turn on the first power supply and the second node, and at the same time, the initialization unit is controlled to write the reference voltage line signal into the first node; During the threshold voltage compensation phase, the light-emitting control unit is controlled to disconnect the connection between the first power supply and the second node, and at the same time, the reset unit is controlled to turn on the third node and the reset signal line, releasing the charge of the second node until the first transistor is turned off. During the data writing phase, the data writing unit is controlled to write the data line signal to the first node; During the light-emitting phase, the light-emitting control unit controls the first power supply and the display light-emitting unit to turn on.

8. The display driving method according to claim 7, characterized in that, The display driving circuit further includes a mobility compensation unit, which is connected to the first node and the third node. The display driving method includes: In the migration rate compensation phase following the data writing phase, the migration rate compensation unit is controlled to connect the first node and the third node.

9. The display driving method according to claim 8, characterized in that, The display driving circuit further includes a hysteresis compensation unit, which is connected to the third node and the bias signal line. The display driving method includes: In the hysteresis compensation stage following the mobility compensation stage, the hysteresis compensation unit is controlled to write the bias signal line signal into the third node, causing the first transistor to conduct in reverse.

10. A display panel, characterized in that, include: Multiple display light-emitting units; The display driving circuit according to any one of claims 1 to 6, wherein the display driving circuit is connected to the display light-emitting unit in a one-to-one correspondence.

Images