A bidirectional current black light photoelectric tweezers chip structure and its manufacturing method

Abstract

This invention provides a bidirectional current-driven black light photoelectric tweezers chip structure and its manufacturing method, belonging to the field of photoelectric tweezers technology. To address the problems of virtual electrode intensity attenuation, visible light excitation interference, and insufficient control stability in existing photoelectric tweezers chips driven by AC, this invention's chip includes upper and lower substrates arranged opposite each other and a flow channel between them. The upper substrate is layered sequentially with a glass layer, an ITO conductive layer, and an upper hydrophobic layer; the lower substrate is layered sequentially with a metal conductive film, an N-type semiconductor substrate, a black light photoconductor layer, a reflective layer, and a lower hydrophobic layer. A symmetrical bidirectional current-driven NPN photosensitive injection structure is constructed within the substrate, and the black light photoconductor layer responds to the 350nm~750nm wavelength band. This invention can achieve bidirectional conduction and amplification of AC positive and negative half-cycle carriers, forming a stable dielectrophoretic force field, improving control precision and biocompatibility, and reducing the risk of sample damage.

Description

Technical Field

[0001] This invention relates to the field of optoelectronic tweezers technology, and in particular to a bidirectional current-type black light optoelectronic tweezers chip structure and its manufacturing method. Background Technology

[0002] Photoelectric tweezers (photoinduced dielectrophoresis), as a micro-nano manipulation technique, utilizes virtual electrodes generated by light irradiation of a photoconductive layer to achieve non-contact manipulation, finding applications in the sorting and manipulation of biological particles. In a typical AC-driven photoelectric tweezers chip structure, the photoconductive layer generates photogenerated electron-hole pairs under illumination. However, existing photoconductive layers mostly use a single intrinsic amorphous silicon thin film, whose photogenerated carriers can only participate in conduction unidirectionally with the polarity change of the applied AC electric field. That is, only one type of carrier is effectively injected and forms an effective virtual electrode during either the positive or negative half-cycle of the AC field. This leads to a significant attenuation of the virtual electrode intensity during the other half-cycle of the AC field, causing the photoinduced dielectrophoresis force to act intermittently. Microparticles undergo periodic drift and retreat within the flow channel, making continuous and stable transient manipulation difficult. Furthermore, existing chips mostly use visible light-responsive photoconductive materials, creating a conflict between background excitation interference and the requirements for long-term live cell culture under dark-field observation conditions. These shortcomings limit the application of photoelectric tweezers in environments requiring high-speed, continuous, stable manipulation and biocompatible dark-field conditions. Summary of the Invention

[0003] In view of this, embodiments of the present invention provide a bidirectional current black light photoelectric tweezers chip structure and its manufacturing method to solve or alleviate the technical problems existing in the prior art.

[0004] The technical solution of this invention is implemented as follows: a bidirectional current black light photoelectric tweezers chip structure includes an upper substrate and a lower substrate. The upper substrate and the lower substrate are arranged in parallel and opposite to each other, and a plurality of spaced isolation walls are fixedly connected between them. A flow channel for fluid to pass through is formed between adjacent isolation walls. The upper substrate is provided with a glass layer, an ITO conductive layer and an upper hydrophobic layer stacked sequentially from the side away from the flow channel to the side closer to the flow channel. The lower substrate, from the side furthest from the flow channel to the side closest to the flow channel, sequentially includes a metal conductive film, a conductive substrate layer, a black light guide layer, a reflective layer, and a lower hydrophobic layer; The conductive substrate is an N-type semiconductor substrate, having a first surface near the flow channel and a second surface away from the flow channel. The second surface is bonded to the conductive metal film. At least one P-type doped region is formed within the first surface. An N+ type doped region is formed on the first side of the P-type doped region, and an N- type doped region is formed on the second side of the P-type doped region. The N+ and N- type doped regions are laterally opposite to each other, forming a symmetrical bidirectional current-injection NPN photosensitive structure. The ion doping concentration of the P-type doped region is 10⁻⁶. 16 cm -3 ~10 17 cm -3 The ion doping concentration of the N+ type doped region is 10. 18 cm -3 ~10 21 cm -3 The ion doping concentration of the N-type doped region is 10. 14 cm -3 ~1×10 15 cm -3 ; The response wavelength of the black light photoconductor layer is 350nm~750nm black light. The current bidirectional NPN photosensitive injection structure is located directly below the black light photoconductor layer. The photogenerated carriers generated by the black light photoconductor layer under black light excitation can be directly injected into the current bidirectional NPN photosensitive injection structure. The ITO conductive layer and the metal conductive film are respectively electrically connected to the two poles of the AC drive power supply, and the current bidirectional NPN photosensitive injection structure is used to realize bidirectional conduction of photogenerated carriers and amplification of photoelectric signals under AC voltage drive.

[0005] As an improvement, the material of the black light guide layer is amorphous silicon or polymer photosensitive material, and the thickness is 0.2μm±0.05μm; The photosensitive polymer material comprises a photoconductive polymer containing a carbazole or phthalocyanine group, or a photochromic polymer containing a spiropyran or diarylethylene structure.

[0006] As an improvement, the resistivity of the N-type semiconductor substrate is 0.05 Ω·cm to 0.1 Ω·cm, and the thickness is 0.1 mm to 0.6 mm; the material of the metal conductive coating is any one of copper, aluminum-copper alloy, silver or chromium, and the thickness is 0.1 μm to 0.5 μm.

[0007] As an improvement, a dielectric layer is further disposed between the N-type semiconductor substrate and the black light guide layer, and the dielectric layer is made of any one of SiO2, Si3N4, SiCOH or HfO2.

[0008] As an improvement, the thickness of the ITO conductive layer is 0.2μm±0.05μm; the thickness of both the upper and lower hydrophobic layers is 50nm~200nm.

[0009] As an improvement, the spacing height of the flow channels is 50μm~150μm, and the line width of the isolation wall is 1.0μm±0.05μm.

[0010] A method for manufacturing a bidirectional current-type black light photoelectric tweezers chip includes the following steps: S1. Doping: An N-type semiconductor substrate is provided, and ion implantation and high-temperature annealing processes are sequentially performed in a designated area of ​​the first surface of the N-type semiconductor substrate near the flow channel to form a P-type doped region, an N+ type doped region located on the first side of the P-type doped region, and an N- type doped region located on the second side of the P-type doped region, thereby constructing a current bidirectional NPN photosensitive injection structure. S2. Substrate preparation: A metal conductive film is formed on the second surface of the N-type semiconductor substrate away from the flow channel; a dielectric layer, a black light guide layer, and a reflective layer are sequentially deposited on the first surface of the N-type semiconductor substrate, and a hydrophobic layer is prepared on the surface of the reflective layer. S3. Patterning: On the surface of the lower substrate near the flow channel, by coating photoresist, photolithography, development and deep silicon etching processes, the lower hydrophobic layer, reflective layer and black light photoconductor layer are etched to the N-type semiconductor substrate to form a number of spaced isolation walls to define the flow channel region; S4. Upper substrate preparation: A glass substrate is provided, an ITO conductive layer is deposited on the surface of the glass substrate near the flow channel, and a hydrophobic layer is prepared on the surface of the ITO conductive layer; S5. Bonding: Align the prepared upper substrate with the lower substrate and bond them by hot pressing to make the top of the isolation wall tightly adhere to the upper hydrophobic layer to form a closed flow channel; S6. Post-processing: Perform electrical testing and dicing / sorting on the bonded chips to obtain individual chip finished products.

[0011] As an improvement, the S1 doping specifically includes: Boron ions with an energy of 180 keV were implanted, and the pit was pushed at 1050 °C for 60 min to form the P-type doped region. Using an energy of 120keV and a dose of 8×10 15 cm -2 Phosphorus ions are implanted at an implantation angle of 0°~3°, and then annealed at 1050° for 30 min to form the N-type doped region. Using energy of 60keV~80keV and a dose of 1×10 15 cm -2~5×10 15 cm -2 Arsenic or phosphorus ions are implanted and annealed at 950°C to 1050°C for 15 to 30 minutes to form the N+ type doped region.

[0012] As an improvement, the deposition step of the black light guide layer in S2 specifically includes: Plasma-enhanced chemical vapor deposition (PECVD) was employed, with silane gas at a flow rate of 40 sccm and hydrogen gas at a flow rate of 200 sccm, at an RF power density of 0.2 W / cm². 2 Under certain conditions, an amorphous silicon thin film with a thickness of 0.2 μm ± 0.05 μm is deposited for 10 min to 12 min to form the black light guide layer.

[0013] As an improvement, the lower hydrophobic layer of S2 and the upper hydrophobic layer of S4 are both prepared using plasma deposition technology, and the deposition conditions include: The substrate to be deposited is placed in the cavity and evacuated to 20 Pa to 100 Pa; perfluorohexane or hexafluoropropylene precursor gas with a flow rate of 30 sccm and argon gas with a flow rate of 50 sccm are introduced; deposition is carried out for 5 min to 15 min under a radio frequency power of 200 W to obtain a hydrophobic film with a thickness of 50 nm to 200 nm.

[0014] Compared with the prior art, the present invention has the following advantages: This invention establishes a symmetrical bidirectional current-controlled NPN photosensitive injection structure beneath the photoconductive layer, enabling photogenerated carriers to be effectively injected and amplified during both the positive and negative half-cycles of AC drive. This eliminates the defect of virtual electrode intensity decay in the existing single intrinsic photoconductive layer during the AC half-cycle, thereby forming a continuous and stable photoinduced dielectrophoresis force field within the flow channel, achieving transient manipulation of microscopic particles with no backtracking and low delay.

[0015] This invention employs a black light guide layer with a response wavelength of 350nm–750nm, enabling spectral separation between the chip's photoelectric excitation and conventional bright-field microscope illumination. This avoids interference from visible light background excitation on the accuracy of the virtual electrode pattern, while also meeting the needs of long-term culture and real-time monitoring of live cells under dark-field observation conditions, thus expanding the application range of photoelectric tweezers in biocompatible environments.

[0016] This invention vertically integrates the photoelectric conversion structure and the signal amplification structure within a semiconductor substrate, reducing the lateral transport path of photogenerated carriers, improving photoelectric response speed and sensitivity, facilitating efficient control at lower driving voltages, and reducing the risk of thermal effects and sample damage during chip operation.

[0017] The above overview is for illustrative purposes only and is not intended to be limiting in any way. In addition to the illustrative aspects, embodiments, and features described above, further aspects, embodiments, and features of the invention will become readily apparent from the accompanying drawings and the following detailed description. Attached Figure Description

[0018] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0019] Figure 1 This is a layered diagram of the photoelectric tweezers chip structure of the present invention; Figure 2 This is a flowchart of the chip manufacturing process of the present invention; Figure 3 This is a flowchart illustrating the chip operation process of the present invention; Figure 4 This is a schematic diagram of the structure of the indirect-coupled phototransistor of the present invention; Figure 5 This is a schematic diagram of the multilayer structure and functional area distribution of the novel black light photoelectric tweezers device of the present invention; Figure 6 This is a schematic diagram of the lower substrate NPN structure and doped region distribution of the present invention; Figure 7 A process flow diagram for deep silicon etching to prepare isolation walls and flow channels according to the present invention; Figure 8 This is a flowchart of the dielectric layer filling and boron ion implantation push-well process of the present invention; Figure 9 This is a flowchart of the phosphorus ion implantation and metal layer sputtering process of the present invention; Figure 10 This is a flowchart of the NPN black light guide layer deposition and hydrophobic layer preparation process of the present invention; Figure 11 This is a flowchart of the upper substrate ITO glass structure and flow channel forming process of the present invention; Figure 12 This is a flow chart of the hot-press bonding process between the upper and lower substrates of the present invention. Detailed Implementation

[0020] In the following description, only certain exemplary embodiments are briefly described. As those skilled in the art will recognize, the described embodiments can be modified in various ways without departing from the spirit or scope of the invention. Therefore, the drawings and description are considered to be exemplary in nature and not restrictive.

[0021] It is important to note that terms such as "first," "second," "symmetric," and "array" are used only to distinguish between descriptive and positional descriptions and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Therefore, features specified with terms such as "first" or "symmetric" may explicitly or implicitly include one or more of that feature; similarly, when the quantity of certain features is not limited by words such as "two" or "three," it should be noted that such features also explicitly or implicitly include one or more features. In this invention, unless otherwise explicitly specified and limited, terms such as "installation," "connection," and "fixation" should be interpreted broadly; for example, they can refer to a fixed connection, a detachable connection, or an integral molding; they can refer to a mechanical connection, a direct connection, a welding connection, or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this invention based on the accompanying drawings and specific circumstances.

[0022] The embodiments of the present invention will now be described in detail with reference to the accompanying drawings.

[0023] This invention provides a bidirectional current-type black light photoelectric tweezers chip structure, including an upper substrate and a lower substrate arranged in parallel. A plurality of spaced isolation walls are fixedly connected between the upper substrate and the lower substrate, and a flow channel for fluid to pass through is formed between adjacent isolation walls. The spacing height of the flow channel is 50μm~150μm, and the line width of the isolation wall is 1.0μm±0.05μm.

[0024] The upper substrate is constructed by sequentially stacking a glass layer, an ITO conductive layer, and an upper hydrophobic layer from the side furthest from the flow channel to the side closest to the flow channel. The glass layer has a thickness of 0.55 mm to 1.1 mm, providing rigid support and good light transmittance for the chip. The ITO conductive layer has a thickness of 0.2 μm ± 0.05 μm, balancing conductivity and light transmittance to ensure a stable conductive path while avoiding excessive blocking of incident black light. The upper hydrophobic layer has a thickness of 50 nm to 200 nm, providing washability and anti-fouling properties, and reducing the adsorption of biological samples.

[0025] The lower substrate, from the side furthest from the flow channel to the side closest to the flow channel, sequentially includes a metal conductive film, a conductive substrate layer, a black light guide layer, a reflective layer, and a lower hydrophobic layer; The conductive substrate is an N-type semiconductor substrate with a resistivity of 0.05 Ω·cm to 0.1 Ω·cm and a thickness of 0.1 mm to 0.6 mm, combining high electron mobility with low leakage risk. The conductive metal coating is made of copper, aluminum-copper alloy, silver, or chromium, with a thickness of 0.1 μm to 0.5 μm, forming a stable bottom electrical pathway. The black light guide layer has a thickness of 0.2 μm ± 0.05 μm, responds to black light in the 350 nm to 750 nm wavelength range, and can generate a large number of photogenerated carriers when excited by light. The photoconductor layer is made of amorphous silicon or a polymer photosensitive material with a thickness of 0.2μm±0.05μm. The polymer photosensitive material includes photoconductive polymers containing carbazole or phthalocyanine groups, or photochromic polymers containing spiropyran or diarylethylene structures. The reflective layer uses a thin film of metallic silver or aluminum with a thickness of 50nm~100nm, which can reflect black light that penetrates the photoconductor layer back into the photoconductor layer, improving light utilization. The lower hydrophobic layer has a thickness of 50nm~200nm, which forms a synergistic anti-fouling system with the upper hydrophobic layer to ensure that the chip can be reused.

[0026] Furthermore, a dielectric layer is disposed between the N-type semiconductor substrate and the black light guide layer, and the material of the dielectric layer is... , , or Any one of the following, with a thickness of 10nm~50nm, can achieve electrical isolation between the substrate and the photoconductor layer, avoiding interference from leakage current to photoelectric control.

[0027] The conductive substrate is an N-type semiconductor substrate, which has a first surface near the flow channel and a second surface away from the flow channel. The second surface is bonded to the conductive metal film. At least one P-type doped region is formed in the first surface. An N+ type doped region is formed on the first side of the P-type doped region, and an N- type doped region is formed on the second side of the P-type doped region. The N+ and N- type doped regions are arranged laterally opposite to each other, forming a symmetrical bidirectional current-injection NPN photosensitive structure. The ion doping concentration of the P-type doped region is 10. 16 cm -3 ~10 17 cm -3 The ion doping concentration of the N+ type doped region is 10. 18 cm -3 ~10 21 cm -3 The ion doping concentration of the N-type doped region is 10. 14 cm -3 ~1×10 15 cm -3 ; The bidirectional current-type NPN photosensitive injection structure is located directly below the black light photoconductor layer. Photogenerated carriers generated by black light excitation in the black light photoconductor layer can be directly injected into the bidirectional current-type NPN photosensitive injection structure. The ITO conductive layer and the metal conductive film are used to electrically connect to the two poles of the AC drive power supply, respectively. The bidirectional current-type NPN photosensitive injection structure is used to realize bidirectional conduction of photogenerated carriers and photoelectric signal amplification under AC voltage drive.

[0028] To further clarify the underlying physical mechanism by which the present invention achieves bidirectional current conduction and transient control, the working principle is now explained in detail with reference to the specific configuration of the bidirectional current NPN photosensitive injection structure.

[0029] Based on the fundamental principles of semiconductor physics, the laterally symmetrical structure constructed in this invention, consisting of a P-type doped region, an N+-type doped region on its first side, and an N-type doped region on its second side, is functionally equivalent to two NPN phototransistors sharing the same base region (P-type region) but with opposite emitter / collector polarities, integrated back-to-back. This equivalent circuit model endows the structure with unique bidirectional carrier transport and amplification capabilities under an alternating current field. Specifically, when the chip of this invention is in operation, the ITO conductive layer and the metal conductive film are electrically connected to the two poles of the AC drive power supply, thereby establishing an alternating electric field in the flow channel region between the upper and lower substrates. It should be noted that when a dielectric layer is disposed between the N-type semiconductor substrate and the black light photoconductor layer, photogenerated carriers must tunnel through or cross the dielectric layer barrier to be injected into the underlying NPN structure. By controlling the thickness of the dielectric layer within the range of 10nm to 50nm, effective electrical isolation between the substrate and the photoconductor layer can be achieved, leakage can be suppressed, and photogenerated carriers can still be efficiently injected, thus not affecting the overall photoelectric response performance of the device.

[0030] The microscopic processes during the positive and negative half-cycles of AC voltage will now be described separately: During the positive half-cycle of the AC driving voltage (defined as the period when the potential of the ITO conductive layer is higher than that of the metal conductive film), the N-type semiconductor substrate in the lower substrate is at a relatively low potential. At this time, the N+ type doped region located on the first side of the P-type doped region forms a forward-biased PN junction relative to the P-type doped region due to its high doping concentration and potential relationship with the external electric field; while the N- type doped region located on the second side of the P-type doped region forms a reverse-biased PN junction relative to the P-type doped region. When black light with a response wavelength of 350nm to 750nm penetrates the upper substrate from top to bottom and irradiates the black light photoconductor layer, a large number of photogenerated electron-hole pairs are generated inside the photoconductor layer due to intrinsic excitation or impurity level excitation. Since the current-bidirectional NPN photosensitive injection structure is adjacent to and located directly below the black light photoconductor layer, these photogenerated carriers can be efficiently injected into the NPN structure before recombination. In this process, photogenerated electrons, driven by the electric field, tend to move towards the higher potential of the N+ type doped region; while photogenerated holes are swept into and accumulate in the P-type doped region, which serves as the common base region. According to the current control mechanism of bipolar transistors, the non-equilibrium minority carriers (holes) accumulated in the P-type base region effectively lower the emitter junction barrier between the P and N+ regions, thereby triggering electron injection. This process causes a large number of electrons to cross the extremely thin base region from the N+ type doped region (which now acts as the emitter) and be collected in the reverse-biased N- type doped region (which now acts as the collector), forming an amplified electron current flowing from the N+ region through the P region to the N- region. This significant photoelectric signal current constructs a high-intensity virtual electrode in the corresponding channel region.

[0031] During the negative half-cycle of the AC driving voltage (defined as the period when the potential of the metal conductive film is higher than that of the ITO conductive layer), the direction of the external electric field is reversed, and the potential of the N-type semiconductor substrate in the lower substrate is relatively raised. At this time, the bias state of the PN junction inside the NPN structure is completely reversed: the N-type doped region located on the second side of the P-type doped region becomes positively biased relative to the P-type doped region due to its relative potential relationship; while the N+ type doped region located on the first side becomes negatively biased accordingly. Under this bias condition, the photogenerated electrons generated by the black light photoconductor layer under illumination change their direction of motion under the action of the reversed electric field, tending to accumulate in the N-type doped region with the higher potential at this time; photogenerated holes are also swept into and accumulated in the P-type base region. The accumulated holes lower the newly formed emitter junction barrier between the P-region and the N-region, thereby triggering the amplification process of electrons being injected from the N-type doped region (which now becomes the emitter) into the P-region and collected by the negatively biased N+ type doped region (which now becomes the collector). Thus, during the negative half-cycle of the AC circuit, an amplified electronic current of comparable intensity is generated, flowing from the N- region through the P region to the N+ region, and a stable virtual electrode is established accordingly within the flow channel.

[0032] Based on the microscopic processes within the two half-cycles described above, the core contribution of the symmetrical bidirectional current-controlled NPN photosensitive injection structure proposed in this invention lies in overcoming the inherent limitation of traditional single photoconductive layers, which can only effectively utilize carriers in one direction under AC drive. By providing two symmetrical carrier transport and amplification paths in the physical structure, which can automatically switch with the direction of the external electric field, this structure ensures that photogenerated carriers generated by black light excitation can be injected and amplified instantly and effectively regardless of the polarity of the applied AC voltage, thereby forming a continuous, uniform, and stable photoinduced dielectrophoresis force field in the channel throughout the entire AC cycle.

[0033] In implementation, the ITO conductive layer and the metal conductive film are respectively connected to the two poles of the AC drive power supply, forming an alternating electric field in the flow channel region. When black light of 350nm~750nm shines on the black light photoconductor layer, the black light photoconductor layer is excited to generate a large number of photogenerated carriers (electron-hole pairs). The photogenerated carriers are directly injected into the current-bidirectional NPN photosensitive injection structure below. During the positive half-cycle of the AC voltage, the PN junction between the N+ type doped region and the P type doped region is forward biased, and the PN junction between the N- type doped region and the P type doped region is reverse biased. Biased, photogenerated carriers are amplified by the NPN structure to form a forward conducting current; during the negative half-cycle of the AC voltage, the PN junction between the N-type doped region 2023 and the P-type doped region is forward biased, and the PN junction between the N+ type doped region and the P-type doped region is reverse biased, and the photogenerated carriers are amplified by the NPN structure to form a reverse conducting current; thus, bidirectional synchronous conduction during the positive and negative half-cycles of AC is achieved, eliminating photoelectric response delay and forming a stable photoinduced dielectric field in the flow channel, enabling precise and non-destructive instantaneous manipulation of micro- and nano-targets in the fluid.

[0034] A method for manufacturing a bidirectional current-type black light photoelectric tweezers chip includes the following steps: S1. Doping: An N-type semiconductor substrate is provided, and ion implantation and high-temperature annealing processes are sequentially performed in a designated area of ​​the first surface of the N-type semiconductor substrate near the flow channel to form a P-type doped region, an N+ type doped region located on the first side of the P-type doped region, and an N- type doped region located on the second side of the P-type doped region, thereby constructing a current bidirectional NPN photosensitive injection structure. Among them, boron ions with an energy of 180keV were implanted and the pit was pushed at 1050℃ for 60 min to form a P-type doped region; Using an energy of 120keV and a dose of 8×10 15 cm -2 Phosphorus ions are implanted at an implantation angle of 0°~3°, and then annealed at 1050° for 30 min to form the N-type doped region. Using energy of 60keV~80keV and a dose of 1×10 15cm -2 ~5×10 15 cm -2 Arsenic or phosphorus ions are implanted and annealed at 950°C to 1050°C for 15 to 30 minutes to form the N+ type doped region.

[0035] S2. Substrate preparation: A metal conductive film is formed on the second surface of the N-type semiconductor substrate away from the flow channel; a dielectric layer, a black light guide layer, and a reflective layer are sequentially deposited on the first surface of the N-type semiconductor substrate, and a hydrophobic layer is prepared on the surface of the reflective layer. The deposition steps of the black light guide layer specifically include: Plasma-enhanced chemical vapor deposition (PECVD) was employed, with silane gas at a flow rate of 40 sccm and hydrogen gas at a flow rate of 200 sccm, at an RF power density of 0.2 W / cm². 2 Under certain conditions, an amorphous silicon thin film with a thickness of 0.2 μm ± 0.05 μm is deposited for 10 min to 12 min to form the black light guide layer.

[0036] The preparation steps of the lower hydrophobic layer all employed plasma deposition technology, and the deposition conditions included: The substrate to be deposited is placed in the cavity and evacuated to 20 Pa to 100 Pa; perfluorohexane or hexafluoropropylene precursor gas with a flow rate of 30 sccm and argon gas with a flow rate of 50 sccm are introduced; deposition is carried out for 5 min to 15 min under a radio frequency power of 200 W to obtain a hydrophobic film with a thickness of 50 nm to 200 nm.

[0037] S3. Patterning: On the surface of the lower substrate near the flow channel, by coating photoresist, photolithography, development and deep silicon etching processes, the lower hydrophobic layer, reflective layer and black light photoconductor layer are etched to the N-type semiconductor substrate to form a number of spaced isolation walls to define the flow channel region; S4. Upper substrate preparation: A glass substrate is provided, an ITO conductive layer is deposited on the surface of the glass substrate near the flow channel, and a hydrophobic layer is prepared on the surface of the ITO conductive layer; The preparation steps of the upper hydrophobic layer all employ plasma deposition technology, and the deposition conditions include: The substrate to be deposited is placed in the cavity and evacuated to 20 Pa to 100 Pa; perfluorohexane or hexafluoropropylene precursor gas with a flow rate of 30 sccm and argon gas with a flow rate of 50 sccm are introduced; deposition is carried out for 5 min to 15 min under a radio frequency power of 200 W to obtain a hydrophobic film with a thickness of 50 nm to 200 nm.

[0038] S5. Bonding: Align the prepared upper substrate with the lower substrate and bond them by hot pressing to make the top of the isolation wall tightly adhere to the upper hydrophobic layer to form a closed flow channel; S6. Post-processing: Perform electrical testing and dicing / sorting on the bonded chips to obtain individual chip finished products.

[0039] Example: Basic bidirectional current black light photoelectric tweezers chip structure and its manufacturing method This embodiment is a basic implementation of the present invention, and the specific structural parameters are as follows: the channel spacing height is 100μm, the isolation wall linewidth is 1.0μm; in the upper substrate, the glass layer is 0.7mm thick borosilicate glass, the ITO conductive layer thickness is 0.2μm, and the upper hydrophobic layer thickness is 100nm; in the lower substrate, the metal conductive film is a 0.3μm thick silver film, the conductive substrate layer is a 0.3mm thick N-type single crystal silicon substrate with a resistivity of 0.08Ω・cm; the dielectric layer is 20nm thick... Thin film; the black light guide layer is a 0.2 μm thick amorphous silicon film with a response wavelength of 365 nm; the reflective layer is an 80 nm thick aluminum film; the lower hydrophobic layer is 100 nm thick; in the current-bidirectional NPN photosensitive injection structure, the doping concentration of the P-type doped region is 5 × 10⁻⁶. 16 cm -3 The doping concentration of the N+ type doped region is 1×10⁻⁶. 19 cm -3 The doping concentration of the N-type doped region is 5 × 10⁻⁶. 14 cm -3 .

[0040] The chip manufacturing method of this embodiment includes the following specific steps: S1. Doping: A 0.3 mm thick N-type single-crystal silicon substrate with a resistivity of 0.08 Ω·cm was ultrasonically cleaned sequentially with acetone, anhydrous ethanol, and deionized water for 10 min to remove surface organic impurities. It was then immersed in 1% HF solution for 30 s to remove the surface oxide layer, rinsed with deionized water, and dried under nitrogen. A doping window was formed in a designated area on the first surface of the substrate using photolithography. Boron ions were implanted using 180 keV energy at a dose of 5 × 10⁻⁶. 13 cm -2 Subsequently, the pit was pushed in at 1050℃ under a nitrogen atmosphere for 60 minutes to form a P-type doped region; then, an N-type doped window was formed again using photolithography, and phosphorus ions were implanted with an energy of 120 keV at a dose of 8 × 10⁻⁶. 15 cm -2 The implantation angle was 0°, followed by annealing at 1050℃ under a nitrogen atmosphere for 30 min to form an N-type doped region. An N+ type doped window was then formed using photolithography, and arsenic ions with an energy of 70 keV were implanted at a dose of 3 × 10⁻⁶.15 cm -2 Subsequently, it was annealed at 1000℃ under a nitrogen atmosphere for 20 min to form an N+ type doped region, thus completing the fabrication of a current bidirectional NPN photosensitive injection structure. S2. Substrate Fabrication: A 0.3 μm thick silver film is deposited on the second surface of an N-type silicon substrate using magnetron sputtering to form a conductive metal coating. A 20 nm thick SiO2 film is deposited on the first surface of the substrate using PECVD to form a dielectric layer. A black light guide layer is deposited on the surface of the dielectric layer using PECVD: a SiH4 flux of 40 sccm and a H2 flux of 200 sccm are introduced, with an RF power density of 0.2 W / cm². 2 A 0.2μm±0.05μm thick amorphous silicon thin film was formed at a deposition temperature of 250℃ and a deposition time of 11 min. An 80nm thick aluminum thin film was deposited on the surface of the black light guide layer using magnetron sputtering to form a reflective layer. A hydrophobic layer was prepared on the surface of the reflective layer using plasma deposition: the substrate was placed in the deposition chamber, the vacuum was evacuated to 50Pa, and 30sccm of hexafluoropropylene and 50sccm of Ar were introduced. The RF power was 200W and the deposition time was 10 min to form a 100nm thick hydrophobic film, thus completing the preparation of the lower substrate. S3. Patterning: TOKOEBR-CAN028 positive adhesive was spin-coated onto the surface of the lower hydrophobic layer of the substrate to a thickness of 1.2 μm, followed by soft baking at 100℃ for 60 s; exposure was then performed using a stepper scanning lithography machine at an exposure dose of 160 mJ / cm². 2 The critical dimension is 1μm; development is performed using 2.38wt% TMAH developer for 30s to form the isolation wall pattern; Bosch deep silicon etching process is used to etch through the hydrophobic layer, reflective layer, black light photoconductive layer, dielectric layer to the N-type silicon substrate, with an etching depth of 100μm, forming several spaced isolation walls to define the flow channel region; after etching, resist removal and cleaning are performed: residual photoresist is removed by O2 plasma at 300W for 5min, then the organic residual photoresist is removed by soaking in Piranha solution for 10min, the sidewall oxide layer is removed by soaking in 1% HF solution for 30s, the sidewall oxide layer is removed by rinsing with deionized water for 5min, and then the substrate is dried by nitrogen. S4. Upper substrate preparation: Take a 0.7 mm thick borosilicate glass substrate and ultrasonically clean it sequentially with acetone, anhydrous ethanol, and deionized water for 10 min to remove surface impurities. Then treat it with O2 plasma for 2 min to improve surface adhesion. Deposit a 0.2 μm thick ITO film on the surface of the glass substrate using magnetron sputtering to form an ITO conductive layer. Use the same plasma deposition process as the lower hydrophobic layer to prepare a 100 nm thick upper hydrophobic layer on the surface of the ITO conductive layer to complete the upper substrate preparation. S5. Bonding: The prepared upper and lower substrates are placed in a bonding machine and aligned, with the alignment accuracy controlled to ≤5μm; then hot-press bonding is performed, with the following bonding parameters: temperature 120℃, pressure 200N, holding time 5min, and heating rate 1.5℃ / min; after holding, the temperature is reduced to 50℃ at a rate of -2℃ / min, and then allowed to cool naturally to room temperature, so that the top of the isolation wall is tightly bonded to the upper hydrophobic layer to form a closed flow channel; S6. Post-processing: The bonded wafer is diced to form individual chips; the individual chips are subjected to electrical conductivity testing, photoresponse performance testing, and flow channel sealing testing. Defective products are rejected to obtain finished chip products.

[0041] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any person skilled in the art can easily conceive of various variations or substitutions within the technical scope disclosed in the present invention, and these should all be included within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.

Claims

1. A bidirectional current-type black light photoelectric tweezers chip structure, comprising an upper substrate and a lower substrate, wherein the upper substrate and the lower substrate are arranged parallel to each other and are fixedly connected by a plurality of spaced isolation walls, and a flow channel for fluid passage is formed between adjacent isolation walls, characterized in that: The upper substrate is provided with a glass layer, an ITO conductive layer and an upper hydrophobic layer stacked sequentially from the side away from the flow channel to the side closer to the flow channel. The lower substrate, from the side furthest from the flow channel to the side closest to the flow channel, sequentially includes a metal conductive film, a conductive substrate layer, a black light guide layer, a reflective layer, and a lower hydrophobic layer; The conductive substrate is an N-type semiconductor substrate, having a first surface near the flow channel and a second surface away from the flow channel. The second surface is bonded to the conductive metal film. At least one P-type doped region is formed within the first surface. An N+ type doped region is formed on the first side of the P-type doped region, and an N- type doped region is formed on the second side of the P-type doped region. The N+ and N- type doped regions are laterally opposite to each other, forming a symmetrical bidirectional current-injection NPN photosensitive structure. The ion doping concentration of the P-type doped region is 10⁻⁶. 16 cm -3 ~10 17 cm -3 The ion doping concentration of the N+ type doped region is 10. 18 cm -3 ~10 21 cm -3 The ion doping concentration of the N-type doped region is 10. 14 cm -3 ~1×10 15 cm -3 ; The response wavelength of the black light photoconductor layer is 350nm~750nm black light. The current bidirectional NPN photosensitive injection structure is located directly below the black light photoconductor layer. The photogenerated carriers generated by the black light photoconductor layer under black light excitation can be directly injected into the current bidirectional NPN photosensitive injection structure. The ITO conductive layer and the metal conductive film are respectively electrically connected to the two poles of the AC drive power supply, and the current bidirectional NPN photosensitive injection structure is used to realize bidirectional conduction of photogenerated carriers and amplification of photoelectric signals under AC voltage drive.

2. The current-bidirectional black light photoelectric tweezers chip structure according to claim 1, characterized in that, The black light guide layer is made of amorphous silicon or polymer photosensitive material, and has a thickness of 0.2μm±0.05μm; The photosensitive polymer material comprises a photoconductive polymer containing a carbazole or phthalocyanine group, or a photochromic polymer containing a spiropyran or diarylethylene structure.

3. The current-bidirectional black light photoelectric tweezers chip structure according to claim 1, characterized in that, The resistivity of the N-type semiconductor substrate is 0.05 Ω·cm to 0.1 Ω·cm, and the thickness is 0.1 mm to 0.6 mm; the material of the metal conductive coating is any one of copper, aluminum-copper alloy, silver or chromium, and the thickness is 0.1 μm to 0.5 μm.

4. The current-bidirectional black light photoelectric tweezers chip structure according to claim 1, characterized in that, A dielectric layer is further disposed between the N-type semiconductor substrate and the black light guide layer, and the material of the dielectric layer is [material not specified]. , , or Any one of them.

5. The current-bidirectional black light photoelectric tweezers chip structure according to claim 1, characterized in that, The thickness of the ITO conductive layer is 0.2μm±0.05μm; the thickness of the upper hydrophobic layer and the lower hydrophobic layer are both 50nm~200nm.

6. The current-bidirectional black light photoelectric tweezers chip structure according to claim 1, characterized in that, The spacing height of the flow channels is 50μm~150μm, and the line width of the isolation wall is 1.0μm±0.05μm.

7. A method for manufacturing a bidirectional current-type black light photoelectric tweezers chip, characterized in that, The method for manufacturing the chip structure according to any one of claims 1 to 6 includes the following steps: S1. Doping: An N-type semiconductor substrate is provided, and ion implantation and high-temperature annealing processes are sequentially performed in a designated area of ​​the first surface of the N-type semiconductor substrate near the flow channel to form a P-type doped region, an N+ type doped region located on the first side of the P-type doped region, and an N- type doped region located on the second side of the P-type doped region, thereby constructing a current bidirectional NPN photosensitive injection structure. S2. Substrate preparation: A metal conductive film is formed on the second surface of the N-type semiconductor substrate away from the flow channel; a dielectric layer, a black light guide layer, and a reflective layer are sequentially deposited on the first surface of the N-type semiconductor substrate, and a hydrophobic layer is prepared on the surface of the reflective layer. S3. Patterning: On the surface of the lower substrate near the flow channel, by coating photoresist, photolithography, development and deep silicon etching processes, the lower hydrophobic layer, reflective layer and black light photoconductor layer are etched to the N-type semiconductor substrate to form a number of spaced isolation walls to define the flow channel region; S4. Upper substrate preparation: A glass substrate is provided, an ITO conductive layer is deposited on the surface of the glass substrate near the flow channel, and a hydrophobic layer is prepared on the surface of the ITO conductive layer; S5. Bonding: Align the prepared upper substrate with the lower substrate and bond them by hot pressing to make the top of the isolation wall tightly adhere to the upper hydrophobic layer to form a closed flow channel; S6. Post-processing: Perform electrical testing and dicing / sorting on the bonded chips to obtain individual chip finished products.

8. The manufacturing method according to claim 7, characterized in that, The S1 doping specifically includes: Boron ions with an energy of 180 keV were implanted, and the pit was pushed at 1050 °C for 60 min to form the P-type doped region. Using an energy of 120keV and a dose of 8×10 15 cm -2 Phosphorus ions are implanted at an implantation angle of 0°~3°, and then annealed at 1050° for 30 min to form the N-type doped region. Using energy of 60keV~80keV and a dose of 1×10 15 cm -2 ~5×10 15 cm -2 Arsenic or phosphorus ions are implanted and annealed at 950°C to 1050°C for 15 to 30 minutes to form the N+ type doped region.

9. The manufacturing method according to claim 7, characterized in that, The deposition steps of the black light guide layer in S2 specifically include: Plasma-enhanced chemical vapor deposition (PECVD) was employed, with silane gas at a flow rate of 40 sccm and hydrogen gas at a flow rate of 200 sccm, at an RF power density of 0.2 W / cm². 2 Under certain conditions, an amorphous silicon thin film with a thickness of 0.2 μm ± 0.05 μm is deposited for 10 min to 12 min to form the black light guide layer.

10. The manufacturing method according to claim 7, characterized in that, The lower hydrophobic layer of S2 and the upper hydrophobic layer of S4 are both prepared using plasma deposition technology, and the deposition conditions include: The substrate to be deposited is placed in the cavity and evacuated to 20 Pa to 100 Pa; perfluorohexane or hexafluoropropylene precursor gas with a flow rate of 30 sccm and argon gas with a flow rate of 50 sccm are introduced; deposition is carried out for 5 min to 15 min under a radio frequency power of 200 W to obtain a hydrophobic film with a thickness of 50 nm to 200 nm.

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