Stacked inductor device and electronic device

Abstract

The application discloses a laminated inductor device and electronic equipment. The laminated inductor device comprises a laminated body, internal electrodes and two external electrodes; the internal electrodes are arranged in the laminated body, at least two of the internal electrodes are connected in parallel to form a parallel electrode group, in the laminated direction, an insulating layer between two adjacent internal electrodes in the parallel electrode group is a first insulating layer, an insulating layer between two adjacent internal electrodes connected in series is a second insulating layer, and the thickness of the first insulating layer is smaller than that of the second insulating layer. The laminated inductor device can further reduce the direct current resistance and effectively improve the Q value by making the thickness of the first insulating layer smaller than that of the second insulating layer.

Description

Technical Field

[0001] This application relates to the field of electronic devices, and more particularly to a multilayer inductor and an electronic device. Background Technology

[0002] An inductor is an electronic device in which a conductor is wound into the shape of internal electrodes and formed on a blank. Its working principle is as follows: when current flows through it, a strong magnetic field is generated across the two ends of the internal electrodes. Due to electromagnetic induction, the inductor exhibits very low resistance to direct current and high impedance to alternating current, thus impeding the flow of changing current. Therefore, inductors are widely used in various electronic devices (such as mobile phones, vibrators, pagers, etc.).

[0003] An important factor in measuring the losses of inductors is their Q value (quality factor). The Q value is the ratio of the energy stored in an inductor to the energy consumed by the inductor during one signal cycle. The lower the losses, the higher the Q value, and thus the better the inductor's performance.

[0004] Therefore, how to improve the Q value of inductor devices is a technical problem that urgently needs to be solved in the industry. Summary of the Invention

[0005] This application discloses a multilayer inductor and electronic device that can reduce the DC resistance of the internal electrodes, thereby improving the Q value.

[0006] To achieve the above objectives, in a first aspect, embodiments of this application disclose a multilayer inductor device, comprising: A laminate comprising a plurality of insulating layers stacked along a stacking direction; Two external electrodes are disposed on the laminate. Multiple internal electrodes are disposed on the laminate, and at least two of the multiple internal electrodes are connected in parallel to form a parallel electrode group. In the lamination direction, the insulating layer between two adjacent internal electrodes in the parallel electrode group is a first insulating layer, and the insulating layer between two adjacent internal electrodes connected in series is a second insulating layer. Along the lamination direction, the thickness of the first insulating layer is less than the thickness of the second insulating layer. The plurality of internal electrodes further include: Two connecting electrodes are arranged along the stacking direction, wherein one connecting electrode, the parallel electrode group, and the other connecting electrode are arranged in sequence, and the connecting electrode and the parallel electrode group are connected in series. Wherein, one of the connecting electrodes is connected to one of the external electrodes, and the other connecting electrode is connected to the other external electrode; Along the stacking direction, the total thickness of the connecting electrodes is less than the total thickness of the parallel electrode group.

[0007] The multilayer inductor of this application, based on the configuration of parallel electrode groups, further explores the thickness of the insulating layer between two adjacent internal electrodes within the parallel electrode group and the thickness of the insulating layer between two adjacent internal electrodes connected in series outside the parallel electrode group. Specifically, since the interlayer potential difference (potential difference) of each parallel-connected internal electrode in the parallel electrode group is small, if the thickness of the insulating layer between the internal electrodes in the parallel electrode group is adjusted to reduce its thickness to increase the thickness of the internal electrodes in the parallel electrode group, the resulting change in parasitic capacitance is almost negligible. Based on this, by making the thickness of the insulating layer (first insulating layer) between two adjacent internal electrodes within the parallel electrode group smaller than the thickness of the insulating layer (second insulating layer) between two adjacent internal electrodes connected in series outside the parallel electrode group, that is, reducing the thickness of the insulating layer between two adjacent internal electrodes connected in parallel within the parallel electrode group. On the one hand, if the total thickness of the parallel electrode group and the total thickness of the multilayer inductor remain unchanged, the reduction in the thickness of the first insulating layer allows for more wiring space. This means that within the same product size, more internal electrodes can be arranged, thereby increasing not only the inductance but also the Q value. On the other hand, because the thickness of the first insulating layer is reduced, the thickness of the internal electrodes within the parallel electrode group can be increased, thereby reducing DC resistance and effectively improving the Q value.

[0008] In addition, the internal electrode also includes two connecting electrodes for connecting the two external electrodes. Since the internal electrode included in the connecting electrode is a single one, it is equivalent to the parallel electrode group not being directly connected to the external electrode. Therefore, the potential difference between the parallel electrode group and the external electrode can be reduced, thereby reducing the parasitic capacitance between them. This can avoid the problem of reduced resonant frequency caused by increased parasitic capacitance.

[0009] Based on this, since the total thickness of the connecting electrodes is less than the total thickness of the parallel electrode group, for this multilayer inductor, the thicker parallel electrode group is located closer to the center of the multilayer than the connecting electrodes. Since the center of the multilayer is often the region with the densest magnetic flux and the core of the magnetic circuit, placing the parallel electrode group closer to the center of the multilayer is beneficial to improving the uniformity of current distribution and increasing the effective cross-sectional area of ​​the current, which in turn is beneficial to further improving the Q value of the multilayer inductor, thereby improving the electrical performance of the multilayer inductor.

[0010] Secondly, this application also discloses an electronic device, including the multilayer inductor device as described in the first aspect above. Attached Figure Description

[0011] To more clearly illustrate the technical solutions in the embodiments of this application, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0012] Figure 1 This is a schematic diagram of the structure of the multilayer inductor disclosed in this application; Figure 2 This is an exploded view of the multilayer inductor device disclosed in this application; Figure 3 This is a top view of the internal structure of the multilayer inductor disclosed in this application; Figure 4A This is a schematic diagram of the internal electrodes of the multilayer inductor disclosed in this application; Figure 4B This is another schematic diagram of the internal electrodes of the multilayer inductor disclosed in this application; Figure 4C This is another schematic diagram of the internal electrodes of the multilayer inductor disclosed in this application; Figure 4D This is yet another schematic diagram of the internal electrodes of the multilayer inductor disclosed in this application; Figure 4E This is another schematic diagram of the internal electrodes of the multilayer inductor disclosed in this application; Figure 4F This is a cross-sectional view of the internal structure of the multilayer inductor disclosed in this application; Figure 4G This is another cross-sectional view of the internal structure of the multilayer inductor disclosed in this application; Figure 4H This is a schematic diagram showing the Q value variation of the multilayer inductor device disclosed in this application when satisfying H1 / H2 at different frequency bands; Figure 4I This is a schematic diagram showing the Q value variation of the multilayer inductor device disclosed in this application at different frequency bands when T1 / T2 is satisfied; Figure 5A This is another cross-sectional view of the internal structure of the multilayer inductor disclosed in this application; Figure 5B This is another cross-sectional view of the internal structure of the multilayer inductor disclosed in this application; Figure 6 This is another cross-sectional view of the internal structure of the multilayer inductor disclosed in this application; Figure 7 This is another cross-sectional view of the internal structure of the multilayer inductor disclosed in this application; Figure 8 This is another cross-sectional view of the internal structure of the multilayer inductor disclosed in this application; Figure 9 This is another cross-sectional view of the internal structure of the multilayer inductor disclosed in this application; Figure 10 This is a cross-sectional view of the internal structure of a multilayer inductor, disclosed to scale. Figure 11 This is another cross-sectional view of the internal structure of a multilayer inductor device, which is disclosed to scale. Figure 12 This is another cross-sectional view of the internal structure of a multilayer inductor, disclosed to scale. Figure 13 This is yet another cross-sectional view of the internal structure of a multilayer inductor, disclosed to scale. Figure 14 This is a schematic diagram of the structure of the electronic device disclosed in the embodiments of this application.

[0013] Explanation of reference numerals in the attached figures: Multilayer inductor - 100; Laminate - 10; Insulating layer - 10a; Second insulating layer - 101; First insulating layer - 102; Top surface - 11; Bottom surface - 12; First side surface - 13; Second side surface - 14; First end surface - 15; Second end surface - 16; Internal electrode - 20; Connecting electrode - 21; Parallel electrode group - 22; Spacer electrode - 23; Parallel electrode - 220; External electrode - 30; Electronic equipment - 200; First direction - Z; second direction - Y; third direction - X. Detailed Implementation

[0014] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0015] In this application, the terms "upper," "left," "right," "front," "rear," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. These terms are primarily for the purpose of better describing this application and its embodiments, and are not intended to limit the indicated device, element, or component to having a specific orientation, or to be constructed and operated in a specific orientation.

[0016] Furthermore, in addition to indicating location or positional relationship, some of the aforementioned terms may also have other meanings. For example, the term "above" may also be used in some cases to indicate a certain dependency or connection relationship. Those skilled in the art can understand the specific meaning of these terms in this application based on the specific circumstances.

[0017] Furthermore, the terms "set up," "equipped with," and "connected" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral structure; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium, or an internal connection between two devices, components, or parts. Those skilled in the art can understand the specific meaning of these terms in this application based on the specific circumstances.

[0018] Furthermore, the terms "first," "second," etc., are primarily used to distinguish different devices, components, or parts (which may be the same or different in specific type and construction), and are not intended to indicate or imply the relative importance or quantity of the indicated devices, components, or parts. Unless otherwise stated, "a plurality of" means two or more.

[0019] An inductor is an electronic device in which a conductor is wound into the shape of internal electrodes and formed on a blank. Its working principle is as follows: when current flows through it, a strong magnetic field is generated across the two ends of the internal electrodes. Due to electromagnetic induction, the inductor exhibits very low resistance to direct current and high impedance to alternating current, thus impeding the flow of changing current. Therefore, inductors are widely used in various electronic devices (such as mobile phones, vibrators, pagers, etc.).

[0020] An important factor in measuring the losses of inductors is their Q value (quality factor). The Q value is the ratio of the energy stored in an inductor to the energy consumed by the inductor during one signal cycle. The lower the losses, the higher the Q value, and thus the better the inductor's performance.

[0021] In related technologies, to improve the Q value, the thickness of the electrode layer (the part wound to form the internal electrodes) of the inductor is usually increased as much as possible to reduce the direct current resistance (DCR). However, this arrangement leads to increased eddy current losses due to the eddy current effect between the electrode layers, thus affecting the improvement of the Q value. Related technologies propose that the electrode layers of the inductor can be connected in parallel, which can reduce the eddy current effect between the electrode layers and reduce eddy current losses.

[0022] In related technologies, in order to ensure the overall insulation withstand voltage performance inside the multilayer inductor, the thickness of the insulation layer between adjacent internal electrodes is usually set to a uniform thickness.

[0023] However, the inventors discovered that between adjacent internal electrodes connected in series, a relatively thick insulation layer is indeed required to ensure withstand voltage and prevent breakdown due to the large potential difference. However, between adjacent internal electrodes in a parallel electrode group, the potential difference is extremely small (or even equipotential), so a thicker insulation layer is not necessary for withstand voltage. Using the same thickness insulation layer as other areas in this region would lead to unnecessary waste of insulation material and also prevent further utilization of the wiring space in the multilayer inductor. Limited by common technical knowledge, designers generally have a bias that "all insulation layers should maintain a consistent thickness to simplify the process and ensure reliability in order to ensure insulation safety," thus ignoring the actual differences in insulation layer thickness requirements under this parallel electrode design. This results in existing multilayer inductors encountering bottlenecks in improving inductance and Q-value.

[0024] In view of this, this application achieves "on-demand allocation" of insulation layer thickness by setting the thickness of the first insulating layer between adjacent internal electrodes in a parallel electrode group to be less than the thickness of the second insulating layer between adjacent internal electrodes in a series connection. On the one hand, retaining a thicker second insulating layer between series electrodes with a large potential difference ensures sufficient withstand voltage margin, avoids insulation breakdown, and guarantees the reliability of the multilayer inductor. On the other hand, thinning the first insulating layer in a parallel electrode group with a small potential difference effectively reduces the stacking thickness of the parallel portion. Thus, without sacrificing withstand voltage performance, if the total thickness of the parallel electrode group and the total thickness of the multilayer inductor remain unchanged, the reduction in the thickness of the first insulating layer allows for more wiring space. That is, within the same product size, more sets of internal electrodes can be arranged, thereby not only increasing the inductance but also effectively improving the Q value. Alternatively, because the thickness of the first insulating layer is reduced, the thickness of the internal electrodes in the parallel electrode group can be increased, thereby further reducing DC resistance and effectively improving the Q value.

[0025] The technical solution of this application will be further described below with reference to the embodiments and accompanying drawings.

[0026] Please refer to the following: Figures 1 to 3 , Figure 1 This is a schematic diagram of the structure of the multilayer inductor 100 disclosed in this application. Figure 2 This is an exploded view of the multilayer inductor device 100 disclosed in this application. Figure 3 This is a top view of the internal structure of the multilayer inductor disclosed in this application.

[0027] This application discloses a multilayer inductor device 100, including a laminate 10, a plurality of internal electrodes 20, and two external electrodes 30. The internal electrodes 20 are typically disposed within the laminate 10, forming the coil portion of the multilayer inductor device 100. The two external electrodes 30 are disposed within the laminate 10.

[0028] It is understood that the multilayer inductor 100 is electrically connected to the wiring of a circuit board (not shown) via the two external electrodes 30. The multilayer inductor 100 is used, for example, as an internal electrode 20 for impedance matching in high-frequency circuits, in electronic devices such as personal computers, DVD players, digital cameras, TVs, mobile phones, automotive electronics, and medical / industrial machinery. However, the application of the multilayer inductor 100 is not limited to this; for example, it can also be used in tuning circuits, filtering circuits, rectifier smoothing circuits, etc.

[0029] like Figure 1 As shown, in some embodiments, the laminate 10 is formed in a generally cuboid shape. The laminate 10 includes: a top surface 11 and a bottom surface 12 opposite to each other along a first direction Z; a first side surface 13 and a second side surface 14 opposite to each other along a second direction Y; and a first end surface 15 and a second end surface 16 opposite to each other along a third direction X. That is, the outer surface of the laminate 10 is formed by the first side surface 13, the second side surface 14, the first end surface 15, the second end surface 16, the bottom surface 12, and the top surface 11. In addition, such as Figure 1 As shown, the first direction Z is orthogonal to the bottom surface 12 and the top surface 11, and extends from the bottom surface 12 toward the top surface 11. The second direction Y is orthogonal to the first side surface 13 and the second side surface 14, and extends from the second side surface 14 toward the first side surface 13. The third direction X is orthogonal to the first end surface 15 and the second end surface 16, and extends from the first end surface 15 toward the second end surface 16. The first direction Z, the second direction Y, and the third direction X are mutually orthogonal.

[0030] In some embodiments, multiple insulating layers 10a are stacked to form a laminate 10. For example, multiple insulating layers 10a can be stacked along the direction from the top surface 11 to the bottom surface 12 (i.e., the first direction Z) to form a laminate 10, or multiple insulating layers 10a can be stacked from the second side surface 14 to the first side surface 13 (i.e., the second direction Y) to form a laminate 10. That is, at least one of the first direction Z and the second direction Y is the stacking direction. Therefore, the multilayer inductor device 100 of this application can be adapted to inductor devices that are stacked from the first direction Z or from the second direction Y, thus having a wider range of applications.

[0031] Furthermore, the number of insulating layers 10a is not limited to Figure 2The quantity. In this application, the stacking is not limited to the direction of stacking during manufacturing, but also includes its opposite direction.

[0032] In some embodiments, the insulating layer 10a is made of a magnetic material or a non-magnetic material. Examples of magnetic materials include ferrite, while examples of non-magnetic materials include glass such as borosilicate glass, alumina, and resin. Multiple insulating layers 10a are stacked in the first direction Z. The insulating layer 10a is a layered structure extending in a YZ plane orthogonal to the stacking direction of the first direction Z.

[0033] In addition, due to firing processes, the interface between two adjacent insulating layers 10a may sometimes be unclear. Please see also Figure 1 and Figure 2 In some embodiments, of the two external electrodes 30, one electrode may be an L-shaped terminal extending from the first end face 15 to the bottom face 12, and the other may be an L-shaped terminal extending from the second end face 16 to the bottom face 12. Alternatively, one of the external electrodes 30 may also be a C-shaped terminal extending from the top face 11 along the first end face 15 to the bottom face 12, and the other external electrode 30 may also be a C-shaped terminal extending from the top face 11 along the second end face 16 to the bottom face 12.

[0034] That is, in this application, the external electrode 30 can be an L-shaped terminal or a C-shaped terminal. By using an L-shaped terminal or a C-shaped terminal design, the connection area between the external electrode 30 and the laminate 10 is larger, which can more effectively resist external mechanical stress and improve the drop resistance of the multilayer inductor 100.

[0035] like Figures 4A to 4G As shown, in some embodiments, at least two of the plurality of internal electrodes 20 are connected in parallel to form a parallel electrode group 22. In the stacking direction, the insulating layer between two adjacent internal electrodes 20 located in the parallel electrode group 22 is a first insulating layer 102, and the insulating layer between two adjacent internal electrodes connected in series is a second insulating layer 101. The thickness of the first insulating layer 102 is less than the thickness of the second insulating layer 101.

[0036] Understandably, for the parallel electrode group 22, the internal electrodes 20 within the group are all connected in parallel. Since parallel connections require at least two through-hole conductors for connection, the first insulating layer 102 between two parallel-connected internal electrodes within the group has at least two through-hole conductors to connect adjacent internal electrodes in parallel. The second insulating layer 101, since it connects between two series-connected internal electrodes, typically requires a through-hole conductor for connection; therefore, the second insulating layer has a through-hole conductor to connect adjacent internal electrodes in series.

[0037] The multilayer inductor 100 of this application, by providing a parallel electrode group 22, can reduce the DC resistance of the internal electrode 20, achieve a large current capacity, and thereby improve the Q value of the multilayer inductor 100.

[0038] Based on the parallel electrode group 22, this application further explores the thickness of the insulating layer (first insulating layer 102) connecting two parallel internal electrodes and the insulating layer (second insulating layer 101) connecting two adjacent series-connected internal electrodes within the parallel electrode group 22. Specifically, since the interlayer potential difference (potential difference) between the parallel-connected internal electrodes of the parallel electrode group 22 is small, if the thickness of the first insulating layer within the parallel electrode group 22 is adjusted to reduce its thickness to increase the thickness of the parallel-connected internal electrodes within the parallel electrode group, the resulting change in parasitic capacitance is almost negligible. However, if the thickness of the first insulating layer is reduced without increasing the thickness of the internal electrodes within the parallel electrode group, the overall thickness of the parallel electrode group can be reduced, allowing for a smaller design of the multilayer inductor. Alternatively, while keeping the overall thickness of the multilayer inductor unchanged, the overall thickness of the coil can be increased, which is beneficial for improving the inductance value of the multilayer inductor. Based on this, this application reduces the thickness of the first insulating layer. On the one hand, while keeping the total thickness of the parallel electrode group constant, the thickness of the two internal electrodes connected in parallel through the first insulating layer can be increased. This increased internal electrode thickness further reduces the DC resistance (RDC), thereby further improving the Q value. On the other hand, when the thickness of the first insulating layer is reduced, the total thickness of the parallel electrode group is also reduced. This allows for more space to be allocated for the internal electrodes while keeping the overall thickness of the multilayer inductor constant, enabling the multilayer inductor to achieve higher inductance. Furthermore, reducing the thickness of the first insulating layer and the total thickness of the parallel electrode group reduces the overall thickness of the multilayer inductor, allowing for miniaturization.

[0039] like Figure 4F , Figure 4G As shown, if the thickness of the first insulating layer is reduced, then while the overall thickness of the multilayer inductor 100 remains unchanged, the thickness of the internal electrodes within the parallel electrode group can be increased (e.g., Figure 4F As shown, Figure 4F The diagram shows a parallel electrode assembly comprising three layers of internal electrodes connected in parallel. Because the thickness of the first insulating layer is reduced, the thickness of the internal electrodes within the parallel electrode assembly is increased. Alternatively, with the overall thickness T1 of the parallel electrode assembly remaining constant, if the thickness of the first insulating layer is reduced, the number of layers of internal electrodes connected in parallel within the parallel electrode assembly can be increased (e.g., ...). Figure 4G As shown, Figure 4G This demonstrates that, with the thickness T1 of the parallel electrode group remaining constant (including four internal electrode layers), that is, using the reduced thickness of the first insulating layer to add new internal electrodes can still improve the Q value. Therefore, the Q value improvement of this application does not require increasing the thickness of the multilayer inductor 100, achieving a Q value improvement while satisfying the miniaturization design requirements of the multilayer inductor.

[0040] In some examples, the plurality of internal electrodes 20 includes a parallel electrode group 22, which may include the following examples: In one example, such as Figure 4A As shown, the plurality of internal electrodes 20 includes a plurality of parallel electrode groups 22, which are connected in series with each other. Here, the first insulating layer 102 refers to the insulating layer within each parallel electrode group, while the second insulating layer refers to the insulating layer between two adjacent parallel electrode groups connected in series. For example, the multilayer inductor device may include three sets of parallel electrode groups, each set including two internal electrodes connected in parallel, and these three sets of parallel electrode groups are connected in series with each other.

[0041] In another example, such as Figure 4B As shown, the plurality of internal electrodes 20 may include a plurality of parallel electrode groups 22 and one or more spacer electrodes 23, wherein the spacer electrode 23 refers to an internal electrode that is connected in series with two parallel groups. Here, the first insulating layer still refers to the insulating layer within each parallel electrode group, while the second insulating layer refers to the insulating layer between the spacer electrode 23 and the parallel electrode group connected in series with it. For example, the internal electrode may include two parallel electrode groups and one spacer electrode, each parallel electrode group may include two internal electrodes connected in parallel, and the spacer electrode is connected in series between the two parallel electrode groups.

[0042] It is understood that the spacer electrode refers to an electrode layer consisting of a single internal electrode.

[0043] By including a spacer electrode 23 within the internal electrodes, the spacer electrode 23 can serve as a buffer layer, increasing the physical distance or electric field isolation between the parallel electrode group 22 and the external electrode 30, reducing parasitic capacitive coupling between the two, and thus improving the self-resonant frequency of the multilayer inductor.

[0044] In another example, such as Figure 4C As shown, the plurality of internal electrodes 20 may further include two connecting electrodes 21. Looking along the stacking direction, a parallel electrode group 22 is located between the two connecting electrodes 21, and the connecting electrodes 21 and the adjacent parallel electrode group 22 are connected in series. The two connecting electrodes 21 can be electrically connected to the two external electrodes 30 respectively. For example, the internal electrode may include two connecting electrodes and a parallel electrode group, which may include, for example, two internal electrodes connected in parallel.

[0045] In another example, the plurality of internal electrodes may include two connecting electrodes and a spacer electrode 23, wherein the spacer electrode 23 refers to an internal electrode connected in series between two adjacent parallel electrode groups. The spacer electrode 23 may be located between two connecting electrodes 21, or even between two parallel electrode groups 22, or between connecting electrodes 21 and parallel electrode groups 22. These will be explained in conjunction with the figures below.

[0046] like Figure 4D As shown, the spacer electrode 23 is located between the connecting electrode 21 and the parallel electrode group 22. Looking along the stacking direction, one connecting electrode 21, the spacer electrode 23, three parallel electrode groups 22, the spacer electrode 23, and another connecting electrode 21 are arranged sequentially. For example, each parallel electrode group may include two internal electrodes connected in parallel.

[0047] like Figure 4E As shown, the spacer electrode 23 is located between two parallel electrode groups 22. For example, the plurality of internal electrodes include two connecting electrodes, two parallel electrodes and one spacer electrode 23. Looking along the stacking direction, one connecting electrode, one parallel electrode group, one spacer electrode 23, another parallel electrode group and another connecting electrode are arranged in sequence.

[0048] It is understandable that, unlike the parallel electrode group which includes multiple internal electrodes connected in parallel, the connecting electrode and the spacer electrode both refer to a single internal electrode.

[0049] It is understood that when there are multiple parallel electrode groups, the number of layers of internal electrodes connected in parallel within these multiple parallel electrode groups can be the same or different. Furthermore, the number of layers of internal electrodes connected in parallel within these parallel electrode groups is not limited to two layers; this is merely an example.

[0050] Understandable, Figures 4A to 4E In the diagram, the black solid horizontal lines represent internal electrodes, the blank space between two black solid horizontal lines represents the insulating layer, and the black vertical lines between two black solid horizontal lines represent the connection method. For example, two black vertical lines connecting two black solid horizontal lines indicate a parallel connection, while a black vertical line connecting two black solid horizontal lines indicates a series connection.

[0051] The present application will now describe a scheme in which the plurality of internal electrodes include two connecting electrodes and one or more parallel electrode groups located between the two connecting electrodes.

[0052] It should be noted that, as Figures 4F to 13 As shown in the figure, the shaded area filled with cross-sectional lines represents the connecting electrode 21 and the internal electrodes (hereinafter referred to as parallel electrodes 220) within the parallel electrode group. The blank area between two adjacent parallel electrodes 220 refers to the first insulating layer 102. The blank area between the connecting electrode 21 and the parallel electrode group connected in series with it refers to the second insulating layer 101.

[0053] Please continue reading. Figure 4F In some embodiments, the thickness of the first insulating layer is H2 and the thickness of the second insulating layer 101 is H1, satisfying: 0.06 < H2 / H1 ≤ 0.8.

[0054] With the overall volume of the multilayer inductor 100 remaining constant, the thickness of the first insulating layer 102, where the parallel electrodes 220 of the parallel electrode group 22 are located, directly affects the thickness of the parallel electrodes 220. Therefore, the smaller the thickness of the first insulating layer 102, the larger the thickness of the parallel electrodes 220, resulting in a smaller DC resistance and a better improvement in the Q value. Thus, satisfying this relationship allows for both insulation isolation between the parallel electrodes 220 of the parallel electrode group 22 and an effective increase in the thickness of the parallel electrodes 220, thereby improving the Q value of the multilayer inductor 100.

[0055] If the relationship exceeds the upper limit, the thickness of the first insulating layer 102 where the parallel electrode 220 is located is not much different from the thickness of the insulating layer 10a where the connecting electrode 21 is located. That is, the thickness of the parallel electrode 220 is not much different from the thickness of the connecting electrode. Therefore, the reduction of the DC resistance of the parallel electrode 220 is not significant, resulting in a lack of significant improvement in the Q value.

[0056] If the relationship exceeds the lower limit, the thickness of the first insulating layer 102 is too small, which may result in the inability to achieve the isolation effect on the conductors between the parallel electrodes 220. It may also directly affect the interlayer magnetic coupling strength of the parallel electrodes 220, which may lead to current phase mismatch in the parallel electrode group 22, resulting in parallel failure and Q value decrease.

[0057] For example, H2 / H1 can be 0.06, 0.1, 0.15, 0.2, 0.25, 0.3, 0.4, 0.5, 0.6, 0.7, or 0.8. The larger the value of H2 / H1, the smaller the difference in thickness between the first insulating layer 102 and the second insulating layer 101, resulting in a more gradual improvement in the Q value. Conversely, the smaller the value of H1 / H2, the smaller the thickness of the first insulating layer 102 and the greater the difference in thickness between it and the second insulating layer 101. Correspondingly, the greater the difference in thickness between the parallel electrode 220 and the connecting electrode 21, thereby reducing DC resistance and effectively improving the Q value.

[0058] Please see Figure 4H , Figure 4H The graph shows the Q value variation curves for H2 / H1 at different values, with the vertical axis representing the Q value. As can be seen from the graph, in the 3GHz band, H2 / H1 gradually increases between 0.04 and 0.15. When H2 / H1 is in the range of 0.15-0.79, the Q value changes relatively smoothly. However, when H2 / H1 exceeds 0.79, for example, at 0.89, the Q value begins to decrease. Therefore, when H2 / H1 is within the range of 0.06-0.8, the Q value changes relatively smoothly; when H2 / H1 exceeds 0.8, the Q value shows a decreasing trend.

[0059] It should be noted that the thickness mentioned above and below refers to the thickness in the stacking direction.

[0060] In some embodiments, the thickness H2 of the first insulating layer 102 satisfies: 0.5μm ≤ H2 ≤ 7μm. Due to the inconsistent shrinkage rates of the electrode material and the substrate material, if the thickness H2 of the first insulating layer of the parallel electrode group 22 is too small (e.g., less than 0.5μm), since the slurry of the substrate and electrode layer is of equal height during preparation, after sintering, the electrode material will have a greater shrinkage rate, resulting in excessive defects and voids in the electrode layer, affecting product reliability. Conversely, if the thickness H2 of the first insulating layer of the parallel electrode group is too large (greater than 7μm), the difference between the thickness H2 of the first insulating layer and the thickness H1 of the second insulating layer may not be significant, leading to insufficient improvement in the Q value.

[0061] For example, the value of H2 can be 0.5μm, 1μm, 2μm, 3μm, 4μm, 5μm, 6μm, 7μm, etc.

[0062] In some embodiments, the thickness of each first insulating layer within the same parallel electrode group is equal. Because the multilayer inductor 100, through the design of the parallel electrode group 22, can optimize losses by utilizing current shunting, thereby reducing DC resistance and increasing the Q value. Therefore, if the thickness of the first insulating layer 102 within the parallel electrode group 22 is uneven or the thickness difference is too large, it may lead to localized current concentration, potentially causing high-frequency losses. Based on this, the thickness of the first insulating layer 102 in the parallel electrode group 22 is made as uniform as possible, so that the current can be evenly distributed throughout the parallel electrode group 22, avoiding high-frequency losses.

[0063] It should be noted that the "equal thickness" of the first insulating layer within the parallel electrode group described in this embodiment refers to substantial or relative equality in terms of design and process objectives, rather than absolute mathematical indifference. Those skilled in the art will understand that in the actual manufacturing process of multilayer inductors (such as casting, printing, lamination, and sintering), factors such as processing precision and inconsistent material shrinkage rates inevitably affect the actual thickness of each first insulating layer, resulting in minor process errors. As long as such thickness differences are within the conventionally acceptable process tolerance range in the art, they should be considered within the scope of the "equal thickness" described in this invention.

[0064] For example, the thickness deviation between any two first insulating layers in the parallel electrode group shall not exceed ±10% of the average thickness of the first insulating layer.

[0065] Correspondingly, for this multilayer inductor, the thickness of each of the multiple second insulating layers is also equal.

[0066] It should be noted that the "uniform thickness" of the second insulating layer refers to substantial or relative equality in terms of design and process objectives, rather than absolute mathematical indistinguishability. Those skilled in the art will understand that in the actual manufacturing process of multilayer inductors (such as casting, printing, lamination, and sintering), factors such as processing precision and inconsistent material shrinkage rates inevitably affect the actual thickness of each second insulating layer, resulting in minor process errors. As long as such thickness differences are within the conventionally acceptable process tolerances in the art, they should be considered within the scope of the "uniform thickness" described in this invention.

[0067] For example, the thickness deviation of the second insulating layer shall not exceed ±10% of the average thickness of the second insulating layer.

[0068] As mentioned above, among the multiple internal electrodes, there are two connecting electrodes for connecting to the two external electrodes respectively. The total thickness of either connecting electrode is less than the total thickness of the parallel electrode group. That is, through the design of the parallel electrode group, the total thickness of the parallel electrode group is increased relative to the total thickness of the connecting electrodes, thereby helping to reduce DC resistance and improve the Q value.

[0069] Furthermore, since the total thickness of the connecting electrodes is less than the total thickness of the parallel electrode group, the thicker parallel electrode group is located closer to the center of the stacked inductor than the connecting electrodes. Since the center of the stacked inductor is often the region with the densest magnetic flux and the core of the magnetic circuit, placing the parallel electrode group closer to the center of the stacked inductor helps to improve the uniformity of current distribution and increase the effective cross-sectional area of ​​the current, which in turn helps to further improve the Q value of the stacked inductor and thus improve the electrical performance of the stacked inductor.

[0070] In some embodiments, the total thickness of any parallel electrode group 22 is T1, and the thickness of the connecting electrode 21 is T2, satisfying: 1.5≤T1 / T2≤5.

[0071] By limiting the ratio of the total thickness of the parallel electrode group 22 to the thickness of the connecting electrode 21 to meet this range, the parallel electrode group 22 can effectively reduce DC resistance, achieve large current capacity, and thus improve the Q value of the multilayer inductor device 100.

[0072] If the relationship exceeds the upper limit, the overall thickness of the parallel electrode group 22 will be too large. If the size of the multilayer inductor device 100 remains unchanged, the parallel electrode group 22 may encroach on the setting space of the connecting electrode 21, resulting in the thickness of the connecting electrode 21 being too small and the connection area between the connecting electrode 21 and the external electrode 30 being too small, which may cause unstable connection.

[0073] If the relationship exceeds the lower limit, the thickness of the parallel electrode group 22 is not much different from that of the connecting electrode 21, and the reduction in DC resistance is not significant, thus the improvement in Q value of the multilayer inductor device 100 is also limited.

[0074] For example, T1 / T2 can be 1.5, 1.8, 2, 2.3, 2.5, 2.8, 3, 4, 5, etc.

[0075] As shown in Table 1 and Figure 4I As shown, Figure 4I The vertical axis represents the Q value. Table 1 below shows the variation of the Q value of this multilayer inductor at different frequency bands, such as 500MHz and 3GHz, for different ratios of T1 / T2.

[0076] Table 1:

[0077] Based on Table 1 above Figure 4I It can be seen that when T1 / T2 is within the range of 1.5-5, the Q value does not change significantly in the 500MHz band. The Q value also changes relatively little in the 3GHz band. However, when T1 / T2 is outside this range, the Q value changes significantly. In other words, a larger T1 / T2 is not necessarily better.

[0078] As mentioned above, the multiple internal electrodes can include multiple parallel electrode groups, with adjacent parallel electrode groups connected in series. The more parallel electrode groups there are, the more the DC resistance of the internal electrodes of the multilayer inductor can be reduced, and the more significant the Q value can be improved.

[0079] The following section will explain the configuration of these multiple parallel electrode groups in conjunction with the illustrations.

[0080] In some embodiments, when the multilayer inductor 100 includes a plurality of parallel electrode groups 22, the thickness of the plurality of parallel electrode groups 22 may be the same (e.g., Figure 8 , Figure 9 (as shown), or, they can be different (as shown). Figure 5A , Figure 5B (As shown). For example, when the multilayer inductor 100 is provided with two parallel electrode groups 22, the thicknesses of the two parallel electrode groups 22 may be the same or different.

[0081] When the thicknesses of the two parallel electrode groups 22 are different, the corresponding difference could be the thickness of the parallel electrodes 220 in the parallel electrode group 22, or the number of layers of parallel electrodes 220 included in the parallel electrode group 22 could be different.

[0082] The following explanation uses the example of two parallel electrode groups 22 having different thicknesses.

[0083] like Figure 5A As shown, in one example, the two parallel electrode groups 22 have different thicknesses. This can be because the two parallel electrode groups 22 include the same number of layers of parallel electrodes 220, for example, each group may include two layers of parallel electrodes 220. However, the thickness of the parallel electrodes 220 in one parallel electrode group 22 is greater than the thickness of the parallel electrodes 220 in the other parallel electrode group 22. For example, as... Figure 5A As shown, Figure 5A The multilayer inductor 100 includes three sets of parallel electrode groups, each of which includes two parallel electrodes 220. Along the stacking direction, the thickness of the parallel electrode 220 in the parallel electrode group 22 located between the two parallel electrode groups 22 is greater than the thickness of the parallel electrodes 220 in the other two parallel electrode groups 22.

[0084] like Figure 5B As shown, in another example, the two parallel electrode groups 22 have different thicknesses. This could be that the parallel electrodes 220 in the two parallel electrode groups 22 have the same thickness, but the number of layers of parallel electrodes 220 differs. For example, one parallel electrode group 22 may have three layers of parallel electrodes 220, while the other parallel electrode group 22 may have two layers of parallel electrodes 220. Figure 5B As shown, along the stacking direction, the first parallel electrode group 22 includes two parallel electrodes 220, the second parallel electrode group 22 includes three parallel electrodes 220, and the third parallel electrode group 22 includes two parallel electrodes 220.

[0085] In particular, when there are three or more parallel electrode groups 22, the study of the total thickness of each parallel electrode group 22 (the sum of the thicknesses of all parallel electrodes 220 and all the first insulating layers 102 of the parallel electrode group 22) can further optimize the current distribution, which will be briefly explained below.

[0086] Please continue reading. Figure 5A and Figure 5B In some embodiments, the laminate 10 is provided with N parallel electrode groups 22, where N ≥ 3, and the N parallel electrode groups 22 are stacked sequentially along the stacking direction; along the stacking direction, the laminate 10 has a first surface and a second surface that are disposed opposite to each other. In the N parallel electrode groups 22, the total thickness of any parallel electrode group 22 increases as the parallel electrode group 22 moves away from both the first and second surfaces in the stacking direction.

[0087] In other words, when the parallel electrode group 22 includes N groups, where N is greater than or equal to 3, the N groups of parallel electrode groups 22 can be arranged sequentially along the stacking direction, and adjacent parallel electrode groups 22 are connected in series. The laminate 10 includes a first surface and a second surface along the stacking direction. Along the stacking direction, if the distance from one of the parallel electrode groups 22 to the first surface or to the second surface is greater than the distance from the other parallel electrode groups 22 to the first or second surface, then the total thickness of the one parallel electrode group 22 is greater than the total thickness of the other parallel electrode groups 22.

[0088] In other words, along the stacking direction, the total thickness of the parallel electrode group 22 closer to the center of the stack 10 can be set to be larger, while the total thickness of the parallel electrode group 22 closer to the edge of the stack 10 in the stacking direction can be set to be smaller accordingly. This is because the greater the total thickness of the parallel electrode group 22 closer to the center of the stack 10, the more significant the reduction in DC resistance, and the greater the current that can pass through it. This allows the large current to be concentrated in these parallel electrode groups 22 with a larger total thickness, thereby optimizing the current distribution and further improving the Q value of the multilayer inductor 100.

[0089] In other words, among the N parallel electrode groups 22, for a parallel electrode group M, if there exists another parallel electrode group O, then the following condition is satisfied: If the distance from the parallel electrode group M to the first surface is less than the distance from the parallel electrode group O to the first surface, and the distance from the parallel electrode group M to the second surface is also less than the distance from the parallel electrode group O to the second surface, then the total thickness of the parallel electrode group M is greater than the total thickness of the parallel electrode group O (equivalent to, if one parallel electrode group 22 is farther away from both the first and second surfaces in the stacking direction than another parallel electrode group 22, then the total thickness of the parallel electrode group 22 is greater). Of course, in other embodiments, the above conditions can also be satisfied if N=2.

[0090] It is understandable that if the stacking direction is the first direction Z, then the first surface and the second surface mentioned above can be the top surface 11 and the bottom surface 12 of the laminate 10, respectively. If the stacking direction is the second direction Y, then the first surface and the second surface mentioned above can be the first side surface 13 and the second side surface 14 of the laminate 10, respectively.

[0091] In some embodiments, along the stacking direction, the parallel electrode group located in the central part of the stack 10 is the first parallel electrode group, and thus, the parallel electrode groups and connecting electrodes located on both sides of the first parallel electrode group are symmetrically arranged about the first parallel electrode group.

[0092] By symmetrically arranging the parallel electrode group 22 and the connecting electrode 21 with the first parallel electrode group located in the center of the laminate 10, the current enters the first parallel coil unit from the connecting electrodes at both ends with a symmetrical path, which can reduce the edge effect (such as local electric field concentration) caused by current deviation. At the same time, it can make the current more uniformly distributed, reduce the local loss at the end, and further improve the Q value.

[0093] The following explanation will take the parallel electrode group 22 as an example, which consists of three groups.

[0094] like Figure 5A , Figure 5BAs shown, along the stacking direction (taking the first direction Z as an example), the internal electrode 20 sequentially includes a connecting electrode A1, a parallel electrode group C1, a parallel electrode group C2, a parallel electrode group C3, and a connecting electrode A2. The parallel electrode group C1 is positioned close to the top surface 11 of the laminate 10, and the parallel electrode group C3 is positioned close to the bottom surface 12 of the laminate 10. The parallel electrode group C2 is further away from the top surface 11 and bottom surface 12 of the laminate 10 than the parallel electrode groups C1 and C3, and is approximately located in the middle of the laminate 10 along the stacking direction. In this case, the total thickness of the parallel electrode group C2 can be greater than the total thickness of the parallel electrode groups C1 and C3.

[0095] Wherein, the total thickness of parallel electrode group C2 is greater than the total thickness of parallel electrode group C1 and parallel electrode group C3 respectively, which may include: In one example, the number of layers of parallel electrodes 220 included in parallel electrode group C2 is greater than the number of layers of parallel electrodes 220 included in parallel electrode groups C1 and C3. For example, parallel electrode group C2 may include three layers of parallel electrodes 220, while parallel electrode groups C1 and C3 may each include two layers of parallel electrodes 220.

[0096] In another example, the number of parallel electrode layers 220 included in parallel electrode group C2 is the same as the number of parallel electrode layers 220 in parallel electrode groups C1 and C3, but the thickness of the parallel electrode layers 220 in parallel electrode group C2 is greater than the thickness of the parallel electrode layers 220 in parallel electrode groups C1 and C3. For example, parallel electrode groups C1, C2, and C3 all include three layers of parallel electrode layers 220, with the parallel electrode layers 220 in parallel electrode group C2 having the largest thickness.

[0097] It is worth noting that, regardless of how many sets of parallel electrode groups 22 the multilayer inductor device 100 includes (e.g., whether it is one set of parallel electrode groups 22 or multiple sets of parallel electrode groups 22), the total thickness of each set of parallel electrode groups 22 is greater than the thickness of the connecting electrode 21.

[0098] Furthermore, for parallel electrode groups C1 and C3, their total thicknesses can be the same or different. Even when their total thicknesses are different, the above example still applies. Additionally, even when their total thicknesses are different, the thickness relationship of their respective insulating layers 10a also satisfies the above example.

[0099] Of course, if there are four parallel electrode groups 22, for example, C1, C2, C3 and C4 in sequence along the stacking direction, then the total thickness of parallel electrode group C2 and the total thickness of parallel electrode group C3 are greater than the total thickness of parallel electrode group C1 and also greater than the total thickness of parallel electrode group C4.

[0100] Please see Figures 6 to 9 ,in, Figure 6 The multilayer inductor device 100 is shown to include a set of parallel electrode groups 22, and the parallel electrode group 22 includes three parallel electrodes 220. Figure 7 The multilayer inductor device 100 is shown to include a set of parallel electrode groups 22, and the parallel electrode group 22 includes two parallel electrodes 220. Figure 8 The multilayer inductor device 100 is shown to include three sets of parallel electrode groups 22, each set of parallel electrode groups 22 includes two parallel electrodes 220, and the total thickness of each set of parallel electrode groups 22 is the same. Figure 9 The multilayer inductor device 100 is shown to include three sets of parallel electrode groups 22, each set of parallel electrode groups 22 including three parallel electrodes 220, and each set of parallel electrode groups 22 has the same total thickness.

[0101] In summary, when the multilayer inductor 100 is provided with parallel electrode groups 22, the number of parallel electrode layers 220 included in the parallel electrode group 22 (which directly affects the total thickness of the parallel electrode group 22) and the number of parallel electrode groups 22 will all affect the reduction of DC resistance and the improvement of Q value. These will be explained in detail below with reference to experimental data.

[0102] In one example, we will first describe the parallel electrode group 22 as a group, and the number of layers of parallel electrodes 220 included in the parallel electrode group 22 is different.

[0103] In one example, such as Figure 6 As shown, Figure 6 An embodiment of this application is shown, wherein the parallel electrode group 22 is a group, the parallel electrode 220 has three layers, and the thickness of the first insulating layer in the parallel electrode group is less than the thickness of the second insulating layer. Figure 10 A multilayer inductor 100 is shown in the comparative example, which also has a set of parallel electrode groups 22, and the number of layers of parallel electrodes 220 is also three. From Figure 10As can be seen, the thickness of the insulating layer within the parallel electrode group 22 in the related technology is the same as the thickness of the insulating layer between the two series-connected internal electrodes. Referring to Table 2 below, Table 2 presents three comparative examples in the related technology where the parallel electrode group 22 is a single group, the number of parallel electrode layers 220 is three, and the ratio of the thickness of the insulating layer within the parallel electrode group 22 to the thickness of the insulating layer between the two series-connected internal electrodes is 1, 1.1, and 1.2, respectively. These are Comparative Examples 1.1, 1.2, and 1.3, showing the Q-value improvement rate at an operating frequency of 0.5 GHz and Q-values ​​of 0.5 GHz and 3 GHz. Table 2 also presents nine embodiments using the parallel electrode group 22 of this application, where the number of parallel electrode layers 220 is three, and the ratio of the thickness of the first insulating layer 102 containing the parallel electrode 220 to the thickness of the second insulating layer 101 connecting the electrode 21 is 0.1-0.9, respectively, referred to as Examples 1.1 to 1.9. The Q-value improvement rates of these nine embodiments at an operating frequency of 0.5 GHz and a Q-value of 0.5 GHz and 3 GHz.

[0104] Table 2:

[0105] As can be seen from Table 2, in Examples 1.1 to 1.9, when the ratio of the first insulating layer to the second insulating layer is less than 0.8, the Q value improvement rate at 0.5 GHz and 3 GHz is improved to a certain extent compared with the comparative example 1.1 with a thickness ratio of 0. The maximum improvement is 1.3% at 0.5 GHz and 2.3% at 3 GHz.

[0106] However, if the thickness of the first insulating layer 102 is greater than the thickness of the second insulating layer 101, such as in Comparative Examples 1.2 and 1.3, the Q value will decrease instead of increase. In other words, if only the parallel electrode group 22 is set, but the thicknesses of the first and second insulating layers are equal, or the thickness of the first insulating layer is greater than that of the second insulating layer, the Q value will decrease.

[0107] In another example, such as Figure 7 As shown, Figure 7 Another embodiment of this application is shown, in which the parallel electrode group 22 is also a group, but the number of layers of parallel electrodes 220 is two. Figure 11 A multilayer inductor 100 is shown in the comparative example, which also has a set of parallel electrodes 220, and the number of layers of parallel electrodes 220 is also two. From Figure 11 As can be seen from the data, the thickness of the insulating layer inside the parallel electrode group 22 in the related technology is equal to the thickness of the insulating layer outside the parallel electrode group located between the two internal electrodes connected in series.

[0108] Referring to Table 3 below, Table 3 presents three comparative examples in the related technology where the parallel electrode group 22 is a group, the number of layers of the parallel electrode 220 is two, and the thickness of the insulating layer inside the parallel electrode group 22 and the thickness of the insulating layer located between the two series-connected internal electrodes outside the parallel electrode group are 1, 1.1, and 1.2, respectively. These are Comparative Examples 2.1, 2.2, and 2.3, showing the Q-value improvement rate at an operating frequency of 0.5 GHz and Q-values ​​of 0.5 GHz and 3 GHz.

[0109] In addition, Table 3 below also provides nine embodiments, namely Embodiments 2.1 to 2.9, in which the parallel electrode group 22 of this application is used as a group, the number of layers of the parallel electrode 220 is two, and the ratio of the thickness of the first insulating layer 102 to the thickness of the second insulating layer 101 is 0.1-0.9.

[0110] Table 3:

[0111] As can be seen from Table 3, in a group of parallel electrode groups 22, in Examples 2.1 to 2.9, when the thickness ratio of the first insulating layer to the second insulating layer is in the range of 0-0.8, the Q value improvement rate at 0.5 GHz and 3 GHz is improved to a certain extent compared with the comparative example 2.1 where the thickness ratio is 0. The maximum improvement is 1.0% at 0.5 GHz and 1.4% at 3 GHz.

[0112] Similarly, if the thickness of the first insulating layer 102 is greater than the thickness of the second insulating layer 101, such as in Comparative Examples 2.2 and 2.3, the Q value will decrease instead of increase. In other words, if only the parallel electrode group 22 is set, but the thicknesses of the first and second insulating layers are equal, or the thickness of the first insulating layer is greater than that of the second insulating layer, the Q value will decrease.

[0113] Combining Tables 2 and 3, it can be seen that when all parallel electrode groups 22 are one group, and the thickness of the first insulating layer 102 is less than the thickness of the second insulating layer 101, the greater the total thickness of the parallel electrode group 22 (which may be due to the more layers of parallel electrodes 220 connected in parallel, or the greater the thickness of the parallel electrodes 220 compared to the thickness of the parallel electrodes when the thickness of the insulating layer in related technologies is equal), the more significant the improvement in Q value.

[0114] In another example, such as Figure 8 As shown, Figure 8 Another embodiment of this application is shown, wherein the parallel electrode group 22 is in multiple groups (e.g., three groups), the total thickness of the three parallel electrode groups 22 is the same, and the number of parallel electrode 220 layers in each parallel electrode group 22 is two. Figure 12A multilayer inductor 100 is shown in the comparative example, which also has three parallel electrode groups 22 of equal thickness, and the number of layers of parallel electrodes 220 is also two. From Figure 12 As can be seen from the data, the thickness of the insulating layer in the parallel electrode group 22 in the related technology is the same as the thickness of the insulating layer between the two internal electrodes connected in series.

[0115] Referring to Table 4 below, Table 4 shows three comparative examples in the related technology where the parallel electrode group 22 has three groups, the parallel electrode 220 has two layers, and the ratio of the thickness of the insulating layer in the parallel electrode group 22 to the thickness of the insulating layer between the two internal electrodes connected in series is 1, 1.1, and 1.2. These are Comparative Examples 3.1, 3.2, and 3.3, respectively, showing the Q-value improvement rate at an operating frequency of 0.5 GHz and Q-values ​​of 0.5 GHz and 3 GHz.

[0116] In addition, Table 4 below also provides nine embodiments, namely Embodiments 3.1 to 3.9, which adopt the parallel electrode group 22 of this application in three groups, the number of layers of the parallel electrode 220 is two, and the ratio of the thickness of the first insulating layer 102 to the thickness of the second insulating layer 101 is 0.1-0.9.

[0117] Table 4:

[0118] As can be seen from Table 4, in Examples 3.1 to 3.9, when the ratio of the first insulating layer to the second insulating layer is less than 0.8, the Q value improvement rate at 0.5 GHz and 3 GHz is improved to a certain extent compared with Comparative Example 3.1 where the thickness ratio is 0. The maximum improvement is 2.5% at 0.5 GHz and 3.1% at 3 GHz.

[0119] Similarly, if the thickness of the first insulating layer 102 is greater than the thickness of the second insulating layer 101, such as in Comparative Examples 3.2 and 3.3, the Q value will decrease instead of increase. In other words, if only the parallel electrode group 22 is set, but the thicknesses of the first and second insulating layers are equal, or the thickness of the first insulating layer is greater than that of the second insulating layer, the Q value will decrease.

[0120] Combining Tables 4 and 3, it can be seen that when the number of parallel electrode groups 22 is the same and the thickness of the first insulating layer is less than the thickness of the second insulating layer, the more parallel electrode groups 22 there are, the more significant the increase in Q value and the more significant the increase in inductance.

[0121] In another example, such as Figure 9 As shown, Figure 9Another embodiment of this application is shown, wherein the parallel electrode group 22 is in multiple groups (e.g., three groups), the total thickness of the three parallel electrode groups 22 is the same, and the number of parallel electrode 220 layers in each parallel electrode group 22 is three. Figure 13 A multilayer inductor 100 is shown in the comparative example, which also has three parallel electrode groups 22 of equal thickness, and the number of parallel electrode groups 220 is also three. Figure 13 As can be seen, the thickness of the insulating layer inside the parallel electrode group 22 is equal to the thickness of the insulating layer outside the parallel electrode group located between the two internal electrodes connected in series.

[0122] Referring to Table 5 below, Table 5 shows three comparative examples in the related technology where the parallel electrode group 22 has three groups, the parallel electrode 220 has three layers, and the ratio of the thickness of the insulating layer inside the parallel electrode group 22 to the thickness of the insulating layer located between the two series-connected internal electrodes outside the parallel electrode group is 1, 1.1, and 1.2. These are Comparative Examples 4.1, 4.2, and 4.3, respectively, showing the Q-value improvement rate at an operating frequency of 0.5 GHz and Q-values ​​of 0.5 GHz and 3 GHz.

[0123] In addition, Table 5 below also provides nine embodiments, namely Embodiments 4.1 to 4.9, in which the parallel electrode group 22 of this application is divided into three groups, the number of layers of the parallel electrode 220 is three, and the ratio of the thickness of the first insulating layer 102 to the thickness of the second insulating layer 101 is 0.1-0.9.

[0124] Table 5:

[0125] As can be seen from Table 5, in Examples 4.1 to 4.9, when the thickness ratio of the first insulating layer to the second insulating layer is in the range of 0-0.8, the Q value improvement rate at 0.5 GHz and 3 GHz is improved to a certain extent compared with Comparative Example 4.1 where the thickness ratio is 0. The maximum improvement is 3.2% at 0.5 GHz and 2.1% at 3 GHz.

[0126] Similarly, if the thickness of the first insulating layer 102 is greater than the thickness of the second insulating layer 101, such as in Comparative Examples 4.2 and 4.3, the Q value will decrease instead of increase. In other words, if only the parallel electrode group 22 is set, but the thicknesses of the first and second insulating layers are equal, or the thickness of the first insulating layer is greater than that of the second insulating layer, the Q value will decrease.

[0127] Combining Tables 5 and 2, it can be seen that when the number of parallel electrode groups 22 is the same and the thickness of the first insulating layer 102 is less than the thickness of the second insulating layer 101, the more parallel electrode groups 22 there are, the more significant the improvement in Q value.

[0128] Furthermore, based on Tables 5 and 4, it can be seen that when the number of parallel electrode groups 22 is the same, and the thickness of the first insulating layer 102 is less than the thickness of the second insulating layer 101, the more layers of parallel electrodes 220 included in a single parallel electrode group 22, the more significant the Q value improvement at a working frequency of 0.5 GHz.

[0129] Thirdly, please see Figure 14 This application also discloses an electronic device 200, which may include the multilayer inductor 100 as described above.

[0130] It is understood that the electronic device may include, but is not limited to, personal computers, DVD players, digital cameras, TVs, mobile phones, automotive electronics, medical / industrial machinery, and other electronic devices.

[0131] The multilayer inductor and electronic device disclosed in the embodiments of this application have been described in detail above. Specific examples have been used to illustrate the principles and implementation methods of this application. The description of the above embodiments is only for the purpose of helping to understand the multilayer inductor and electronic device and its core ideas. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of this application. Therefore, the content of this specification should not be construed as a limitation of this application.

Claims

1. A multilayer inductor device, characterized in that, include: A laminate comprising a plurality of insulating layers stacked along a stacking direction; Two external electrodes are disposed on the laminate. Multiple internal electrodes are disposed on the laminate, and at least two of the multiple internal electrodes are connected in parallel to form a parallel electrode group. In the lamination direction, the insulating layer between two adjacent internal electrodes in the parallel electrode group is a first insulating layer, and the insulating layer between two adjacent internal electrodes connected in series is a second insulating layer. Along the lamination direction, the thickness of the first insulating layer is less than the thickness of the second insulating layer. The thickness of the first insulating layer in the lamination direction is H2, and the thickness of the second insulating layer in the lamination direction is H1, where 0.06 < H2 / H1 ≤ 0.

8. The plurality of internal electrodes further include: Two connecting electrodes are arranged along the stacking direction, wherein one connecting electrode, the parallel electrode group, and the other connecting electrode are arranged in sequence, and the connecting electrode and the parallel electrode group are connected in series. One of the connecting electrodes is connected to one of the external electrodes, and the other connecting electrode is connected to the other external electrode; Along the stacking direction, the total thickness of the connecting electrodes is less than the total thickness of the parallel electrode group.

2. The multilayer inductor device according to claim 1, characterized in that, The thickness H2 of the first insulating layer in the stacking direction satisfies: 0.5μm≤H2≤7μm.

3. The multilayer inductor device according to claim 1, characterized in that, The thickness of each of the first insulating layers located within the parallel electrode group is equal in the stacking direction.

4. The multilayer inductor device according to claim 1, characterized in that, The internal electrode further includes a spacer electrode, which is located between the connecting electrode and the parallel electrode group along the stacking direction.

5. The multilayer inductor device according to claim 1, characterized in that, The total thickness of the parallel electrode group is T1, and the thickness of the connecting electrode is T2, satisfying: 1.5≤T1 / T2≤5.

6. The multilayer inductor according to any one of claims 1-5, characterized in that, The parallel electrode group includes multiple groups, and adjacent parallel electrode groups are connected in series.

7. The multilayer inductor device according to claim 6, characterized in that, The laminate contains N parallel electrode groups, where N ≥ 3; Along the stacking direction, the laminate has a first surface and a second surface disposed opposite to each other; In the N parallel electrode groups, the total thickness of any parallel electrode group increases as the parallel electrode group moves away from both the first surface and the second surface simultaneously in the stacking direction.

8. The multilayer inductor device according to claim 6, characterized in that, Along the stacking direction, the parallel electrode groups and the connecting electrodes located on both sides of the center position of the stack are symmetrical with respect to the center of the stack.

9. The multilayer inductor device according to claim 6, characterized in that, Along the stacking direction, the parallel electrode group located at the center of the stack is the first parallel electrode group, and the number of internal electrode layers included in the first parallel electrode group is greater than the number of internal electrode layers included in any other parallel electrode group.

10. The multilayer inductor according to any one of claims 1-5, characterized in that, The laminate includes a top surface and a bottom surface opposite each other along a first direction, a first side surface and a second side surface opposite each other along a second direction, and a first end surface and a second end surface opposite each other along a third direction. One of the external electrodes is disposed at least on the first end face and the bottom face, and the other external electrode is disposed at least on the second end face and the bottom face; At least one of the first direction and the second direction is the stacking direction, and the first direction, the second direction, and the third direction are perpendicular to each other.

11. An electronic device, characterized in that, Including the multilayer inductor device as described in any one of claims 1-10.

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