On-chip narrow-linewidth laser based on quadruple grating coordination and quantum well transparency

Abstract

This invention relates to the field of semiconductor laser technology, specifically to an on-chip narrow linewidth laser based on quadruple grating synergy and quantum well transparency, comprising: an n-type substrate and a spine waveguide structure disposed on the upper surface of the n-type substrate; the spine waveguide structure includes a lower cladding disposed on the upper surface of the n-type substrate, an active region disposed on the lower cladding, an internal semiconductor grating disposed above or below the active region, and a top metal-semiconductor composite grating disposed on the top surface of the spine waveguide structure; the spine waveguide structure is divided into a DBR reflection waveguide segment and a DFB gain waveguide segment along the cavity length direction. This invention simultaneously constructs an internal semiconductor grating and a top metal-semiconductor composite grating within the same spine waveguide, and achieves transparency of the DBR segment through quantum well intermixing (QWI) technology, utilizing the quadruple grating synergy effect to achieve narrow linewidth output.

Description

Technical Field

[0001] This invention relates to the field of semiconductor laser technology, specifically to an on-chip narrow linewidth laser based on quadruple grating coordination and quantum well transparency. Background Technology

[0002] With the rapid development of 5G / 6G communication, autonomous driving lidar, and quantum information technology, extremely stringent requirements have been placed on the linewidth, side-mode rejection ratio (SMSR), and frequency stability of semiconductor lasers. In coherent optical communication systems, the laser linewidth needs to be below 100kHz to ensure the signal quality of high-order modulation formats; in high-precision FMCW lidar, the linewidth directly determines the ranging accuracy and detection range; and in quantum key distribution (QKD) systems, linewidth and phase noise are key factors affecting the secure key rate.

[0003] While traditional DFB (distributed feedback) lasers possess good single-mode characteristics, their linewidth is typically limited to the 50-100 kHz range due to the coupling coefficient κ of a single-layer grating and the cavity length, making it difficult to meet the demands of the aforementioned high-end applications. To achieve narrower linewidths, researchers have developed DBR (distributed Bragg reflection) lasers and external cavity lasers (ECL) schemes. However, traditional DBR lasers suffer from the following inherent drawbacks:

[0004] (1) Mode hopping and multimode operation: Traditional DBR lasers usually do not have gratings in the gain region and rely solely on passive DBR gratings to provide wavelength selection. The mode locking capability is insufficient, and mode hopping is prone to occur when temperature or current fluctuates, or even multimode lasing.

[0005] (2) Low filtering efficiency of single-layer grating: Traditional DBR or DFB lasers only use a single-layer grating, and the grating coupling coefficient κ is limited, resulting in a short photon lifetime and difficulty in further narrowing the linewidth;

[0006] (3) High absorption loss in the passive region: The reflective region of the traditional DBR laser is a passive waveguide. The quantum well material has strong absorption of the laser wavelength. In order to reduce absorption, the quantum well is usually stripped or a complex regeneration process is used, which leads to high insertion loss and reduced output power.

[0007] (4) Poor integration of external cavity lasers: Although external cavity lasers (such as those using fiber gratings or silicon waveguide external cavities) can achieve sub-kHz linewidths, they are bulky, difficult to align, and have poor vibration resistance, which cannot meet the miniaturization and high reliability requirements of optical communication modules and lidar. Summary of the Invention

[0008] To address the problems mentioned in the background section, the present invention provides the following technical solution.

[0009] On-chip narrow-linewidth lasers based on quadruple grating coordination and quantum well transparency include:

[0010] n-type substrate and a back waveguide structure disposed on the upper surface of the n-type substrate;

[0011] The spine waveguide structure includes a lower cladding layer disposed on the upper surface of the n-type substrate, an active region disposed on the lower cladding layer, an internal semiconductor grating disposed above or below the active region, and a top metal-semiconductor composite grating disposed on the top surface of the spine waveguide structure.

[0012] The active region comprises multiple quantum well layers;

[0013] The internal semiconductor grating is an InP / InGaAsP first-order refractive index coupled grating. The Bragg wavelength of the internal semiconductor grating is aligned with the center wavelength Λ0 of the on-chip narrow linewidth laser based on quadruple grating synergy and quantum well transparency, where Λ0 = 1550 nm. The grating grooves and grating ridges of the internal semiconductor grating are filled and completely covered by InP. The upper and lower layers of the internal semiconductor grating are in close contact with InP material.

[0014] The top metal-semiconductor composite grating includes a grating structure etched on an InGaAs contact layer and a gold layer filling and covering the grating structure. The InGaAs contact layer has a thickness of 150-250 nm, the groove depth of the grating structure is 50-150 nm, and the gold layer has a thickness of 1-2 μm, filling the grooves of the grating structure and continuously covering the peaks and valleys of the grating. The Bragg wavelength of the top metal-semiconductor composite grating is also aligned with the center wavelength Λ0. The top metal-semiconductor composite grating also serves as the p-type electrode of the on-chip narrow linewidth laser based on quadruple grating synergy and quantum well transparency.

[0015] The spine waveguide structure is divided into a DBR reflection waveguide section and a DFB gain waveguide section along the cavity length direction, and an electrically insulating isolation structure is provided between the DBR reflection waveguide section and the DFB gain waveguide section.

[0016] The internal semiconductor gratings located in the DBR reflection waveguide section and the DFB gain waveguide section are continuous structures of the same grating layer;

[0017] The top metal-semiconductor composite grating located in the DBR reflection waveguide section and the DFB gain waveguide section is an integral continuous structure spanning the two sections;

[0018] The internal semiconductor grating located in the DFB gain waveguide section is provided with at least one first phase shift, and the top metal-semiconductor composite grating located in the DFB gain waveguide section is provided with at least two second phase shifts, and the first phase shift and the second phase shift are staggered in the vertical direction.

[0019] The ratio of the grating period of the internal semiconductor grating to that of the top metal-semiconductor composite grating is 1.15-1.25;

[0020] Ion implantation and annealing are performed within the DBR reflection waveguide section to form a quantum well intermixed transparency region, causing a blue shift in the energy band of this quantum well section and achieving transparency to the center wavelength.

[0021] The left end face of the DBR reflection waveguide section is coated with a high-reflection film, and the right end face of the DFB gain waveguide section is coated with an anti-reflection film.

[0022] As a preferred embodiment of the above technical solution, the internal semiconductor grating has a period Λ1 = 235-245nm and a thickness of 10-30nm, and is disposed within 50-100nm above or below the active region; the top metal-semiconductor composite grating has a period Λ2 = 280-290nm; and the vertical distance between the internal semiconductor grating and the top metal-semiconductor composite grating is 1.5-2.5μm.

[0023] As a preferred embodiment of the above technical solution, the first phase shift is located at the middle of the length direction of the DFB gain waveguide segment, and the first phase shift causes the relative offset between the two grating segments on both sides of the phase shift point to be Λ1 / 2; the second phase shift is located at 1 / 3 and 2 / 3 positions in the length direction of the DFB gain waveguide segment, and each second phase shift causes the relative offset between adjacent grating segments to be 2Λ2 / 3.

[0024] As a preferred embodiment of the above technical solution, the length of the DBR reflection waveguide section is 0.4-0.6 mm, and the length of the DFB gain waveguide section is 0.8-1.2 mm.

[0025] As a preferred embodiment of the above technical solution, the width of the electrical insulation isolation structure is 20-40 μm, and the electrical insulation isolation structure is a hydrogen ion implantation region or a groove filled with polyimide insulating material.

[0026] The internal semiconductor grating of the DBR reflection waveguide section forms a semiconductor DBR grating after quantum well mixing and transparency treatment, which, together with the top metal-semiconductor composite grating, constitutes a double-layer DBR reflector. The internal semiconductor grating of the DFB gain waveguide section forms a semiconductor DFB grating, which, together with the top metal-semiconductor composite grating, constitutes a double-layer DFB resonant cavity. The internal semiconductor grating and the top metal-semiconductor composite grating of the DFB gain waveguide section constitute a double-layer grating staggered phase shift structure, that is, the phase shift of the internal grating and the phase shift of the top grating are staggered along the grating length direction. This structure can effectively suppress the spatial hole burning effect, homogenize the photon density distribution in the cavity, further narrow the linewidth and improve single-mode stability. The Bragg wavelengths of the four gratings are matched to form a cascaded filtering effect.

[0027] As a preferred embodiment of the above technical solution, a microcurrent is also required to be applied to the DBR reflection waveguide section to compensate for the residual free carrier absorption and waveguide scattering loss of the DBR reflection waveguide section. The power consumption caused by the microcurrent is less than 5mW, the local temperature rise is less than 1℃, and the Bragg wavelength drift is less than 0.01nm.

[0028] As a preferred embodiment of the above technical solution, a temperature control module is also included, which includes a TEC thermoelectric cooler and a temperature sensor, with a temperature control accuracy of ±0.01℃.

[0029] As a preferred embodiment of the above technical solution, the on-chip narrow linewidth laser based on quadruple grating coordination and quantum well transparency is fabricated by the following steps:

[0030] S1. The lower cladding, active region, grating support layer and top InGaAs contact layer are epitaxially grown on an n-type InP substrate by MOCVD.

[0031] S2. An internal semiconductor grating is fabricated by electron beam lithography and ICP etching with an etching depth of 10-30nm. The grating layer material is InGaAsP, and the grooves are filled and covered by InP. In the middle of the grating region corresponding to the DFB gain waveguide section, a Λ1 / 4 phase shift is introduced by electron beam lithography pattern design, and the phase shift position accuracy is better than ±50nm.

[0032] S3. Continue MOCVD epitaxial growth of the cladding layer, planarize the surface and cover the internal semiconductor grating, and finally retain a 150-250nm thick InGaAs contact layer on the surface.

[0033] S4. The spine waveguide structure is formed by photolithography and ICP etching;

[0034] S5. Define the DBR reflection waveguide section and the DFB gain waveguide section, and prepare an electrically insulating isolation structure at the interface between the two sections;

[0035] S6. Phosphorus ion implantation is performed on the DBR reflective waveguide section, followed by annealing to form a quantum well intermixed transparency region. The annealing temperature does not exceed 700℃, the annealing time does not exceed 60s, and all subsequent process temperatures do not exceed 400℃. This causes a blue shift of the quantum well band structure of the DBR reflective waveguide section by 60-100nm, increasing the intrinsic absorption coefficient of this quantum well section from greater than 5000cm². -1 Reduce to less than 500cm -1 ;

[0036] S7. Define the grating pattern on the top surface of the spine waveguide structure using electron beam lithography, and form a grating structure with a groove depth of 50-150nm by ICP etching on the InGaAs contact layer; wherein, in the grating region corresponding to the DFB gain waveguide section, two phase shifts are introduced by electron beam lithography pattern design, located at 1 / 3 and 2 / 3 of the grating length respectively, with each phase shift offset being two-thirds of the top grating period, and the phase shift position accuracy being better than ±100nm;

[0037] S8. A metal seed layer is deposited by electron beam evaporation and combined with electroplating or chemical mechanical polishing to form a top metal-semiconductor composite grating. The total thickness of the metal layer is 1-2 μm, which fills the InGaAs grooves and continuously covers the ridges and valleys, while also serving as a p-type electrode.

[0038] S9. The gold layer in the top metal-semiconductor composite grating is rapidly thermally annealed to form an alloyed ohmic contact with the InGaAs below. The annealing temperature is 380-420℃ and the annealing time is 30-60s, forming an alloyed ohmic contact with a contact resistivity of less than 1×10⁻⁶. -5 Ω・cm 2 The sidewall tilt angle of the top metal-semiconductor composite grating is 80°-85°.

[0039] S10, thin the n-type substrate and deposit an n-type electrode;

[0040] S11, cleavage cavity surface, high reflectivity film is deposited on the left end face of the DBR reflection waveguide section, and antireflection film is deposited on the right end face of the DFB gain waveguide section;

[0041] S12, integrates temperature control module and encapsulates it.

[0042] As a preferred embodiment of the above technical solution, in step S8, a stepwise electron beam evaporation process is adopted to first deposit a Ti / Pt / Au seed layer of 200-300 nm, and then thicken it to 1-2 μm by electroplating, or to use a metal lift-off auxiliary layer to improve the aspect ratio lift-off effect; the thickness of the metal layer is greater than the InGaAs groove depth to ensure that electrical continuity and mechanical integrity are maintained at the phase shift step.

[0043] As a preferred embodiment of the above technical solution, the photolithography accuracy of the inner semiconductor grating is ±2nm, and the etching depth accuracy is ±5nm; the photolithography accuracy of the top metal-semiconductor composite grating is ±5nm; and the inner semiconductor grating and the top metal-semiconductor composite grating do not require sub-nanometer alignment.

[0044] This invention provides an on-chip narrow linewidth laser based on quadruple grating synergy and quantum well transparency. An internal semiconductor grating and a top metal-semiconductor composite grating are simultaneously constructed within the same spine waveguide, and the transparency of the DBR segment is achieved through quantum well intermixing (QWI) technology. Narrow linewidth output is realized by utilizing the quadruple grating synergy effect. Compared with existing technologies, this invention offers the following advantages:

[0045] 1. Quadruple gratings work together to filter light, achieving narrow linewidth output.

[0046] This invention constructs a quadruple grating structure on the same chip: a DBR inner semiconductor grating, a DBR top metal grating, a DFB inner semiconductor grating, and a DFB top metal grating. The four gratings work synergistically through different physical mechanisms to form a cascaded filtering effect.

[0047] The internal semiconductor grating and the top metal-semiconductor composite grating of this invention are vertically separated double-layer grating structures, rather than double-period gratings in the same plane. The two gratings are located inside the back ridge waveguide structure (near the active region, n_eff1≈3.28) and on the top surface of the back ridge waveguide structure (InGaAs contact layer, n_eff2≈2.75), respectively, with a longitudinal spacing Δz≈2μm. By precisely controlling the period ratio Λ2 / Λ1=n_eff1 / n_eff2≈1.19, the Bragg wavelengths of the two gratings are precisely aligned with the same center wavelength (1550nm). Because the two gratings are coherently superimposed longitudinally rather than competing laterally, their reflection spectrum is enhanced rather than split at the Bragg wavelength, resulting in a narrower equivalent reflection bandwidth and thus achieving narrow linewidth output.

[0048] This invention employs a composite cavity structure, effectively extending photon lifetime. Through the synergistic effect of the DFB gain section and the DBR reflection section, as well as the cascaded filtering effect of the quadruple grating, the Schawlow-Townes linewidth of the laser is significantly reduced. Under typical operating conditions (output power on the order of 10mW), the theoretically expected linewidth can be narrowed to 5-20kHz, an order of magnitude lower than that of traditional DFB lasers (50-100kHz), with an SMSR exceeding 60dB.

[0049] 2. The double-layer grating staggered phase shift design suppresses the hole burning effect and further narrows the linewidth.

[0050] This invention innovatively employs a double-layer grating staggered phase-shift design in the DFB gain waveguide section: the inner semiconductor grating features a single quarter-wavelength phase shift in the middle (the gratings on either side of the phase shift point are offset by half the inner grating period), while the top metal-semiconductor composite grating features two two-thirds phase shifts at 1 / 3 and 2 / 3 of its length (corresponding to a 4π / 3 phase abrupt change). The phase shift positions of the two gratings are staggered along the length (the inner grating phase shift is at the center, and the top grating phase shifts are at 1 / 3 and 2 / 3), forming a non-periodic equivalent refractive index modulation distribution.

[0051] Physical mechanisms and advantages:

[0052] When a traditional DFB laser uses a single-layer quarter-wavelength phase-shift grating, the optical energy is concentrated near the phase-shift point, forming a local high photon density region. This induces spatial hole burning, which leads to uneven carrier distribution, gain saturation, and enhanced nonlinear effects, ultimately manifesting as linewidth broadening and mode instability.

[0053] This invention achieves the following improvements through a staggered phase shift design:

[0054] (1) Light field homogenization: The quarter-wavelength phase shift of the internal grating provides the basic π phase change, ensuring that the fundamental mode obtains the lowest threshold gain at the Bragg wavelength; the two two-thirds period phase shifts of the top grating generate additional phase modulation, which is equivalent to introducing multiple virtual phase shift points in the cavity, making the longitudinal mode light field energy more uniformly distributed along the cavity length, avoiding excessive concentration at a single phase shift point.

[0055] (2) Suppression of hole burning effect: The uniform photon density distribution makes the carrier consumption more balanced, the spatial hole burning effect is significantly reduced, the non-uniform broadening of the gain spectrum is suppressed, and the laser can maintain single-mode operation at a higher injection current.

[0056] (3) The linewidth is further narrowed: the suppression of the hole burning effect reduces the intensity noise and phase noise of the laser. Combined with the cascaded filtering effect of the quad grating, the linewidth can be narrowed to 5-10kHz (about 30% improvement compared to the design without misalignment phase shift).

[0057] (4) Improved mode stability: The multi-peak reflection spectrum generated by the phase shift is coherently enhanced at the center wavelength, and the side mode suppression ratio (SMSR) can be improved to more than 65dB. There is no mode skipping phenomenon in a wide temperature range and injection current range.

[0058] 3. Surface plasmon effect enhances the localization of the optical field

[0059] In the top metal-semiconductor composite grating, the gold layer (1-2 μm thick) forms a metal-dielectric interface with the InGaAs semiconductor, supporting surface plasmon polariton (SPP) modes. According to the Drude model, the complex permittivity of gold at 1550 nm is ε_Au≈-132+12.6i, which contrasts sharply with the permittivity of InGaAs (ε≈12.25), resulting in a highly localized electromagnetic field at the interface (penetration depth δ≈20 nm into gold and δ≈200 nm into the semiconductor). This subwavelength localization enhances the coupling efficiency between the metal grating and the waveguide modes. With optimized metal thickness and groove depth, the equivalent coupling coefficient κ_metal can be increased by approximately 30%, while also helping to suppress grating radiation loss, thus facilitating further narrowing of the linewidth.

[0060] 4. Two-section structure and QWI transparency address inherent defects of DBR lasers.

[0061] Traditional DBR lasers suffer from severe quantum well absorption in their passive reflector region. This invention addresses this issue by employing quantum well intermixing (QWI) technology, selectively implanting phosphorus ions and annealing (temperature not exceeding 700℃, time not exceeding 60s) only in the DBR reflector waveguide section. This results in a 60-100nm blue shift of the quantum well bandgap in this section, increasing the intrinsic absorption coefficient for 1550nm laser wavelength from greater than 5000 cm⁻¹. -1 Reduce to less than 500cm -1 This achieves transparency. Simultaneously, by controlling the temperature of all subsequent processes to not exceed 400℃, further mixing of the already formed QWI transparent regions is prevented.

[0062] Independent current control is achieved between the two sections through an electrically insulating isolation structure. A microcurrent (5-20mA) can be applied to the DBR section to provide a small gain, which is used to compensate for the residual free carrier absorption (α_fc≈5-10cm) in this section. -1 ) and waveguide scattering loss (α_scatt≈2-5cm) -1 (i.e., intrinsic absorption of the quantum well), rather than compensation quantum well intrinsic absorption.

[0063] DBR Microcurrent Thermal Effect Analysis: When a microcurrent I_DBR = 5-20mA is applied to the DBR segment, the resistance R_DBR ≈ 5-10Ω (mainly from the p-type upper cladding and n-type substrate), and the power consumption P_DBR = I 2R≈0.125-4mW<5mW. The local temperature rise caused by this power consumption can be estimated using the heat conduction equation: ΔT≈P_DBR・R_th, where the thermal resistance R_th≈d / (κ・A), d is the chip thickness (150μm), κ is the InP thermal conductivity (68W / m・K), and A is the DBR segment area (0.5mm×3μm). The calculated ΔT<1℃, which is much smaller than the TEC temperature control accuracy (±0.01℃), and the resulting effective refractive index change Δn / n<10. -4 The corresponding Bragg wavelength shift is <0.01nm, which is much smaller than the DFB mode spacing (~0.3nm), and will not cause mode hopping or significant linewidth broadening.

[0064] 5. The top metal grating serves as both an electrode and a grating, improving integration and reliability.

[0065] The top metal-semiconductor composite grating (Au / InGaAs) of this invention serves simultaneously as a p-type electrode and a DFB / DBR grating. A low-resistance ohmic contact (contact resistivity < 1 × 10⁻⁶) is formed by continuously covering the InGaAs grooves with a 1-2 μm thick gold layer. -5 Ω・cm 2 To address the challenges of thick metal stripping, this invention employs a stepwise electron beam evaporation process (first depositing a 200-300nm seed layer, then electroplating to thicken it) or a metal stripping auxiliary layer process to ensure effective aspect ratio stripping.

[0066] The metal grating is located on the top surface of the waveguide. Utilizing the extremely high reflectivity of gold (>98%) and the aforementioned surface plasmon resonance effect, it effectively suppresses upward light scattering and radiation loss, which are common in traditional semiconductor gratings. The integrated design of the electrodes and grating significantly simplifies the manufacturing process and improves device reliability and heat dissipation.

[0067] The thickness of the metal layer (1-2 μm) is much greater than the InGaAs groove depth (50-150 nm), ensuring electrical continuity and mechanical integrity at the phase shift step.

[0068] 6. Dual mode-locking mechanism to suppress mode hopping and multimode phenomena.

[0069] This invention simultaneously incorporates an internal semiconductor DFB grating and a top metal DFB grating in the DFB gain waveguide section, forming a dual-mode locking mechanism. In the DBR reflection waveguide section, the internal semiconductor grating, after being made transparent via QWI, retains its refractive index perturbation structure, working in conjunction with the top metal grating to provide narrowband reflection. The synergistic effect of the four gratings significantly enhances the laser's mode selectivity, exhibiting no mode hopping within a temperature range of -40℃ to +85℃, and demonstrating superior single-mode stability compared to traditional DBR lasers.

[0070] 7. Strong process compatibility, suitable for large-scale mass production.

[0071] The core processes of this invention (MOCVD epitaxy, electron beam lithography, ICP etching, QWI ion implantation, and metal lift-off / electroplating) are fully compatible with existing InP-based DFB laser production lines. The period difference between the internal semiconductor grating and the top metal grating is determined by the effective refractive index of their respective positions. The two gratings are fabricated independently in different process steps, eliminating the need for sub-nanometer alignment. A lithographic tolerance of ±5nm is sufficient, demonstrating promising industrialization prospects. Attached Figure Description

[0072] Figure 1 This is a top view of the structure of the present invention;

[0073] Figure 2 This is a front view structural diagram of the present invention;

[0074] Figure 3 This is a schematic diagram of the right-side structure of the present invention.

[0075] In the picture:

[0076] 1. n-type substrate;

[0077] 2. Ridge waveguide structure; 21. Active region; 22. Internal semiconductor grating; 23. Top metal-semiconductor composite grating;

[0078] 3. DBR reflection waveguide section;

[0079] 4. DFB gain waveguide section; 41. First phase shift; 42. Second phase shift;

[0080] 5. Electrical insulation and isolation structure. Detailed Implementation

[0081] The technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention.

[0082] Example 1: Quadruple grating cooperative narrow linewidth laser

[0083] The semiconductor laser in this embodiment uses an InP-based 1550nm wavelength material system, and its specific structure is as follows:

[0084] n-type substrate 1: n-type InP, thickness 150μm, Si doping concentration 8×10⁻⁶ 18 cm -3 .

[0085] Lower cladding: n-type InP, 1.5 μm thick.

[0086] Active region 21: Contains 4 AlGaInAs / InGaAsP strained quantum wells with a well width of 7nm, a barrier width of 11nm, and a peak gain wavelength of 1550nm, located above the lower cladding.

[0087] Internal semiconductor grating 22: Located 80 nm above the active region 21, it is an InP / InGaAsP first-order refractive index coupled grating with a period Λ1 = 236 nm, a thickness of 20 nm, and a duty cycle of 0.5. The grating layer material is InGaAsP (bandgap wavelength Λg = 1.18 μm). Grooves are formed by electron beam lithography and ICP etching (Cl2 / Ar) to a depth of 20 nm, penetrating the InGaAsP layer. Subsequently, during epitaxial growth of the cladding layer, it is filled and completely covered by InP material. Both the upper and lower layers of the internal semiconductor grating 22 are made of InP material.

[0088] In this embodiment, the internal semiconductor grating 22 of the DFB gain waveguide section 4 adopts a mid-wavelength phase-shift structure: the total grating length is 1.0 mm, and the phase-shift point is located at 0.5 mm. The phase shift is achieved by precisely offsetting half a cycle (Λ1 / 2 = 118 nm) in the grating pattern during electron beam lithography, resulting in a physical offset of Λ1 / 2 between the grating grooves on both sides of the phase-shift point. This quarter-wavelength phase shift ensures the formation of a transmission peak at the Bragg wavelength, enabling the mode to obtain the lowest threshold gain.

[0089] The top metal-semiconductor composite grating 23 of the DFB gain waveguide section 4 adopts a dual phase-shift structure: the total length of the grating is 1.0 mm, and the two phase-shift points are located at 0.333 mm and 0.667 mm, respectively. Each phase shift is achieved by offsetting 2Λ2 / 3≈188 nm (corresponding to a 4π / 3 phase shift) during electron beam lithography, so that the grating is divided into three segments, and the relative offset between adjacent segments is 2Λ2 / 3.

[0090] The phase shifts of the two gratings are misaligned: the single phase shift of the inner grating is located at the center (0.5 mm), while the two phase shifts of the top grating are located at 1 / 3 and 2 / 3 (0.333 mm and 0.667 mm). This misalignment design avoids the overlap of phase shift points in the vertical direction, making the energy distribution of the optical field in the cavity more uniform and effectively suppressing the spatial hole burning effect.

[0091] The quarter-wavelength phase shift of the internal semiconductor grating 22 needs to ensure a phase shift position accuracy better than ±50nm; the double phase shift position accuracy of the top metal-semiconductor composite grating 23 only needs to be better than ±100nm to meet the requirements. Experimental results show that misalignment within ±50nm does not affect device performance, and basic performance stability can still be maintained within ±100nm.

[0092] Top metal-semiconductor composite grating 23: Located on the InGaAs contact layer on the top surface of the spine waveguide structure 2. The InGaAs contact layer is 200 nm thick. The grating pattern (period Λ2 = 282 nm, duty cycle 0.6) is defined by electron beam lithography, and the groove depth is formed by ICP etching to 100 nm. A stepwise electron beam evaporation process is used: first, a Ti (15 nm) / Pt (20 nm) / Au (200 nm) seed layer is deposited, and then Au is thickened to a total thickness of 1.1 μm by electroplating. The metal fills the InGaAs grooves and continuously covers the peaks and valleys of the grating, forming a smooth metal surface. The top metal grating also serves as a p-type electrode, forming an alloyed ohmic contact with InGaAs through RTA (400 °C, 45 s, N2 atmosphere), with a contact resistivity of approximately 8 × 10⁻⁶. -6 Ω・cm 2 .

[0093] Period ratio verification: Λ2 / Λ1=282 / 236≈1.194, which matches n_eff1 / n_eff2≈3.28 / 2.75≈1.193, ensuring that the Bragg wavelengths of both gratings are precisely aligned to 1550nm.

[0094] The spine waveguide structure 2 has a total length of 1.5 mm and is divided into two sections along the cavity length direction: the left DBR reflection waveguide section 3 has a length of 0.5 mm, and the right DFB gain waveguide section 4 has a length of 1.0 mm.

[0095] Electrically insulating isolation structure 5: Located at the interface between DBR reflection waveguide section 3 and DFB gain waveguide section 4, with a width of 30 μm. This embodiment employs hydrogen ion implantation (H... + Energy 100keV, dose 1×10 15 cm -2 This forms a high-resistance region, achieving electrical insulation between the two sections, with an isolation resistance >10kΩ.

[0096] Selective phosphorus ion implantation (P) was performed on DBR reflection waveguide segment 3. + Energy 80keV, dose 5×10 14 cm -2 A quantum well intermixing transparent region was formed, followed by rapid thermal annealing at 700°C for 60 seconds, causing intermixing of this quantum well segment. This resulted in a blue shift of the energy bands by approximately 80 nm, and an intrinsic absorption coefficient for the 1550 nm wavelength increased from >5000 cm⁻¹. -1 Reduce to <500cm -1 Transparency is achieved. SIMS verification shows that the interdiffusion at the InGaAsP / InP interface is less than 5 nm, and the grating refractive index contrast Δn remains above 0.15, meeting the DBR reflection requirements. All subsequent processes (including the top metal grating RTA) are carried out at temperatures not exceeding 400℃ to prevent further intermixing in the QWI region.

[0097] The left end face of DBR reflection waveguide section 3 is coated with a high-reflection film (HR, reflectivity > 98%); the right end face of DFB gain waveguide section 4 is coated with an anti-reflection film (AR, reflectivity < 1%).

[0098] Explanation of the quadruple grating cooperative mechanism:

[0099] In this embodiment, the four gratings each play a different physical role and work together:

[0100] First layer (DBR internal semiconductor grating): An InP / InGaAsP grating located inside the DBR reflection waveguide section, after being transparentized by QWI, serves as a low-loss refractive index-coupled DBR grating, providing narrowband reflection.

[0101] The second layer (DBR top metal grating): The Au / InGaAs composite grating located on the top surface of the DBR segment utilizes the high reflectivity of gold to provide strong reflection, while the metal-semiconductor interface supports the surface plasmon effect, enhancing the localization of the light field.

[0102] The third layer (DFB internal semiconductor grating): The InP / InGaAsP grating located inside the DFB gain waveguide section serves as the core DFB feedback structure, locking the laser wavelength and providing mode selection; the grating has a Λ1 / 4 phase shift in the middle to ensure the lowest threshold gain is obtained at the Bragg wavelength.

[0103] The fourth layer (DFB top metal grating): The Au / InGaAs composite grating located on the top surface of the DFB section is superimposed on the internal DFB grating to enhance the feedback efficiency; the grating has two 2Λ2 / 3 phase shifts at 1 / 3 and 2 / 3 of its length, which are staggered with the phase shifts of the internal grating to effectively suppress the spatial hole burning effect.

[0104] The Bragg wavelength of the quadruple grating is precisely aligned at 1550nm. Because the internal semiconductor grating is vertically separated from the top metal grating (pitch Δz≈2μm) and aligned to the same Bragg wavelength through n_eff・Λ, their reflections are coherently superimposed in the longitudinal direction rather than competing laterally, thus narrowing the equivalent reflection bandwidth and achieving a narrow linewidth output of 5-20kHz.

[0105] Preparation method:

[0106] S1. Epitaxial growth. On an n-type InP substrate, an n-InP lower cladding layer (1.5 μm), an n-GRINSCH layer (0.25 μm), an active region (multiple quantum wells, 4 wells), a p-GRINSCH layer (0.25 μm), a grating carrier layer (InGaAsP, 20 nm), and a first p-InP upper cladding layer (0.8 μm) are grown sequentially using MOCVD.

[0107] S2. Fabrication of the internal semiconductor grating 22. The grating pattern is defined by electron beam lithography. A Λ1 / 4 phase shift (offset Λ1 / 2 = 118 nm) is introduced in the middle of the grating region corresponding to the DFB gain waveguide segment 4. ICP dry etching (Cl2 / Ar, etching depth 20 ± 3 nm) is then performed to form an InGaAsP grating with a period of 236 nm and a duty cycle of 0.5. The photoresist mask is then removed.

[0108] S3, Secondary epitaxy. Continue MOCVD growth of the second p-InP cladding layer (0.9 μm) and the top InGaAs contact layer (200 nm), planarize the surface and cover it with the internal semiconductor grating 22.

[0109] S4. Ridge waveguide structure 2 is formed. A 1.5mm long ridge pattern (0.5mm is the DBR segment and 1.0mm is the DFB segment) is defined using i-line lithography, and ICP etching is performed on the surface of the p-GRINSCH layer to form the ridge waveguide structure 2.

[0110] S5, Electrically insulating isolation structure 5 is fabricated. At the interface between the DBR reflection waveguide section 3 and the DFB gain waveguide section 4 (0.5 mm from the left end face of the DBR), a 30 μm wide window is defined by photolithography for hydrogen ion implantation (H... + 100keV, 1×10 15 cm -2 This forms an electrically insulating zone.

[0111] S6, QWI transparency treatment. The DBR reflective waveguide segment 3 region (0.5 mm long) was defined by photolithography, and phosphorus ion implantation (P...) was performed on the DBR reflective waveguide segment 3. + 80keV, 5×10 14 cm -2 The quantum well interdiffusion was then achieved by RTA annealing at 700℃ for 60 s. SIMS verification showed that the interdiffusion at the InGaAsP / InP interface was less than 5 nm.

[0112] Key thermal budget control:

[0113] This step represents the highest temperature point of the entire process (700℃). All subsequent processes (including the top metal grating RTA of S9) are strictly controlled at temperatures below 400℃ and for no more than 60 seconds to ensure the stability of the quantum well composition in the formed QWI transparent region and avoid additional mixing in the DFB gain region. Process temperature-time product (TTP) monitoring: QWI segment TTP_QWI ≈ 700℃ × 60s = 42000℃・s; subsequent cumulative TTP_subsequent < 400℃ × 60s = 24000℃・s < 0.6 × TTP_QWI, ensuring thermal stability.

[0114] S7: Fabrication of the top metal-semiconductor composite grating 23. On the top surface of the entire ridge waveguide structure 2 (including the DBR reflection waveguide section 3 and the DFB gain waveguide section 4), the grating pattern (period 282nm, duty cycle 0.6) is defined by electron beam lithography. Two phase shifts are introduced in the top grating region corresponding to the DFB gain waveguide section 4, located at 1 / 3 and 2 / 3 of the grating length, respectively, with each phase shift offset 2Λ2 / 3≈188nm. The InGaAs contact layer is etched to a depth of 100nm using ICP. Stepwise electron beam evaporation is employed: first, a Ti (15nm) / Pt (20nm) / Au (200nm) seed layer is deposited, and then Au is thickened to a total thickness of 1.1μm by electroplating. Alternatively, a metal lift-off aid layer (PMMA / polymer double layer adhesive) is used to improve the aspect ratio lift-off effect. The metal fills the InGaAs grooves and continuously covers the ridges and valleys.

[0115] S8. Alloying and Electrode Fabrication. The chip was subjected to RTA (400℃, 45s) in an N2 atmosphere. The substrate was thinned to 150μm, and Ti / Pt / Au (50 / 50 / 200nm) was evaporated on the back side as the n-electrode.

[0116] S9: Cavity surface coating. After cleavage, the left end face of DBR reflective waveguide section 3 is coated with a multilayer SiO2 / TiO2 high-reflectivity film (reflectivity > 98%), and the DFB gain waveguide section 4 is coated with a single-layer SiN anti-reflectivity film (reflectivity < 1%).

[0117] S10, Temperature Control Integration and Packaging. The chip is eutectic soldered onto the AlN heat sink, the thermistor is attached to the back of the chip, packaged in a 14-pin butterfly case, connected to the TEC temperature control circuit and calibrated to 25±0.01℃.

[0118] Example 2: Laser with optimized DBR segment gain compensation

[0119] The difference between this embodiment and Embodiment 1 is that an independent microcurrent (I_DBR≈5-20mA) is applied to the DBR reflection waveguide section 3 to compensate for the residual free carrier absorption (α_fc≈5-10cm) in this section. -1 ) and waveguide scattering loss (α_scatt≈2-5cm) -1 ).

[0120] Thermal effect verification:

[0121] The power consumption caused by the microcurrent in the DBR segment is P_DBR=I. 2 R≈0.125-4mW<5mW, effectively dissipated through AlN heat sink and TEC temperature control (±0.01℃). Finite element thermal simulation shows that the temperature rise at the center of the DBR section is <1℃, and the effective refractive index change Δn / n <10. -4The Bragg wavelength drift is <0.01nm, which has no significant impact on laser wavelength locking. Experimental results show that at I_DBR=10mA, the laser's threshold current decreases by 15%, the output power increases by 20%, and the linewidth is further narrowed from approximately 15kHz in Example 1 to approximately 10kHz, with no mode hopping.

[0122] Example 3: Laser using PI insulating groove

[0123] The difference between this embodiment and Embodiment 1 lies in the use of a physical grooving scheme for the electrical insulation isolation structure 5: at the interface between the DBR reflection waveguide section 3 and the DFB gain waveguide section 4, an isolation groove with a depth of 1.2 μm and a width of 30 μm is formed by ICP etching, with the etching stopping at the surface of the lower cladding. Subsequently, polyimide (PI) insulating material is spin-coated and cured to form reliable electrical insulation and mechanical support. This scheme is suitable for active region material systems that are sensitive to ion implantation damage.

[0124] Key parameter design basis

[0125] The effective refractive index of the internal semiconductor grating is n_eff1≈3.28 (1550nm, InP / InGaAsP waveguide), corresponding to the period:

[0126] Λ1=Λ0 / (2n_eff1)=1550 / (2×3.28)≈236nm

[0127] The effective refractive index of the top metal-semiconductor composite grating 23 is n_eff2≈2.75 (1550nm, gold / InGaAs / InP composite structure, considering metal plasmon effects), corresponding to the period:

[0128] Λ2=Λ0 / (2n_eff2)=1550 / (2×2.75)≈282nm

[0129] The period ratio is Λ2 / Λ1=282 / 236≈1.194, which satisfies the Bragg wavelength alignment condition (n_eff1・Λ1=n_eff2・Λ2≈775nm).

[0130] The design incorporates two length segments: the 0.5mm length of the DBR reflective waveguide segment 3 provides sufficient reflectivity (R > 70%) while controlling the length of the passive region; the 1.0mm length of the DFB gain waveguide segment 4 ensures sufficient gain and mode selection. The total cavity length of 1.5mm extends the effective photon lifetime, which is beneficial for narrowing the linewidth.

[0131] Phase shift structure design basis:

[0132] The Λ1 / 4 phase shift of the internal semiconductor grating 22: In conventional DFB lasers, the Λ / 4 phase shift is the most classic phase shift, producing a π phase jump and opening a transmission window at the center of the Bragg bandgap, enabling this frequency mode to achieve the lowest threshold gain. This invention inherits this mature design, ensuring the fundamental single-mode selectivity of the DFB segment.

[0133] The 2Λ² / 3 phase shift of the top metal-semiconductor composite grating 23: The reason for choosing 2Λ² / 3 instead of Λ² / 2 is that the 2Λ² / 3 phase shift corresponds to a phase change of 4π / 3 (i.e., -2π / 3), which does not form a simple integer multiple relationship with the π phase shift of the inner grating. This "non-harmonic" relationship allows the equivalent refractive index modulation of the two gratings to form a quasi-periodic distribution along the length direction, effectively suppressing excessive overlap of the standing wave nodes in the cavity, thereby homogenizing the optical field distribution. Theoretical simulations show that the 2Λ² / 3 phase shift has a better homogenization effect on the optical field than the Λ² / 2 phase shift (the latter is prone to resonant superposition with Λ¹ / 4), and the fabrication precision requirement is moderate (±50nm is sufficient).

[0134] Necessity of staggered distribution: If the phase shift points of the internal semiconductor grating 22 and the top metal-semiconductor composite grating 23 completely coincide (both located at the center), the phase abrupt changes of the two gratings will be superimposed in the vertical direction, which will exacerbate the local light field concentration. This invention staggers the two phase shifts of the top grating to 1 / 3 and 2 / 3, so that the equivalent phase modulation is dispersed along the cavity length direction, avoiding excessive enhancement of the light field at a single location, thereby effectively suppressing the hole-burning effect.

[0135] Although embodiments of the invention have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the appended claims and their equivalents.

[0136] Although embodiments of the invention have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the appended claims and their equivalents.

Claims

1. An on-chip narrow-linewidth laser based on quadruple grating coordination and quantum well transparency, characterized in that, include: n-type substrate (1) and a spine waveguide structure (2) disposed on the upper surface of the n-type substrate (1); The back waveguide structure (2) includes a lower cladding layer disposed on the upper surface of the n-type substrate (1), an active region (21) disposed on the lower cladding layer, an internal semiconductor grating (22) disposed above or below the active region (21), and a top metal-semiconductor composite grating (23) disposed on the top surface of the back waveguide structure (2). The active region (21) contains multiple quantum well layers; The internal semiconductor grating (22) is an InP / InGaAsP first-order refractive index coupled grating. The Bragg wavelength of the internal semiconductor grating (22) is aligned with the center wavelength Λ0 of the on-chip narrow linewidth laser based on quadruple grating synergy and quantum well transparency, where Λ0 = 1550 nm. The grating grooves and grating ridges of the internal semiconductor grating (22) are filled and completely covered by InP. The upper and lower layers of the internal semiconductor grating (22) are closely connected by InP material. The top metal-semiconductor composite grating (23) includes a grating structure etched on an InGaAs contact layer and a metal gold layer filling and covering the grating structure. The InGaAs contact layer has a thickness of 150-250 nm, the groove depth of the grating structure is 50-150 nm, the metal gold layer has a thickness of 1-2 μm and fills the groove of the grating structure and continuously covers the peaks and valleys of the grating. The Bragg wavelength of the top metal-semiconductor composite grating (23) is also aligned with the center wavelength Λ0. The top metal-semiconductor composite grating (23) also serves as the p-type electrode of the on-chip narrow linewidth laser based on quadruple grating synergy and quantum well transparency. The spine waveguide structure (2) is divided into a DBR reflection waveguide section (3) and a DFB gain waveguide section (4) along the cavity length direction. An electrical insulation isolation structure (5) is provided between the DBR reflection waveguide section (3) and the DFB gain waveguide section (4). The internal semiconductor grating (22) located in the DBR reflection waveguide section (3) and the DFB gain waveguide section (4) is a continuous structure of the same grating layer; The top metal-semiconductor composite grating (23) located in the DBR reflection waveguide section (3) and the DFB gain waveguide section (4) is an integral continuous structure spanning the two sections; The internal semiconductor grating (22) located in the DFB gain waveguide section (4) is provided with at least one first phase shift (41), and the top metal-semiconductor composite grating (23) located in the DFB gain waveguide section (4) is provided with at least two second phase shifts (42), and the first phase shift (41) and the second phase shift (42) are staggered in the vertical direction; The ratio of the grating period of the inner semiconductor grating (22) to that of the top metal-semiconductor composite grating (23) is 1.15-1.25; Ion implantation and annealing are performed in the DBR reflection waveguide section (3) to form a quantum well intermixed transparent region; The left end face of the DBR reflection waveguide section (3) is coated with a high-reflection film, and the right end face of the DFB gain waveguide section (4) is coated with an anti-reflection film.

2. The on-chip narrow linewidth laser based on quadruple grating coordination and quantum well transparency according to claim 1, characterized in that: The internal semiconductor grating (22) has a period Λ1 = 235-245nm and a thickness of 10-30nm, and is located within 50-100nm above or below the active region (21); the top metal-semiconductor composite grating (23) has a period Λ2 = 280-290nm; the vertical distance between the internal semiconductor grating (22) and the top metal-semiconductor composite grating (23) is 1.5-2.5μm.

3. The on-chip narrow linewidth laser based on quadruple grating coordination and quantum well transparency according to claim 2, characterized in that: The first phase shift (41) is located in the middle of the length direction of the DFB gain waveguide segment (4), and the first phase shift (41) makes the relative offset between the two grating segments on both sides of the phase shift point Λ1 / 2; the second phase shift (42) is located at 1 / 3 and 2 / 3 of the length direction of the DFB gain waveguide segment (4), and each second phase shift (42) makes the relative offset between adjacent grating segments 2Λ2 / 3.

4. The on-chip narrow linewidth laser based on quadruple grating coordination and quantum well transparency according to claim 3, characterized in that: The length of the DBR reflection waveguide section (3) is 0.4-0.6 mm, and the length of the DFB gain waveguide section (4) is 0.8-1.2 mm.

5. The on-chip narrow linewidth laser based on quadruple grating coordination and quantum well transparency according to claim 4, characterized in that: The electrical insulation isolation structure (5) has a width of 20-40 μm and is a hydrogen ion implantation region or a groove filled with polyimide insulating material.

6. The on-chip narrow linewidth laser based on quadruple grating coordination and quantum well transparency according to claim 5, characterized in that: A microcurrent is also required to be applied to the DBR reflection waveguide section (3) to compensate for the residual free carrier absorption and waveguide scattering loss of the DBR reflection waveguide section (3). The power consumption caused by the microcurrent is less than 5mW, the local temperature rise is less than 1℃, and the Bragg wavelength drift is less than 0.01nm.

7. The on-chip narrow linewidth laser based on quadruple grating coordination and quantum well transparency according to claim 6, characterized in that: It also includes a temperature control module, which includes a TEC thermoelectric cooler and a temperature sensor, with a temperature control accuracy of ±0.01℃.

8. The on-chip narrow-linewidth laser based on quadruple grating coordination and quantum well transparency according to claim 7, characterized in that, Its preparation method includes the following steps: S1. On an n-type InP substrate (1), the lower cladding, active region (21), grating carrier layer and top InGaAs contact layer are epitaxially grown by MOCVD. S2. An internal semiconductor grating (22) is prepared by electron beam lithography and ICP etching with an etching depth of 10-30 nm. The grating layer material is InGaAsP, and the groove is filled and covered by InP. In the middle of the grating region corresponding to the DFB gain waveguide section (4), a Λ1 / 4 phase shift is introduced by electron beam lithography pattern design. The phase shift position accuracy is better than ±50 nm. S3. Continue MOCVD epitaxial growth of the cladding layer, planarize the surface and cover the internal semiconductor grating (22), and finally retain a 150-250nm thick InGaAs contact layer on the surface; S4. The back waveguide structure is formed by photolithography and ICP etching (2). S5. Define the DBR reflection waveguide segment (3) and the DFB gain waveguide segment (4), and prepare an electrically insulating isolation structure (5) at the interface between the two segments. S6. Phosphorus ion implantation is performed on the DBR reflection waveguide section (3), and a quantum well intermixed transparent region is formed by annealing. The annealing temperature does not exceed 700℃, the annealing time does not exceed 60s, and the temperature of all subsequent processes does not exceed 400℃. S7. Define the grating pattern on the top surface of the back waveguide structure (2) by electron beam lithography, and form a grating structure with a groove depth of 50-150nm by ICP etching on the InGaAs contact layer; wherein, in the grating region corresponding to the DFB gain waveguide section (4), two phase shifts are introduced by electron beam lithography pattern design, located at 1 / 3 and 2 / 3 of the grating length respectively, and the offset of each phase shift is two-thirds of the top grating period, and the phase shift position accuracy is better than ±100nm; S8. A metal seed layer is deposited by electron beam evaporation and combined with electroplating or chemical mechanical polishing to form a top metal-semiconductor composite grating (23). The total thickness of the metal layer is 1-2 μm, filling the InGaAs grooves and continuously covering the ridges and valleys, while also serving as a p-type electrode. S9. The gold layer in the top metal-semiconductor composite grating (23) is rapidly thermally annealed to form an alloyed ohmic contact with the InGaAs below. The annealing temperature is 380-420℃ and the annealing time is 30-60s. The resulting alloyed ohmic contact has a contact resistivity of less than 1×10⁻⁶. -5 Ω・cm 2 The sidewall tilt angle of the top metal-semiconductor composite grating (23) is 80°-85°. S10, thin the n-type substrate (1) and deposit an n-type electrode; S11, Cleavage cavity surface, deposit a high-reflection film on the left end face of the DBR reflection waveguide section (3), and deposit an anti-reflection film on the right end face of the DFB gain waveguide section (4); S12, integrates temperature control module and encapsulates it.

9. The on-chip narrow linewidth laser based on quadruple grating coordination and quantum well transparency according to claim 8, characterized in that: In step S8, a stepwise electron beam evaporation process is used to first deposit a Ti / Pt / Au seed layer of 200-300 nm, and then thicken it to 1-2 μm by electroplating, or use a metal lift-off auxiliary layer to improve the aspect ratio lift-off effect; the thickness of the metal layer is greater than the InGaAs groove depth to ensure electrical continuity and mechanical integrity at the phase shift step.

10. The on-chip narrow linewidth laser based on quadruple grating coordination and quantum well transparency according to claim 8, characterized in that: The lithography accuracy of the inner semiconductor grating (22) is ±2nm, and the etching depth accuracy is ±5nm; the lithography accuracy of the top metal-semiconductor composite grating (23) is ±5nm; the inner semiconductor grating (22) and the top metal-semiconductor composite grating (23) do not require sub-nanometer alignment.

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