A power adjustment method and a fast charging protocol chip

Abstract

This application provides a power adjustment method and a fast charging protocol chip. The method includes: acquiring the temperature signal of the charging device and converting it into a digital temperature signal; comparing the digital temperature signal with preset multi-level temperature thresholds to determine the current temperature level; matching the target fast charging power level according to the temperature level and generating a power adjustment command; and, while maintaining fast charging protocol communication, gradually adjusting the current fast charging power to the target fast charging power level according to a preset adjustment step size, with a predetermined stable interval time set between two adjacent power adjustments. This application achieves adaptive and smooth adjustment of fast charging power through multi-level temperature gradient detection and graded matching of fast charging power, effectively suppressing overheating of the charging device while maintaining fast charging capability, balancing charging safety and charging efficiency; and simultaneously eliminating the impact of sudden power changes on the battery, extending battery life.

Description

Technical Field

[0001] This application relates to the field of fast charging protocols, and in particular to a power adjustment method and a fast charging protocol chip. Background Technology

[0002] With the widespread adoption of portable smart devices such as smartphones and tablets, users' reliance on these devices continues to increase, leading to a growing demand for efficient charging. Fast charging has become a standard feature for modern smart devices. Fast charging technology increases charging speed by increasing charging voltage or current. However, during fast charging, the charging device generates heat due to energy conversion, causing its temperature to rise. If the fast charging protocol chip does not effectively monitor and handle temperature changes during charging, the continued rise in temperature can lead to safety risks such as charger overheating, bulging, or even fire.

[0003] In existing technologies, the over-temperature protection scheme of fast charging protocol chips typically involves directly switching the charging mode from fast charging to normal charging when the collected temperature reaches a preset over-temperature threshold. This scheme has the following technical problems: First, it uses a single over-temperature trigger threshold, only supporting a choice between fast charging and normal charging modes. When the temperature reaches the over-temperature threshold, the fast charging function is directly interrupted, significantly reducing charging efficiency. Second, it lacks temperature gradient detection and fine-grained power control mechanisms, making it impossible to adjust the power according to the actual temperature changes of the charging device. Furthermore, the sudden change in charging power after over-temperature protection is triggered can cause voltage or current surges to the charging circuit and battery, reducing battery cycle life over long-term use. Summary of the Invention

[0004] This application aims to solve the technical problem that existing fast charging protocol chips directly switch to normal charging mode when over-temperature protection occurs, resulting in interruption of fast charging function, significant reduction in charging efficiency, and sudden power change impacting the battery.

[0005] In a first aspect, this application provides a power adjustment method applied to a fast charging protocol chip, comprising: acquiring a temperature signal from a charging device and converting the temperature signal into a digital temperature signal; comparing the digital temperature signal with preset multiple temperature thresholds to determine the current temperature level; matching the temperature level with a corresponding target fast charging power level and generating a power adjustment command; and, while maintaining fast charging protocol communication, gradually adjusting the current fast charging power to the target fast charging power level according to a preset adjustment step size; wherein a predetermined stabilization interval time is set between two adjacent power adjustments.

[0006] Optionally, the multi-level temperature thresholds include a low-temperature threshold T1, a medium-temperature threshold T2, a high-temperature warning threshold T3, and an over-temperature critical threshold T4, which increase sequentially. This divides the temperature range into five levels: low-temperature, medium-temperature, high-temperature warning, over-temperature warning, and over-temperature critical. These levels correspond to the full-power fast charging level P1, the first reduced-power fast charging level P2, the second reduced-power fast charging level P3, the third reduced-power fast charging level P4, and the fourth reduced-power fast charging level P5, respectively. The full-power fast charging level corresponds to 100% of the rated fast charging power. The power percentages corresponding to the first reduced-power fast charging level P2, the second reduced-power fast charging level P3, the third reduced-power fast charging level P4, and the fourth reduced-power fast charging level P5 decrease sequentially.

[0007] Optionally, the step of gradually adjusting the current fast charging power to the target fast charging power level according to a preset adjustment step size includes: when the target fast charging power level is lower than the current fast charging power, gradually reducing the fast charging power according to the adjustment step size; when the target fast charging power level is higher than the current fast charging power, gradually increasing the fast charging power according to the adjustment step size.

[0008] Optionally, the multiple temperature thresholds, the fast charging power level corresponding to each temperature level, the adjustment step size, and the stabilization interval time are configured via registers.

[0009] Optionally, while maintaining fast charging protocol communication, gradually adjusting the current fast charging power to the target fast charging power level according to a preset adjustment step size includes: converting the power adjustment command into power adjustment data that conforms to the corresponding fast charging protocol specification according to the fast charging protocol type used by the charging device; the fast charging protocol type includes QC protocol, PD protocol or SCP protocol.

[0010] Secondly, this application also provides a fast charging protocol chip, including: a temperature acquisition module for acquiring temperature signals from a charging device and converting them into digital temperature signals; a power adjustment module for comparing the digital temperature signals with preset multi-level temperature thresholds to determine the current temperature level, matching the corresponding target fast charging power level according to the temperature level, and generating a power adjustment command; and a charging execution module for gradually adjusting the current fast charging power to the target fast charging power level according to a preset adjustment step size while maintaining fast charging protocol communication, wherein a predetermined stable interval time is set between two adjacent power adjustments.

[0011] Optionally, the power adjustment module includes: a temperature gradient analysis submodule, used to compare the digital temperature signal with preset multi-level temperature thresholds to determine the current temperature level and generate a temperature level signal; a graded power decision submodule, used to match the corresponding target fast charging power level according to the temperature level signal and generate a power adjustment command; and a power execution submodule, used to transmit the power adjustment command to the fast charging protocol processing module; wherein, the power adjustment module is a digital logic circuit integrated into the digital circuit part of the fast charging protocol chip.

[0012] Optionally, the fast charging protocol chip further includes a register group for storing the multiple temperature thresholds, the fast charging power level corresponding to each temperature level, the adjustment step size, and the stabilization interval time.

[0013] Optionally, the temperature acquisition module includes a temperature acquisition pin and an ADC acquisition submodule. The temperature acquisition pin is used to connect an external temperature sensor to receive an analog temperature signal, and the ADC acquisition submodule is used to convert the analog temperature signal into a digital temperature signal.

[0014] Optionally, the fast charging protocol chip further includes a fast charging protocol processing module, which is used to convert the power adjustment command into power adjustment data that conforms to the corresponding fast charging protocol specification and transmit it to the charging execution module according to the type of fast charging protocol adopted by the charging device.

[0015] At least one advantage of the power adjustment method provided in this application is that by detecting multiple levels of temperature gradient and matching the fast charging power in stages, the fast charging power can be adaptively and smoothly adjusted. This effectively suppresses overheating of the charging device while maintaining fast charging capability, thus balancing charging safety and charging efficiency. At the same time, it eliminates the impact of sudden power changes on the battery and extends the battery life. Attached Figure Description

[0016] One or more embodiments are illustrated by way of example with reference numerals in the accompanying drawings. These illustrations do not constitute a limitation on the embodiments. Elements with the same reference numerals in the drawings are denoted as similar elements. Unless otherwise stated, the figures in the drawings are not to be limited by scale.

[0017] Figure 1 This is a schematic diagram of the structure of a fast charging protocol chip; Figure 2 A schematic flowchart of a power adjustment method provided for an embodiment of the present invention; Figure 3 A schematic diagram of the structure of a fast charging protocol chip provided for an embodiment of the present invention; Figure 4 A schematic diagram of a power adjustment module provided for an embodiment of the present invention; Figure 5 A schematic diagram of the structure of a temperature acquisition module provided for an embodiment of the present invention; Figure 6 This is a schematic diagram of another fast charging protocol chip provided for an embodiment of the present invention. Detailed Implementation

[0018] To facilitate understanding of this application, a more detailed description is provided below with reference to the accompanying drawings and specific embodiments. It should be noted that when an element is described as being "fixed to" another element, it can be directly on the other element, or one or more intermediate elements may exist between them. When an element is described as being "connected" to another element, it can be directly connected to the other element, or one or more intermediate elements may exist between them. The terms "upper," "lower," "inner," "outer," "bottom," etc., used in this specification indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, and are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application. Furthermore, the terms "first," "second," "third," etc., are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0019] Unless otherwise defined, all technical and scientific terms used in this specification have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used in this specification is for the purpose of describing particular embodiments only and is not intended to limit the scope of this application. The term "and / or" as used in this specification includes any and all combinations of one or more of the associated listed items.

[0020] Furthermore, the technical features involved in the different embodiments of this application described below can be combined with each other as long as they do not conflict with each other.

[0021] Please see Figure 1 , Figure 1 This is a schematic diagram of the structure of an existing fast charging protocol chip. An existing fast charging protocol chip 10 typically includes an analog module 110 and a charging execution module 130. The analog module 110 uses an external NTC resistor connected to its NTC pin to acquire the temperature status of the charging device. An NTC resistor is a negative temperature coefficient thermistor; its resistance decreases as temperature increases. By detecting the change in its resistance, the current temperature of the charging device can be obtained.

[0022] The analog module 110 can achieve temperature detection using either a comparator circuit or an ADC conversion circuit. When using a comparator circuit, the analog temperature signal acquired by the NTC resistor is compared with a preset voltage threshold, and an over-temperature indication signal is generated when the temperature exceeds the threshold. When using an ADC conversion circuit, the analog temperature signal is converted into a digital signal and compared with a preset digital threshold, and an over-temperature indication signal is generated when the temperature exceeds the threshold.

[0023] The fast charging protocol chip 10 also includes a normal charging mode control unit 121 and a fast charging mode control unit 122. During normal fast charging, the fast charging mode control unit 122 controls the charging execution module 130 to perform high-power charging according to the fast charging protocol specifications. When the simulation module 110 detects that the temperature has reached a preset over-temperature threshold, it generates an over-temperature indication signal, which triggers a switching of charging modes: the fast charging mode control unit 122 stops working, the normal charging mode control unit 121 takes over the charging control, and the charging execution module 130 switches from fast charging mode to normal charging mode until the device temperature drops below the safety threshold.

[0024] While the aforementioned existing technical solutions can achieve basic temperature safety protection, they have the following technical drawbacks: First, existing solutions only set a single over-temperature threshold. When the temperature reaches this threshold, the fast charging function is directly interrupted, and the charging efficiency is significantly reduced. For example, assuming the over-temperature threshold is set to 45°C, when the temperature of the charging device reaches 45°C, even if the temperature only slightly exceeds the threshold, the chip will immediately reduce the charging power from fast charging power (e.g., 40W) to normal charging power (e.g., 5W), and the charging efficiency will drop to 12.5% ​​of the original.

[0025] Secondly, existing solutions cannot adjust the power according to the actual temperature change trend and specific temperature value of the charging device; they can only achieve "on-off" mode switching. For example, it will still fast charge at full power when the temperature is 43℃, but will completely stop fast charging when the temperature rises to 45℃. There is no transitional power adjustment level in between, and it cannot achieve precise temperature control.

[0026] Finally, after the over-temperature protection is triggered, the charging power drops instantly from fast charging power to normal charging power. This sudden change in power will generate transient voltage and current surges in the charging circuit, causing stress on components such as capacitors and inductors in the charging circuit, and also impacting the battery. Long-term use will reduce the battery's cycle life and shorten the lifespan of the charging equipment.

[0027] To address the aforementioned technical problems, this application provides a power adjustment method applied to a fast charging protocol chip. By detecting multiple temperature gradient levels and matching the fast charging power in stages, it achieves adaptive and smooth power adjustment while maintaining fast charging protocol communication. A flowchart is shown below. Figure 2 As shown, the specific steps include the following: Step S100: Acquire the temperature signal of the charging device and convert the temperature signal into a digital temperature signal.

[0028] The fast charging protocol chip connects to an external temperature sensor via a temperature acquisition pin to collect the analog temperature signal of the charging device in real time. A temperature sensor is a device that converts the physical quantity of temperature into an electrical signal; in this application, it can be an NTC resistor, a thermocouple temperature sensor, or an integrated temperature sensor chip, etc.

[0029] The analog temperature signal is transmitted to the ADC acquisition submodule inside the chip, which converts the analog temperature signal into a digital temperature signal. A digital temperature signal is a temperature value represented by a digital quantity after analog-to-digital conversion, which facilitates threshold comparison and logic processing by subsequent digital circuits.

[0030] Taking an NTC resistor as an example: Assuming the nominal resistance of an NTC resistor is 10KΩ at 25℃, when the temperature of the charging device rises to 40℃, the resistance of the NTC resistor drops to about 5.8KΩ. The chip obtains the temperature analog signal by detecting the voltage change on the NTC pin, and then obtains the corresponding digital temperature signal after ADC conversion.

[0031] Step S200: Compare the digital temperature signal with preset multiple temperature thresholds to determine the current temperature level.

[0032] Unlike existing technologies that use a single over-temperature threshold, this application presets multiple temperature thresholds to divide the temperature range into multiple levels, enabling temperature gradient detection. Each temperature level refers to a temperature interval defined by the multiple temperature thresholds, with each level corresponding to a different fast-charging power output strategy.

[0033] In a preferred embodiment, the multiple temperature thresholds include a low temperature threshold T1, a medium temperature threshold T2, a high temperature warning threshold T3, and an over-temperature critical threshold T4, which increase sequentially, wherein T1 < T2 < T3 < T4, dividing the temperature range into five levels:

[0034] Continuing with the previous example, assume the four temperature thresholds are set as follows: T1=35℃, T2=40℃, T3=45℃, and T4=50℃. When the digital temperature signal output by the ADC acquisition submodule corresponds to a temperature value of 42℃, since 42℃ falls between T2 (40℃) and T3 (45℃), the current temperature is determined to be in the high temperature warning range.

[0035] It should be noted that when the digital temperature signal crosses an adjacent temperature threshold, the temperature setting is determined to have changed and a new temperature setting signal is generated. For example, when the temperature rises from 38℃ to 42℃, the temperature crosses the medium temperature threshold T2 (40℃), and the temperature setting changes from the medium temperature setting to the high temperature warning setting. At this time, a new temperature setting signal is generated to trigger subsequent power adjustments.

[0036] Step S300: Match the target fast charging power level according to the temperature level and generate a power adjustment command.

[0037] This application pre-sets a corresponding fast charging power level for each temperature range, achieving graded matching between temperature and power. The fast charging power level refers to the power output level in fast charging mode, expressed as a percentage of the rated fast charging power.

[0038] In a preferred embodiment, the five temperature levels correspond to the following fast charging power levels:

[0039] Continuing with the previous example, assume the charging device's rated fast charging power is 40W. The current temperature is 42℃, in the high-temperature warning mode, matching the corresponding second-lower-power fast charging level P3, with a target fast charging power of 40W × 50% = 20W. The chip generates a power adjustment command based on the difference between the current fast charging power and the target fast charging power.

[0040] Compared to existing technologies, the power adjustment in this application is always performed in fast charging mode, only adjusting the output of fast charging power without switching to normal charging mode. Even under high temperature warning conditions, the charging power is still 50% of the rated fast charging power (20W in this example), which is still higher than the normal charging power (usually 5W), thus maintaining high charging efficiency while ensuring safety.

[0041] Step S400: While maintaining fast charging protocol communication, gradually adjust the current fast charging power to the target fast charging power level according to the preset adjustment step size; wherein, a predetermined stabilization interval time is set between two adjacent power adjustments.

[0042] Throughout the power adjustment process, the charging execution module maintains a constant communication connection with the fast charging protocol of the charging device and does not switch to normal charging mode. Specifically, when the temperature collected by the chip in real time enters the over-temperature critical level (T≥T4), in order to ensure device safety, the system will smoothly and quickly reduce the current fast charging power to the lowest protection power level P5 (10%) according to the preset adjustment step size; after the temperature drops back below the over-temperature critical threshold T4, the power will be gradually increased according to the preset step size based on the real-time temperature, ensuring that the power adjustment is smooth and without sudden changes throughout the process, and that the fast charging protocol communication is maintained without interruption.

[0043] Maintaining the fast charging protocol communication state means that during power adjustment, the fast charging protocol communication link between the fast charging protocol chip and the charging device remains connected and does not exit the fast charging protocol handshake state. Power adjustment data is transmitted according to the fast charging protocol specification. This is one of the key features that distinguishes this application from the prior art: the prior art switches to normal charging mode when the temperature is too high, and the fast charging protocol communication is interrupted; while this application maintains the fast charging protocol communication state throughout the entire power adjustment process, adjusting the power output only within the framework of the fast charging protocol.

[0044] The adjustment step size refers to the magnitude of each power adjustment, which can be a fixed power value (e.g., 2W adjustment each time) or a power percentage (e.g., 5% adjustment each time). The stabilization interval time refers to the waiting time between two consecutive power adjustments, used to ensure that the charging circuit has enough time to reach a stable state after each power adjustment.

[0045] Power adjustment includes two directions: power reduction and power recovery. (1) Power reduction process: When the target fast charging power level is lower than the current fast charging power, the fast charging power is gradually reduced according to the adjustment step size.

[0046] Continuing with the previous example, assume the adjustment step size is 5% (i.e., 2W) and the settling interval is 200ms. When the temperature rises from 35℃ to 42℃, the power needs to be adjusted from the full power of 40W to the target power of 20W. The adjustment process is as follows:

[0047] After 10 adjustments over approximately 2 seconds, the fast charging power smoothly decreased from 40W to 20W. Compared to the sudden power fluctuations in existing technologies, the gradual adjustment mechanism of this application effectively eliminates transient voltage and current surges, protecting the charging circuit components and the battery.

[0048] (2) Power recovery process: When the target fast charging power level is higher than the current fast charging power, the fast charging power is gradually increased according to the adjustment step size.

[0049] Continuing with the previous example, suppose the charging device temperature drops from 42℃ to 33℃, crossing the low-temperature threshold T1 (35℃), the temperature setting changes from the high-temperature warning setting to the low-temperature setting, and the target power increases from 20W to 40W. The power recovery process is also carried out step by step with an adjustment step of 2W and a stabilization interval of 200ms. After 10 adjustments, it is restored to full-power fast charging.

[0050] Through the above-mentioned bidirectional smooth adjustment mechanism, this application achieves adaptive adjustment of fast charging power: when the temperature rises, the power gradually decreases to suppress heat generation, and when the temperature falls, the power gradually increases to improve charging efficiency. The whole process is smooth and continuous, without sudden power changes.

[0051] In a preferred embodiment, the aforementioned multiple temperature thresholds, the corresponding fast charging power levels for each temperature level, the adjustment step size, and the stabilization interval are all configured through a register group within the chip. A register group refers to a set of storage units within the fast charging protocol chip used to store configurable parameters, which can be read and written through the chip's configuration interface.

[0052] By configuring registers, the same fast charging protocol chip can be adapted to different application scenarios. For example:

[0053] In a preferred embodiment, the power adjustment method of this application supports multiple fast charging protocol types, including QC protocol, PD protocol, and SCP protocol. In step S400, the power adjustment command is converted into power adjustment data conforming to the corresponding fast charging protocol specification according to the fast charging protocol type used by the charging device.

[0054] The so-called QC protocol (Quick Charge) is a fast charging protocol launched by Qualcomm, which achieves fast charging by adjusting the charging voltage; the so-called PD protocol (Power Delivery) is a fast charging protocol developed by the USB standardization organization, which negotiates power through the USB Type-C interface; the so-called SCP protocol (Super Charge Protocol) is a super fast charging protocol launched by Huawei, which adopts a low-voltage, high-current solution.

[0055] While different fast charging protocols employ varying power adjustment data formats and communication methods, the core logic of temperature gradient detection, graded power matching, and smooth adjustment in this application remains consistent. Through the design of a protocol adaptation layer, the power adjustment method of this application can support multiple fast charging protocols within a unified control framework, enhancing the versatility of the technical solution.

[0056] In summary, the power adjustment method provided in this application achieves adaptive and smooth adjustment of fast charging power while maintaining fast charging protocol communication through multi-level temperature gradient detection and graded matching of fast charging power, thus balancing charging safety and charging efficiency. Compared with existing technologies, this application breaks through the limitation of "choosing between fast charging and normal mode," reducing fast charging power only when the temperature rises rather than stopping the fast charging function, effectively maintaining charging efficiency; it achieves fine-grained temperature control through multiple temperature thresholds, allowing for targeted power adjustment based on the actual temperature of the device; and it adopts a fixed-step gradual adjustment mechanism to eliminate the impact of sudden power changes on the charging circuit and battery, extending the device's lifespan.

[0057] Please see Figure 3 , Figure 3This is a schematic diagram of a fast charging protocol chip provided in an embodiment of this application. The fast charging protocol chip 20 provided in this embodiment is used to implement the aforementioned power adjustment method. The fast charging protocol chip 20 includes a temperature acquisition module 210, a power adjustment module 220, and a charging execution module 230.

[0058] Temperature acquisition module 210 is used to acquire the temperature signal of the charging device and convert it into a digital temperature signal. Temperature acquisition module 210 is connected to a temperature sensor (such as an NTC resistor) through an external pin of the chip to acquire the analog temperature signal of the charging device in real time, and then converts the analog temperature signal into a digital temperature signal and outputs it to power adjustment module 220.

[0059] In one specific embodiment, the temperature acquisition module 210 operates as follows: First, the temperature acquisition module 210 connects to an external NTC resistor via its temperature acquisition pin. Assuming the nominal resistance of the NTC resistor is 10KΩ (at 25℃), the chip internally provides a pull-up resistor (e.g., 10KΩ) to form a voltage divider circuit with the NTC resistor. This voltage divider circuit is connected to the chip's power supply voltage VCC (e.g., 3.3V). When the charging device temperature is 25℃, the NTC resistor resistance is 10KΩ, and the voltage at the voltage divider point is 3.3V × 10KΩ / (10KΩ + 10KΩ) = 1.65V. When the temperature rises to 42℃, the NTC resistor resistance decreases to approximately 5.2KΩ, and the voltage at the voltage divider point becomes 3.3V × 5.2KΩ / (10KΩ + 5.2KΩ) ≈ 1.13V.

[0060] Then, the ADC acquisition submodule inside the temperature acquisition module 210 performs analog-to-digital conversion on the voltage at the voltage divider point. Assuming the ADC acquisition submodule has a resolution of 10 bits and the reference voltage is 3.3V, the digital value corresponding to 1.13V is approximately 1.13V / 3.3V×1024≈351. This digital value is the digital temperature signal, which is output to the power adjustment module 220 for further processing.

[0061] The power adjustment module 220 is used to compare the digital temperature signal with preset multiple temperature thresholds to determine the current temperature level, match the corresponding target fast charging power level according to the temperature level, and generate a power adjustment command.

[0062] The power adjustment module 220 receives the digital temperature signal output by the temperature acquisition module 210, compares it with the preset multi-level temperature thresholds, determines the current temperature level, and then matches the corresponding target fast charging power level according to the mapping relationship between the temperature level and the power level, and generates a corresponding power adjustment command to be output to the charging execution module 230.

[0063] In one specific embodiment, the power adjustment module 220 operates as follows: First, the power adjustment module 220 reads the preset temperature threshold from the register group inside the chip. Suppose the ADC digital quantities corresponding to the four-level temperature thresholds stored in the register are: T1 corresponds to the ADC value 405 (about 35°C), T2 corresponds to the ADC value 356 (about 40°C), T3 corresponds to the ADC value 311 (about 45°C), and T4 corresponds to the ADC value 271 (about 50°C). It should be noted that since the NTC resistor has a negative temperature coefficient, the higher the temperature, the smaller the corresponding ADC digital quantity.

[0064] Then, the power adjustment module 220 compares the received digital temperature signal (such as the ADC value 351, corresponding to 42°C) with the above thresholds. The comparison logic is as follows: If the ADC value > T1 threshold (405), it is determined as the low-temperature gear, matching the P1 gear (100% power); If the T2 threshold (356) < ADC value ≤ T1 threshold (405), it is determined as the medium-temperature gear, matching the P2 gear (80% power); If the T3 threshold (311) < ADC value ≤ T2 threshold (356), it is determined as the high-temperature warning gear, matching the P3 gear (50% power); If the T4 threshold (271) < ADC value ≤ T3 threshold (311), it is determined as the over-temperature warning gear, matching the P4 gear (30% power); If the ADC value ≤ T4 threshold (271), it is determined as the over-temperature critical gear, matching the P5 gear (10% power).

[0065] In this example, the ADC value 351 is less than the T2 threshold, and it is determined as the high-temperature warning gear, matching the P3 gear. Suppose the current fast charging power is 40W, and the target power is 40W × 50% = 20W. The power adjustment module 220 generates a power adjustment instruction, instructing the charging execution module 230 to adjust the power from 40W to 20W.

[0066] The charging execution module 230 is used to gradually adjust the current fast charging power to the target fast charging power gear according to the preset adjustment step while maintaining the fast charging protocol communication state, with a predetermined stable interval time set between two adjacent power adjustments.

[0067] The charging execution module 230 receives the power adjustment instruction output by the power adjustment module 220, and gradually adjusts the current fast charging power according to the preset adjustment step without exiting the fast charging protocol communication state. After each adjustment, it waits for a predetermined stable interval time until it reaches the target fast charging power gear.

[0068] In a specific embodiment, the working process of the charging execution module 230 is as follows: First, the charging execution module 230 reads the adjustment step size and stabilization interval time parameters from the internal register set of the chip. Assume the adjustment step size configured in the register is 2W and the stabilization interval time is 200ms.

[0069] Then, the charging execution module 230 calculates the adjustment direction and the number of adjustments based on the power adjustment command. In this example, the current power is 40W, the target power is 20W, and the power needs to be reduced, so the number of adjustments is (40W-20W) / 2W=10 times.

[0070] Next, the charging execution module 230 performs power adjustment according to the following timing sequence:

[0071] Throughout the adjustment process, the charging execution module 230 maintains a fast charging protocol communication connection with the charging device. Taking the PD protocol as an example, the charging execution module 230 maintains communication with the charging device through the CC line (Configuration Channel). Each time the power is adjusted, a new power request message is sent. After the charging device replies with an accept message, the power change is executed. The entire process does not exit the PD protocol handshake state.

[0072] In another specific embodiment, taking the QC protocol as an example, the charging execution module 230 maintains communication with the charging device via the D+ / D- data lines. By adjusting the voltage combination on the D+ / D- lines, it requests different output voltage levels, thereby achieving power adjustment. For example, the QC3.0 protocol supports adjusting the output voltage in 200mV steps. The charging execution module 230 can gradually reduce the requested voltage according to the step size to achieve smooth power adjustment.

[0073] In another specific embodiment, taking the SCP protocol as an example, the charging execution module 230 maintains communication with the charging device via single-wire communication and requests different output currents by sending current adjustment commands, thereby achieving power adjustment. The SCP protocol adopts a low-voltage, high-current scheme, and the charging execution module 230 can gradually reduce the requested current value in steps to achieve smooth power adjustment.

[0074] Through the above-described module architecture, the fast charging protocol chip 20 of this application can realize multi-level temperature gradient detection and adaptive smooth adjustment of fast charging power, taking into account both charging safety and charging efficiency while maintaining fast charging protocol communication.

[0075] It should be noted that the power adjustment module 220 is a newly added core functional module in this application. Its design is implemented using digital logic circuits without adding any analog circuit devices. It can reuse the chip's original ADC acquisition resources and register group resources, thereby simplifying the chip design complexity and reducing manufacturing costs.

[0076] Please see Figure 4 , Figure 4 This is a schematic diagram of a power adjustment module provided in an embodiment of this application. Figure 4 As shown, the power adjustment module 220 includes a temperature gradient analysis submodule 221, a graded power decision submodule 222, and a power execution submodule 223. These three submodules are connected sequentially to respectively implement the functions of temperature level determination, power level matching, and power command transmission. The input terminal of the power adjustment module 220 is connected to the temperature acquisition module 210, and the output terminal is connected to the charging execution module 230.

[0077] It should be noted that the power adjustment module 220 is a digital logic circuit, integrated into the digital circuit section of the fast charging protocol chip 20. A digital logic circuit refers to a circuit that uses digital signals for logic operations and control. It can be designed using hardware description languages ​​(such as Verilog or VHDL) and implemented through a digital IC design flow. Compared to analog circuits, digital logic circuits offer advantages such as design flexibility, ease of modification, and strong anti-interference capabilities. Furthermore, they can reuse the chip's existing digital circuit resources without requiring additional analog circuit components, thereby reducing chip area and manufacturing costs.

[0078] The temperature gradient analysis submodule 221 is used to compare the digital temperature signal with preset multiple temperature thresholds to determine the current temperature level and generate a temperature level signal.

[0079] The temperature gradient analysis submodule 221 receives the digital temperature signal output by the temperature acquisition module 210, reads the preset multi-level temperature thresholds from the register group, determines the current temperature level through numerical comparison logic, and generates a temperature level signal to be output to the graded power decision submodule 222.

[0080] In one specific embodiment, the temperature gradient parsing submodule 221 is implemented using a multi-stage comparator structure. Assume that the ADC digital values ​​corresponding to the four thresholds stored in the temperature threshold register are: REG_T1=405, REG_T2=356, REG_T3=311, and REG_T4=271. The temperature gradient parsing submodule 221 includes four numerical comparators that compare the input digital temperature signal ADC_VALUE with REG_T1, REG_T2, REG_T3, and REG_T4, respectively, generating four comparison result signals CMP1, CMP2, CMP3, and CMP4.

[0081] Based on the four comparison result signals, the temperature gradient analysis submodule 221 generates a 3-bit temperature level signal TEMP_LEVEL[2:0] through combinational logic circuitry:

[0082] Continuing with the previous example, when the input digital temperature signal ADC_VALUE=351, CMP1=0 (351≤405), CMP2=0 (351≤356), CMP3=1 (351≥311), CMP4=1 (351≥271), and the temperature level signal TEMP_LEVEL=3'b010, it indicates that the current temperature is in the high temperature warning level.

[0083] In another specific embodiment, the temperature gradient analysis submodule 221 further includes a power level change detection logic. This logic compares the current temperature level signal with the temperature level signal of the previous cycle. When the two are inconsistent, it determines that the temperature level has changed, generates a power level change flag signal LEVEL_CHANGE, and outputs this flag signal along with the temperature level signal to the graded power decision submodule 222. The power level change detection logic avoids repeatedly triggering power adjustments when the temperature is stable, reducing unnecessary power fluctuations.

[0084] The graded power decision submodule 222 is used to match the corresponding target fast charging power level according to the temperature level signal and generate a power adjustment command.

[0085] The graded power decision submodule 222 receives the temperature level signal output by the temperature gradient analysis submodule 221, reads the power level configuration corresponding to each temperature level from the register group, determines the target fast charging power level according to the mapping relationship, and generates a power adjustment command to output to the power execution submodule 223.

[0086] In one specific embodiment, the graded power decision submodule 222 uses lookup table logic to achieve power level matching. Assume that the five power percentages stored in the power level register are: REG_P1=100, REG_P2=80, REG_P3=50, REG_P4=30, and REG_P5=10. The graded power decision submodule 222 reads the corresponding power percentage from the register using a multiplexer based on the input temperature level signal TEMP_LEVEL.

[0087] Then, the graded power decision submodule 222 calculates the target fast charging power value based on the rated fast charging power and the target power percentage. Assuming the value stored in the rated fast charging power register is REG_RATED_POWER=40 (unit: watts), the formula for calculating the target fast charging power is:

[0088] Continuing with the previous example, when the temperature setting signal TEMP_LEVEL=3'b010 (high temperature warning threshold), TARGET_POWER_PERCENT=50, TARGET_POWER=40×50 / 100=20W.

[0089] The graded power decision submodule 222 also includes power adjustment instruction generation logic. This logic compares the target fast charging power with the current fast charging power and generates a power adjustment instruction POWER_CMD, which includes the adjustment direction (increase or decrease) and the target power value.

[0090] In this example, the current power CURRENT_POWER=40W, the target power TARGET_POWER=20W, and the generated power adjustment instruction is to reduce the power to 20W.

[0091] The power execution submodule 223 is used to transmit power adjustment commands to the fast charging protocol processing module.

[0092] The power execution submodule 223 receives the power adjustment command output by the hierarchical power decision submodule 222, performs format conversion and timing control on the command, and then transmits it to the fast charging protocol processing module inside the charging execution module 230. The fast charging protocol processing module generates power adjustment data that conforms to the protocol specification according to the specific fast charging protocol type.

[0093] In one specific embodiment, the power execution submodule 223 employs a state machine to implement timing control for command transmission. The state machine includes the following states:

[0094] In another specific embodiment, the power execution submodule 223 also includes instruction caching logic. When a new power adjustment instruction arrives, if the previous instruction is currently being processed (BUSY=1), the power execution submodule 223 stores the new instruction in the cache register, and processes the cached instruction only after the current instruction has been processed. This instruction caching logic ensures that power adjustment instructions are not lost and avoids duplicate instruction transmission.

[0095] The following example illustrates the overall workflow of the power adjustment module 220. The scenario involves the charging device temperature rising from 35°C to 42°C, requiring the fast charging power to be adjusted from 40W to 20W: Step 1: The temperature acquisition module 210 detects the temperature change and outputs a digital temperature signal ADC_VALUE=330 corresponding to 42℃.

[0096] Step 2: The temperature gradient analysis submodule 221 receives ADC_VALUE=330 and compares it with the threshold: CMP1 = (330>405) = 0; CMP2 = (330>356) = 0; CMP3 = (330>311) = 1; CMP4 = (330>271) = 1; Temperature setting signal TEMP_LEVEL = 3'b010 (high temperature warning setting); The gear change flag LEVEL_CHANGE = 1 (from low temperature gear to high temperature warning gear).

[0097] Step 3: The graded power decision submodule 222 receives TEMP_LEVEL=3'b010 and looks up the target power percentage in the table: TARGET_POWER_PERCENT = REG_P3 = 50; TARGET_POWER = 40 × 50 / 100 = 20W; Generate the power adjustment instruction POWER_CMD = {DIR_DOWN, 20}.

[0098] Step 4: The power execution submodule 223 receives the power adjustment command, the state machine transitions from IDLE to SEND, sends a power request POWER_REQ=20 to the fast charging protocol processing module, and returns to the IDLE state after waiting for a response.

[0099] Step 5: The charging execution module 230 receives the power request and smoothly adjusts the fast charging power from 40W to 20W according to the adjustment step size and stabilization interval time.

[0100] Please see Figure 5 , Figure 5 This is a schematic diagram of the structure of a temperature acquisition module provided in an embodiment of this application, as shown below. Figure 5 As shown, the temperature acquisition module 210 includes a temperature acquisition pin 211 and an ADC acquisition submodule 212, which are connected in sequence to realize the functions of receiving temperature analog signals and analog-to-digital conversion, respectively. The input terminal of the temperature acquisition module 210 is connected to an external temperature sensor (such as an NTC resistor) through the temperature acquisition pin 211, and the output terminal is connected to the power adjustment module 220.

[0101] Temperature acquisition pin 211 is used to connect an external temperature sensor to receive analog temperature signals.

[0102] Temperature acquisition pin 211 is an analog signal input pin led out by the fast charging protocol chip 20. An external temperature sensor is connected through this pin to introduce the voltage or current signal output by the temperature sensor into the chip.

[0103] In one specific embodiment, the temperature acquisition pin 211 is connected to an external NTC resistor. Internally, a pull-up resistor Rp is provided between the temperature acquisition pin 211 and the power supply VCC, forming a voltage divider circuit with the external NTC resistor Rntc. The voltage Vntc at the temperature acquisition pin 211 is the voltage divider point voltage, and its calculation formula is as follows:

[0104] Assuming the chip's supply voltage VCC = 3.3V, internal pull-up resistor Rp = 10KΩ, and the external NTC resistor has a nominal resistance of 10KΩ at 25℃, the resistance-temperature characteristic of the NTC resistor follows the B-value equation:

[0105] Where R25 is the nominal resistance at 25℃ (10KΩ), B is the material constant (assuming B=3950K), T is the current temperature (unit: Kelvin), and T25=298.15K (i.e. 25℃).

[0106] Based on the above formula, the resistance value of the NTC resistor and the corresponding voltage divider point can be calculated at different temperatures:

[0107] As can be seen from the table above, as the temperature increases, the resistance of the NTC resistor decreases, and the voltage divider voltage Vntc also decreases accordingly. The temperature acquisition pin 211 transmits the voltage divider voltage Vntc to the ADC acquisition submodule 212 for analog-to-digital conversion.

[0108] In another specific embodiment, the temperature acquisition pin 211 also includes input protection circuitry. This input protection circuitry includes a series current-limiting resistor and a parallel electrostatic discharge (ESD) protection diode to prevent damage to the internal circuitry of the chip from external overvoltage or electrostatic discharge. The current-limiting resistor typically has a resistance value of 100Ω to 1KΩ, and the clamping voltage of the ESD protection diode is slightly higher than the chip's supply voltage VCC.

[0109] The ADC acquisition submodule 212 is used to convert the analog temperature signal into a digital temperature signal.

[0110] The ADC acquisition submodule 212 receives the voltage Vntc input from the temperature acquisition pin 211, converts it into a digital temperature signal through analog-to-digital conversion, and outputs it to the power adjustment module 220 for further processing.

[0111] In one specific embodiment, the ADC acquisition submodule 212 is implemented using a successive approximation (SAR) ADC. SAR ADCs are characterized by low power consumption, small area, and moderate conversion speed, making them suitable for low- to medium-speed applications such as temperature acquisition. Assume the main parameters of the ADC acquisition submodule 212 are as follows:

[0112] The conversion formula for the ADC acquisition submodule 212 is:

[0113] Where Vntc is the input voltage divider, Vref is the reference voltage (3.3V), and N is the resolution bit depth (10 bits).

[0114] Based on the above formula, the corresponding ADC digital values ​​at different temperatures can be calculated:

[0115] Continuing with the previous example, when the charging device temperature is 42℃, the NTC resistance is calculated to be approximately 5.2KΩ according to the B-value equation. The voltage divider voltage Vntc = 3.3V × 5.2 / (10 + 5.2) ≈ 1.13V, and the corresponding ADC digital value is 1.13 / 3.3 × 1024 ≈ 351. This digital value is the digital temperature signal output to the power adjustment module 220.

[0116] In another specific embodiment, the ADC acquisition submodule 212 also includes digital filtering logic. Since temperature signals may be affected by electromagnetic interference or power supply noise, directly using the result of a single ADC conversion may lead to misjudgment of the temperature range. The digital filtering logic performs a moving average processing on the results of multiple consecutive ADC conversions, outputting a filtered digital temperature signal. Through moving average filtering, random noise in the ADC conversion results can be effectively suppressed, improving the stability of temperature detection.

[0117] In another specific embodiment, the ADC acquisition submodule 212 also includes temperature calibration logic. Because the nominal resistance value of NTC resistors has manufacturing tolerances (typically ±1% to ±5%), the resistance values ​​of NTC resistors from different batches may vary slightly at the same temperature, causing a deviation between the ADC conversion result and the actual temperature. The temperature calibration logic stores calibration parameters in the chip's internal registers to correct the ADC conversion result.

[0118] CAL_GAIN is the gain calibration coefficient, and CAL_OFFSET is the offset calibration coefficient. Both are stored in the chip's internal registers and can be configured during the chip production testing phase or the user's usage phase.

[0119] The following example illustrates the overall workflow of the temperature acquisition module 210. The example scenario is that the temperature of the charging device rises from 25°C to 42°C, and the temperature acquisition module 210 acquires the temperature in real time and outputs a digital temperature signal: Step 1: The external NTC resistor senses the temperature change of the charging device, and its resistance decreases from 10KΩ to 5.2KΩ.

[0120] Step 2: The voltage divider on the temperature acquisition pin 211 changes from 1.65V to 1.13V.

[0121] Step 3: The ADC acquisition submodule 212 samples and performs analog-to-digital conversion on the voltage divider. The original conversion result is ADC_RAW_VALUE=351.

[0122] Step 4: The digital filtering logic performs a moving average on the results of 8 consecutive conversions. Assume the filtered result is ADC_VALUE=351.

[0123] Step 5: The temperature calibration logic corrects the filtering result. Assuming CAL_GAIN=1.0 and CAL_OFFSET=0, the corrected result is ADC_CALIBRATED=351.

[0124] Step 6: The ADC acquisition submodule 212 outputs the corrected digital temperature signal ADC_CALIBRATED=351 to the power adjustment module 220.

[0125] As described in the aforementioned power adjustment module embodiment, after receiving ADC_VALUE=351, the power adjustment module 220 generates a corresponding power adjustment command through temperature gradient analysis and graded power decision.

[0126] It should be noted that, as described in the foregoing method embodiments, the temperature sensor of this application is not limited to an NTC resistor, but can also be a thermocouple temperature sensor or an integrated temperature sensor chip. When different types of temperature sensors are used, the interface circuit of the temperature acquisition pin 211 and the conversion parameters of the ADC acquisition submodule 212 need to be adjusted accordingly, but the overall signal acquisition and analog-to-digital conversion process remains consistent.

[0127] In an alternative embodiment, an integrated temperature sensor chip is used instead of the NTC resistor. The integrated temperature sensor chip integrates a temperature-sensitive element and signal processing circuitry, and can directly output a voltage signal or digital signal that is linearly related to temperature. When using an integrated temperature sensor that outputs a voltage signal, the temperature acquisition pin 211 directly receives the voltage signal output by the sensor, eliminating the need for a pull-up resistor to form a voltage divider circuit. When using an integrated temperature sensor that outputs a digital signal, the ADC acquisition submodule 212 can be omitted, and the temperature acquisition pin 211 directly receives the digital temperature data output by the sensor through a digital interface (such as I²C or SPI).

[0128] Please see Figure 6 , Figure 6 This is a schematic diagram of another fast charging protocol chip provided in an embodiment of this application. Based on the aforementioned basic structure embodiment of the fast charging protocol chip, this embodiment further includes a register group 240 and a fast charging protocol processing module 250.

[0129] like Figure 6 As shown, the fast charging protocol chip 20 includes a temperature acquisition module 210, a power adjustment module 220, a charging execution module 230, a register group 240, and a fast charging protocol processing module 250. The functions of the temperature acquisition module 210, the power adjustment module 220, and the charging execution module 230 are as described in the previous embodiments and will not be repeated here.

[0130] Register group 240 is used to store multiple temperature thresholds, the fast charging power level corresponding to each temperature level, the adjustment step size, and the stabilization interval time.

[0131] Register group 240 is a configurable parameter storage unit inside fast charging protocol chip 20. Parameters in register group 240 can be read and written through the chip's configuration interface. The configuration interface refers to the parameter configuration channel provided by the chip, which can be implemented using an I2C interface, SPI interface, or dedicated configuration pins. Register group 240 is connected to power adjustment module 220 and charging execution module 230, providing them with the configuration parameters required for their operation.

[0132] In one specific embodiment, register group 240 includes three types of registers: temperature threshold register, power level register, and adjustment parameter register.

[0133] The temperature threshold registers store the ADC digital values ​​corresponding to four temperature thresholds. Specifically, register group 240 contains four temperature threshold registers, storing the low-temperature threshold, medium-temperature threshold, high-temperature warning threshold, and over-temperature critical threshold, respectively. Continuing with the previous example, the default value stored in the low-temperature threshold register is 405, corresponding to approximately 35°C; the default value stored in the medium-temperature threshold register is 356, corresponding to approximately 40°C; the default value stored in the high-temperature warning threshold register is 311, corresponding to approximately 45°C; and the default value stored in the over-temperature critical threshold register is 271, corresponding to approximately 50°C. When performing temperature gradient analysis, the power adjustment module 220 reads the threshold data from the above registers and compares it with the digital temperature signal.

[0134] The power level register stores the percentage of fast charging power corresponding to each temperature level. Specifically, register group 240 contains five power level registers, which store the power percentage corresponding to the full-power fast charging level, the first reduced-power fast charging level, the second reduced-power fast charging level, the third reduced-power fast charging level, and the fourth reduced-power fast charging level, respectively. Continuing with the previous example, the default value stored in the full-power fast charging level register is 100, representing 100% rated power; the default value stored in the first reduced-power fast charging level register is 80, representing 80% rated power; the default value stored in the second reduced-power fast charging level register is 50, representing 50% rated power; the default value stored in the third reduced-power fast charging level register is 30, representing 30% rated power; and the default value stored in the fourth reduced-power fast charging level register is 10, representing 10% rated power. When performing graded power decisions, the power adjustment module 220 reads the power level data from the above registers and matches the target fast charging power.

[0135] The adjustment parameter register stores parameters related to power smoothing adjustment. Specifically, register group 240 includes an adjustment step size register and a stabilization interval time register. The adjustment step size register stores the percentage of power adjustment for each adjustment, with a default value of 5, indicating an adjustment of 5% of the rated power each time. The stabilization interval time register stores the waiting time between two adjacent power adjustments, with a default value of 200, indicating a wait of 200 milliseconds. In addition, register group 240 also includes a rated fast charging power register and a fast charging protocol type register, storing the rated fast charging power value of the charging device and the currently used fast charging protocol type code, respectively.

[0136] In another specific embodiment, register group 240 also includes a status register and a control register. The status register is a read-only register used to reflect the current operating status of the chip, including information such as the current temperature setting, power adjustment status, fast charging protocol communication status, and over-temperature protection flag. The control register is a read-write register used to perform control operations on the chip, including power adaptive adjustment enable bit, soft reset bit, and forced power setting bit. Through the status register and control register, the external master control chip can monitor the operating status of the fast charging protocol chip 20 in real time and intervene and control it when necessary.

[0137] Through the parameter configuration function of register group 240, the same fast charging protocol chip 20 can be adapted to different application scenarios. For example, for mobile phone fast charging scenarios, the temperature threshold can be configured to a higher value to pursue faster charging speeds; for power bank scenarios, the temperature threshold can be configured to a lower value to protect the battery cell safety; for vehicle fast charging scenarios, the temperature threshold can be configured to a wider range to adapt to higher operating temperatures. Chip manufacturers can configure default parameters when the chip leaves the factory, and terminal device manufacturers can also modify parameters through the configuration interface according to product requirements to achieve flexible product customization.

[0138] The fast charging protocol processing module 250 is used to convert the power adjustment command into power adjustment data that conforms to the corresponding fast charging protocol specification and transmit it to the charging execution module 230 according to the type of fast charging protocol adopted by the charging device.

[0139] The fast charging protocol processing module 250 is located between the power adjustment module 220 and the charging execution module 230. It receives the power adjustment command output by the power adjustment module 220, converts the power adjustment command into a data format that conforms to the corresponding protocol specification according to the type of fast charging protocol currently in use, and then transmits it to the charging execution module 230 for execution.

[0140] In one specific embodiment, the internal structure of the fast charging protocol processing module 250 includes three parts: a protocol identification unit, a data conversion unit, and a communication interface unit.

[0141] The protocol identification unit is used to determine the type of fast charging protocol currently in use. The protocol identification unit reads the value of the fast charging protocol type register from register group 240, determines whether the current protocol is QC, PD, or SCP, and then passes the protocol type information to the data conversion unit. In some embodiments, the protocol identification unit can also automatically identify the protocol type by detecting the electrical characteristics of the charging interface, for example, by detecting the voltage on the CC line to determine if it is the PD protocol, and by detecting the voltage combination on the D+ / D- lines to determine if it is the QC protocol.

[0142] The data conversion unit converts power adjustment commands into power adjustment data that conforms to the corresponding protocol specifications. Based on the protocol type determined by the protocol identification unit, the data conversion unit employs different conversion logic to process the power adjustment commands.

[0143] When the protocol type is PD protocol, the data conversion unit converts the target power value into a power request data object in the PD protocol specification. The PD protocol uses two parameters, voltage and current, to describe power. The data conversion unit calculates the target current value based on the target power value and the current voltage, or calculates the target voltage value based on the target power value and the current current, and encapsulates the calculation result into a request data object format in the PD protocol specification. Continuing with the previous example, assuming the current charging voltage is 20V, the current is 2A, the power is 40W, and the target power is 20W, the data conversion unit can choose to keep the voltage at 20V and reduce the current to 1A, generating a request data object containing the target current value.

[0144] When the protocol type is QC, the data conversion unit converts the target power value into a voltage request signal conforming to the QC protocol specification. The QC protocol requests different output voltage levels by adjusting the voltage combination on the D+ / D- lines. For the QC2.0 protocol, the data conversion unit selects the appropriate voltage level based on the target power value and generates the corresponding D+ / D- voltage combination signal. For the QC3.0 protocol, the data conversion unit can continuously adjust the output voltage in 200mV steps, gradually increasing or decreasing the voltage by generating pulse signals on the D+ or D- lines.

[0145] When the protocol type is SCP, the data conversion unit converts the target power value into a current adjustment command specified by the SCP protocol. The SCP protocol employs a low-voltage, high-current scheme, adjusting the output current via single-wire communication. The data conversion unit calculates the target current value based on the target power value and a fixed low voltage value, and encapsulates the calculation result into a current adjustment command format specified by the SCP protocol, including fields such as command type, target current value, and checksum.

[0146] The communication interface unit is used to send power adjustment data to the charging device. The communication interface unit selects the appropriate physical interface for communication based on the protocol type. For the PD protocol, the communication interface unit sends a power request message via the CC line using biphase marker encoding. The message content includes fields such as preamble, start-of-frame character, header, data object, CRC checksum, and end-of-frame character. After transmission, it waits for a response message from the charging device. For the QC protocol, the communication interface unit communicates by controlling the voltage level or pulse signal on the D+ / D- lines. For the SCP protocol, the communication interface unit sends current adjustment commands via the D+ line using single-wire half-duplex mode.

[0147] In another specific embodiment, the fast charging protocol processing module 250 further includes a protocol state machine for managing the handshake, negotiation, and maintenance processes of the fast charging protocol. The protocol state machine includes states such as idle, detection, negotiation, active, adjustment, and error states. In the idle state, the protocol state machine waits for a charging device to connect; upon detecting a connection, it enters the detection state to perform protocol identification; after protocol identification, it enters the negotiation state to negotiate power with the charging device; after negotiation, it enters the active state to perform normal charging, at which point it can receive power adjustment commands; upon receiving a power adjustment command, it enters the adjustment state to perform power adjustment, and returns to the active state after adjustment; if a timeout or error occurs during communication, it enters the error state to attempt to restore communication or disconnect.

[0148] The following example illustrates the collaborative workflow of the 20 modules in the fast charging protocol chip: In a scenario using PD protocol and 40W fast charging, if the temperature of the charging device rises from 35℃ to 48℃, the fast charging power needs to be adjusted from 40W to 12W.

[0149] First, the temperature acquisition module 210 detects the temperature change, converts the temperature analog signal acquired by the external NTC resistor into a digital temperature signal, and outputs the corresponding ADC digital value 290 of 48℃ to the power adjustment module 220.

[0150] Then, the power adjustment module 220 reads four temperature thresholds from the register group 240 and compares the digital temperature signal with the thresholds. Since the ADC digital value 290 is greater than the over-temperature critical threshold 271 but less than the over-temperature warning threshold 311, it is determined that the current temperature is in the over-temperature warning range. The power adjustment module 220 continues to read the power percentage of 30% and the rated fast charging power of 40W corresponding to the over-temperature warning range from the register group 240, calculates the target power as 12W, and generates a power adjustment command.

[0151] Next, the fast charging protocol processing module 250 reads the fast charging protocol type as PD protocol from the register group 240, converts the power adjustment command into a PD protocol power request data object, and sends a power request message to the charging device through the CC line.

[0152] Finally, the charging execution module 230 reads the adjustment step size of 5% and the stabilization interval of 200 milliseconds from the register group 240, and adjusts the fast charging power smoothly from 40W to 12W in a step size of 2W and an adjustment rhythm of once every 200 milliseconds, while maintaining the PD protocol communication state without interruption throughout the entire process.

[0153] Through the coordinated operation of the above modules, the fast charging protocol chip 20 of this application realizes complete temperature detection, power decision, protocol conversion and smooth adjustment functions, and balances charging safety and charging efficiency while maintaining fast charging protocol communication.

[0154] It should be noted that the fast charging protocol chip 20 of this application adopts a modular design. The power adjustment module 220, as a newly added core functional module, reuses the resources of the original temperature acquisition module 210, charging execution module 230, register group 240 and fast charging protocol processing module 250 of the chip. There is no need to add independent analog circuit devices, thereby simplifying the chip design complexity, reducing manufacturing costs, and making it easy to implement in the design and production process of existing fast charging protocol chips.

[0155] In the aforementioned embodiment, the temperature acquisition module 210 acquires an analog temperature signal by connecting to an external NTC resistor via temperature acquisition pin 211. Alternatively, a thermocouple temperature sensor or an integrated temperature sensor chip can be used to replace the NTC resistor.

[0156] When a thermocouple temperature sensor is used, the two different metal conductors of the thermocouple generate a thermoelectric electromotive force (EMF) when the temperature changes. This EMF is directly related to the temperature. The temperature acquisition pin 211 receives the millivolt-level voltage signal output by the thermocouple. Because the output signal amplitude is small, an internal signal amplification circuit is needed to amplify the thermocouple signal. The amplified signal is then transmitted to the ADC acquisition submodule 212 for analog-to-digital conversion. Subsequent processes such as temperature gradient analysis, graded power decision-making, and power smoothing adjustment remain unchanged. Thermocouple temperature sensors have the advantages of a wide temperature measurement range and fast response speed, making them suitable for fast charging scenarios with high temperature response requirements.

[0157] When using an integrated temperature sensor chip, the chip integrates a temperature-sensitive element, signal conditioning circuit, and analog-to-digital conversion circuit, directly outputting a voltage signal or digital signal linearly related to temperature. When using an integrated temperature sensor that outputs a voltage signal, the temperature acquisition pin 211 directly receives the linear voltage signal output by the sensor, eliminating the need for a pull-up resistor to form a voltage divider circuit. The ADC acquisition submodule 212 performs analog-to-digital conversion on this voltage signal and outputs a digital temperature signal. When using an integrated temperature sensor that outputs a digital signal, the temperature sensor directly outputs digital temperature data through a digital interface such as I²C or SPI. In this case, the ADC acquisition submodule 212 can be omitted, and the temperature acquisition pin 211 directly receives the digital temperature data output by the sensor through the digital interface and transmits it to the power adjustment module 220. Integrated temperature sensor chips offer advantages such as high accuracy, good linearity, and no need for calibration, making them suitable for fast-charging scenarios with high temperature measurement accuracy requirements.

[0158] In the aforementioned embodiment, the temperature acquisition module 210 uses an ADC acquisition submodule 212 to convert the analog temperature signal into a digital temperature signal, and the power adjustment module 220 compares the digital temperature signal with preset multiple temperature thresholds. In an alternative solution, a multi-comparator circuit can replace the ADC acquisition submodule 212, directly determining the temperature level in the analog domain.

[0159] Specifically, the multi-comparator circuit includes multiple voltage comparators corresponding to the number of temperature levels. Continuing with the previous example of four temperature thresholds, the multi-comparator circuit includes three voltage comparators. One input of each comparator is connected to the analog temperature signal on the temperature acquisition pin 211, and the other input is connected to a preset reference voltage. The three reference voltages correspond to the temperature points of the low temperature threshold T1, the medium temperature threshold T2, and the high temperature warning threshold T3, respectively. When the analog temperature signal is lower than a certain reference voltage, the corresponding comparator outputs a high level; when the analog temperature signal is higher than the reference voltage, the corresponding comparator outputs a low level. The combination of the output signals of the three comparators can directly represent the current temperature level without the need for analog-to-digital conversion and numerical comparison.

[0160] By adopting a multi-comparator circuit as an alternative, the temperature gradient analysis submodule 221 in the power adjustment module 220 can be simplified in design, directly receiving the level signal output by the comparator without needing to execute numerical comparison logic. Subsequent processes such as graded power decision-making and power smoothing adjustment remain unchanged. The multi-comparator circuit offers advantages such as fast response speed and low power consumption, making it suitable for fast charging scenarios with high power consumption and response speed requirements; however, its disadvantage is that adjusting the temperature threshold requires modifying the reference voltage, making it less flexible than the ADC solution.

[0161] In the aforementioned embodiment, the fast charging protocol processing module 250 directly transmits power adjustment data to the charging execution module 230, which then drives the charging circuit to perform power adjustment. In an alternative, a power drive submodule can be added between the fast charging protocol processing module 250 and the charging execution module 230 to improve the stability and driving capability of the power adjustment.

[0162] The power drive submodule receives power adjustment data output from the fast charging protocol processing module 250, amplifies and buffers the data, and then transmits it to the charging execution module 230. The power drive submodule internally includes a signal amplification circuit and a buffer circuit. The signal amplification circuit amplifies the signal amplitude of the power adjustment data to the drive level required by the charging execution module 230, and the buffer circuit provides sufficient current drive capability to ensure the stability of signal transmission. The subsequent power adjustment mechanism remains unchanged.

[0163] The alternative solution of adding a power drive submodule is suitable for high-power fast charging scenarios such as vehicle fast charging and desktop fast charging. In high-power fast charging scenarios, the charging execution module 230 needs to drive high-power switching devices, which places high demands on the amplitude and driving capability of the drive signal. The power drive submodule can ensure the reliable transmission of the power adjustment signal and improve the stability of the system.

[0164] In the aforementioned embodiment, the temperature gradient analysis submodule 221 presets four temperature thresholds, and the graded power decision submodule 222 presets four corresponding power levels. In an alternative embodiment, the temperature and power levels can be adjusted to three, five, or other levels according to actual application requirements.

[0165] When using a three-level temperature threshold to divide the charging into four levels, the temperature thresholds can be set as three levels: low temperature threshold T1, medium temperature threshold T2, and high temperature threshold T3. The corresponding power levels can be set as four levels: full power level P1, medium power level P2, low power level P3, and a third power reduction level P4. The three-level threshold scheme has a relatively coarse temperature gradient division, but its implementation complexity is low, making it suitable for ordinary fast charging scenarios where high temperature control precision is not required.

[0166] When using five or more temperature thresholds, more intermediate thresholds can be added on top of the aforementioned four thresholds to achieve finer temperature control and smoother power adjustment.

[0167] By reconfiguring the corresponding number of temperature thresholds and power levels in the chip's internal registers, the subsequent gradient analysis, power matching, and step-by-step adjustment processes remain unchanged, enabling temperature control and power adjustment with different levels of precision to meet the needs of different devices.

[0168] In the aforementioned embodiment, the power adjustment module 220 is fully integrated within the fast charging protocol chip 20, including three sub-modules: a temperature gradient analysis sub-module 221, a graded power decision sub-module 222, and a fast charging power execution sub-module 223. In an alternative approach, some sub-modules can be implemented on an external MCU, retaining only the necessary sub-modules within the fast charging protocol chip.

[0169] Specifically, the temperature gradient analysis submodule 221 and the graded power decision submodule 222 can be ported to an external MCU, while only the fast charging power execution submodule 223 is retained inside the fast charging protocol chip 20. The external MCU receives the digital temperature signal output by the temperature acquisition module 210 through the general interface of the fast charging protocol chip 20. After completing the temperature gradient analysis and graded power decision inside the MCU, the generated power adjustment command is transmitted to the fast charging power execution submodule 223 inside the chip through the general interface, and the subsequent power adjustment process remains unchanged.

[0170] The alternative solution using an external MCU offers the following advantages: First, it reduces the logic complexity and chip area of ​​the fast charging protocol chip 20, thereby lowering chip costs. Second, it improves the flexibility of temperature gradient analysis and graded power decision-making, allowing algorithm optimization through MCU software upgrades without modifying chip hardware. Third, it facilitates integration with the main control system of terminal devices, enabling higher-level charging management strategies. This alternative solution is suitable for fast charging scenarios where terminal devices are already equipped with MCUs and cost is a concern.

[0171] It should be noted that the above alternative solutions can be implemented individually or in combination. For example, an integrated temperature sensor chip can be used to replace the NTC resistor, and a five-level temperature threshold and power level scheme can be used to replace the four-level threshold scheme, forming a combined alternative implementation method. All alternative solutions retain the core technical features of this application: "temperature gradient detection, graded power matching, and smooth adjustment while maintaining fast charging protocol communication," and can achieve the inventive objective of this application to balance charging safety and charging efficiency.

[0172] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this application, and not to limit them; under the concept of this application, the technical features of the above embodiments or different embodiments can also be combined, the steps can be implemented in any order, and there are many other variations of different aspects of this application as described above, which are not provided in detail for the sake of brevity; although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the foregoing embodiments, or make equivalent substitutions for some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this application.

Claims

1. A power adjustment method applied to a fast charging protocol chip, characterized in that, include: The temperature signal of the charging device is collected and converted into a digital temperature signal; The digital temperature signal is compared with preset multiple temperature thresholds to determine the current temperature level. Based on the temperature level, a corresponding target fast charging power level is matched, and a power adjustment command is generated. While maintaining fast charging protocol communication, the current fast charging power is gradually adjusted to the target fast charging power level according to a preset adjustment step size; wherein a predetermined stabilization interval time is set between two adjacent power adjustments.

2. The method according to claim 1, characterized in that, The multiple temperature thresholds include a progressively increasing low temperature threshold T1, a medium temperature threshold T2, a high temperature warning threshold T3, and an over-temperature critical threshold T4, dividing the temperature range into five levels: low temperature, medium temperature, high temperature warning, over-temperature warning, and over-temperature critical. These correspond to the full-power fast charging level P1, the first reduced-power fast charging level P2, the second reduced-power fast charging level P3, the third reduced-power fast charging level P4, and the fourth reduced-power fast charging level P5, respectively. The full-power fast charging level P1 corresponds to 100% of the rated fast charging power. The power percentages corresponding to the first reduced-power fast charging level P2, the second reduced-power fast charging level P3, the third reduced-power fast charging level P4, and the fourth reduced-power fast charging level P5 decrease sequentially.

3. The method according to claim 1, characterized in that, The step of gradually adjusting the current fast charging power to the target fast charging power level according to a preset adjustment step size includes: When the target fast charging power level is lower than the current fast charging power, the fast charging power is gradually reduced according to the adjustment step size. When the target fast charging power level is higher than the current fast charging power, the fast charging power is gradually increased according to the adjustment step size.

4. The method according to claim 1, characterized in that, The multiple temperature thresholds, the fast charging power levels corresponding to each temperature level, the adjustment step size, and the stabilization interval time are configured through registers.

5. The method according to claim 1, characterized in that, While maintaining fast charging protocol communication, the step of gradually adjusting the current fast charging power to the target fast charging power level according to a preset adjustment step size includes: Depending on the type of fast charging protocol used by the charging device, the power adjustment command is converted into power adjustment data that conforms to the corresponding fast charging protocol specification; the fast charging protocol type includes QC protocol, PD protocol or SCP protocol.

6. A fast charging protocol chip, characterized in that, include: The temperature acquisition module is used to acquire the temperature signal of the charging device and convert it into a digital temperature signal. The power adjustment module is used to compare the digital temperature signal with preset multiple temperature thresholds to determine the current temperature level, match the corresponding target fast charging power level according to the temperature level, and generate a power adjustment command. The charging execution module is used to gradually adjust the current fast charging power to the target fast charging power level according to a preset adjustment step size while maintaining fast charging protocol communication. A predetermined stable interval time is set between two adjacent power adjustments.

7. The chip according to claim 6, characterized in that, The power adjustment module includes: The temperature gradient analysis submodule is used to compare the digital temperature signal with preset multiple temperature thresholds to determine the current temperature level and generate a temperature level signal. The graded power decision submodule is used to match the corresponding target fast charging power level according to the temperature level signal and generate a power adjustment command. The power execution submodule is used to transmit the power adjustment command to the fast charging protocol processing module; The power adjustment module is a digital logic circuit integrated into the digital circuit section of the fast charging protocol chip.

8. The fast charging protocol chip according to claim 6, characterized in that, It also includes a register group for storing the multiple temperature thresholds, the fast charging power level corresponding to each temperature level, the adjustment step size, and the stabilization interval time.

9. The fast charging protocol chip according to claim 6, characterized in that, The temperature acquisition module includes a temperature acquisition pin and an ADC acquisition submodule. The temperature acquisition pin is used to connect an external temperature sensor to receive an analog temperature signal, and the ADC acquisition submodule is used to convert the analog temperature signal into a digital temperature signal.

10. The fast charging protocol chip according to claim 6, characterized in that, Also includes: The fast charging protocol processing module is used to convert the power adjustment command into power adjustment data that conforms to the corresponding fast charging protocol specification and transmit it to the charging execution module according to the fast charging protocol type adopted by the charging device.

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