A method of overexcitation based on coordinate transformation

Abstract

This invention belongs to the field of motor control technology, specifically relating to an overexcitation method based on coordinate transformation. It includes the following steps: Step 1: Selecting the phase to be selected from the three-phase voltages by setting the DC bias; Step 2: Applying the DC bias to the selected phase; Step 3: Timing the duration of the DC bias, and after the DC bias is superimposed, starting a counter to keep the DC bias continuously superimposed within the counting time; Step 4: Removing the DC bias; Step 5: Maintaining the target voltage value. At this point, the overexcitation process is complete. The beneficial effects of this invention are: high control accuracy: It can accurately generate a controllable amplitude DC bias in the target phase without affecting the symmetrical sinusoidal characteristics of other phase voltages. Experimental verification shows that the bias control accuracy can reach over 0.1%.

Description

Technical Field

[0001] This invention belongs to the field of motor control technology, specifically relating to an overexcitation method based on coordinate transformation. Background Technology

[0002] In the field of modern power electronics systems and motor control, precise control of three-phase AC voltage is crucial for achieving efficient energy conversion and stable operation. Traditional three-phase system control often requires symmetrical voltage balance, but in special application scenarios such as motor starting and grid imbalance regulation, it is necessary to individually adjust the voltage of specific phases to meet customized control requirements.

[0003] Currently, technologies for phase voltage regulation largely rely on complex filtering circuits or additional compensation devices, resulting in slow response speed, low control accuracy, and high hardware costs. Although related coordinate transformation techniques are applied to voltage control, it is currently difficult to accurately generate a controllable DC bias in the target phase, and it is prone to interfering with the voltage characteristics of other phases, leading to the disruption of system voltage symmetry and increased harmonic content. Furthermore, in high-frequency applications, existing technologies face the dilemma of balancing real-time requirements with computational complexity, failing to meet the demands for efficient and precise control.

[0004] Therefore, there is an urgent need for a technical method that can accurately and efficiently achieve DC bias of AC voltage in a specific phase, while keeping the impact on other system performance controllable, in order to overcome the shortcomings of existing technologies. Summary of the Invention

[0005] The purpose of this invention is to provide an overdrive method based on coordinate transformation, which can overcome the shortcomings of existing three-phase AC voltage regulation processes, such as low control accuracy, poor targeting, large system interference, and insufficient real-time performance. Through precise coordinate transformation and signal superposition strategies, a controllable DC bias can be generated in the target phase voltage, while minimizing the impact on the characteristics of other phase voltages, thus achieving precise control of the voltage bias. Furthermore, it takes into account both the simplicity of hardware implementation and the efficiency of digital processing, meeting the real-time control requirements of different application scenarios.

[0006] The technical solution of the present invention is as follows: an overexcitation method based on coordinate transformation, comprising the following steps: Step 1: Select the phase for DC bias setting in the three-phase voltage; Step 2: Apply DC bias to the selected phase; Step 3: DC bias duration timing. After the DC bias is superimposed, the counter starts timing and keeps the DC bias amount continuously superimposed within the counting time. Step 4: Remove DC bias; Step 5: Maintain the target voltage value. At this point, the overexcitation process is complete.

[0007] In step 2, a DC bias is applied to the selected phase A, and the inverter output voltage outer loop controller superimposes its d-axis voltage reference value Vd_ref. An AC reference value for a given DC bias is superimposed on the q-axis voltage reference value Vq_ref. The AC reference value for the given DC bias; Vd_ref: set to the amplitude of the output voltage; Vq_ref: set to 0 to ensure that the output voltage is phase-locked with phase A.

[0008] In step 2, a DC bias is applied to the selected B phase, and the inverter output voltage outer loop controller superimposes its d-axis voltage reference value Vd_ref. Given the AC reference value of the DC bias, the q-axis voltage reference value Vq_ref is superimposed. The AC reference value for the given DC bias is set to 0, to ensure that the output voltage is phase-locked with phase A.

[0009] In step 2, a DC bias is applied to the selected C phase, and the inverter output voltage outer loop controller superimposes its d-axis voltage reference value Vd_ref. Given the AC reference value of the DC bias, the q-axis voltage reference value Vq_ref is superimposed. AC reference value given DC bias; Vd_ref: Set to the amplitude of the output voltage, Vq_ref: Set to 0 to ensure that the output voltage is phase-locked with phase C.

[0010] In step 4, the DC bias of phase A is removed, and the inverter output voltage outer loop controller superimposes the d-axis voltage reference value Vd_ref onto it. The AC reference value for the given DC bias is removed, and the value superimposed on the q-axis voltage reference value Vq_ref is... The AC reference value for the given DC bias is removed; then its d-axis voltage reference value Vd_ref is gradually decreased every 50ms until the target voltage is reached.

[0011] In step 4, the DC bias of phase B is removed, and the inverter output voltage outer loop controller superimposes the d-axis voltage reference value Vd_ref onto it. The AC reference value for the given DC bias is removed, and the value superimposed on the q-axis voltage reference value Vq_ref is... The AC reference value for the given DC bias is removed; then its d-axis voltage reference value Vd_ref is gradually decreased every 50ms until the target voltage is reached.

[0012] In step 4, the C-phase DC bias is removed, and the inverter output voltage outer loop controller superimposes the d-axis voltage reference value Vd_ref onto it. The AC reference value for the given DC bias is removed, and the value superimposed on the q-axis voltage reference value Vq_ref is... The AC reference value of the given DC bias is removed; then its d-axis voltage reference value Vd_ref is gradually reduced every 50ms until the target voltage is reached.

[0013] The beneficial effects of this invention are as follows: High control precision: It can accurately generate a controllable amplitude DC bias in the target phase without affecting the symmetrical sinusoidal characteristics of other phase voltages. Experimental verification shows that the bias control precision can reach over 0.1%. Low system interference: Through a targeted signal superposition strategy, the voltage imbalance introduced by the DC bias can be controlled within 2%, and the total harmonic distortion (THD) can be controlled within 5%, meeting the requirements of the international standard IEC 61000-4-30. Wide applicability: It can be widely used in motor control (torque ripple suppression of over 30%, starting current reduction of 20-30%), power systems (voltage imbalance reduced from 5% to below 1%, harmonic distortion reduced from 15% to below 5%), power electronic converters (output waveform THD reduction of 15-20%, operating voltage range expansion of 30-50%), and many other fields. Achieving flexibility and efficiency: Offers both hardware and digital implementation options, allowing for flexible selection based on real-time requirements and cost. The digital solution, optimized through parallel processing and pipelined operation, can meet the real-time control needs of high-frequency scenarios. Low hardware cost: Eliminates the need for additional complex filtering or compensation devices, and can be implemented based on existing power electronic control hardware architecture, significantly reducing system construction costs. Attached Figure Description

[0014] Figure 1 This is a structural diagram of a drive power inverter; Figure 2 This is the control principle diagram of the inverter; Figure 3 The flowchart illustrates an overdrive method based on coordinate transformation provided by this invention. Detailed Implementation

[0015] The present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0016] The present invention provides an overexcitation method based on coordinate transformation for overexcitation magnetization of a special motor. By adding a DC bias to one phase of the three-phase AC voltage driving the motor, the original magnetic field is destroyed, thereby magnetizing the motor. The magnetized motor can operate under a lower voltage drive, thereby reducing its overall operating power and achieving energy saving.

[0017] The core technical solution of this invention is based on the coordinate transformation theory of Clark and Park transforms. By superimposing an AC signal with a specific phase and amplitude onto the DC component of a synchronously rotating coordinate system (dq coordinate system), and generating the required DC bias in the target phase voltage after inverse coordinate transformation, the specific steps are as follows: The overexcitation requirement is to superimpose a DC component of 0~100V (adjustable) onto a single phase of the output voltage, and the A, B, and C phases can be selected for superposition.

[0018] The principle is derived as follows: Assume the output voltages are ua, ub, uc ua = Acos(ωt), ub=Acos(ωt-2Π / 3), uc = Acos(ωt + 2π / 3), By transforming the three-phase voltage into two-phase stationary coordinates, we can obtain... , , After undergoing a two-phase rotating coordinate transformation, we obtain: , , If phase A is selected with DC bias DC_bias, then ua' = Acos(ωt) + DC_bias After applying the biased values ​​ua', ub, and uc to a three-phase stationary coordinate system, we can obtain: , , After further rotational coordinate transformation, we can obtain , , From the above derivation, it can be seen that to achieve the superposition of the DC component in phase A, it is equivalent to superimposing an AC component with the same phase as A onto the given voltage D-axis, with a magnitude of... This is equivalent to superimposing an AC quantity orthogonal to phase A on the voltage Q-axis, with a magnitude of: Therefore, by changing the DQ axis voltage setpoint, the DC component of the output A-phase voltage can be superimposed; the same applies to B and C.

[0019] The parameters involved are explained below: ua: Phase a voltage; ub: Phase b voltage; uc: Phase c power supply; Acos(ωt): Mathematical expression for phase a voltage; Acos(ωt-2Π / 3): Mathematical expression for phase b voltage; Acos(ωt+2Π / 3): Mathematical expression for phase c voltage. : The alpha axis of the stationary coordinate system; : Beta axis of the stationary coordinate system; : Rotation of the coordinate system d-axis; : Rotating coordinate system q-axis; DC_bias: DC bias; ua': Mathematical expression for the a-phase voltage with increased DC bias; : The stationary coordinate system's alpha axis after increasing the offset; The beta axis of the stationary coordinate system after increasing the offset; Rotate the coordinate system d-axis by increasing the offset. : Rotate the coordinate system q-axis after increasing the offset.

[0020] Figure 1 This diagram shows the structure of a drive power inverter, which mainly consists of three parts: an IGBT inverter, a DC bus capacitor, and voltage and current acquisition units. The inverter topology is a four-parallel IGBT inverter, with each phase bridge arm using parallel-connected switching transistors to improve the inverter's output power. The DC bus capacitor, composed of multiple capacitors connected in series and parallel, primarily serves for DC energy storage and voltage regulation. The voltage and current acquisition units sample the output current and voltage, inputting the sampled parameters into the DSP control core for control. This enables the inverter's control algorithm to output PWM signals, which are then converted into drive signals for the power devices.

[0021] Figure 2 This is a schematic diagram of the inverter control principle. This invention is based on a general inverter control algorithm. The inverter-side hardware topology is identical to that of the grid-side converter, therefore their mathematical models are also identical. To control the motor-side output voltage, a dual-closed-loop control strategy is adopted. The outer loop is a voltage loop to stabilize the output voltage, and the inner loop is a current loop to achieve fast power point tracking. Both the voltage and current loops use PI controllers.

[0022] in Figure 1 This is a hardware structure implemented using an overdrive method based on coordinate transformation. Figure 2 This forms the basis of the software algorithm flow for the overdrive method based on coordinate transformation.

[0023] Figure 3This is the flowchart for the overexcitation procedure. It is mainly executed in the interrupt routine. After receiving the overexcitation start signal, it enters the overexcitation interrupt routine, superimposes the set DC bias component onto the DC components of the d and q axes after coordinate transformation, counts the DC bias setpoint according to the preset DC bias time, cancels the DC bias setpoint after the count is completed, and the voltage slowly decreases to the target voltage according to the preset slope, and stabilizes the voltage value at the target voltage to complete the overexcitation operation.

[0024] like Figure 3 As shown, an overdrive method based on coordinate transformation includes the following steps: Step 1: Select the phase for DC bias setting in the three-phase voltage; Step 2: Apply DC bias to the selected phase, including: Apply DC bias to phase A; The inverter output voltage outer loop controller superimposes its d-axis voltage reference value Vd_ref. An AC reference value for a given DC bias is superimposed on the q-axis voltage reference value Vq_ref. AC reference value given DC bias; Vd_ref: Set to the amplitude of the output voltage. Vq_ref: Usually set to 0 to ensure that the output voltage is phase-locked with phase A.

[0025] Apply DC bias to phase B; The inverter output voltage outer loop controller superimposes its d-axis voltage reference value Vd_ref. Given the AC reference value of the DC bias, the q-axis voltage reference value Vq_ref is superimposed. Vd_ref: sets the amplitude of the output voltage; Vq_ref: is usually set to 0 to ensure that the output voltage is phase-locked with phase B.

[0026] Apply a DC bias to phase C; The inverter output voltage outer loop controller superimposes its d-axis voltage reference value Vd_ref. Given the AC reference value of the DC bias, the q-axis voltage reference value Vq_ref is superimposed. AC reference value given DC bias; Vd_ref: Set to the amplitude of the output voltage. Vq_ref: Usually set to 0 to ensure that the output voltage is phase-locked with phase C.

[0027] Step 3: DC bias duration timing. After the DC bias is superimposed, the counter starts timing and keeps the DC bias amount continuously superimposed within the counting time. Step 4: Remove DC bias, including: After removing the DC bias of phase A, the inverter output voltage outer loop controller superimposes the voltage onto its d-axis voltage reference value Vd_ref. The AC reference value for the given DC bias is removed, and the value superimposed on the q-axis voltage reference value Vq_ref is... The AC reference value for the given DC bias is removed; then its d-axis voltage reference value Vd_ref is gradually decreased every 50ms until the target voltage is reached. After removing the DC bias of phase B, the inverter output voltage outer loop controller superimposes the voltage onto its d-axis voltage reference value Vd_ref. The AC reference value for the given DC bias is removed, and the value superimposed on the q-axis voltage reference value Vq_ref is... The AC reference value for the given DC bias is removed; then its d-axis voltage reference value Vd_ref is gradually decreased every 50ms until the target voltage is reached. After removing the C-phase DC bias, the inverter output voltage outer loop controller superimposes the d-axis voltage reference value Vd_ref onto it. The AC reference value for the given DC bias is removed, and the value superimposed on the q-axis voltage reference value Vq_ref is... The AC reference value of the given DC bias is removed; then its d-axis voltage reference value Vd_ref is gradually reduced every 50ms until the target voltage is reached.

[0028] Step 5: Maintain the target voltage value. At this point, the overexcitation process is complete.

Claims

1. An overdrive method based on coordinate transformation, characterized in that, Includes the following steps: Step 1: Select the phase for DC bias setting in the three-phase voltage; Step 2: Apply DC bias to the selected phase; Step 3: DC bias duration timing. After the DC bias is superimposed, the counter starts timing and keeps the DC bias amount continuously superimposed within the counting time. Step 4: Remove DC bias; Step 5: Maintain the target voltage value. At this point, the overexcitation process is complete.

2. The overexcitation method based on coordinate transformation as described in claim 1, characterized in that, The process includes the following steps: In step 2, a DC bias is applied to the selected phase A, and the inverter output voltage outer loop controller superimposes its d-axis voltage reference value Vd_ref. An AC reference value for a given DC bias is superimposed on the q-axis voltage reference value Vq_ref. The AC reference value for the given DC bias; Vd_ref: set to the amplitude of the output voltage; Vq_ref: set to 0 to ensure that the output voltage is phase-locked with phase A.

3. The overdrive method based on coordinate transformation as described in claim 1, characterized in that, The process includes the following steps: In step 2, a DC bias is applied to the selected B phase, and the inverter output voltage outer loop controller superimposes its d-axis voltage reference value Vd_ref. Given an AC reference value with a DC bias, the q-axis voltage reference value Vq_ref is superimposed. The AC reference value for the given DC bias is set to 0, to ensure that the output voltage is phase-locked with phase A.

4. The overdrive method based on coordinate transformation as described in claim 1, characterized in that, The steps include: In step 2, a DC bias is applied to the selected C phase. The inverter output voltage outer loop controller superimposes its d-axis voltage reference value Vd_ref. Given an AC reference value with a DC bias, the q-axis voltage reference value Vq_ref is superimposed. AC reference value given DC bias; Vd_ref: Set to the amplitude of the output voltage, Vq_ref: Set to 0 to ensure that the output voltage is phase-locked with phase C.

5. The overexcitation method based on coordinate transformation as described in claim 2, characterized in that, The steps include: In step 4, the DC bias of phase A is removed, and the inverter output voltage outer loop controller superimposes the d-axis voltage reference value Vd_ref onto it. The AC reference value for the given DC bias is removed, and the value superimposed on the q-axis voltage reference value Vq_ref is... The AC reference value for the given DC bias is removed; then its d-axis voltage reference value Vd_ref is gradually decreased every 50ms until the target voltage is reached.

6. The overdrive method based on coordinate transformation as described in claim 3, characterized in that, The steps include: In step 4, the DC bias of phase B is removed, and the inverter output voltage outer loop controller superimposes the d-axis voltage reference value Vd_ref onto it. The AC reference value for the given DC bias is removed, and the value superimposed on the q-axis voltage reference value Vq_ref is... The AC reference value for the given DC bias is removed; then its d-axis voltage reference value Vd_ref is gradually decreased every 50ms until the target voltage is reached.

7. The overdrive method based on coordinate transformation as described in claim 4, characterized in that, The steps include: In step 4, the C-phase DC bias is removed, and the inverter output voltage outer loop controller superimposes the d-axis voltage reference value Vd_ref onto it. The AC reference value for the given DC bias is removed, and the value superimposed on the q-axis voltage reference value Vq_ref is... The AC reference value of the given DC bias is removed; then its d-axis voltage reference value Vd_ref is gradually reduced every 50ms until the target voltage is reached.

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