Voltage controlled rc oscillator and method for generating a clock signal

Abstract

The present invention relates to a voltage-controlled RC oscillator and a method for generating a clock signal using the voltage-controlled RC oscillator.

Description

Technical Field

[0001] The present invention relates to a voltage-controlled RC oscillator and a method for generating a clock signal using the voltage-controlled RC oscillator. Background Technology

[0002] Ring oscillators (ROs) and RC oscillators are the most common architectures for on-chip integration in the MHz range. ROs offer advantages in terms of the trade-off between power and phase noise. In contrast, RC oscillators are characterized by robustness, energy efficiency, and lower integration cost (see references [1-5]).

[0003] Temperature coefficient (TC) compensation is a core challenge in RC oscillators.

[0004] By using resistors with opposite TC, an attempt is made to minimize the first-order TC and reduce temperature dependence. However, this requires two different types of resistors ([1-5]).

[0005] By using two different resistors with negative TC for calibration, the nominal TC can be corrected and the accuracy over the temperature range can be improved ([1]).

[0006] Designs featuring dual RC frequency references, RC polyphase filters (PPFs), and digital / analog ΔΣ phase domain modulators (Φ-ΔΣMs) enable more accurate TC compensation. However, these approaches increase complexity and continue to require complementary TC resistors ([1-5]).

[0007] [1] CD Ezekwe and BE Boser, “A Mode-Matching Closed-LoopVibratory Gyroscope Readout Interface With a 0.004 Hz Noise Floor Over a 50 Hz Band”, IEEE Journal of Solid-State Circuits, Vol. 43, No. 12, pp. 3039-3048, December 2008.

[0008] [2] Y. Zhao et al., “A Sub-0.1 / h Bias-Instability Split-Mode MEMSGyroscope with CMOS Readout Cir-cuit”, IEEE Journal of Solid-State Circuits, Vol. 53, No. 9, pp. 2636-2650, September 2018.

[0009] [3] R. Navid, TH Lee and RW Dutton, “Minimum achievable phase noise of RC oscillators”, IEEE Journal of Solid-State Circuits, Vol. 40, No. 3, pp. 630-637, March 2005.

[0010] [4] C. Gürleyuk, L. Pedala, F. Sebastiano and KAA Makinwa, “A CMOS Dual-RC frequency reference with 250ppm inaccuracy from 45°C to 85°C”, in: 2018 IEEE International Solid-State Circuits Conference (ISSCC), San Francisco, CA, USA, 2018, pp. 54-56.

[0011] [5] Y. Ji, J. Liao, S. Arjmandpour, A. Novello, J. -Y. Sim and T. Jang, "ASecond-Order Temperature-Compensated On-Chip R-RC Oscillator Achieving7.93ppm / _C and 3.3pJ / Hz in -40_C to 125_C Temperature Range," in: 2022 IEEEInternational Solid-State Circuits Conference (ISSCC), San Francisco, CA, USA, 2022, pages 1-3.

[0012] [6] A. Paidimarri, D. Griffith, A. Wang, AP Chandrakasan and G. Burra, “A 120nW 18.5kHz RC oscillator with comparator offset cancellation for _0.25%temperature stability,” in: 2013 IEEE International Solid-State CircuitsConference Digest of Technical Papers, San Francisco, CA, USA, 2013, pp. 184-185.

[0013] In summary, existing TC compensation methods in RC oscillators either require the use of different resistor types or lead to increased circuit complexity. The necessity of complementary TC resistors continues to be a bottleneck in the development of simple and accurate RC oscillators. Summary of the Invention

[0014] Voltage-controlled RC oscillators (VCOs) face the challenge of simultaneously ensuring robust functionality, low temperature drift, and good noise characteristics. In particular, reducing long-term jitter sensitivity poses a significant problem.

[0015] To date, methods for reducing jitter sensitivity and temperature drift have been based on complex online or offline calibration methods.

[0016] To stabilize temperature drift and reduce long-term jitter, two different types of resistors are often used, which increases complexity and cost.

[0017] Due to their sensitivity to jitter, existing VCO designs often fail to achieve optimal noise characteristics.

[0018] The TC compensation techniques used to date (such as a combination of current sources that are proportional to absolute temperature (PTAT) and current sources that are zero-dependent on absolute temperature (ZTAT)) have increased the complexity of circuit design.

[0019] This invention addresses these shortcomings by proposing a VCO, wherein the VCO is: • Achieve low noise and low TC using only one type of resistor, without the need for additional calibration for TC compensation.

[0020] • By reducing jitter sensitivity through noise-shaping, the operating point becomes stable and independent of jitter errors in the quantizer.

[0021] • Achieve energy-saving operation without compromising performance.

[0022] • It provides the possibility of further improving TC characteristics through combinations of current sources without unduly increasing complexity.

[0023] Therefore, the present invention proposes a voltage-controlled RC oscillator, which includes: An integrator with an integrating capacitor; The reference resistor is used to generate a reference current. The first sampling capacitor is used to sample the reference voltage; At least one second sampling capacitor is used to sample the input control voltage; A comparator is used to generate an output signal based on the output voltage of the integrator; A clock generator is used to generate a clock phase signal based on the output signal of the comparator, wherein the clock phase signal is used to control the sampling of the reference voltage and the input control voltage; Frequency divider; and An auxiliary oscillator is activated when the output of the integrator exceeds a predetermined threshold for a predetermined time. The feature is that the reference resistor and the sampling capacitor are connected in such a way that the VCO is robust to fluctuations in the power supply voltage and the reference voltage.

[0024] Therefore, the present invention also proposes a method for generating a clock signal using a voltage-controlled RC oscillator, which includes the following steps: An integrator is used to integrate the reference current flowing through the reference resistor to generate a sawtooth-shaped output voltage. When using a clock phase signal, the reference voltage is sampled using a first sampling capacitor, and the input control voltage is sampled using at least one second sampling capacitor. The output voltage of the integrator is compared with a threshold voltage using a comparator; A clock phase signal is generated by a clock generator based on the output signal of the comparator. The clock signal generated by the clock generator is divided by a frequency divider to generate an output clock signal; When the output voltage of the integrator exceeds a predetermined threshold for a predetermined time, the auxiliary oscillator is activated. The method is characterized in that it improves the robustness of the VCO to fluctuations in power supply voltage and reference voltage.

[0025] This invention provides a VCO that is robust, temperature stable, and low-noise, without the complexity and cost of existing solutions.

[0026] A novel voltage-controlled RC oscillator (RC VCO) offers a decisive advantage for integration into power-saving phase-locked loops (PLLs) in sensor systems. This design ensures reliable operation even with variations in supply and reference voltages, improving the overall system robustness.

[0027] A compact and scalable architecture is achieved by using a single reference resistor and eliminating the need for offline TC calibration after initial room temperature calibration. This reduces complexity, chip area, and cost compared to conventional VCOs that require multiple resistors and complex calibration methods.

[0028] This VCO is specifically designed for use in power-saving applications, making it ideal for mobile and battery-powered sensor systems.

[0029] Other advantages can be seen from the accompanying drawings and their descriptions. Attached Figure Description

[0030] Figure 1a The circuit of a voltage-controlled RC oscillator with jitter reduction function is shown. Figure 1b The timing diagram of a voltage-controlled RC oscillator with jitter reduction function is shown.

[0031] Figure 2 A detailed circuit diagram of a voltage-controlled RC oscillator with feedforward load compensation and a starting ring oscillator RO is shown. Detailed Implementation

[0032] Figure 1a Circuit 10 of a voltage-controlled RC oscillator with jitter reduction function is shown. Figure 1bThe timing diagram shows a voltage-controlled RC oscillator with jitter reduction. The circuit has an input for a reference voltage VRef. Resistor R1 and capacitor C1 form an RC network. R1 is fed by VRef and generates a current proportional to VRef. C1 is controlled by a switch driven by phase signals Φ1 and Φ2. The current flowing through R1 is integrated by an operational amplifier with an integrating capacitor Cint. The output of the operational amplifier, Vosc, generates a sawtooth-shaped voltage. The output Vosc is connected to a comparator Comp. Vosc is compared using the comparator's output VComp, the threshold of which is shown by a dashed line in the timing diagram. The comparator's output controls a clock generator Clock Gen., which generates phase signals Φ1 and Φ2. The output clock fout is divided by a frequency divider.

[0033] Figure 1b The timing diagrams in the figure show the characteristics of an oscillator with a noiseless comparator (left figure) and an oscillator with a noisy comparator (right figure).

[0034] The operational amplifier's output voltage Vosc rises linearly and then drops abruptly when the comparator switches.

[0035] When Vosc reaches the threshold, the output VComp of comparator Comp changes its state. In the case of a noisy comparator, the switching timing is slightly offset due to noise.

[0036] Phase signals Φ1 and Φ2 control the switching of capacitor C1.

[0037] Figures 4*fosc and 2*fosc show the frequencies, which are four or two times the oscillator frequency fosc.

[0038] The diagram fout shows the output frequency.

[0039] The diagram shows the oscillator frequency fosc.

[0040] In the illustration with a noisy comparator, Δ1 and Δ3 show the time offset of the switching moment due to noise.

[0041] The timing diagrams illustrate how comparator noise causes jitter in the output signal and how the oscillator architecture reduces this jitter. The effects of high-frequency jitter are minimized through constant charge removal and frequency division.

[0042] The sampling capacitor C1 is charged using the reference voltage VRef. Simultaneously, the input resistor R1, also fed by VRef, generates a constant current. This current is integrated by the operational amplifier integrator, thereby producing a linearly rising voltage ramp at the operational amplifier's output, Vosc.

[0043] The comparator monitors the integrator's output voltage, Vosc. Once Vosc reaches a defined threshold, the comparator switches.

[0044] The comparator's switching control capacitor, Cint, transfers the charge stored in C1 to the integrator with the opposite polarity. This causes the integrator's output voltage, Vosc, to drop abruptly.

[0045] The charging and discharging processes repeat continuously. The period of the oscillator—that is, the time required for the current flowing through R1 to replenish the charge discharged by Cint—is primarily determined by the time constant R1*C1. In the first-order approximation, it is independent of the capacitance of VRef and the integrating capacitor Cint.

[0046] Noise in the comparator can cause premature or late threshold recognition, resulting in jitter during the oscillator cycle. However, due to the constant amount of charge removed by Cint in each cycle, the voltage ramp Vosc always returns to the same starting point despite the comparator noise. Therefore, the periodic fluctuations caused by comparator noise do not accumulate over time. Consequently, the jitter spectrum exhibits high-pass characteristics.

[0047] The post-division by 2, implemented using an FIR filter with two taps of equal weight, eliminates high-frequency jitter components in the final output clock. This results in a more stable and lower-noise output signal.

[0048] Figure 2 Detailed circuit diagram 10 shows a voltage-controlled RC oscillator with feedforward load compensation and a starting ring oscillator RO.

[0049] The voltage-controlled RC oscillator has differential reference voltage inputs VRefp and VRefN and differential input voltages Vinp and VinN, which control the oscillator frequency.

[0050] Capacitors C1 and C2 are connected to the input terminal and the operational amplifier via a switch. The switch is controlled by phase signals Φ1 and Φ2, which enables differential switching of the capacitors. C1 is connected to Vinp and VinN, and C2 is connected to VinN and ground.

[0051] R1 is the primary timing resistor, which determines the charging / discharging current used for the capacitor. RFF and CFF form an RC network for feedforward load compensation, which compensates for the effect of the load capacitance at the output of the operational amplifier.

[0052] Similar to Figure 1, the operational amplifier integrates the current flowing through R1 and generates a sawtooth-shaped output voltage Vosc. Cint is the integrating capacitor.

[0053] Vosc is monitored by comparator VComp, which switches when Vosc reaches a certain threshold.

[0054] The comparator's output controls the clock generator, which generates phase signals Φ1 and Φ2. These signals control the switching of the capacitor bank and thus the charging / discharging cycle.

[0055] The output clock fout is divided by a frequency divider.

[0056] The start-up RO is used to quickly bring the voltage-controlled RC oscillator into a stable operating state upon power-on. It generates an initial clock signal that starts the voltage-controlled RC oscillator before it reaches a stable oscillation state on its own.

[0057] RO consists of an odd number of inverters arranged in a ring connection. The "Currentstarved" label indicates the power-saving implementation scheme.

[0058] Once the voltage-controlled RC oscillator stabilizes, the RO is deactivated.

[0059] A combination of a voltage-controlled RC oscillator, feedforward load compensation, and a start-up RO enables a robust, accurate, and fast-start oscillator. The differential architecture improves noise immunity. Feedforward compensation enhances stability and oscillator frequency accuracy.

[0060] The center frequency of the voltage-controlled RC oscillator is set by adjusting the N bits of R1. This allows for a coarse setting of the frequency.

[0061] The input voltage Vin finely controls the oscillator frequency by sampling it via sampling capacitors C1 (reference voltage VRef) and C2 (input voltage Vin). The ratio of charges Q1 (VRef * C1) to Q2 (Vin * C2) determines the adjustment range of the voltage-controlled RC oscillator.

[0062] The reference capacitor and control capacitor are split in half and operate using complementary clocks Φ1 and Φ2. This balances the capacitive load at the integrator's virtual ground point and reduces the load on the operational amplifier.

[0063] The comparator identifies the zero-crossing point at the output of the integrator and triggers the clock generator.

[0064] The frequency of RO is selected to make its start-up voltage control RC oscillator, but without causing interference during normal operation.

[0065] The feedforward path, composed of RFF and CFF, compensates for the load at the integrator output and reduces the requirements on the operational amplifier.

[0066] Three different biasing methods were implemented for OTA to optimize the oscillator's TC: • ZTAT (Zero Temperature Coefficient): Provides stable gm at low temperatures.

[0067] • PTAT (proportional to absolute temperature): provides stable gm at high temperatures.

[0068] • Combination of ZTAT and PTAT: Combining the advantages of both methods to achieve improved TC across the entire temperature range.

[0069] This architecture implements a robust, temperature-stable, and accurate VCO with low jitter, suitable for use in various applications.

Claims

1. A voltage-controlled RC oscillator (VCO), comprising: An integrator with an integrating capacitor (Cint); The reference resistor (R1) is used to generate the reference current; The first sampling capacitor (C1) is used to sample the reference voltage (VRef). At least one second sampling capacitor (C2) is used to sample the input control voltage (Vin); A comparator is used to generate an output signal based on the output voltage of the integrator; A clock generator is used to generate clock phase signals (Φ1, Φ2) based on the output signal of the comparator, wherein the clock phase signals are used to control the sampling of the reference voltage and the input control voltage; Frequency divider; and An auxiliary oscillator is activated when the output of the integrator exceeds a predetermined threshold for a predetermined time. The reference resistor (R1) and the sampling capacitors (C1, C2) are connected in such a way that the VCO is robust to fluctuations in the power supply voltage and the reference voltage.

2. The voltage controlled RC oscillator (VCO) of claim 1, characterized in that The sampling capacitors (C1, C2) are divided into two groups, each of which operates using complementary clock phase signals (Φ1, Φ2) to balance the capacitive load at the integrator.

3. The voltage controlled RC oscillator (VCO) according to claim 1 or 2, characterized in that The VCO includes feedforward load compensation, which has a compensation resistor (RFF) and a compensation capacitor (CFF).

4. The voltage-controlled RC oscillator (VCO) according to any one of the preceding claims, characterized in that, The reference resistor (R1) can be digitally adjusted to set the center frequency of the VCO.

5. The voltage-controlled RC oscillator (VCO) according to any one of the preceding claims, characterized in that, The auxiliary oscillator is a ring oscillator (RO).

6. The voltage-controlled RC oscillator (VCO) according to any one of the preceding claims, characterized in that, The voltage-controlled RC oscillator (VCO) includes temperature compensation using at least one of the following biasing methods for operational amplifiers: Temperature-independent current source; A current source that is proportional to temperature; A combination of temperature-independent current sources and temperature-proportional current sources.

7. The voltage-controlled RC oscillator (VCO) according to any one of the preceding claims, characterized in that, The voltage-controlled RC oscillator (VCO) uses chopping at the oscillator frequency to reduce 1 / f noise.

8. A method for generating a clock signal using a voltage-controlled RC oscillator (VCO), comprising the following steps: An integrator is used to integrate the reference current flowing through the reference resistor (R1) to generate a sawtooth-shaped output voltage; When using clock phase signals (Φ1, Φ2), the reference voltage (VRef) is sampled using the first sampling capacitor (C1), and the input control voltage (Vin) is sampled using at least one second sampling capacitor (C2). The output voltage of the integrator is compared with a threshold voltage using a comparator; The clock phase signals (Φ1, Φ2) are generated by the clock generator based on the output signal of the comparator. The clock signal generated by the clock generator is divided by a frequency divider to generate an output clock signal; When the output voltage of the integrator exceeds a predetermined threshold for a predetermined time, the auxiliary oscillator is activated. The method is characterized in that it improves the robustness of the VCO to fluctuations in power supply voltage and reference voltage.

9. The method according to claim 8, characterized in that, The reference voltage (VRef) and the input control voltage (Vin) are sampled using two sets of sampling capacitors (C1, C2), each set operating with complementary clock phase signals (Φ1, Φ2).

10. The method according to claim 8 or 9, characterized in that, The method also includes compensating for the load at the output of the integrator by means of feedforward load compensation.

11. The method according to any one of claims 8 to 10, characterized in that, The method also includes digitally trimming the reference resistor (R1) to set the center frequency of the VCO.

12. The method according to any one of claims 8 to 11, characterized in that, The auxiliary oscillator is a ring oscillator (RO).

13. The method according to any one of claims 8 to 12, characterized in that, The method also includes compensating for temperature effects by biasing the operational amplifier using at least one of the following methods: Use a current source that is independent of temperature; Use a current source that is proportional to temperature; Use a combination of temperature-independent and temperature-proportional current sources.

14. The method according to any one of claims 8 to 13, characterized in that, The method also uses chopping at the oscillator frequency to reduce 1 / f noise.

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