Linear transconductance adjustment circuit based on bipolar process

Abstract

This application provides a linear transconductance adjustment circuit based on bipolar technology, belonging to the technical field of linear transconductance adjustment circuits. It mainly includes an exponential current converter circuit, an input circuit, and a variable gain amplifier circuit. The output current of the exponential current converter can be adjusted via the VC terminal, achieving an exponential relationship between its input equivalent transconductance and the control voltage. Combined with the inherent I-V characteristics of the transistor, this achieves linear transconductance adjustment. The overall circuit is an open-loop structure. The differential pair transistors Q7 and Q8 can suppress zero-point drift of the input signal, making the signal output to the variable gain amplifier circuit after amplification more stable, thus improving the stability of the linear transconductance adjustment of the input signal; furthermore, it has a fast response speed.

Description

Technical Field

[0001] This application belongs to the field of linear transconductance adjustment circuits, and particularly relates to a linear transconductance adjustment circuit based on bipolar technology. Background Technology

[0002] In automatic gain control systems, amplifiers are often used to amplify or reduce the transmission of signals. In some application scenarios, the gain of the amplifier needs to be controllable and adjustable, which can be achieved by a variable gain amplifier.

[0003] Currently, from the perspective of gain control mechanism, variable gain amplification can be roughly divided into several types, such as gain unit gating, load variable, and transconductance variable.

[0004] A gain unit gating variable gain amplifier is a type of amplifier that uses N different gain units cascaded together and achieves variable gain by switching them on and off. Figure 2 A VGA structure based on input resistance attenuation is presented, where switches Si (i=1, 2, 3, ..., N) have exactly one switch on and off at any given time, corresponding to one gain. Variable gain amplifiers implemented in this way are generally stepped and cannot achieve linear dB gain.

[0005] A variable gain amplifier with variable load means that the gain is changed by altering the load. Figure 3 To adjust the load in a variable gain unit, the load is designed as a switch (S) and resistor (R). Controlling the switch's on and off states changes the load size, thus altering the gain. Because changing the load resistance (RL) alters the output resistances of amplifiers Q1 and Q2, it changes the amplifier's poles, thereby changing the bandwidth; a higher gain corresponds to a smaller bandwidth. Furthermore, changes in the load may also limit the op-amp's output swing.

[0006] In summary, gain unit gating variable gain amplifiers cannot achieve linear dB control, and load-variable variable gain amplifiers cannot achieve constant bandwidth and output swing. Summary of the Invention

[0007] In view of the above problems, this application proposes a linear transconductance adjustment circuit based on bipolar technology. The output current of the exponential current converter can be adjusted through the VC terminal, achieving an exponential relationship between its input equivalent transconductance and the control voltage. Combined with the inherent IV characteristic of the transistor, this achieves linear transconductance regulation.

[0008] This application provides a linear transconductance adjustment circuit based on bipolar technology, including:

[0009] Exponential current conversion circuit, input circuit, and variable gain amplifier circuit;

[0010] The exponential current conversion circuit is electrically connected to the variable gain amplifier circuit and is used to control the output current source by controlling the control voltage.

[0011] The input circuit is connected to the input signal and is electrically connected to the variable gain amplifier circuit, and is used to amplify the input signal and output it to the subsequent variable gain amplifier circuit.

[0012] A variable gain amplifier circuit is used to linearly adjust the transconductance of the amplified signal output from the input circuit.

[0013] Preferably, the exponential current conversion circuit includes:

[0014] The first transistor Q1, the second transistor Q2, the third transistor Q3, and the second resistor R2;

[0015] The collector of the third transistor Q3 is connected to the second terminal of the first current source ISS1, the first terminal of the first current source ISS1 is connected to the positive terminal of the power supply, the base of the third transistor Q3 is connected to the second terminal of the second current source ISS2, and the first terminal of the second current source ISS2 is connected to the positive terminal of the power supply; the emitter of the third transistor Q3 is connected to the collector of the first transistor Q1, and a control current output terminal IOUT is led out between the emitter of the third transistor Q3 and the collector of the first transistor Q1;

[0016] The base of the first transistor Q1 is connected to the base of the second transistor Q2, and the base of the first transistor Q1 is connected to the collector, while the emitter of the first transistor Q1 is grounded.

[0017] The collector of the second transistor Q2 is connected to the second terminal of the second current source ISS2 and to the base of the third transistor Q3. The emitter of the second transistor Q2 is connected to the first terminal of the second resistor R2. A replica current Iin is drawn between the emitter of the second transistor Q2 and the first terminal of the second resistor R2. The second terminal of the second resistor R2 is grounded.

[0018] Preferably, the ratio of the emitter area of ​​the first transistor Q1 to the emitter area of ​​the second transistor Q2 is 1:N.

[0019] Preferably, the exponential current conversion circuit further includes:

[0020] The fourth transistor Q4, the fifth transistor Q5, the sixth transistor Q6, and the first resistor R1;

[0021] The collector of the sixth transistor Q6 is connected to the base and to the positive power supply VCC. The emitter of the sixth transistor Q6 is connected to the collector of the fourth transistor Q4. The base of the fourth transistor Q4 is connected to the reference voltage VREF. The emitter of the fourth transistor Q4 is connected to the first terminal of the third current source ISS3. The second terminal of the third current source ISS3 is connected to the negative power supply VSS.

[0022] The first end of the first resistor R1 is connected to the positive terminal VCC of the power supply. The second end of the first resistor R1 is connected to the collector of the fifth transistor Q5. The base of the fifth transistor Q5 is connected to the collector of the third transistor Q3. The emitter of the fifth transistor Q5 is connected to the first end of the third current source ISS3.

[0023] Preferably, the exponential current conversion circuit further includes:

[0024] The first amplifier OP1 has a first input terminal connected to the control voltage VC, and the second input terminal of the first amplifier OP1 is connected to the lead-out node between the second terminal of the first resistor R1 and the collector of the fifth transistor Q5.

[0025] The output terminal of the first amplifier OP1 is connected to the base of the fifth transistor Q5 and the collector of the third transistor Q3.

[0026] Preferably, the input circuit includes:

[0027] Fifth resistor R5, third resistor R3, seventh transistor Q7;

[0028] The first end of the fifth resistor R5 is connected to the positive terminal of the power supply VCC, and the second end of the fifth resistor R5 is connected to the collector of the seventh transistor Q7. The second end of the fifth resistor R5 and the collector lead-out terminal of the seventh transistor Q7 serve as the first output terminal of the input circuit.

[0029] The base of the seventh transistor Q7 is connected to the positive input current In+, the emitter of the seventh transistor Q7 is connected to the first terminal of the third resistor R3, the second terminal of the third resistor R3 is connected to the first terminal of the fourth current source ISS4, and the second terminal of the fourth current source ISS4 is connected to the negative terminal VSS of the power supply.

[0030] Preferably, the input circuit further includes:

[0031] The sixth resistor is R6, the fourth resistor is R4, and the eighth transistor is Q8;

[0032] The first end of the sixth resistor R6 is connected to the positive terminal of the power supply VCC, and the second end of the sixth resistor R6 is connected to the collector of the eighth transistor Q8. The second end of the sixth resistor R6 and the collector lead-out terminal of the eighth transistor Q8 serve as the second output terminal of the input circuit.

[0033] The base of the eighth transistor Q8 is connected to the negative input current In-, the emitter of the eighth transistor Q8 is connected to the first end of the fourth resistor R4, the second end of the fourth resistor R4 is connected to the first end of the fourth current source ISS4, and the seventh transistor Q7 and the eighth transistor Q8 form a differential pair.

[0034] Preferably, the variable gain amplifier circuit includes:

[0035] The seventh resistor R7, the eleventh transistor Q11, and the ninth transistor Q9;

[0036] The first end of the seventh resistor R7 is connected to the positive terminal of the power supply VCC, the second end of the seventh resistor R7 is connected to the collector of the eleventh transistor Q11, the base of the eleventh transistor Q11 is connected to the first output terminal of the input circuit, and the emitter of the eleventh transistor Q11 is connected to the collector of the ninth transistor Q9.

[0037] The base and collector of the ninth transistor Q9 are connected, the emitter of the ninth transistor Q9 is connected to the first terminal of the fifth current source ISS5, and the second terminal of the fifth current source ISS5 is connected to the negative terminal of the power supply VSS.

[0038] The fifth current source ISS5 is the current output from the control current output terminal IOUT, which is drawn between the emitter of the third transistor Q3 and the collector of the first transistor Q1.

[0039] Preferably, the variable gain amplifier circuit further includes:

[0040] The eighth resistor R8, the twelfth transistor Q12, and the thirteenth transistor Q10;

[0041] The first end of the eighth resistor R8 is connected to the positive terminal VCC of the power supply, the second end of the eighth resistor R8 is connected to the collector of the twelfth transistor Q12, the base of the twelfth transistor Q12 is connected to the second output terminal of the input circuit, and the emitter of the twelfth transistor Q12 is connected to the collector of the thirteenth transistor Q10.

[0042] The base and collector of the thirteenth transistor Q10 are connected, and the emitter of the thirteenth transistor Q10 is connected to the first terminal of the fifth current source ISS5.

[0043] Preferably, the variable gain amplifier circuit further includes:

[0044] Fixed gain amplifier OP2;

[0045] The first input terminal of the fixed gain amplifier OP2 is connected to the second terminal of the seventh resistor R7 and the collector of the eleventh transistor Q11.

[0046] The second input terminal of the fixed gain amplifier OP2 is connected to the terminal between the second end of the eighth resistor R8 and the collector of the twelfth transistor Q12;

[0047] The fixed gain amplifier OP2 is powered by connecting the positive terminal VCC and the negative terminal VSS of the power supply.

[0048] The beneficial effects of this application are as follows: Based on the above technical solution, the linear transconductance adjustment circuit of this application mainly includes an exponential current conversion circuit, an input circuit, and a variable gain amplifier circuit. The output current of the exponential current converter can be adjusted through the VC terminal, achieving an exponential relationship between its input equivalent transconductance and the control voltage. Combined with the inherent IV characteristic of the transistor, this achieves linear transconductance adjustment. The overall circuit is an open-loop structure. The differential pair transistors Q7 and Q8 can suppress zero-point drift of the input signal, making the signal output to the variable gain amplifier circuit after amplification more stable, thus improving the stability of the linear transconductance adjustment of the input signal; furthermore, it has a fast response speed.

[0049] Other features and advantages of this application will be set forth in the following description and will be apparent in part from the description or may be learned by practicing the application. The objectives and other advantages of this application may be realized and obtained by means of the structures pointed out in the description and the accompanying drawings. Attached Figure Description

[0050] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0051] Figure 1 A schematic diagram of a linear transconductance adjustment circuit based on bipolar technology is shown.

[0052] Figure 2 A topology diagram of a variable gain amplifier based on an input resistance attenuation network is shown.

[0053] Figure 3 The topology diagram of the variable-load, variable-gain unit is shown;

[0054] Figure 4 The topology diagram of the exponential current conversion circuit according to an embodiment of this application is shown;

[0055] Figure 5 The diagram shows the input circuit and variable gain stage circuit topology of an embodiment of this application;

[0056] Figure 6A simulation diagram showing the linear variation of transconductance with control voltage according to an embodiment of this application is shown;

[0057] Figure 7 Simulation diagrams showing different transconductance variable ranges achieved by changing the number of gain cascade stages in embodiments of this application are shown. Detailed Implementation

[0058] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0059] It should be noted that the terms "first," "second," etc., used in this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate for the embodiments of this application described herein. In this application, the terms "upper," "lower," "left," "right," "front," "rear," "top," "bottom," "inner," "outer," "middle," "vertical," "horizontal," "lateral," "longitudinal," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings.

[0060] This application provides a linear transconductance adjustment circuit based on bipolar technology. See [link to relevant documentation]. Figure 1 ,include:

[0061] Exponential current conversion circuit, input circuit, and variable gain amplifier circuit;

[0062] The exponential current conversion circuit is electrically connected to the variable gain amplifier circuit and is used to control the output current source by controlling the control voltage.

[0063] The input circuit is connected to the input signal and is electrically connected to the variable gain amplifier circuit, and is used to amplify the input signal and output it to the subsequent variable gain amplifier circuit.

[0064] A variable gain amplifier circuit is used to linearly adjust the transconductance of the amplified signal output from the input circuit.

[0065] Specifically, see Figure 3 The exponential current conversion circuit includes:

[0066] The first transistor Q1, the second transistor Q2, the third transistor Q3, and the second resistor R2;

[0067] The collector of the third transistor Q3 is connected to the second terminal of the first current source ISS1, the first terminal of the first current source ISS1 is connected to the positive terminal of the power supply, the base of the third transistor Q3 is connected to the second terminal of the second current source ISS2, and the first terminal of the second current source ISS2 is connected to the positive terminal of the power supply; the emitter of the third transistor Q3 is connected to the collector of the first transistor Q1, and a control current output terminal IOUT is led out between the emitter of the third transistor Q3 and the collector of the first transistor Q1;

[0068] The base of the first transistor Q1 is connected to the base of the second transistor Q2, and the base of the first transistor Q1 is connected to the collector, while the emitter of the first transistor Q1 is grounded.

[0069] The collector of the second transistor Q2 is connected to the second terminal of the second current source ISS2 and to the base of the third transistor Q3. The emitter of the second transistor Q2 is connected to the first terminal of the second resistor R2. A replica current Iin is drawn between the emitter of the second transistor Q2 and the first terminal of the second resistor R2. The second terminal of the second resistor R2 is grounded.

[0070] The ratio of the emitter area of ​​the first transistor Q1 to the emitter area of ​​the second transistor Q2 is 1:N.

[0071] It should be noted that all transistors used in this application are NPN transistors, and their descriptions can be represented by conventional general letters, such as Q1 representing the first NPN transistor. The resistors in this application are also represented by conventional general letters, such as R1 representing the first resistor. These general letter representations are all electronic devices that can be understood by those skilled in the art.

[0072] In the exponential current conversion circuit, the output current is controlled by the control voltage VC. The ratio of the emitter area of ​​the first transistor Q1 to the emitter area of ​​the second transistor Q2 is 1:N. The core idea is to utilize the inherent IV exponential relationship of bipolar transistors.

[0073] Specifically, the exponential current conversion circuit further includes:

[0074] The fourth transistor Q4, the fifth transistor Q5, the sixth transistor Q6, and the first resistor R1;

[0075] The collector of the sixth transistor Q6 is connected to the base and to the positive power supply VCC. The emitter of the sixth transistor Q6 is connected to the collector of the fourth transistor Q4. The base of the fourth transistor Q4 is connected to the reference voltage VREF. The emitter of the fourth transistor Q4 is connected to the first terminal of the third current source ISS3. The second terminal of the third current source ISS3 is connected to the negative power supply VSS.

[0076] The first end of the first resistor R1 is connected to the positive terminal VCC of the power supply. The second end of the first resistor R1 is connected to the collector of the fifth transistor Q5. The base of the fifth transistor Q5 is connected to the collector of the third transistor Q3. The emitter of the fifth transistor Q5 is connected to the first end of the third current source ISS3.

[0077] The first amplifier OP1 has a first input terminal connected to the control voltage VC, and the second input terminal of the first amplifier OP1 is connected to the lead-out node between the second terminal of the first resistor R1 and the collector of the fifth transistor Q5.

[0078] The output terminal of the first amplifier OP1 is connected to the base of the fifth transistor Q5 and the collector of the third transistor Q3.

[0079] For details, see Figure 4 The input circuit includes:

[0080] Fifth resistor R5, third resistor R3, seventh transistor Q7;

[0081] The first end of the fifth resistor R5 is connected to the positive terminal of the power supply VCC, and the second end of the fifth resistor R5 is connected to the collector of the seventh transistor Q7. The second end of the fifth resistor R5 and the collector lead-out terminal of the seventh transistor Q7 serve as the first output terminal of the input circuit.

[0082] The base of the seventh transistor Q7 is connected to the positive input current In+, the emitter of the seventh transistor Q7 is connected to the first terminal of the third resistor R3, the second terminal of the third resistor R3 is connected to the first terminal of the fourth current source ISS4, and the second terminal of the fourth current source ISS4 is connected to the negative terminal VSS of the power supply.

[0083] The input circuit further includes:

[0084] The sixth resistor is R6, the fourth resistor is R4, and the eighth transistor is Q8;

[0085] The first end of the sixth resistor R6 is connected to the positive terminal of the power supply VCC, and the second end of the sixth resistor R6 is connected to the collector of the eighth transistor Q8. The second end of the sixth resistor R6 and the collector lead-out terminal of the eighth transistor Q8 serve as the second output terminal of the input circuit.

[0086] The base of the eighth transistor Q8 is connected to the negative input current In-, the emitter of the eighth transistor Q8 is connected to the first end of the fourth resistor R4, the second end of the fourth resistor R4 is connected to the first end of the fourth current source ISS4, and the seventh transistor Q7 and the eighth transistor Q8 form a differential pair.

[0087] It should be noted that in the input circuit, transistors Q7 (seventh transistor) and Q8 (eighth transistor) form a differential pair. These transistors have identical parameters and their function is to amplify the input signal, which is then output to the subsequent variable gain amplifier circuit. The differential pair Q7 and Q8 can suppress zero-point drift of the input signal, making the signal output to the variable gain amplifier circuit more stable and improving the stability of the linear transconductance adjustment of the input signal.

[0088] In the input circuit, the third resistor R3 and the fourth resistor R4 have the same device parameters, and the fifth resistor R5 and the sixth resistor R6 have the same device parameters. Under static operating conditions, the aforementioned fifth current source ISS5 will provide ISS5 / 2 current to the first transistor Q1 and the second transistor Q2 respectively.

[0089] For details, see Figure 4 Variable gain amplifier circuit, including:

[0090] The seventh resistor R7, the eleventh transistor Q11, and the ninth transistor Q9;

[0091] The first end of the seventh resistor R7 is connected to the positive terminal of the power supply VCC, the second end of the seventh resistor R7 is connected to the collector of the eleventh transistor Q11, the base of the eleventh transistor Q11 is connected to the first output terminal of the input circuit, and the emitter of the eleventh transistor Q11 is connected to the collector of the ninth transistor Q9.

[0092] The base and collector of the ninth transistor Q9 are connected, the emitter of the ninth transistor Q9 is connected to the first terminal of the fifth current source ISS5, and the second terminal of the fifth current source ISS5 is connected to the negative terminal of the power supply VSS.

[0093] The fifth current source ISS5 is the current output from the control current output terminal IOUT, which is drawn between the emitter of the third transistor Q3 and the collector of the first transistor Q1.

[0094] The variable gain amplifier circuit further includes:

[0095] The eighth resistor R8, the twelfth transistor Q12, and the thirteenth transistor Q10;

[0096] The first end of the eighth resistor R8 is connected to the positive terminal VCC of the power supply, the second end of the eighth resistor R8 is connected to the collector of the twelfth transistor Q12, the base of the twelfth transistor Q12 is connected to the second output terminal of the input circuit, and the emitter of the twelfth transistor Q12 is connected to the collector of the thirteenth transistor Q10.

[0097] The base and collector of the thirteenth transistor Q10 are connected, and the emitter of the thirteenth transistor Q10 is connected to the first terminal of the fifth current source ISS5.

[0098] The variable gain amplifier circuit further includes:

[0099] Fixed gain amplifier OP2;

[0100] The first input terminal of the fixed gain amplifier OP2 is connected to the second terminal of the seventh resistor R7 and the collector of the eleventh transistor Q11.

[0101] The second input terminal of the fixed gain amplifier OP2 is connected to the terminal between the second end of the eighth resistor R8 and the collector of the twelfth transistor Q12;

[0102] The fixed gain amplifier OP2 is powered by connecting the positive terminal VCC and the negative terminal VSS of the power supply.

[0103] It should be noted that the eleventh transistor Q11 and the twelfth transistor Q12 are the amplifying transistors of the variable gain amplifier circuit. Under static operating conditions, the aforementioned fifth current source ISS5 will provide ISS5 / 2 of current to both the eleventh transistor Q11 and the twelfth transistor Q12.

[0104] Compared with existing technologies, this application can achieve linear transconductance adjustment, enabling the amplifier's gain to change linearly in dB. Furthermore, the core module of the control circuit is a bipolar exponential current converter that utilizes the inherent double-IV exponential relationship of the transistor to achieve transconductance linear adjustment, resulting in a simple structure.

[0105] The working principle of the embodiments of this application will be described in detail below with reference to the accompanying drawings.

[0106] The linear transconductance adjustment circuit of this application mainly includes an exponential current conversion circuit, which consists of a control circuit, an input circuit, and a variable gain amplifier circuit. The linear transconductance adjustment circuit of this application achieves transconductance linear adjustment primarily by adjusting the tail current, i.e., ISS5. The overall circuit is an open-loop structure; because it lacks a feedback loop, it avoids circuit instability issues and has a fast response speed.

[0107] The gain of the open-loop amplifier, i.e., the first amplifier OP1, can be expressed as the product of the input equivalent transconductance gm and the equivalent output resistance Rout:

[0108] Gain = gm * Rout (Equation 1)

[0109] As shown in the above equation, changing the input equivalent transconductance gm can achieve gain adjustment. To achieve a linear dB change in gain, a linear change in gm is required.

[0110] The control voltage VC is connected to the input terminal of the first amplifier OP1 and is used to control the output current IOUT of the exponential current conversion circuit. Utilizing the virtual short characteristic of the input terminal of the first amplifier OP1, the second input terminal is approximately equal to the control voltage VC, generating a current related to the control voltage VC across the first resistor R1. This current is copied from the first resistor R1 to the second resistor Iin terminal, thus changing the collector current of the first transistor Q1. The output current IOUT of the exponential current conversion circuit is proportionally copied to the tail current ISS5 of the variable gain amplifier circuit to adjust the equivalent input transconductance, thereby achieving variable gain.

[0111] like Figure 4 As shown, the exponential current conversion circuit achieves dB linear control by leveraging the inherent IV-exponential relationship of bipolar transistors. Its principle is that when the control voltage VC changes, a relatively changing current is generated, causing a relative change in the voltage across the second resistor R2, thus affecting the voltage between the base and emitter of the NPN transistor Q1. Utilizing the virtual short characteristic of the operational amplifier input, that is, the voltages at the non-inverting and inverting inputs are approximately equal, the current across the second resistor R2 becomes related to the control voltage VC. This current is then replicated across the first transistor Q1 in the exponential current conversion circuit, making the current in the NPN transistor Q1 approximately exponential.

[0112] The output current IOUT of the NPN transistor Q1 is calculated as follows:

[0113] Formula 2

[0114] Since the bases of transistors Q1 and Q2 are connected together, their base voltages are equal, which leads to Equation 3.

[0115] Formula 3

[0116] Where ICQ1 is the collector current of transistor Q1, which is approximately equal to Iout, and IS1 is the value of the first current source; IC2 is the collector current of transistor Q2, and Iin is the current generated by the control voltage VC. Therefore, we can obtain:

[0117] Formula 4

[0118] By rearranging equations 2 and 3, we can obtain the output current IOUT of transistor Q1.

[0119] Formula 5

[0120] Where Iin is the current related to VC, and its magnitude is Iin = VC / R1. Substituting Iin into Equation 5, we can obtain...

[0121] Formula 6

[0122] As can be seen from Equation 6, IOUT and VC have an approximately exponential relationship, and their values ​​change with the control voltage.

[0123] Figure 4 In the variable gain amplifier circuit, the tail current ISS5 proportionally replicates the current IOUT on transistor Q1.

[0124] The linear transconductance adjustment circuit of this application consists of a control stage, an input stage, and a variable gain amplifier circuit. Transistors Q7 and Q8 are input stage amplifiers, whose function is to amplify the input signal. The amplified signal becomes the input signal to the variable gain amplifier circuit. From Equation 1, the gain of the input stage amplifier circuit is GM1.

[0125] GM1 = 2 * GM * ROUT1

[0126] Formula 7

[0127] In Equation 7, the relationship between the transconductance gm of the transistor and the collector current IC of the transistor is shown in Equation 8.

[0128] Formula 8

[0129] Since the tail current ISS1 is a fixed current source with a constant magnitude, the differential input stage current is constant. Equation 8 shows that its input equivalent transconductance also remains constant. Therefore, the goal of variable gain is not achieved.

[0130] Figure 5 In this circuit, NPN transistors Q11 and Q12 form the differential amplifier transistors in a variable gain amplifier circuit. The emitter of transistor Q11 is connected to the base and collector of transistor Q9, and the emitter of transistor Q12 is connected to the base and collector of transistor Q10. NPN transistors Q9 and Q10 are connected in a diode configuration, with an equivalent resistance of approximately 1 / gm.

[0131] The equivalent input transconductance Gm of the variable gain amplifier circuit is calculated as follows:

[0132] Formula 9

[0133] In Equation 9, gm11,12 is the transconductance of NPN transistor Q11 or Q12, and gm9,10 is the transconductance of NPN transistor Q9 or Q10.

[0134] Figure 5 In this circuit, NPN transistors Q11 and Q9 are in the same branch, therefore their collector currents are the same. Similarly, transistors Q12 and Q10 also have the same collector current.

[0135] As shown in Equation 8, the transconductance gm11 of transistor Q11 is the same as the transconductance gm9 of transistor Q9, and the transconductance gm12 of transistor Q12 is the same as the transconductance gm10 of transistor Q10.

[0136] From Equations 8 and 9, the equivalent transconductance at the input of the variable gain amplifier circuit is as follows:

[0137] Formula 10

[0138] From Equation 1, the gain of the variable gain amplifier circuit can be calculated as follows:

[0139] GM2 = Gm * ROUT formula 11

[0140] In Equation 11, Gm = gm11,12,ROUT is approximately a constant value.

[0141] The tail current ISS5 of the variable gain amplifier circuit is proportional to the current IOUT on transistor Q1.

[0142] As shown in Equation 8, the equivalent input transconductance of the variable gain amplifier circuit changes with the tail current, and its gain is calculated as follows:

[0143] Formula 12

[0144] In Equation 12, K is the proportionality coefficient between ISS5 and IOUT.

[0145] As can be seen from the above formula, the equivalent input transconductance of the amplifier is approximately exponentially related to the control voltage VC. Therefore, its gain is also approximately exponentially related to the control voltage, i.e., a linear relationship in dB. The gain Gm of the variable gain amplifier circuit exhibits exponential control characteristics with the control power supply VC of the exponential current converter, thus achieving transconductance linear adjustment.

[0146] Cascading a fixed-gain input stage can change the absolute gain of the overall circuit without affecting the relative gain, meaning the dynamic range of the gain will not decrease. Cascading a variable-gain amplifier circuit can change the relative gain of the overall circuit, thus expanding the dynamic range of the gain.

[0147] In summary, the variable gain amplifier circuit of this application achieves linear dB control characteristics. The output current of the exponential current converter can be adjusted through the VC terminal, so that its input equivalent transconductance and control voltage are exponentially related. In addition, the inherent IV characteristic of the transistor can be used to achieve transconductance linear regulation.

[0148] The effectiveness of this application can be further illustrated by the following simulations:

[0149] Simulation 1: The gain control characteristics of the variable gain amplifier of this application are simulated. By scanning the control voltage VC, its amplitude-frequency response is simulated, and the gain characteristic of the variable gain amplifier as a function of the control voltage VC is obtained. The simulation results are shown in [Figure 1]. Figure 6 ,from Figure 6 As can be seen from the data, the control voltage VC in this application is between -2V and 0V, which can achieve a gain dynamic range of -40dB to 40dB and exhibit dB linear control, that is, it realizes the equivalent transconductance linear regulation of its input.

[0150] Simulation 2: The gain control characteristics of the variable gain amplifier of this application are simulated, where the number of cascaded variable gain amplifier circuits is inconsistent. By scanning the control voltage VC, its amplitude-frequency characteristics are simulated, and the gain characteristic of the variable gain amplifier as a function of the control voltage VC is obtained. The simulation results are shown in [Figure 2]. Figure 7 ,from Figure 7 As can be seen from the data, the control voltage VC in this application can achieve a gain dynamic range of -37.85dB to 1.71dB between -2V and 0V, and exhibits dB linear control.

[0151] The above embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application.

Claims

1. A linear transconductance adjustment circuit based on a bipolar process, characterized by, include: Exponential current conversion circuit, input circuit, and variable gain amplifier circuit; The exponential current conversion circuit is electrically connected to the variable gain amplifier circuit and is used to control the output current source by controlling the control voltage. The input circuit is connected to the input signal and is electrically connected to the variable gain amplifier circuit, and is used to amplify the input signal and output it to the subsequent variable gain amplifier circuit. A variable gain amplifier circuit is used to linearly adjust the transconductance of the amplified signal output from the input circuit.

2. The circuit according to claim 1, characterized in that, The exponential current conversion circuit includes: The first transistor Q1, the second transistor Q2, the third transistor Q3, and the second resistor R2; The collector of the third transistor Q3 is connected to the second terminal of the first current source ISS1, the first terminal of the first current source ISS1 is connected to the positive terminal of the power supply, the base of the third transistor Q3 is connected to the second terminal of the second current source ISS2, and the first terminal of the second current source ISS2 is connected to the positive terminal of the power supply; the emitter of the third transistor Q3 is connected to the collector of the first transistor Q1, and a control current output terminal IOUT is led out between the emitter of the third transistor Q3 and the collector of the first transistor Q1; The base of the first transistor Q1 is connected to the base of the second transistor Q2, and the base of the first transistor Q1 is connected to the collector, while the emitter of the first transistor Q1 is grounded. The collector of the second transistor Q2 is connected to the second terminal of the second current source ISS2 and to the base of the third transistor Q3. The emitter of the second transistor Q2 is connected to the first terminal of the second resistor R2. A replica current Iin is drawn between the emitter of the second transistor Q2 and the first terminal of the second resistor R2. The second terminal of the second resistor R2 is grounded.

3. The circuit according to claim 2, characterized in that, The ratio of the emitter area of ​​the first transistor Q1 to the emitter area of ​​the second transistor Q2 is 1:N.

4. The circuit according to claim 2 or 3, characterized in that, The exponential current conversion circuit further includes: The fourth transistor Q4, the fifth transistor Q5, the sixth transistor Q6, and the first resistor R1; The collector of the sixth transistor Q6 is connected to the base and to the positive power supply VCC. The emitter of the sixth transistor Q6 is connected to the collector of the fourth transistor Q4. The base of the fourth transistor Q4 is connected to the reference voltage VREF. The emitter of the fourth transistor Q4 is connected to the first terminal of the third current source ISS3. The second terminal of the third current source ISS3 is connected to the negative power supply VSS. The first end of the first resistor R1 is connected to the positive terminal VCC of the power supply. The second end of the first resistor R1 is connected to the collector of the fifth transistor Q5. The base of the fifth transistor Q5 is connected to the collector of the third transistor Q3. The emitter of the fifth transistor Q5 is connected to the first end of the third current source ISS3.

5. The circuit according to claim 4, characterized in that, The exponential current conversion circuit further includes: The first amplifier OP1 has a first input terminal connected to the control voltage VC, and the second input terminal of the first amplifier OP1 is connected to the lead-out node between the second terminal of the first resistor R1 and the collector of the fifth transistor Q5. The output terminal of the first amplifier OP1 is connected to the base of the fifth transistor Q5 and the collector of the third transistor Q3.

6. The circuit according to claim 1, characterized in that, The input circuit includes: Fifth resistor R5, third resistor R3, seventh transistor Q7; The first end of the fifth resistor R5 is connected to the positive terminal of the power supply VCC, and the second end of the fifth resistor R5 is connected to the collector of the seventh transistor Q7. The second end of the fifth resistor R5 and the collector lead-out terminal of the seventh transistor Q7 serve as the first output terminal of the input circuit. The base of the seventh transistor Q7 is connected to the positive input current In+, the emitter of the seventh transistor Q7 is connected to the first terminal of the third resistor R3, the second terminal of the third resistor R3 is connected to the first terminal of the fourth current source ISS4, and the second terminal of the fourth current source ISS4 is connected to the negative terminal VSS of the power supply.

7. The circuit according to claim 6, characterized in that, The input circuit further includes: The sixth resistor is R6, the fourth resistor is R4, and the eighth transistor is Q8; The first end of the sixth resistor R6 is connected to the positive terminal of the power supply VCC, and the second end of the sixth resistor R6 is connected to the collector of the eighth transistor Q8. The second end of the sixth resistor R6 and the collector lead-out terminal of the eighth transistor Q8 serve as the second output terminal of the input circuit. The base of the eighth transistor Q8 is connected to the negative input current In-, the emitter of the eighth transistor Q8 is connected to the first end of the fourth resistor R4, the second end of the fourth resistor R4 is connected to the first end of the fourth current source ISS4, and the seventh transistor Q7 and the eighth transistor Q8 form a differential pair.

8. The circuit according to claim 1 or 7, characterized in that, Variable gain amplifier circuit, including: The seventh resistor R7, the eleventh transistor Q11, and the ninth transistor Q9; The first end of the seventh resistor R7 is connected to the positive terminal of the power supply VCC, the second end of the seventh resistor R7 is connected to the collector of the eleventh transistor Q11, the base of the eleventh transistor Q11 is connected to the first output terminal of the input circuit, and the emitter of the eleventh transistor Q11 is connected to the collector of the ninth transistor Q9. The base and collector of the ninth transistor Q9 are connected, the emitter of the ninth transistor Q9 is connected to the first terminal of the fifth current source ISS5, and the second terminal of the fifth current source ISS5 is connected to the negative terminal of the power supply VSS. The fifth current source ISS5 is the current output from the control current output terminal IOUT, which is drawn between the emitter of the third transistor Q3 and the collector of the first transistor Q1.

9. The circuit according to claim 8, characterized in that, The variable gain amplifier circuit further includes: The eighth resistor R8, the twelfth transistor Q12, and the thirteenth transistor Q10; The first end of the eighth resistor R8 is connected to the positive terminal VCC of the power supply, the second end of the eighth resistor R8 is connected to the collector of the twelfth transistor Q12, the base of the twelfth transistor Q12 is connected to the second output terminal of the input circuit, and the emitter of the twelfth transistor Q12 is connected to the collector of the thirteenth transistor Q10. The base and collector of the thirteenth transistor Q10 are connected, and the emitter of the thirteenth transistor Q10 is connected to the first terminal of the fifth current source ISS5.

10. The circuit according to claim 9, characterized in that, The variable gain amplifier circuit further includes: Fixed gain amplifier OP2; The first input terminal of the fixed gain amplifier OP2 is connected to the second terminal of the seventh resistor R7 and the collector of the eleventh transistor Q11. The second input terminal of the fixed gain amplifier OP2 is connected to the terminal between the second end of the eighth resistor R8 and the collector of the twelfth transistor Q12; The fixed gain amplifier OP2 is powered by connecting the positive terminal VCC and the negative terminal VSS of the power supply.

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