Gain adjustment circuit, simultaneous interpretation receiving device, and simultaneous interpretation system

Abstract

This application discloses a gain adjustment circuit, a simultaneous interpretation receiving device, and a simultaneous interpretation system. The gain adjustment circuit includes a receiving circuit, a gain amplification circuit, an output driving circuit, a detection circuit, and a feedback adjustment circuit. The receiving circuit converts the received infrared light signal into a first voltage signal. The gain amplification circuit amplifies the first voltage signal stage by stage through N gain amplifiers to obtain a second voltage signal. The output driving circuit amplifies the power of the second voltage signal to obtain a third voltage signal. The detection circuit generates a voltage difference based on a reference voltage signal and the third voltage signal. The feedback adjustment circuit generates X control signals based on the voltage difference and inputs these X control signals to X gain amplifiers through X output terminals to adjust the gain amplification coefficients of the X gain amplifiers. This application embodiment is beneficial for improving the processing accuracy of infrared light signals.

Description

Technical Field

[0001] This application relates to the field of infrared signal technology, specifically to a gain adjustment circuit, a simultaneous interpretation receiving device, and a simultaneous interpretation system. Background Technology

[0002] In the field of electronic signal processing, infrared signal detection and processing are widely used in many key areas such as environmental monitoring, medical imaging, security detection, space exploration, and simultaneous interpretation. The detection accuracy of infrared signals directly determines the performance and reliability of subsequent systems. Therefore, ensuring the processing quality of infrared signals is a core prerequisite for improving the performance of the entire infrared detection and simultaneous interpretation system. To ensure that the infrared signal quality meets the requirements of subsequent processing, signal conditioning circuits are usually used to post-process the received raw infrared signals. Among these processes, gain adjustment is a crucial step, its core function being to adjust the infrared signal to a reasonable amplitude range suitable for subsequent processing modules, ensuring the accuracy of subsequent signal analysis, identification, and storage.

[0003] Currently, in the process of gain adjustment of infrared signals, the industry generally uses a single gain amplifier to adjust the gain of the infrared signal. However, in practical applications, infrared signals are easily affected by external factors such as detection distance and radiation angle, which often results in significant wide dynamic range fluctuations in the electrical signal (such as current signal) after infrared signal conversion, with the amplitude typically ranging from the nA level to the mA level.

[0004] However, the fixed and narrow gain adjustment range of a single gain amplifier results in poor quality of the infrared signal after gain adjustment, which in turn leads to poor processing accuracy of the infrared signal. Summary of the Invention

[0005] This application provides a gain adjustment circuit, a simultaneous interpretation receiving device, and a simultaneous interpretation system, which dynamically adjusts the gain amplification factor of the gain amplifier to improve the processing accuracy of infrared signals.

[0006] In a first aspect, embodiments of this application provide a gain adjustment circuit, which includes a receiving circuit, a gain amplification circuit, an output driving circuit, a detection circuit, and a feedback adjustment circuit. The gain amplifier circuit includes N cascaded gain amplifiers; the feedback adjustment circuit includes X output terminals, where X is less than or equal to N; the X output terminals are respectively connected to the control terminals of X of the N gain amplifiers. The output terminal of the receiving circuit is connected to the input terminal of the gain amplifier circuit, the output terminal of the gain amplifier circuit is connected to the input terminal of the output drive circuit, the output terminal of the output drive circuit is connected to the input terminal of the detector circuit, and the output terminal of the detector circuit is connected to the input terminal of the feedback adjustment circuit. The receiving circuit is used to convert the received infrared light signal into a first voltage signal; The gain amplifier circuit is used to amplify the first voltage signal step by step through the N gain amplifiers to obtain the second voltage signal; The output driving circuit is used to amplify the power of the second voltage signal to obtain a third voltage signal; The detection circuit is used to generate a voltage difference based on the reference voltage signal and the third voltage signal; The feedback adjustment circuit is used to generate X control signals based on the voltage difference, and input the X control signals to the X gain amplifiers through the X output terminals to adjust the gain amplification coefficient of the X gain amplifiers so that the voltage signal output by the output drive circuit conforms to the reference voltage signal.

[0007] Secondly, embodiments of this application provide a simultaneous interpretation receiving device, which includes the gain adjustment circuit described in the first aspect.

[0008] Thirdly, embodiments of this application provide a simultaneous interpretation system, which includes an infrared transmitting host, multiple radiating plates, and the simultaneous interpretation receiving device described in the second aspect.

[0009] Implementing the embodiments of this application has the following beneficial effects: As can be seen from the embodiments of this application, for infrared light signals, the gain adjustment circuit of this application uses multiple cascaded gain amplifiers. These multiple cascaded gain amplifiers can perform multiple gain adjustments on the received infrared light signal, thereby supporting a wide dynamic range input infrared light signal (nA to mA level), adapting to infrared signal fluctuations of different intensities, avoiding signal saturation or insufficient amplification, and solving the problem of the narrow gain adjustment range of existing single gain amplifiers. Furthermore, a feedback circuit is provided in the gain adjustment circuit, which compares the signal after gain adjustment by the multiple cascaded gain amplifiers with a reference signal to determine the voltage difference between the current gain-adjusted signal and the reference voltage signal. This voltage difference is used to generate control signals for the multiple cascaded gain amplifiers, and the gain amplification factor of the gain amplifiers is adjusted using the control signals. This achieves dynamic adjustment of the gain amplification factor of the gain amplifiers based on the gain-adjusted signal, thereby dynamically adjusting the gain adjustment range of the gain amplifiers and solving the problem of the fixed gain adjustment range of a single gain amplifier. Furthermore, because the gain amplification factor of the gain amplifier is dynamically adjusted in reverse, the infrared signal after gain adjustment by the gain amplifier is matched with the reference voltage signal, ensuring the quality of the infrared signal after gain adjustment by the gain amplifier, thereby improving the processing accuracy of the infrared signal and ensuring the user experience. Attached Figure Description

[0010] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0011] Figure 1 A schematic diagram of a gain adjustment circuit provided in an embodiment of this application; Figure 2 A schematic diagram of a gain amplifier circuit provided in an embodiment of this application; Figure 3 A schematic diagram of a feedback adjustment circuit provided in an embodiment of this application; Figure 4 A schematic diagram of another gain adjustment circuit provided in an embodiment of this application; Figure 5 This is a schematic diagram of a simultaneous interpretation receiving device provided in an embodiment of this application. Detailed Implementation

[0012] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0013] The terms "first," "second," "third," and "fourth," etc., used in the specification, claims, and accompanying drawings of this application are used to distinguish different objects, not to describe a specific order. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or apparatus that includes a series of steps or units is not limited to the listed steps or units, but may optionally include steps or units not listed, or may optionally include other steps or units inherent to these processes, methods, products, or apparatuses.

[0014] In this document, the term "embodiment" means that a particular feature, result, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.

[0015] See Figure 1 , Figure 1 This is a schematic diagram of a gain adjustment circuit provided in an embodiment of this application.

[0016] For example, such as Figure 1 As shown, the above-mentioned gain adjustment circuit includes a receiving circuit 10, a gain amplification circuit 20, an output driving circuit 30, a detection circuit 40, and a feedback adjustment circuit 50.

[0017] For example, such as Figure 1 As shown, the aforementioned gain amplifier circuit 20 includes N cascaded gain amplifiers, namely gain amplifiers Av1, Av2, ..., AvN, meaning the output of one gain amplifier is connected to the input of the next. For example, as... Figure 1 As shown, the feedback adjustment circuit 50 includes X output terminals, namely Vcc1, ..., VccX-1, and VccX. X is less than or equal to N, where N is an integer greater than or equal to 2.

[0018] Optionally, each of the N gain amplifiers includes a control terminal, which is connected to the output of the feedback adjustment circuit to adjust the gain amplification factor of the gain amplifier. For example, the control terminal is the voltage input terminal of the gain amplifier, and different voltages are input to the gain amplifier through the voltage input terminal to adjust the gain amplification factor of the gain amplifier.

[0019] Optionally, the aforementioned X output terminals are connected one by one to the X output terminals of the X gain amplifiers out of the N gain amplifiers. For example... Figure 1 As shown, the X output terminals (i.e., Vcc1, ..., VccX-1, VccX) are connected one-to-one with the X control terminals of the first X gain amplifiers (i.e., AvX, ..., Av2, Av1) among the N gain amplifiers. Of course, in practical applications, the X output terminals can be connected to the control terminals of any X gain amplifiers among the N gain amplifiers according to actual needs; this application does not limit this. For ease of description, this application mainly uses X=N, meaning the feedback adjustment circuit 50 includes N output terminals corresponding one-to-one with the N gain amplifiers.

[0020] For example, such as Figure 1 As shown, the output of the receiving circuit 10 is connected to the input of the gain amplifier circuit 20, meaning the output of the receiving circuit 10 is connected to the first gain amplifier (i.e., gain amplifier Av1) in the N cascaded gain amplifiers. The output of the gain amplifier circuit 20 is connected to the input of the output drive circuit 30, meaning the output of the last gain amplifier (i.e., gain amplifier AvN) in the N cascaded gain amplifiers is connected to the input of the output drive circuit 30. The output of the output drive circuit 30 is connected to the input of the detector circuit 40; the output of the detector circuit 40 is connected to the input of the feedback adjustment circuit 50.

[0021] Specifically, the receiving circuit 10 is used to receive infrared light signals and convert the infrared light signals into a first voltage signal.

[0022] For example, such as Figure 4 As shown, the receiving circuit 10 includes a photodiode D1 and a coupling inductor L1, wherein the output terminal of the photodiode D1 is connected to one end of the primary coil of the coupling inductor L1; the other end of the primary coil of the coupling inductor is grounded. Figure 4 (Not shown in the diagram). One end of the secondary coil of the coupling inductor D1 is connected to the input terminal of the gain amplifier circuit 20, that is, to the input terminal of the gain amplifier Av1, and the other end of the secondary coil of the coupling inductor D1 is grounded.

[0023] More specifically, photodiode D1 is used to receive infrared light signals and convert them into current signals (AC current signals). Then, the current signal is converted into a first voltage signal (AC voltage signal) through the electromagnetic induction of the primary and secondary coils of the coupled inductor L1.

[0024] Then, the first voltage signal is input to the gain amplifier circuit 20, that is, the first voltage signal is input to the first gain amplifier Av1 in the gain amplifier circuit 20. The gain amplifier circuit 20 amplifies the first voltage signal step by step through N gain amplifiers to obtain the second voltage signal, that is, the gain of the first voltage signal is amplified step by step through N gain amplifiers (i.e., the aforementioned gain amplifiers Av1, Av2, ..., AvN) to obtain the second voltage signal (AC voltage signal).

[0025] Optionally, in one embodiment of this application, such as Figure 2 As shown, the gain amplifier circuit 20 also includes an impedance transformation circuit 201 and a filter circuit 202, wherein the impedance transformation circuit 201 and the filter circuit 202 are connected in series and located in the middle of the N gain amplifiers. Specifically, the first M gain amplifiers, the impedance transformation circuit 201, the filter circuit 202, and the last NM gain amplifiers are cascaded in sequence, where M is less than N.

[0026] For example, such as Figure 2 As shown, the output of the Mth gain amplifier (AvM) is connected to the input of the impedance transformation circuit 201, the output of the impedance transformation circuit 201 is connected to the input of the filter circuit 202, and the output of the filter circuit 202 is connected to the input of the (M+1)th gain amplifier (AvM+1).

[0027] For example, such as Figure 2 As shown, the first voltage signal is first amplified by the first M gain amplifiers (Av1, ..., AvM) to obtain the fourth voltage signal (AC voltage signal). This involves progressively amplifying the gain of the first voltage signal to obtain the fourth voltage signal. Then, the fourth voltage signal is input to the impedance transformation circuit 201. The impedance transformation circuit 201 performs impedance transformation on the fourth voltage signal to obtain the fifth voltage signal. Next, the fifth voltage signal is input to the filter circuit 202 for filtering to obtain the sixth voltage signal. Finally, the sixth voltage signal is amplified by the last NM gain amplifiers (AvM+1, ..., AvN) to obtain the aforementioned second voltage signal.

[0028] Optionally, such as Figure 2As shown, the filter circuit 202 includes a high-pass filter (HPF) and a low-pass filter (LPF).

[0029] For example, such as Figure 4 As shown, the gain adjustment circuit also includes a control circuit 60. Optionally, the control circuit 60 can be a chip or a processor, or other circuits with processing and control functions. This application does not limit the type of the control circuit 60. Optionally, the control circuit 60 is an MCU.

[0030] For example, before filtering the fifth voltage signal, the control circuit 60 acquires the channel selected by the user. This channel indicates the language the user wants to listen to; that is, the user has pre-bound their desired language to this channel and selected it. For example, the user selects a channel via a display screen and sends the selected channel to the control circuit 60. Then, the control circuit 60 determines the frequency band corresponding to this channel. For example, if different channels are pre-configured with corresponding frequency bands, the frequency band corresponding to the user-selected channel is determined. Based on the frequency band, the control circuit 60 determines the target filter among the high-pass filter, mid-pass filter, and low-pass filter that corresponds to the frequency band. Specifically, based on the frequency band, a target filter pre-configured for that frequency band is determined, wherein the target filter is one or a combination of the high-pass filter and the low-pass filter. For example, when the frequency band is the mid-frequency band, a combination of a high-pass filter and a low-pass filter can be configured, and the signal is filtered sequentially by the high-pass filter and the low-pass filter to filter out the mid-frequency band signal. The frequency ranges corresponding to high and low frequencies can be divided according to actual needs. For example, 20Hz-250Hz can be classified as low frequency, and 2kHz-20kHz as high frequency. The method of dividing high and low frequencies can be determined according to actual needs; this application does not limit the method of division.

[0031] Then, the control circuit 60 controls the target filter to be in working mode, that is, controls the voltage signal input to the filter circuit 202 to be filtered by the target filter in the filter circuit 202.

[0032] Furthermore, the control circuit 60 determines the filtering parameters of the target filter based on the aforementioned frequency band. These filtering parameters are used to retain signals with frequencies within that frequency band, and are pre-set. Therefore, after setting the filtering parameters of the target filter, the filtering circuit 202, upon receiving the fifth voltage signal, filters the fifth voltage signal using the target filter and its filtering parameters to obtain the sixth voltage signal. This means that the voltage signals with frequencies within that frequency band of the fifth voltage signal are retained, resulting in the sixth voltage signal. Therefore, the frequency band of the sixth voltage signal corresponds to the channel selected by the user.

[0033] As can be seen, in this embodiment, the control circuit 60 acquires the channel selected by the user, and then selects a suitable target filter from the filtering circuit 202 according to the channel selected by the user, and sets the filtering parameters of the target filter according to the frequency band corresponding to the channel. In this way, the signal received by the filtering circuit can be filtered by the target filter, and the signal related to the channel can be accurately filtered out from the signal, that is, the signal unrelated to the channel can be filtered out, thereby retaining the pure signal related to the channel. This enables the accurate output of the voice signal that the user needs to listen to, and thus accurately outputs the voice signal of the language that the user needs to listen to, improving the user's listening experience.

[0034] Furthermore, such as Figure 1 As shown, the output drive circuit 30 amplifies the power of the second voltage signal to obtain a third voltage signal (AC voltage signal). The detector circuit 40 generates a voltage difference based on a reference voltage signal and the third voltage signal, wherein the reference voltage signal is an ideal voltage signal.

[0035] For example, such as Figure 4 As shown, the detection circuit 40 includes a diode D2 and a differential amplifier (DP). First, the third voltage signal is input to diode D2 to obtain a DC voltage signal. Then, the DC voltage signal (i.e., the voltage value) and the reference voltage signal (i.e., the voltage value) are input to the differential amplifier for comparison to obtain the voltage difference between the DC voltage signal and the reference voltage signal. This voltage difference is the voltage difference between the voltage value of the voltage signal output by the current output drive circuit 30 and the ideal voltage value (i.e., the voltage value of the reference voltage signal).

[0036] Furthermore, such as Figure 1As shown, the voltage difference is input to the feedback adjustment circuit 50, generating X control signals corresponding one-to-one with the X output terminals. The feedback adjustment circuit 50 inputs the X control signals to the X gain amplifiers through the X output terminals, thereby adjusting the gain amplification factor of the X gain amplifiers. In this way, the X gain amplifiers amplify the voltage signal input to them using the adjusted gain amplification factor, thereby adjusting the amplitude of the voltage signal output to the output drive circuit 30. This ensures that the voltage signal output by the output drive circuit 30 conforms to the reference voltage signal, meaning that the voltage value of the voltage signal output by the output drive circuit 30 is the same as the voltage value of the reference voltage signal, thus enabling the output of an ideal voltage signal.

[0037] It should be noted that adjusting the gain amplification factor of the gain amplifier can either increase or decrease it, depending on the relative values ​​of the voltage signal output by the output driver circuit 30 and the reference voltage signal. For example, when the voltage signal output by the output driver circuit 30 is less than the reference voltage signal, the gain amplification factor of the gain amplifier will increase; conversely, it can decrease, for instance, when the voltage signal output by the output driver circuit 30 is greater than the reference voltage signal, the gain amplification factor of the gain amplifier will decrease.

[0038] Understandably, through Figure 1 The circuit shown only describes the process of adjusting the gain amplification factor of the gain amplifier using negative feedback once, that is, using the aforementioned X control signals to adjust the gain amplification factor of the gain amplifier once in reverse. However, in practical applications, after one negative feedback adjustment, the voltage signal output by the output drive circuit 30 will still not match the voltage value of the reference voltage signal. At this time, the detector circuit 40 will output a new voltage difference (i.e., the voltage difference is not zero). This new voltage difference can be used to generate a new control signal to continue adjusting the gain amplification factor of the gain amplifier in reverse until the voltage value of the voltage signal output by the output drive circuit 30 matches (i.e., is the same) the voltage value of the reference voltage signal. At this time, the voltage difference output by the detector circuit 40 is 0, and no new control signal will be output. In summary, as long as the voltage value of the voltage signal output by the output drive circuit 30 is different from the voltage value of the reference voltage signal, a new control signal will be output to adjust the gain amplification factor of the gain amplifier in feedback until the output drive circuit 30 outputs a voltage signal that matches the reference voltage signal.

[0039] Optionally, in one embodiment of this application, such as Figure 3 As shown, the feedback regulation circuit includes X voltage divider circuits (i.e., Figure 3The voltage divider circuits 1, ..., X-1, X-1 and X-1 in the circuit and the bias resistor Rt are provided. Each voltage divider circuit corresponds to one of the X output terminals, that is, voltage divider circuit 1 corresponds to output terminal Vcc1, ..., X-1 corresponds to output terminal VccX-1 and X-1 corresponds to output terminal VccX.

[0040] For example, such as Figure 3 As shown, the X voltage divider circuits and the bias resistor Rt are connected in series, with one end of the bias resistor Rt grounded. Specifically, one end of the bias resistor Rt is grounded, and the other end is connected to the tap corresponding to voltage divider circuit X (i.e., tap X). One end of the voltage divider resistor RaX of voltage divider circuit X is connected to the tap corresponding to voltage divider circuit X-1 (i.e., tap X-1), and so on, until one end of the voltage divider resistor Ra1 of voltage divider circuit 1 is connected to the output terminal of detector circuit 40.

[0041] Furthermore, the output of each voltage divider circuit is connected to one of the control terminals of the aforementioned X gain amplifier circuits.

[0042] It should be noted that the bias resistor Rt is mainly used to provide the voltage to the voltage divider circuit X so that the voltage obtained by the voltage divider circuit X is not 0, and so that the voltage output by the control terminal VccX is not 0.

[0043] Therefore, based on the aforementioned X-divider circuit, the voltage difference output by the detector circuit 40 is divided, so that each voltage divider circuit receives a corresponding voltage. Furthermore, the voltage received by each voltage divider circuit is input to the corresponding gain amplifier through the output terminal of each voltage divider circuit, thereby adjusting the voltage input to the gain amplifier and consequently adjusting the gain amplification factor of the gain amplifier.

[0044] For example, the feedback adjustment circuit further includes X taps corresponding to the X output terminals, i.e., each voltage divider circuit includes one tap; the first voltage divider circuit includes a low-pass filter branch circuit and a voltage divider resistor, wherein the first voltage divider circuit is any one of the plurality of voltage divider circuits; one end of the voltage divider resistor and the input terminal of the low-pass filter branch circuit are connected to the tap corresponding to the first voltage divider circuit; the other end of the voltage divider resistor is connected to the tap corresponding to the preceding voltage divider circuit of the first voltage divider circuit; the output terminal of the low-pass filter branch circuit is the output terminal of the first voltage divider circuit.

[0045] For example, the low-pass filter branch circuit includes a filter capacitor and a filter resistor; one end of the filter resistor is connected to one end of the voltage divider resistor, and the other end is connected to the output terminal of the voltage divider circuit; one end of the filter capacitor is connected to the output terminal of the first voltage divider circuit, and the other end is grounded.

[0046] It should be noted that, for the first voltage divider circuit, one end of the voltage divider resistor is connected to the output terminal of the detector circuit; for the Xth voltage divider circuit, the tap (i.e., tap X) is connected to one end of the bias resistor Rt. The voltage divider resistors of different voltage divider circuits can be the same or different, and this application does not impose any limitation on this; furthermore, the filter resistors of different voltage divider circuits can be the same or different.

[0047] For example, such as Figure 3 As shown, voltage divider circuit 1 includes a voltage divider resistor Ra1 and a low-pass filter branch circuit composed of a filter resistor Rb1 and a filter capacitor C1. One end of Ra1 is connected to the output terminal of the detector circuit 40, and the other end is connected to the corresponding tap (i.e., tap 1) of voltage divider circuit 1. One end of the filter resistor Rb1 is connected to tap 1, and the other end is connected to the output terminal Vcc1 of the voltage divider circuit. One end of the filter capacitor C1 is connected to Vcc1, and the other end is grounded. Similarly, voltage divider circuit X-1 includes a voltage divider resistor RaX-1 and a low-pass filter branch circuit composed of a filter resistor RbX-1 and a filter capacitor CX-1. In this circuit, RaX-1 is connected at one end to the tap corresponding to voltage divider circuit X-1 (i.e., tap X-1), and at the other end to the tap corresponding to voltage divider circuit X-2 (i.e., tap X-2). The filter resistor RbX-1 is connected at one end to the tap corresponding to voltage divider circuit X-1 (i.e., tap X-1), and at the other end to the output terminal VccX-1 of voltage divider circuit X-1. The filter capacitor CX-1 is connected at one end to VccX-1, and at the other end to ground. The voltage divider circuit X includes the voltage divider resistor RaX and a low-pass filter branch circuit composed of the filter resistor RbX and the filter capacitor CX. Specifically, RaX is connected at one end to the tap corresponding to voltage divider circuit X-1 (i.e., tap X-1), and at the other end to the tap corresponding to voltage divider circuit X (i.e., tap X). The filter resistor RbX is connected at one end to the tap corresponding to voltage divider circuit X (i.e., tap X), and at the other end to the output terminal VccX of voltage divider circuit X. The filter capacitor CX is connected at one end to VccX, and at the other end to ground. Finally, the tap corresponding to voltage divider circuit X (i.e., tap X) is also connected to one end of bias resistor Rt, and the other end of bias resistor Rt is grounded.

[0048] As can be seen from the embodiments of this application, for infrared light signals, the gain adjustment circuit of this application uses multiple cascaded gain amplifiers. These multiple cascaded gain amplifiers can perform multiple gain adjustments on the received infrared light signal, thereby supporting a wide dynamic range input infrared light signal (nA to mA level), adapting to infrared signal fluctuations of different intensities, avoiding signal saturation or insufficient amplification, and solving the problem of the narrow gain adjustment range of existing single gain amplifiers. Furthermore, a feedback circuit is provided in the gain adjustment circuit, which compares the signal after gain adjustment by the multiple cascaded gain amplifiers with a reference signal to determine the voltage difference between the current gain-adjusted signal and the reference voltage signal. This voltage difference is used to generate control signals for the multiple cascaded gain amplifiers, and the gain amplification factor of the gain amplifiers is adjusted using the control signals. This achieves dynamic adjustment of the gain amplification factor of the gain amplifiers based on the gain-adjusted signal, thereby dynamically adjusting the gain adjustment range of the gain amplifiers and solving the problem of the fixed gain adjustment range of a single gain amplifier. Furthermore, because the gain amplification factor of the gain amplifier is dynamically adjusted in reverse, the infrared signal after gain adjustment by the gain amplifier is matched with the reference voltage signal, ensuring the quality of the infrared signal after gain adjustment by the gain amplifier, thereby improving the processing accuracy of the infrared signal and ensuring the user experience.

[0049] To better understand the technical solution of this application, this application describes the gain amplifier circuit of this application with three gain amplifiers, three voltage divider circuits, and impedance transformation circuits and filter circuits located after the first gain amplifier, i.e., N=X=3 and M=1.

[0050] For example, such as Figure 4 As shown, the gain adjustment circuit includes: a receiving circuit 10, a gain amplification circuit 20, an output driving circuit 30, a detection circuit 40, a feedback adjustment circuit 50, and a control circuit 60.

[0051] The receiving circuit 10 includes a photodiode D1 and a coupling inductor L1; the gain amplifier circuit includes three gain amplifiers (AV1, AV2, and AV3), an impedance transformation circuit 201, and a filter circuit 202 (including LPF and HPF); the detector circuit 40 includes a diode D2 and a differential amplifier DP; and the feedback adjustment circuit 50 includes voltage divider circuits 501, 502, and 503, and a bias resistor Rt. Specifically, voltage divider circuit 501 includes a voltage divider resistor Ra1, a filter resistor Rb1, and a filter capacitor C1; voltage divider circuit 502 includes a voltage divider resistor Ra2, a filter resistor Rb2, and a filter capacitor C2; and voltage divider circuit 503 includes a voltage divider resistor Ra3, a filter resistor Rb3, and a filter capacitor C3.

[0052] For example, such as Figure 4 As shown, one end of the secondary coil of the coupling inductor L1 is connected to the input of AV1. The output of AV1 is connected to the input of impedance transformation circuit 201. The output of impedance transformation circuit 201 is connected to the input of filter circuit 202. The output of filter circuit 202 is connected to the input of AV2. The output of AV2 is connected to the input of AV3. The output of AV3 is connected to the input of output drive circuit 30. One output of output drive circuit 30 is connected to the input of D2. The output of D2 is connected to one input of differential amplifier DP. The other input of differential amplifier DP receives the reference signal Vref. The output of differential amplifier DP is connected to one end of Ra1. The other end of Ra1 is connected to one end of Rb1. One end of Rb1 is connected to the output Vcc1 of voltage divider circuit 501. One end of capacitor C1 is connected to Vcc1, and the other end is grounded. One end of Ra2 is connected to one end of Ra1, and the other end is connected to one end of Rb2. The other end of Rb2 is connected to the output terminal Vcc2 of voltage divider circuit 502. One end of capacitor C2 is connected to Vcc2, and the other end is grounded. One end of Ra3 is connected to one end of Ra2, and the other end is connected to one end of Rb3 and one end of Rt. The other end of Rb3 is connected to the output terminal Vcc3 of voltage divider circuit 503. One end of capacitor C3 is connected to Vcc3, and the other end is grounded. The other end of Rt is grounded.

[0053] Vcc1, Vcc2, and Vcc3 are connected to the control terminals of AV3, AV2, and AV1, respectively.

[0054] Therefore, adopt Figure 4The illustrated gain amplifier circuit firstly sets the target filter and its filtering parameters in the filter circuit 202 based on the user-selected channel. Then, D1 performs photoelectric conversion on the received infrared light signal to obtain a current signal, which is then input to L1 for coupling to obtain a first voltage signal. The first voltage signal is initially amplified by AV1 to obtain a fourth voltage signal. The fourth voltage signal is then impedance-transformed by the impedance transformation circuit to obtain a fifth voltage signal. This fifth voltage signal is then filtered by the target filter in the filter circuit 202, using its filtering parameters, to obtain a sixth voltage signal. The sixth voltage signal is then amplified step-by-step by AV2 and AV3 to obtain a second voltage signal. Finally, the second voltage signal is power-amplified by the output drive circuit 30 to obtain a third voltage signal. Then, the third voltage signal and Vref are input to DP to obtain the voltage difference. This voltage difference is then input to the feedback adjustment circuit. The voltage difference is divided by the voltage dividing resistors Ra1, Ra2, Ra3 and the bias resistor Rt in voltage divider circuits 501, 502, and 503, resulting in the control signals for voltage divider circuits 501, 502, and 503, i.e., the divided voltages V1, V2, and V3. These divided voltages V1, V2, and V3 are then input to AV1, AV2, and AV3 respectively through the output terminals Vcc1, Vcc2, and Vcc3 of voltage divider circuits 501, 502, and 503. The gain amplification coefficients of AV1, AV2, and AV3 are adjusted so that the voltage value of the final output voltage signal from the output drive circuit 30 is the same as the reference voltage signal, i.e., the final output is an ideal voltage signal.

[0055] Optionally, in another embodiment of this application, the output terminal of the detector circuit 40 is also connected to the control circuit 60; and the voltage dividing resistor of each voltage divider circuit of the feedback adjustment circuit 50 is an adjustable resistor, and each gain amplifier corresponds to one voltage divider circuit, i.e., X=N as described above. Optionally, the voltage dividing resistor of each voltage divider circuit is connected to the control circuit 60 so that the control circuit 60 can adjust the resistance value of the voltage dividing resistor.

[0056] For example, the control circuit 60 pre-programs an adjustable range for the gain amplification factor of each gain amplifier. Based on the adjustable range of the gain amplification factor of each gain amplifier, the control circuit 60 determines the maximum gain amplification factor of each gain amplifier. Based on the maximum gain amplification factor of each gain amplifier, a first ratio is determined among the gain amplification factors of the aforementioned N gain amplifiers, wherein this first ratio can be the ratio among the maximum gain amplification factors of the N gain amplifiers. Then, based on this first ratio, the control circuit 60 determines the ratio between the resistance values ​​of the bias resistor Rt and the voltage divider resistors in each voltage divider circuit, wherein the ratio between the resistance values ​​is the first ratio. Then, based on the resistance value of the bias resistor Rt and the first ratio, the control circuit 60 determines the resistance value of the voltage divider resistor in each voltage divider circuit and sets the resistance value of the voltage divider resistor in each voltage divider circuit. Since the ratio between the bias resistor Rt and the resistance values ​​of the voltage divider resistors in each voltage divider circuit satisfies the first ratio, the ratio between the voltages divided by each voltage divider circuit also satisfies the first ratio. Thus, when the voltage divided by each voltage divider circuit is used to adjust the gain amplification factor of the corresponding gain amplifier, the ratio between the amplitudes of the adjusted gain amplification factor is also the first ratio. This ensures that the adjustment amplitude of gain amplifiers with a larger adjustable range of gain amplification factor is relatively larger, while the adjustment amplitude of gain amplifiers with a smaller adjustable range is relatively smaller. This helps to prevent the adjusted gain amplification factor of each gain amplifier from becoming too large during the adjustment process, keeping it within a balanced operating range and avoiding the use of extreme gain amplification factors, thereby ensuring the operating performance of each gain amplifier.

[0057] See Figure 5 , Figure 5 This is a schematic diagram of a simultaneous interpretation receiving device provided in an embodiment of this application.

[0058] like Figure 5 As shown, the simultaneous interpretation receiving device includes the aforementioned gain adjustment circuit. That is, the simultaneous interpretation receiving device adjusts the gain of the received infrared light signal through the aforementioned gain adjustment circuit to obtain an ideal signal.

[0059] Furthermore, such as Figure 5 As shown, the simultaneous interpretation receiving equipment includes Figure 4 The gain adjustment circuit shown, i.e., the simultaneous interpretation receiving device, includes... Figure 4 The components of the gain adjustment circuit shown will not be described again.

[0060] Optionally, in one embodiment of this application, such as Figure 5As shown, the simultaneous interpretation receiving device also includes a demodulation circuit 70 and an audio output circuit 80. The input terminal of the demodulation circuit 70 is connected to the output terminal of the output drive circuit 30, and the output terminal of the demodulation circuit 70 is connected to the input terminals of the control circuit 60 and the audio output circuit, respectively.

[0061] Optionally, the demodulation circuit 70 is used to demodulate the voltage signal output by the output drive circuit 30 to obtain the demodulated audio signal, that is, to perform A / D conversion on the voltage signal output by the output drive circuit 30 to obtain the audio analog signal; the audio output circuit 80 is used to output the demodulated audio signal, for example, through Bluetooth or headphones.

[0062] Optionally, the control circuit 60 can also process the received demodulated audio signal, such as performing text recognition and subtitle display, etc.

[0063] Optionally, in one embodiment of this application, a simultaneous interpretation system is also provided. This simultaneous interpretation system includes... Figure 5 The diagram shows a simultaneous interpretation receiving device, an infrared transmitter, and multiple radiating panels, connected by a coaxial cable. The infrared transmitter acquires infrared light signals, converts them into electrical signals, and transmits them to each radiating panel. Each radiating panel receives the electrical signals, converts them back into infrared light signals, and radiates them. The simultaneous interpretation receiving device receives the infrared light signals radiated by the corresponding radiating panel through the aforementioned gain adjustment circuit and executes the gain adjustment process, thereby enabling the user to hear the audio from the channel selected by the user.

[0064] It should be noted that, for the sake of simplicity, the foregoing method embodiments are all described as a series of actions. However, those skilled in the art should understand that this application is not limited to the described order of actions, as some steps may be performed in other orders or simultaneously according to this application. Furthermore, those skilled in the art should also understand that the embodiments described in the specification are all optional embodiments, and the actions and modules involved are not necessarily essential to this application.

[0065] In the above embodiments, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions in other embodiments.

[0066] In the several embodiments provided in this application, it should be understood that the disclosed apparatus can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between devices or units may be electrical or other forms.

[0067] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0068] Furthermore, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software program module.

[0069] If the integrated unit is implemented as a software program module and sold or used as an independent product, it can be stored in a computer-readable storage device (CMD). Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a memory and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned memory includes various media capable of storing program code, such as USB flash drives, read-only memory (ROM), random access memory (RAM), portable hard drives, magnetic disks, or optical disks.

[0070] Those skilled in the art will understand that all or part of the steps in the various methods of the above embodiments can be implemented by a program instructing related hardware. The program can be stored in a computer-readable storage device, which may include: a flash drive, a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk, etc.

[0071] The embodiments of this application have been described in detail above. Specific examples have been used to illustrate the principles and implementation methods of this application. The description of the above embodiments is only for the purpose of helping to understand the method and core ideas of this application. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of this application. Therefore, the content of this specification should not be construed as a limitation of this application.

Claims

1. A gain adjustment circuit, characterized in that, The gain adjustment circuit includes a receiving circuit, a gain amplification circuit, an output driving circuit, a detection circuit, and a feedback adjustment circuit. The gain amplifier circuit includes N cascaded gain amplifiers; the feedback adjustment circuit includes X output terminals, where X is less than or equal to N; the X output terminals are respectively connected to the control terminals of X of the N gain amplifiers. The output terminal of the receiving circuit is connected to the input terminal of the gain amplifier circuit, the output terminal of the gain amplifier circuit is connected to the input terminal of the output drive circuit, the output terminal of the output drive circuit is connected to the input terminal of the detector circuit, and the output terminal of the detector circuit is connected to the input terminal of the feedback adjustment circuit. The receiving circuit is used to convert the received infrared light signal into a first voltage signal; The gain amplifier circuit is used to amplify the first voltage signal step by step through the N gain amplifiers to obtain the second voltage signal; The output driving circuit is used to amplify the power of the second voltage signal to obtain a third voltage signal; The detection circuit is used to generate a voltage difference based on the reference voltage signal and the third voltage signal; The feedback adjustment circuit is used to generate X control signals based on the voltage difference, and input the X control signals to the X gain amplifiers through the X output terminals to adjust the gain amplification coefficient of the X gain amplifiers so that the voltage signal output by the output drive circuit conforms to the reference voltage signal.

2. The gain adjustment circuit according to claim 1, characterized in that, The gain amplifier circuit also includes an impedance transformation circuit and a filter circuit; The first M gain amplifiers of the N gain amplifiers, the impedance transformation circuit, the filter circuit, and the last NM gain amplifiers of the N gain amplifiers are cascaded in sequence, where M is less than N; The first M gain amplifiers are used to amplify the first voltage signal step by step to obtain the fourth voltage signal; The impedance transformation circuit is used to perform impedance transformation on the fourth voltage signal to obtain the fifth voltage signal; The filtering circuit is used to filter the fifth voltage signal to obtain the sixth voltage signal; The subsequent NM gain amplifiers are used to amplify the sixth voltage signal step by step to obtain the second voltage signal.

3. The gain adjustment circuit according to claim 2, characterized in that, The gain adjustment circuit further includes a control circuit, wherein the control circuit is connected to the filter circuit; the filter circuit includes a high-pass filter and a low-pass filter. The control circuit is used to acquire the channel selected by the user, determine the frequency band corresponding to the channel, and based on the frequency band, determine the target filter among the high-pass filter and the low-pass filter that corresponds to the frequency band; and set the filtering parameters of the target filter based on the frequency band, so as to filter the fifth voltage signal through the target filter and the filtering parameters to obtain the sixth voltage signal, wherein the frequency band of the sixth voltage signal is the frequency band.

4. The gain adjustment circuit according to any one of claims 1-3, characterized in that, The feedback adjustment circuit includes X voltage divider circuits and bias resistors, with each voltage divider circuit corresponding to one of the X output terminals; the X voltage divider circuits and the bias resistors are connected in series, and one end of the bias resistor is grounded.

5. The gain adjustment circuit according to claim 4, characterized in that, The feedback adjustment circuit further includes X taps corresponding to the X output terminals; the first voltage divider circuit includes a low-pass filter branch circuit and a voltage divider resistor, wherein the first voltage divider circuit is any one of the X voltage divider circuits; One end of the voltage divider resistor and the input end of the low-pass filter branch circuit are connected to the taps corresponding to the first voltage divider circuit; the output end of the low-pass filter branch circuit is the output end of the first voltage divider circuit.

6. The gain adjustment circuit according to claim 5, characterized in that, The low-pass filter branch circuit includes a filter capacitor and a filter resistor; One end of the filter resistor is connected to one end of the voltage divider resistor, and the other end is connected to the output terminal of the voltage divider circuit; one end of the filter capacitor is connected to the output terminal of the first voltage divider circuit, and the other end is grounded.

7. The gain adjustment circuit according to any one of claims 1-6, characterized in that, The receiving circuit includes a photodiode and a coupling inductor; The output terminal of the photodiode is connected to one end of the primary coil of the coupled inductor; the other end of the primary coil of the coupled inductor is grounded; one end of the secondary coil of the coupled inductor is connected to the input terminal of the gain amplifier circuit, and the other end of the secondary coil of the coupled inductor is grounded.

8. A simultaneous interpretation receiving device, characterized in that, The simultaneous interpretation receiving device includes the gain adjustment circuit as described in any one of claims 1-7.

9. The device according to claim 8, characterized in that, The simultaneous interpretation receiving device further includes a demodulation circuit and an audio output circuit; the input terminal of the demodulation circuit is connected to the output terminal of the output driving circuit, and the output terminal of the demodulation circuit is connected to the input terminal of the audio output circuit. The demodulation circuit is used to demodulate the voltage signal output by the output drive circuit to obtain a demodulated signal. The audio output circuit is used to output the demodulated signal to the user.

10. A simultaneous interpretation system, characterized in that, The simultaneous interpretation system includes an infrared transmitter, multiple radiating plates, and the simultaneous interpretation receiving device as described in claim 9.

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