A radio frequency automatic level control device and transceiver

Abstract

This application provides an automatic radio frequency level control device and transceiver, relating to the field of communication technology. The device includes: a front-end analog attenuator receiving a radio frequency input signal; a loop detector detecting the radio frequency output signal extracted by a directional coupler and generating a detection voltage; a reference voltage connected to the non-inverting input of a loop integrating operational amplifier; the detection voltage received through an integrating proportional resistor at the inverting input of the loop integrating operational amplifier; the loop integrating operational amplifier integrating the error signal between the detection voltage and the reference voltage to generate a loop control voltage fed back to the front-end analog attenuator; and a feedback network connected between the inverting input and output of the loop integrating operational amplifier, including a first branch and a second branch connected in parallel. The first branch includes a first capacitor, and the second branch includes a second capacitor and a zero-point resistor connected in series. Implementing the technical solution of this application improves communication reliability.

Description

Technical Field

[0001] This application relates to the field of communication technology, specifically to a radio frequency automatic level control device and transceiver. Background Technology

[0002] In radio frequency (RF) communication systems, Automatic Level Control (ALC) loops adjust link gain through closed-loop feedback to stabilize the RF output signal power at a target value. ALC control loops in related technologies generally employ zero-order or first-order closed-loop structures. Zero-order loops have a faster response speed, but are prone to loss of lock-up when the input signal has a large dynamic range or is subject to interference, resulting in a larger steady-state error. While first-order integrator loops can improve anti-interference capabilities, they operate in an overdamped state, resulting in a slower response speed and an exponential transition to the equilibrium point. With the development of applications such as burst frequency hopping communication, communication time slots are becoming increasingly shorter, requiring ALC loops to respond to rapid amplitude changes in input signals such as steps, impulses, and accelerations within extremely short time intervals (e.g., 50 microseconds or other timeframes). Traditional first-order loops are slow to respond to these rapidly changing signals, sometimes even leading to loop loss of lock-up, failing to accurately lock the signal amplitude within short time slots, thus affecting communication reliability. Summary of the Invention

[0003] To address the aforementioned technical problems, this application provides an automatic radio frequency level control device and a transceiver.

[0004] In a first aspect, this application provides an automatic radio frequency level control device, comprising: a front-end analog attenuator, a directional coupler, a loop detector, and a loop integrating operational amplifier. The front-end analog attenuator receives a radio frequency input signal; its control terminal is connected to the output terminal of the loop integrating operational amplifier; and its output terminal is connected to the input terminal of the directional coupler. The coupling terminal of the directional coupler is connected to the input terminal of the loop detector, which is used to detect the radio frequency output signal extracted by the directional coupler and generate a detection voltage. The non-inverting input terminal of the loop integrating operational amplifier is used to connect a representative... The reference voltage for the target output power is connected to the output of the loop detector via an integrating proportional resistor to receive the detected voltage. The loop integrator is used to integrate the error signal between the detected voltage and the reference voltage to generate a loop control voltage that is fed back to the front-end analog attenuator. The loop integrator includes a feedback network connected between the inverting input and the output of the loop integrator. The feedback network includes a first branch and a second branch connected in parallel. The first branch includes a first capacitor, and the second branch includes a second capacitor and a zero-point resistor connected in series.

[0005] By adopting the above technical solution, the RF automatic level control device utilizes a front-end analog attenuator, directional coupler, loop detector, and loop integrator to form a closed-loop feedback system, which can stabilize the RF output signal power at the target value. The second-order integrator loop with a first-order zero can combine the advantages of fast response speed of the zero-order loop and strong anti-interference capability of the first-order integrator loop, avoiding the problems of easy loss of lock and large steady-state error of the traditional zero-order loop and slow response or even loss of lock of the first-order loop. It can better cope with the rapid amplitude changes of the input signal and achieve the effect of improving communication reliability.

[0006] Optionally, the loop integrating operational amplifier includes a first operational amplifier, a first terminal of a first capacitor connected to the inverting input terminal of the first operational amplifier, and a second terminal of the first capacitor connected to the output terminal of the first operational amplifier; a zero-point resistor connected to the inverting input terminal of the first operational amplifier, a second terminal of the zero-point resistor connected to the first terminal of a second capacitor, and a second terminal of the second capacitor connected to the output terminal of the first operational amplifier; a reference voltage is connected to the non-inverting input terminal of the first operational amplifier; one end of an integrating proportional resistor is connected to the output terminal of a loop detector, and the other end of the integrating proportional resistor is connected to the inverting input terminal of the first operational amplifier.

[0007] By adopting the above technical solution, the connection method of each component in the loop integrating operational amplifier is clarified, so that the loop integrating operational amplifier performs integration operation on the error signal between the detector voltage and the reference voltage to generate a loop control voltage that is fed back to the front-end analog attenuator, thereby realizing a second-order integrating loop with a first-order zero, which provides a basis for the RF automatic level control device to achieve precise signal amplitude locking.

[0008] Optionally, the front-end analog attenuator has a voltage control slope, the loop detector has a detection slope, and the ratio of the capacitive reactance of the loop integrating operational amplifier to the resistance of the integrating proportional resistor is set according to the voltage control slope and the detection slope to make the loop of the RF automatic level control device reach a balanced state.

[0009] By adopting the above technical solution, the loop parameters are matched with the inherent characteristics of key components, ensuring that the closed-loop system can stably converge to the equilibrium state under various operating conditions, thereby improving control accuracy.

[0010] Optionally, the capacitance values ​​of the first capacitor, the second capacitor, and the integral proportional resistor satisfy the following relationship: 2π×f×(C1+C2)×R1=a×b; where f represents the video bandwidth of the RF automatic level control device, R1 represents the resistance value of the integral proportional resistor, C1 represents the capacitance value of the first capacitor, C2 represents the capacitance value of the second capacitor, a represents the voltage control slope of the front-end analog attenuator, and b represents the detection slope of the loop detector.

[0011] By adopting the above technical solution, the RF automatic level control device can receive RF input signals, process them through a front-end analog attenuator, directional coupler, loop detector, and loop integrating operational amplifier, and generate loop control voltage feedback regulation through a second-order integrating loop with a first-order zero. Based on the specific relationship between the capacitance values ​​of the first capacitor and the second capacitor and the resistance value of the integral proportional resistor, combined with the voltage control slope of the front-end analog attenuator and the detection slope of the loop detector, loop balance is achieved.

[0012] Optionally, the loop detector can be a logarithmic detector or a mean detector. When the dynamic range of the RF input signal is greater than a first preset threshold, the loop detector uses a logarithmic detector; when the peak-to-average power ratio of the RF input signal is greater than a second preset threshold, the loop detector uses a mean detector.

[0013] By adopting the above technical solution, when the dynamic range of the RF input signal is greater than the first preset threshold, a logarithmic detector is used, which can better adapt to input signals with a large dynamic range; when the peak-to-average power ratio (PAPR) of the RF input signal is greater than the second preset threshold, an average detector is used, which can better handle input signals with high PAPR, thereby improving the adaptability and control effect of the RF automatic level control device to input signals with different characteristics.

[0014] Optionally, the resistance value of the zero-point resistor and the capacitance value of the second capacitor are set according to the video bandwidth of the RF automatic level control device, so that the zero-point resistor and the second capacitor jointly determine the frequency position of the first-order zero.

[0015] By adopting the above technical solution, a precise quantization relationship for determining the first-order zero frequency position is given, providing clear guidance for circuit engineering design and ensuring the feasibility of dynamic performance optimization.

[0016] Optionally, the resistance value of the zero-point resistor and the capacitance value of the second capacitor satisfy the following relationship: 2π×f×C2×R0=1, where f is the video bandwidth of the RF automatic level control device, R0 is the resistance value of the zero-point resistor, and C2 is the capacitance value of the second capacitor.

[0017] By adopting the above technical solution, the resistance value of the zero-point resistor and the capacitance value of the second capacitor are matched and set according to the video bandwidth of the RF automatic level control device, and the frequency position of the first-order zero point is determined together. Without changing the steady-state characteristics of the second-order integral loop, the damping ratio of the loop system of the RF automatic level control device is increased, the response overshoot is reduced when responding to the step amplitude change of the RF input signal, and the loop adjustment time is shortened to achieve locking of the RF input signal.

[0018] Optionally, the first-order zero introduced by the second branch is used to increase the loop system damping ratio of the RF automatic level control device without changing the steady-state characteristics of the second-order integral loop, so as to reduce the response overshoot when responding to the step amplitude change of the RF input signal and shorten the loop adjustment time to lock the RF input signal.

[0019] By adopting the above technical solution, without changing the steady-state characteristics of the second-order integral loop, the damping ratio of the loop system of the RF automatic level control device is increased, the overshoot of the device when responding to the step amplitude change of the RF input signal is reduced, the loop adjustment time is shortened, and the locking of the RF input signal is achieved.

[0020] Optionally, the zero-point resistor is a variable resistor unit; the RF automatic level control device also includes a control logic unit, the output of which is connected to the control terminal of the variable resistor unit, for dynamically adjusting the resistance value of the variable resistor unit according to the current video bandwidth requirements.

[0021] By adopting the above technical solution, setting the zero-point resistor as a variable resistor unit, and using the control logic unit to dynamically adjust the resistance value of the variable resistor unit according to the current video bandwidth requirements, the RF automatic level control device can flexibly adapt to different video bandwidth requirements and optimize loop performance. This solution further enhances the adaptability and flexibility of the device by dynamically adjusting the resistance value of the variable resistor unit, improving its ability to adapt to different video bandwidths.

[0022] Optionally, the RF automatic level control device also includes a digital control interface and a digital-to-analog converter (DAC). The digital control interface is used to receive the target power digital quantity set by external commands. The input terminal of the DAC is connected to the digital control interface, and the output terminal of the DAC is connected to the non-inverting input terminal of the loop integrating operational amplifier to convert the target power digital quantity into an analog reference voltage.

[0023] By adopting the above technical solution, the target power digital quantity set by external command is received through the digital control interface, and then converted into an analog reference voltage by the digital-to-analog converter and connected to the loop integrating operational amplifier. This enables the digital setting of the target output power, allowing the RF automatic level control device to flexibly adjust the target output power according to external commands.

[0024] In a second aspect of this application, a transceiver is also provided, including the radio frequency automatic level control device of any of the foregoing.

[0025] In summary, one or more technical solutions provided in this application have at least the following technical effects or advantages: 1. The RF automatic level control device utilizes a front-end analog attenuator, directional coupler, loop detector, and loop integrating operational amplifier to form a closed-loop feedback system, which can stabilize the RF output signal power at the target value. The second-order integrating loop with a first-order zero can combine the advantages of fast response speed of the zero-order loop and strong anti-interference capability of the first-order integrating loop, avoiding the problems of easy loss of lock and large steady-state error of the traditional zero-order loop and slow response or even loss of lock of the first-order loop. It can better cope with the rapid amplitude changes of the input signal and achieve the effect of improving communication reliability. 2. By matching the loop parameters with the inherent characteristics of key components, the closed-loop system can be stably converged to an equilibrium state under various operating conditions, thus improving control accuracy. 3. It provides a precise quantization relationship for determining the frequency location of the first-order zero, offering clear guidance for circuit engineering design and ensuring the feasibility of dynamic performance optimization. Attached Figure Description

[0026] Figure 1 This is a frame diagram of a radio frequency automatic level control device provided in an embodiment of this application; Figure 2 This is a circuit diagram of a loop integrating operational amplifier provided in an embodiment of this application; Figure 3 This is a schematic diagram of an automatic radio frequency level control device provided in an embodiment of this application; Figure 4 This is a schematic diagram of the impulse response of the ALC control loop with the first-order closed-loop poles provided in the embodiments of this application; Figure 5 This is a schematic diagram of the step response of the ALC control loop with first-order closed-loop poles provided in an embodiment of this application; Figure 6 This is a schematic diagram of the acceleration response of the ALC control loop with first-order closed-loop poles provided in an embodiment of this application; Figure 7 This is a schematic diagram of the impulse response of the ALC control loop with second-order closed-loop poles provided in the embodiments of this application; Figure 8 This is a schematic diagram of the step response of the ALC control loop with second-order closed-loop poles provided in the embodiments of this application; Figure 9 This is a schematic diagram of the acceleration response of the ALC control loop with second-order closed-loop poles provided in an embodiment of this application. Detailed Implementation

[0027] To enable those skilled in the art to better understand the technical solutions in this specification, the technical solutions in the embodiments of this specification will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments.

[0028] In the description of the embodiments of this application, the words "for example" or "for instance" are used to indicate examples, illustrations, or explanations. Any embodiment or design that is described as "for example" or "for instance" in the embodiments of this application should not be construed as being more preferred or advantageous than other embodiments or design options. Rather, the use of the words "for example" or "for instance" is intended to present the relevant concepts in a specific manner.

[0029] In the description of the embodiments of this application, the term "multiple" means two or more. Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. The terms "comprising," "including," "having," and variations thereof all mean "including but not limited to," unless otherwise specifically emphasized.

[0030] The following is in conjunction with the appendix Figure 1 -Appendix Figure 9 The embodiments of this application will be described in detail.

[0031] This application provides a radio frequency automatic level control device. Figure 1 This is a framework diagram of an automatic radio frequency level control device provided in an embodiment of this application. The device includes: a front-end analog attenuator, a directional coupler, a loop detector, and a loop integrating operational amplifier. The front-end analog attenuator receives the radio frequency input signal; its control terminal is connected to the output terminal of the loop integrating operational amplifier; and its output terminal is connected to the input terminal of the directional coupler. The coupling terminal of the directional coupler is connected to the input terminal of the loop detector, which is used to detect the radio frequency output signal extracted by the directional coupler and generate a detection voltage. The non-inverting input terminal of the loop integrating operational amplifier is used to connect to... The input represents a reference voltage for the target output power. The inverting input of the loop integrator is connected to the output of the loop detector via an integrating proportional resistor to receive the detected voltage. The loop integrator is used to integrate the error signal between the detected voltage and the reference voltage to generate a loop control voltage that is fed back to the front-end analog attenuator. The loop integrator includes a feedback network connected between the inverting input and the output of the loop integrator. The feedback network includes a first branch and a second branch connected in parallel. The first branch includes a first capacitor, and the second branch includes a second capacitor and a zero-point resistor connected in series.

[0032] In the above embodiments, the RF automatic level control device utilizes a front-end analog attenuator, directional coupler, loop detector, and loop integrator to form a closed-loop feedback system, which can stabilize the RF output signal power at the target value. The second-order integrator loop with a first-order zero can combine the advantages of fast response speed of the zero-order loop and strong anti-interference capability of the first-order integrator loop, avoiding the problems of easy loss of lock and large steady-state error of the traditional zero-order loop and slow response or even loss of lock of the first-order loop. It can better cope with the rapid amplitude changes of the input signal and improve communication reliability.

[0033] This embodiment constructs a second-order closed-loop feedback control device with a first-order zero. The first capacitor, the second capacitor, and the zero-point resistor together form a second-order integral loop with a first-order zero for generating the loop control voltage. The RF ALC control device in this embodiment forms a closed-loop RF automatic level control loop through a front-end analog attenuator, a directional coupler, a loop detector, and a loop integrating operational amplifier. The core innovation is the establishment of a feedback network with two parallel branches at the inverting input and output of the loop integrating operational amplifier, forming a second-order integral loop with a first-order zero. Specifically, the front-end analog attenuator receives the RF input signal and adjusts the attenuation according to the loop control voltage. Its output signal is extracted by a directional coupler and converted into a detection voltage corresponding to the RF power by a loop detector. The detection voltage is input to the inverting input of the loop integrating operational amplifier via an integral proportional resistor, forming an error signal with the target power reference voltage at the non-inverting input. In the feedback network, the first capacitor of the first branch performs basic integration, and the zero-point resistor of the second branch is connected in series with the second capacitor to introduce a first-order closed-loop zero. The two work together to form a second-order integrating loop, which performs proportional-integral operation with lead correction on the error signal to generate the loop control voltage. The control voltage is fed back to the front-end analog attenuator to form a closed loop. The pole characteristics of the second-order integrating loop enable accurate tracking of fast-changing signals, and the first-order zero optimizes the loop dynamic performance, ultimately achieving rapid and stable locking of the RF output power. In related technologies, radio frequency ALC loops typically employ zero-order or first-order closed-loop structures. Zero-order loops are prone to lock-out and have large steady-state errors, while first-order integrator loops suffer from slow response speeds. The solution in this embodiment overcomes the exponential transition characteristics of traditional first-order loops by using a second-order integrator loop. Combined with dynamic optimization of first-order zeros, it solves the problem of slow response to rapidly changing amplitude signals such as step, impact, and acceleration signals. This improves the loop's anti-interference capability and steady-state tracking capability, avoids lock-out under large dynamic changes or interference, and significantly reduces steady-state errors. The RF ALC control device in this embodiment utilizes a second-order integral loop with a first-order zero, enabling the ALC loop to achieve amplitude locking in the microsecond range. This is far superior to the microsecond-level response of traditional first-order loops, perfectly meeting the short time slot requirements of burst frequency hopping communication. The first-order zero increases the loop damping ratio and reduces response overshoot without altering the steady-state characteristics of the second-order loop, preventing the loop from becoming uncontrollable or jittering due to rapid signal transitions. The second-order integral pole ensures accurate tracking of input signals with a large dynamic range, and the closed-loop structure stabilizes the RF output power at the target value with no significant steady-state error, significantly improving anti-interference capabilities.

[0034] The feedback network of the loop integrator operational amplifier includes two independent energy storage elements (a first capacitor and a second capacitor), which constitutes the second-order characteristic of the system. Compared with a first-order system with only a single energy storage element, the second-order system has a faster dynamic response potential. It can not only integrate the error (eliminating steady-state error) but also react to the changing trend of the error, thus enabling it to track the target value with faster acceleration. Simply put, by constructing a second-order integrator loop, this embodiment fundamentally improves the "order" of the system, giving it the foundation for rapid response to sudden signals. If speed is simply pursued (e.g., using an uncompensated second-order loop), the system will become unstable, producing severe overshoot and oscillations. This embodiment cleverly introduces a "first-order zero" into the second-order loop. This "first-order zero" is introduced by the "second capacitor and zero-point resistor connected in series" in the second branch. In the control system, the "zero" plays a crucial role in stabilization and acceleration, which can be understood as a kind of "predictive" compensation. From the perspective of control theory, this zero provides the system with "phase lead" compensation. It effectively increases the phase margin of the loop, and phase margin is a key indicator of system stability. A larger phase margin results in a higher damping ratio, which manifests as reduced overshoot and suppressed oscillations. This zero-point resistor in the feedback network ensures that the feedback signal is related not only to the integral of the error but also to the rate of change (i.e., the derivative) of the error. When the input signal amplitude changes drastically, causing a rapid increase in error, this zero-point resistor immediately provides a "resistance" or "brake" signal proportional to the rate of change, preemptively suppressing excessive surges in the control voltage, thus effectively "suppressing overshoot."

[0035] Taking the application scenario of a burst FM communication system as an example, assuming the communication time slot is 60μs, the signal transmission attenuation difference between nodes reaches 30dB, the RF input signal has a step amplitude change, and the target output power needs to be stabilized at -20dBm. When the input signal in a certain time slot is -70dBm (small signal), and the next time slot jumps to -40dBm (a step increase of 30dB), the traditional first-order loop needs more than 100μs to complete the adjustment, exceeding the 60μs time slot, resulting in signal loss. When using the RF ALC device of this embodiment, the RF input signal, after passing through the front-end analog attenuator, is extracted by the directional coupler and converted into a detector voltage. The error signal formed by the RF input signal and the reference voltage is quickly calculated by the second-order integral loop with a first-order zero, generating the loop control voltage within 8μs to adjust the attenuation of the front-end analog attenuator. The entire process is completed within a 60μs time slot, and the RF output power is accurately locked at -20dBm, with no overshoot and no loss of lock, ensuring normal information exchange between frequency hopping communication nodes and completely solving the technical pain points of the traditional loop.

[0036] In an optional embodiment, the loop integrating operational amplifier includes a first operational amplifier, a first terminal of a first capacitor connected to the inverting input terminal of the first operational amplifier, and a second terminal of the first capacitor connected to the output terminal of the first operational amplifier; a first terminal of a zero-point resistor connected to the inverting input terminal of the first operational amplifier, and a second terminal of the zero-point resistor connected to the first terminal of a second capacitor, and a second terminal of the second capacitor connected to the output terminal of the first operational amplifier; a reference voltage is connected to the non-inverting input terminal of the first operational amplifier; one end of an integrating proportional resistor is connected to the output terminal of a loop detector, and the other end of the integrating proportional resistor is connected to the inverting input terminal of the first operational amplifier.

[0037] In the above embodiments, the connection method of each component in the loop integrating operational amplifier is clearly defined, so that the loop integrating operational amplifier performs integration operation on the error signal between the detector voltage and the reference voltage to generate a loop control voltage that is fed back to the front-end analog attenuator, thereby realizing a second-order integrating loop with a first-order zero, which provides a basis for the RF automatic level control device to achieve precise signal amplitude locking.

[0038] The first operational amplifier (op-amp) is the core component of the loop integrator op-amp. Its non-inverting input serves as the non-inverting input of the loop integrator op-amp, its inverting input serves as the inverting input of the loop integrator op-amp, and its output serves as the output of the loop integrator op-amp. The first capacitor of the first branch is directly connected across the inverting input and output of the first op-amp, realizing the basic integration function. The zero-point resistor and the second capacitor of the second branch are first connected in series and then across the inverting input and output of the first op-amp, with the zero-point resistor closer to the inverting input and the second capacitor closer to the output. This fixed connection sequence forms a first-order closed-loop zero. The first branch (pure integrator) contains only the first capacitor (C1), whose admittance is sC1. It contributes a pure integral term (1 / s) to the transfer function, forming the basis of the integrator loop. The second branch (integrator with a zero) consists of the zero-point resistor (R0) and the second capacitor (C2) in series. Its impedance is R0 + 1 / (sC2). This series structure is key to introducing the "zero". When these two branches are connected in parallel, the total impedance Zf of the entire feedback network determines the core characteristics of the loop, and its transfer function is Vout / Vin = -Zf / Zin (where Zin is the integral proportional resistor). Derivation reveals that due to the presence of two independent capacitors (C1 and C2), s will appear in the denominator. 2 This term constitutes the "second-order" characteristic, ensuring a fast response; at the same time, due to the existence of R0, a term such as (1+s*R0*C2) will appear in the numerator of the transfer function, which introduces a "first-order zero", providing a crucial phase margin and ensuring "stability".

[0039] In an optional embodiment, the front-end analog attenuator has a voltage control slope, the loop detector has a detection slope, and the ratio of the capacitive reactance of the loop integrating operational amplifier to the resistance of the integrating proportional resistor is set according to the voltage control slope and the detection slope to achieve a balanced loop of the RF automatic level control device.

[0040] In the above embodiments, the ratio of the capacitive reactance of the loop integrating operational amplifier to the resistance of the integrating proportional resistor is set according to the voltage control slope of the front-end analog attenuator and the detection slope of the loop detector, so that the loop of the RF automatic level control device can reach a balanced state.

[0041] The voltage control slope of the front-end analog attenuator characterizes the adjustment magnitude of attenuation / gain caused by changes in control voltage, in dB / V. It represents the change in attenuation by dB for every 1V change in control voltage. The detection slope of the loop detector characterizes the output amplitude of the detection voltage corresponding to changes in RF power, in V / dB. It represents the change in output voltage by volts for every 1dB change in input power. The ratio of the capacitive reactance to the proportional-integral resistor value of the loop integrating operational amplifier characterizes the proportional-integral adjustment coefficient of the operational amplifier for the error signal. The above three parameters are key linkage parameters of the ALC closed-loop circuit. The ratio of the capacitive reactance of the loop integrating operational amplifier to the resistance of the integrating proportional resistor is not set independently, but is matched with the voltage control slope of the front-end analog attenuator and the detection slope of the loop detector as a reference. Through this parameter matching, the voltage regulation, power detection, and error calculation of the loop form a precise numerical correspondence, offsetting the inherent characteristic differences of the parameters of each module, so that the input and output of the closed-loop circuit achieve dynamic balance. This ensures that the RF output power can be stably locked at the target value corresponding to the reference voltage, avoiding loop bias, increased steady-state error, or even loss of lock-up caused by parameter mismatch. In this embodiment, through parameter linkage matching, the regulation, detection, and calculation of each module are precisely matched, the closed-loop circuit can stably achieve dynamic balance, the deviation between the RF output power and the target power is significantly reduced, and the amplitude stabilization accuracy is greatly improved.

[0042] In an optional embodiment, the capacitance values ​​of the first capacitor, the second capacitor, and the integral proportional resistor satisfy the following relationship: 2π×f×(C1+C2)×R1=a×b; where f represents the video bandwidth of the RF automatic level control device, R1 represents the resistance value of the integral proportional resistor, C1 represents the capacitance value of the first capacitor, C2 represents the capacitance value of the second capacitor, a represents the voltage control slope of the front-end analog attenuator, and b represents the detection slope of the loop detector.

[0043] In the above embodiments, the radio frequency automatic level control device can receive radio frequency input signals, process them through a front-end analog attenuator, a directional coupler, a loop detector, and a loop integrating operational amplifier, and generate loop control voltage feedback adjustment through a second-order integrating loop with a first-order zero. Based on the specific relationship between the capacitance values ​​of the first capacitor and the second capacitor and the resistance value of the integral proportional resistor, combined with the voltage control slope of the front-end analog attenuator and the detection slope of the loop detector, loop balance is achieved.

[0044] The capacitive reactance of the loop integrator operational amplifier is determined by the equivalent capacitance of the parallel connection of the first and second capacitors in the feedback network, and the capacitive reactance formula is X. C =1 / [2π×f×(C1+C2)], while the capacitive reactance X of the loop integrator is... C The ratio of the integral proportional resistor's resistance R1 must satisfy: X C / R1=1 / (a×b), that is, 2π×f×(C1+C2)×R1=a×b. In the formula, f, a and b are predetermined. Therefore, in the design, the resistance value R1 of the integral proportional resistor, the capacitance value C1 of the first capacitor and the capacitance value C2 of the second capacitor must satisfy this constraint relationship.

[0045] In an optional embodiment, the loop detector is a logarithmic detector or a mean detector, wherein when the dynamic range of the RF input signal is greater than a first preset threshold, the loop detector uses a logarithmic detector; when the peak-to-average power ratio of the RF input signal is greater than a second preset threshold, the loop detector uses a mean detector.

[0046] In the above embodiments, when the dynamic range of the RF input signal is greater than the first preset threshold, a logarithmic detector is used, which can better adapt to input signals with a large dynamic range; when the peak-to-average power ratio (PAPR) of the RF input signal is greater than the second preset threshold, an average detector is used, which can better handle input signals with high PAPR, thereby improving the adaptability and control effect of the RF automatic level control device to input signals with different characteristics.

[0047] Logarithmic detectors and mean detectors each possess detection characteristics adaptable to different RF signal features. Logarithmic detectors offer linear detection capability for RF signals with a wide dynamic range, while mean detectors accurately extract the average power of peak-to-average power (PAP) modulated signals and convert it into a corresponding detection voltage. The two key characteristics of the RF input signal (dynamic range and PAP) are compared with a first preset threshold and a second preset threshold, respectively. When the dynamic range exceeds the threshold, a logarithmic detector is selected; when the PAP exceeds the threshold, an mean detector is selected. For example, the first preset threshold is 30 dB (or another value), and the second preset threshold is 10 dB (or another value). When the dynamic range is less than or equal to the first preset threshold, a mean detector can also cover the range and should be used preferentially. When the dynamic range exceeds the first preset threshold, a logarithmic detector must be used. When the PAP is less than or equal to the second preset threshold, the signal amplitude fluctuation is small, and either type of detector can be used. When the PAP exceeds the second preset threshold, an mean detector must be used. The selection rules for the loop detector ensure that it always operates within the optimal detection range, guaranteeing that the detected voltage accurately reflects the power characteristics of the RF signal. This avoids detection deviations caused by mismatches between the detector type and signal characteristics, leading to more accurate error calculations and control voltage generation by the subsequent loop integrating operational amplifier, ultimately ensuring the accuracy and stability of the ALC loop amplitude stabilization control. This embodiment allows for the selection of a suitable loop detector type based on the characteristics of the RF input signal, ensuring a high degree of match between the detector's detection characteristics and the RF input signal characteristics. This avoids detection deviations, ensuring the detected voltage accurately reflects the actual power characteristics of the signal, providing a precise calculation reference for the loop integrating operational amplifier, and reducing loop control errors from the source. By switching between two detector types, this device can adapt to wide dynamic range signals caused by large attenuation differences between nodes in burst frequency hopping communication, as well as peak-to-average power ratio (PAPR) modulation signals such as OFDM and high-order QAM, breaking through the limitations of traditional single-detector scenarios and expanding the device's application range.

[0048] In an optional embodiment, the resistance value of the zero-point resistor and the capacitance value of the second capacitor are set according to the video bandwidth matching of the radio frequency automatic level control device, so that the zero-point resistor and the second capacitor jointly determine the frequency position of the first-order zero.

[0049] In the above embodiments, the resistance value of the zero-point resistor and the capacitance value of the second capacitor are set according to the video bandwidth of the RF automatic level control device. This allows the zero-point resistor and the second capacitor to jointly determine the frequency position of the first-order zero. This helps to increase the damping ratio of the loop system, reduce the response overshoot, shorten the loop settling time, and achieve locking of the RF input signal without changing the steady-state characteristics of the second-order integral loop.

[0050] In this embodiment, the first-order closed-loop zero of the RF ALC control device is uniquely determined by the series branch of the zero-point resistor and the second capacitor. The RC time constant of this resistor-capacitor series structure directly determines the frequency position of the zero point, which is the core frequency characteristic parameter for optimizing dynamic performance in the second-order integral loop. By introducing the video bandwidth (which determines the frequency of signal amplitude changes that the loop can track), a key design parameter of the RF ALC loop, the parameter matching of the zero-point resistor and the second capacitor is directly based on the video bandwidth. By adapting the parameters of the zero-point resistor and the second capacitor to the video bandwidth, the first-order zero frequency position determined by the two is precisely matched with the video bandwidth, so that the first-order zero can play a role within the effective signal response bandwidth of the loop. Dynamic performance is optimized by adjusting the loop root locus distribution without changing the inherent steady-state characteristics of the second-order integral loop. This embodiment achieves a high degree of compatibility between the zero-point frequency and the video bandwidth. The first-order zero can adjust the root locus distribution within the effective response bandwidth of the loop, increasing the loop damping ratio, reducing response overshoot, and simultaneously improving response speed, thus achieving the dual effect of "fast response + low overshoot," solving the pain point of traditional loops where these two aspects cannot be simultaneously achieved. The video bandwidth determines the frequency of signal amplitude changes that the loop can track. After the zero-point frequency is matched with the video bandwidth, the loop can accurately track rapidly changing amplitude signals such as step, impulse, and acceleration within that bandwidth, fully adapting to the signal change characteristics of burst frequency hopping communication. The zero-point frequency is set only by matching the zero-point resistor and the second capacitor, without changing the pole characteristics of the second-order integral loop. Therefore, the core steady-state performance of the loop, such as steady-state tracking capability, anti-interference capability, and steady-state error, remains unchanged, achieving the design goal of "dynamic performance optimization and steady-state performance invariance."

[0051] In an optional embodiment, the resistance value of the zero-point resistor and the capacitance value of the second capacitor satisfy the following relationship: 2π×f×C2×R0=1, where f is the video bandwidth of the radio frequency automatic level control device, R0 is the resistance value of the zero-point resistor, and C2 is the capacitance value of the second capacitor.

[0052] In the above embodiment, the resistance value of the zero-point resistor and the capacitance value of the second capacitor are matched and set according to the video bandwidth of the RF automatic level control device to jointly determine the frequency position of the first-order zero point. Without changing the steady-state characteristics of the second-order integral loop, the damping ratio of the loop system of the RF automatic level control device is increased, the response overshoot is reduced when responding to the step amplitude change of the RF input signal, and the loop adjustment time is shortened to lock the RF input signal.

[0053] The first-order closed-loop zero is uniquely determined by the series RC structure of the zero-point resistor and the second capacitor. The characteristic frequency of this RC structure (i.e., the frequency of the first-order zero) follows the basic laws of radio frequency circuits and is determined by the RC time constant. The characteristic frequency formula is f0 = 1 / (2π×R0×C2). In order for the first-order zero to play a dynamic optimization role within the effective response bandwidth of the loop, the characteristic frequency of the first-order zero must be exactly equal to the video bandwidth of the device (f0=f, where f is the video bandwidth). Based on this, the characteristic frequency formula is transformed to derive the core quantitative formula 2π×f×C2×R0=1.

[0054] In an optional embodiment, the first-order zero introduced by the second branch is used to increase the loop system damping ratio of the RF automatic level control device without changing the steady-state characteristics of the second-order integral loop, so as to reduce the response overshoot when responding to the step amplitude change of the RF input signal and shorten the loop settling time to lock the RF input signal.

[0055] In the above embodiments, without changing the steady-state characteristics of the second-order integral loop, the damping ratio of the loop system of the RF automatic level control device is increased, the overshoot of the device when responding to the step amplitude change of the RF input signal is reduced, the loop adjustment time is shortened, and the locking of the RF input signal is achieved.

[0056] The second-order integral loop with first-order zeros constructed in this embodiment is a typical second-order control system. The poles of the second-order integral loop determine the steady-state characteristics of the loop (steady-state tracking capability, anti-interference capability, and steady-state error). The first-order zeros introduced by the second branch only change the root locus distribution of the loop and do not change the inherent characteristics of the second-order poles. Therefore, they will not have any negative impact on the steady-state performance of the loop. The first-order zeros will have a frequency pulling effect on the poles of the second-order loop, which will significantly increase the damping ratio of the loop system. The damping ratio is the core parameter that determines the dynamic response of the second-order system and is directly related to the response overshoot and settling time. The increased damping ratio makes the loop approach the critically damped state from the underdamped state. It retains the fast response foundation of the second-order integral loop compared with the traditional first-order loop, and can effectively reduce the response overshoot when the step amplitude of the RF input signal changes. At the same time, it further shortens the loop settling time, and finally achieves fast, overshoot-free, and accurate locking of fast-changing signals. Moreover, this dynamic optimization process does not change the steady-state performance after the loop is locked. The first-order zero-point method only optimizes the dynamic response without changing the pole characteristics of the second-order integral loop. The core performance, such as steady-state tracking capability, anti-interference capability, and steady-state error, remains unchanged after loop locking. It can still stably lock the RF output power at the target value without additional deviation. It effectively solves the problem of underdamping of a simple second-order loop, reducing the overshoot of the response to step amplitude change signals to less than 1%. While increasing the damping ratio and reducing the overshoot, it retains the fast response characteristics of the second-order integral loop, shortening the loop adjustment time from hundreds of microseconds in the traditional first-order loop to less than 10 microseconds, which fully meets the locking requirements of short time slots in burst frequency hopping communication.

[0057] In an optional embodiment, the zero-point resistor is a variable resistor unit; the radio frequency automatic level control device further includes a control logic unit, the output of which is connected to the control terminal of the variable resistor unit, for dynamically adjusting the resistance value of the variable resistor unit according to the current video bandwidth requirements.

[0058] In the above embodiments, by setting the zero-point resistor as a variable resistor unit and dynamically adjusting the resistance value of the variable resistor unit according to the current video bandwidth requirements using the control logic unit, the RF automatic level control device can flexibly adapt to different video bandwidth requirements and optimize loop performance. This solution further enhances the adaptability and flexibility of the device by dynamically adjusting the resistance value of the variable resistor unit, improving its ability to adapt to different video bandwidths.

[0059] The original static "zero-point compensation network" is upgraded to a dynamically reconfigurable intelligent compensation system. It introduces a closed-loop interaction between variable resistor units (such as digital potentiometers, DAC-controlled MOSFET arrays, or switched-capacitor-resistor arrays) and the control logic unit, enabling real-time adaptive adjustment of loop compensation parameters according to the system's operating mode (video bandwidth VBW). Once the video bandwidth f changes, the control logic immediately calculates the new target resistance value based on a preset algorithm or lookup table (LUT) and drives the variable resistor unit to adjust its resistance to that target value. By dynamically adjusting the zero-point resistor value, the ALC loop becomes a system with time-varying parameters but always in an optimal damped state. Essentially, it implements a gain scheduling or pole configuration adaptive strategy at the hardware level.

[0060] In an optional embodiment, the radio frequency automatic level control device further includes a digital control interface and a digital-to-analog converter (DAC); the digital control interface is used to receive a target power digital quantity set by an external command; the input terminal of the DAC is connected to the digital control interface; and the output terminal of the DAC is connected to the non-inverting input terminal of a loop integrating operational amplifier (LOA) to convert the target power digital quantity into an analog reference voltage.

[0061] In the above embodiments, the target power digital quantity set by external instructions is received through the digital control interface, and then converted into an analog reference voltage by the digital-to-analog converter and connected to the loop integrating operational amplifier. This enables the digital setting of the target output power, allowing the RF automatic level control device to flexibly adjust the target output power according to external instructions.

[0062] This embodiment achieves digital, precise, and remotely controllable adjustment of the target power of the ALC loop by adding a new digital control link. The digital control interface acts as a "digital command receiver," and the digital-to-analog converter (DAC) acts as a "digital-to-analog signal converter." The two work together to connect external digital control commands with the analog control requirements of the loop integrating operational amplifier, without changing the original closed-loop amplitude stabilization architecture, thus optimizing the target power setting method. The digital control interface is responsible for receiving the target power digital quantity (such as binary digital signals or hexadecimal commands) sent from external sources (such as a host computer, main control module, or communication node). This digital quantity directly corresponds to the target power value output by the radio frequency (such as -20dBm or -18dBm). It also has signal isolation and anti-interference functions to ensure that there is no distortion or error during digital command transmission, avoiding power setting deviations caused by command errors. After receiving the target power digital signal, the digital-to-analog converter converts the discrete digital signal into a continuous analog reference voltage through internal conversion circuits (such as resistor networks and capacitor filters). This reference voltage is then connected to the non-inverting input of the loop integrating operational amplifier. Subsequently, the second-order integrating loop performs error calculations and controls the voltage output. Finally, it adjusts the attenuation of the front-end analog attenuator to ensure that the RF output power accurately matches the target value set by the digital command. This achieves fully automated control of the entire process: "digital command input → analog reference voltage conversion → closed-loop amplitude stabilization and locking".

[0063] Optionally, the RF automatic level control device in this embodiment is applied to a burst frequency hopping communication system or a pulse radar system; the RF output signal extracted by the directional coupler includes a burst RF pulse signal with a time slot width of less than 60 microseconds; the second branch provides a response to the rate of change of the error signal, so that the RF automatic level control device locks the amplitude change of the RF input signal for less than 10 microseconds; the RF automatic level control device is applied to the burst frequency hopping communication system to lock the amplitude of the RF output signal to the target output power in each communication time slot.

[0064] When receiving or transmitting signals, RF link channels encounter situations where the dynamic range of the input signal changes rapidly. Simultaneously, the input signal amplitude may experience various amplitude steps, pulse impulses, and acceleration variations. This translates to a large dynamic range and various forms of amplitude variation in the output signal. In some applications, it is necessary to maintain stable output power at a fixed value despite these input signal variations. This necessitates the introduction of Automatic Loop Gain Control (ALC) into the link, ensuring that the output signal power remains stable within a certain range during normal operation.

[0065] In some network applications, the system has multiple communication nodes that need to communicate with each other via bursts. If the distances between the communication nodes are different, the signal attenuation values ​​during transmission will be inconsistent. During communication, the signal power received by a fixed node from other nodes may vary, exhibiting a certain dynamic range. Because the system uses burst frequency hopping communication, each node's communication time slot is small, requiring the node communication link to have a fast real-time response speed to handle input signals with a large dynamic range. Ensuring a rapid response to input signals of varying magnitudes within its own time slot requires a fast stabilization speed from the ALC control loop. When the input signal in the previous time slot is large, the ALC control loop adjusts the gain control circuit in the link to track and stabilize it to the required fixed value. If the input signal in the next time slot is small, the ALC needs to readjust the value of the link gain control circuit to stabilize the output to the required fixed value. If this adjustment time is slow, exceeding the allowed adjustment time of the time slot, the time slot will switch to the next node, preventing the link from sampling the signal information within that time slot. This results in the loss of information from a certain node, which is unacceptable.

[0066] Traditional ALC control loops typically employ either zero-order or first-order loops. Zero-order loops have a faster response time and reach steady-state equilibrium, but due to the lack of open-loop poles, they are prone to instability in the link system under conditions of nonlinear input signal changes or significant interference. This leads to increasingly larger steady-state tracking errors after equilibrium, causing the ALC control loop to lose lock. First-order loops generally use integrating operational amplifiers, which form type-1 poles, improving the system's tracking and anti-interference capabilities. However, they operate in an overdamped state, and their response time is affected by the type-1 system, transitioning exponentially towards equilibrium. The response time during this transition is determined by the initial error magnitude and the system's own adjustment speed. With a large dynamic range of the input signal, this speed may not be sufficient to complete tracking within a short timeframe, such as 50µs, resulting in the aforementioned missed signal at a certain node within a short time slot.

[0067] Due to the inherent pole characteristics of zero-order and first-order closed-loop circuits, they cannot generate corresponding closed-loop zeros and cannot form proportional derivatives in the form of PID. Therefore, the overall loop cannot respond in real time to rapidly changing signal amplitudes such as step response and acceleration step, and cannot perform real-time ALC amplitude locking of signals within the microsecond time range. This necessitates higher-order closed-loop circuits in the RF system to improve performance.

[0068] When the input signal exhibits non-real-time linear amplitude changes, a first-order integrator loop system can stabilize the input signal to a preset stable value. However, when the input signal amplitude changes with steps, impulses, or accelerations, the first-order closed-loop system cannot stabilize it to the required preset value. The result is either a loss of lock-in in the closed loop leading to maximum or minimum link gain, or stabilization to a fixed value based on the constant acceleration of the input signal, but this value differs from the final required preset value, failing to precisely lock to the required link gain value.

[0069] To address the various amplitude responses of RF links to real-time input signals, such as step, impulse, and acceleration, and to stabilize the output signal to the required gain value in real time, fast locking, and accurately, it is necessary to increase the order of the ALC control loop to achieve precise tracking.

[0070] This application provides a real-time radio frequency (RF) control device with high-order poles and zeros, used to feed back the proportional-integral (PII) voltage of the output signal as a loop control voltage to the front end of the RF link. The device includes a front-end analog attenuator, a directional coupler, a loop detector, and a loop integrating operational amplifier (OPA). The front-end analog attenuator receives the input dynamic signal passing through the link and the loop control voltage output by the loop integrating OPA, and sends the output to the directional coupler via the link. The directional coupler extracts the output signal and sends it to the loop detector. The loop detector sends the loop detection voltage through an integrating proportional resistor to the negative terminal of the loop integrating OPA. The positive terminal of the loop integrating OPA is the detection voltage value corresponding to the output signal in steady state. A capacitor is connected in parallel between the negative terminal and the output terminal of the loop integrating OPA to form a second-order integrating capacitor, one of which is connected in series with the zero-point resistor. That is, based on a first-order loop, a series connection of a capacitor and a resistor is added in parallel between the negative terminal and the output terminal of the loop integrating OPA, and this capacitor is connected in series with the zero-point resistor, forming a second-order loop first-order zero-point architecture.

[0071] When the signal has a large dynamic range, a logarithmic detector is used; when the signal requires mean detection and is a modulation method with a high peak-to-average power ratio, a mean detector is used. The resistance value of the integral proportional resistor needs to balance the detector's driving capability and the loop response speed. The ratio of the capacitive reactance of the loop integrating operational amplifier to the integral proportional resistor value is c. If the voltage control slope of the front-end analog attenuator is adB / V and the detection slope of the loop detector is bV / dB, c = 1 / ab must be satisfied. The zero-point resistor value and the corresponding integrating capacitor (corresponding to the aforementioned second capacitor) form a mutual couple. The integrating capacitor value is C (corresponding to the capacitance value C2 of the aforementioned second capacitor), and the zero-point resistor value is d (corresponding to the resistance value R0 of the aforementioned zero-point resistor). Then, 2πf × C × d = 1 is satisfied, where f is the required video bandwidth.

[0072] This application proposes a second-order closed-loop circuit with a closed-loop zero, primarily manifested in the integrator operational amplifier section of the loop. Compared to a first-order closed-loop circuit, this application adds a first-order closed-loop pole and a first-order closed-loop zero, forming a second-order closed-loop circuit with a first-order zero. This integrator circuit is located in the ALC feedback control section of the RF link, and it feeds back the proportional-integral function of the detector voltage of the output signal to the front-end analog attenuator in the link to provide the ALC control voltage.

[0073] This application introduces a second-order integrator operational amplifier loop based on a first-order integrator operational amplifier, and also introduces a first-order closed-loop zero. The positive terminal of the operational amplifier is connected to the detector voltage value corresponding to the steady-state output signal. The negative terminal of the operational amplifier is connected to an integral-proportional resistor, which is then connected to the loop detector voltage value corresponding to the real-time amplitude on the detector in the RF link. The negative feedback terminal of the operational amplifier is connected to a second-stage proportional-integral capacitor and a first-stage zero resistor. The integral output of the operational amplifier provides the loop control voltage. This second-order closed-loop pole-integrator loop can respond in real time to RF input signals with rapidly changing amplitudes, such as steps, impulses, and accelerations, performing amplitude stabilization (ALC) functionality. The second-order closed-loop integrator loop with a first-order zero does not change the inherent characteristics of a second-order loop; the first-order zero makes the overall loop respond to the ALC control loop faster in real time.

[0074] Figure 2 This is a circuit diagram of the loop integrating operational amplifier in the real-time radio frequency control device of this application. The second-order integrating capacitor in the diagram includes the aforementioned first capacitor and second capacitor. Figure 3 This diagram illustrates an RF automatic level control (ALC) device with a second-order integrator loop featuring a closed-loop zero. The ALC control loop in the RF link primarily consists of a front-end analog attenuator, a directional coupler, a loop detector, and a loop integrator operational amplifier. The front-end analog attenuator adapts to the dynamic range of the input signal through its gain variation, attenuating large signals proportionally and reducing attenuation for small signals to increase gain. The directional coupler provides the extracted output signal to the loop detector for sampling, forming the ALC control loop. The loop detector converts the extracted output signal into an approximately linear voltage value for calculations by the subsequent operational amplifier. Logarithmic detectors are generally used when the signal has a large dynamic range; average detectors are generally used when the signal requires mean detection and has a high peak-to-average power ratio (PAPR). The integrator operational amplifier contains a capacitor integration stage, which improves the system's steady-state tracking capability and anti-interference ability through the integrating capacitor.

[0075] When the positive terminal of the loop integrator is connected to the steady state, the output signal corresponds to the detector voltage value. When the signal is locked by ALC control, its output amplitude corresponds to the voltage value input to the positive terminal.

[0076] The loop integrator is connected to a proportional-integrator resistor at its negative terminal. This resistor is connected to the voltage corresponding to the real-time amplitude on the detector in the RF link. The value of this proportional-integrator resistor at the negative terminal of the ALC control loop needs to be set according to the driving output capability of the detector in the loop. To ensure loop response speed, this value needs to be small, but a small value requires a larger output capability from the detector in the ALC control loop. Therefore, a compromise is needed to ensure that the resistor value satisfies both the detector driving capability and the loop response speed.

[0077] The ratio *c* of the impedance of the integrating operational amplifier's capacitor to the resistance (integral proportional resistor) at the negative input of the integrating operational amplifier is the value that the ALC control loop needs to achieve balance. If the voltage control slope of the analog attenuator at the front end of the loop is *adB / V*, the detection slope of the detector in the loop is *bV / dB*, and the proportional gain of the integrating operational amplifier is *c*, then the dynamic change equation a*b*c=1 is satisfied when the loop is balanced. Therefore, we know that *c*=1 / ab. Thus, given the input resistance value, we can determine the value of the integrating operational amplifier's capacitor.

[0078] The zero-point resistance value must form a mutual couple with the integrating capacitor. If the integrating capacitor value is C, then the zero-point resistance value d must satisfy 2πf × C × d = 1, where f is the required video bandwidth. The zero-point resistance and the integrating capacitor together constitute the second-order integrator loop.

[0079] In the second-order closed-loop pole-integral loop architecture, the open-loop gain brought by the first-order closed-loop zeros can be set to be large, which can greatly improve the time response characteristics of the second-order loop and enable it to enter the loop-locked state more quickly.

[0080] By introducing another closed-loop pole into the existing first-order closed-loop circuit of the RF link, a second-order closed-loop circuit is formed in the RF link. This results in a power of two in the denominator of the closed-loop gain expression. This second-order loop ensures that when the input signal amplitude changes with steps, impulses, or accelerations, the RF link can track the changes in the input signal in real time and accurately, stabilizing the signal to the required gain value.

[0081] If the damping parameter of the second-order loop is chosen too small, the system may become dynamically uncontrollable, resulting in a longer link power gain lock-in time, making it difficult for the ALC settling time to converge, and even causing the link to lose lock-in, leading to instability under rapidly changing input signal amplitudes. Here, a closed-loop zero can be introduced into the system, forming a second-order system with a zero. This does not change the natural frequency or the steady-state error after lock-in, but it increases the system's damping ratio, reducing the system response overshoot, shortening the ALC settling time, and optimizing the dynamic performance of the entire closed-loop system. Since the introduction of the closed-loop zero does not affect system stability, the open-loop gain of the RF link can be chosen to be relatively large, ensuring a good ALC lock-in time.

[0082] When the ALC control loop is working normally, the input signal changes. The front-end analog attenuator initially operates at the previous control voltage state, maintaining its previous gain value. This signal is then transmitted in real-time to the loop detector via the output directional coupler. The detector converts this signal into a real-time dynamic voltage value, which is then supplied to the subsequent operational amplifier circuit. The operational amplifier circuit adjusts its output voltage using proportional or integral calculations, and then provides this voltage to the front-end analog attenuator to form a closed loop. The front-end analog attenuator adjusts its gain value according to the latest real-time control voltage, thus forming a dynamic ALC control loop until it reaches the voltage value corresponding to the required output power set at the loop operational amplifier. When the loop operational amplifier uses an integrating operational amplifier, ALC control is achieved through an integrating capacitor. After the ALC control loop stabilizes, the steady-state error output of the operational amplifier should be zero. However, during the transition of the ALC control loop, the capacitor charges to stabilize the attenuator voltage. After stabilization, the capacitor, based on its Q value, begins to discharge to maintain the current attenuator control voltage. After discharging to a certain extent, the loop needs to recharge and track the voltage again, thus maintaining stability in this cyclical process.

[0083] Compared to a first-order closed-loop circuit, this application adds a first-order closed-loop pole and a first-order closed-loop zero, forming a second-order closed-loop circuit with a first-order zero. This integrator circuit is located in the ALC feedback control section of the RF link. It proportionally integrates the detector voltage of the output signal and feeds it back to the front-end analog attenuator in the link to provide the ALC control voltage.

[0084] Based on the first-order loop, a series connection of a capacitor and a resistor is added between the negative terminal and the output terminal of the loop integrator. The capacitor forms a second-order integrating capacitor, which is connected in series with the zero-point resistor to form a second-order loop first-order zero-point architecture.

[0085] This application introduces a second-order integrator operational amplifier loop based on a first-order integrator operational amplifier, and also introduces a first-order closed-loop zero. The positive terminal of the operational amplifier is connected to the detector voltage value corresponding to the steady-state output signal. The negative terminal of the operational amplifier is connected to an integrator-proportional resistor, which is then connected to the loop detector voltage value corresponding to the real-time amplitude on the detector in the RF link. The negative feedback terminal of the operational amplifier is connected to a second-stage proportional-integrator capacitor and a first-stage zero-point resistor. The integral output of the operational amplifier provides the loop control voltage. This second-order closed-loop pole-integrator loop can handle RF input signals with rapidly changing amplitudes, such as steps, impulses, and accelerations, in real time.

[0086] The second-order closed-loop integral circuit with first-order zeros does not change the natural characteristics of the second-order loop. The first-order zeros enable the overall loop to respond to the ALC control loop in real time faster.

[0087] Traditional ALC control loops use first-order closed-loop poles without closed-loop zeros, operating in an overdamped state. They cannot lock the signal amplitude in real time for rapidly changing input signals, only for linearly changing signals, and their locking speed for linear signals is slow, on the order of approximately 100µs. This application utilizes a second-order integral loop with closed-loop zeros in the RF link. This allows for real-time handling of rapidly changing RF input signals, such as steps, impulses, and accelerations, improving the ALC amplitude stabilization locking speed to within 10µs, achieving better dynamic performance.

[0088] Figure 4 , Figure 5 , Figure 6 These are schematic diagrams of the impulse response, step response, and acceleration response of the ALC control loop with first-order closed-loop poles. Figures 4-9 The horizontal axis represents the number of units of time, for example, one unit of time represents 10us, and the vertical axis represents the difference between the reference voltage and the detector voltage, in V. It can be seen that the first-order loop has a slow tracking speed and poor time-domain characteristics when it corresponds to the changes in impulse and step input signals, while the acceleration input signal will cause the loop to lose lock, and the amplitude of the output signal and the input signal will change more and more with time.

[0089] Figure 7 , Figure 8 , Figure 9 These are schematic diagrams illustrating the impact response, step response, and acceleration response of the second-order closed-loop ALC control loop provided in this application embodiment. As can be seen, the second-order loop of this application tracks changes in impact and step input signals more quickly. With acceleration input signals, the output signal changes with the input signal, demonstrating its ability to track input signals. Taking the step response as an example, a comparison is made... Figure 5 and Figure 8 On a scale with a horizontal axis of 10 μs, the settling time of a traditional first-order loop exceeds 10 units of time (i.e., >100 μs), while the settling time of the proposed solution is reduced to less than 2 units of time (i.e., <20 μs), and the response overshoot is extremely small, with both locking speed and stability improved by orders of magnitude.

[0090] This application also provides a transceiver including the radio frequency automatic level control device in any of the foregoing embodiments.

[0091] As the core module of the transceiver, the RF Automatic Level Control (ALC) device inherits the core technological advantages of the aforementioned embodiments. It features a second-order integral loop with a first-order zero, precise parameter matching, detector scenario adaptation, and dynamic adjustment of variable resistors. Based on the transceiver's operating mode (e.g., burst frequency hopping, continuous communication), it automatically adapts to the dynamic range, peak-to-average power ratio, and video bandwidth requirements of the RF signal, achieving rapid and accurate amplitude stabilization of the transceiver's RF signal. Whether it's the transceiver's transmit link (requiring stable output power at the target value to avoid signal distortion and module saturation) or the receive link (requiring stable received signal amplitude to adapt to subsequent demodulation modules), the ALC device can ensure stable RF signal amplitude through closed-loop feedback adjustment, thereby guaranteeing the transceiver's communication reliability. This transceiver possesses an RF automatic level control function, enabling the RF output signal power to be stabilized at the target value. A second-order integral loop with a first-order zero can increase the damping ratio of the loop system, reduce the response overshoot, and shorten the loop settling time to lock the RF input signal. Loop parameters can be set to achieve loop balance based on the voltage control slope of the front-end analog attenuator and the detection slope of the loop detector. A suitable detector can be selected based on the dynamic range and peak-to-average power ratio of the RF input signal. The first-order zero frequency position can be determined by setting the zero-point resistor and second capacitor parameters according to the video bandwidth. The zero-point resistor value can be dynamically adjusted. The target power digital value set by external commands can be converted into an analog reference voltage. Suitable for burst frequency hopping communication or pulse radar systems, it can quickly lock the amplitude change of the RF input signal and lock the RF output signal amplitude to the target output power within the communication time slot.

[0092] The foregoing description is merely an exemplary embodiment of this disclosure and should not be construed as limiting the scope of this disclosure. Any equivalent changes and modifications made in accordance with the teachings of this disclosure shall still fall within the scope of this disclosure. Other embodiments of this disclosure will be readily apparent to those skilled in the art upon consideration of the disclosure herein.

[0093] This application is intended to cover any variations, uses, or adaptations of this disclosure that follow the general principles of this disclosure and include common knowledge or customary techniques in the art that are not described in this disclosure.

Claims

1. A radio frequency automatic level control device, characterized in that, include: The front-end analog attenuator, directional coupler, loop detector, and loop integrator operational amplifier, among which, The front-end analog attenuator receives the radio frequency input signal, the control terminal of the front-end analog attenuator is connected to the output terminal of the loop integrating operational amplifier, and the output terminal of the front-end analog attenuator is connected to the input terminal of the directional coupler. The coupling end of the directional coupler is connected to the input end of the loop detector, and the loop detector is used to detect the radio frequency output signal extracted by the directional coupler and generate a detection voltage. The non-inverting input of the loop integrator is used to connect to a reference voltage representing the target output power. The inverting input of the loop integrator is connected to the output of the loop detector through an integrating proportional resistor to receive the detected voltage. The loop integrator is used to integrate the error signal between the detected voltage and the reference voltage to generate a loop control voltage that is fed back to the front-end analog attenuator. The loop integrator includes a feedback network connected between the inverting input terminal and the output terminal of the loop integrator. The feedback network includes a first branch and a second branch connected in parallel. The first branch includes a first capacitor, and the second branch includes a second capacitor and a zero-point resistor connected in series.

2. The radio frequency automatic level control device according to claim 1, characterized in that, The loop integrating operational amplifier includes a first operational amplifier, a first terminal of the first capacitor is connected to the inverting input terminal of the first operational amplifier, and a second terminal of the first capacitor is connected to the output terminal of the first operational amplifier; The first end of the zero-point resistor is connected to the inverting input terminal of the first operational amplifier, the second end of the zero-point resistor is connected to the first end of the second capacitor, and the second end of the second capacitor is connected to the output terminal of the first operational amplifier; the non-inverting input terminal of the first operational amplifier is connected to the reference voltage. One end of the integral proportional resistor is connected to the output terminal of the loop detector, and the other end of the integral proportional resistor is connected to the inverting input terminal of the first operational amplifier.

3. The radio frequency automatic level control device according to claim 1, characterized in that, The front-end analog attenuator has a voltage control slope, the loop detector has a detection slope, and the ratio of the capacitive reactance of the loop integrating operational amplifier to the resistance of the integrating proportional resistor is set according to the voltage control slope and the detection slope to make the loop of the RF automatic level control device reach a balanced state.

4. The radio frequency automatic level control device according to claim 3, characterized in that, The capacitance values ​​of the first capacitor, the second capacitor, and the integral proportional resistor satisfy the following relationship: 2π×f×(C1+C2)×R1=a×b; Where f represents the video bandwidth of the radio frequency automatic level control device, R1 represents the resistance value of the integral proportional resistor, C1 represents the capacitance value of the first capacitor, C2 represents the capacitance value of the second capacitor, a represents the voltage control slope of the front-end analog attenuator, and b represents the detection slope of the loop detector.

5. The radio frequency automatic level control device according to claim 1, characterized in that, The loop detector is a logarithmic detector or a mean detector, wherein... When the dynamic range of the radio frequency input signal is greater than the first preset threshold, the loop detector uses the logarithmic detector. When the peak-to-average power ratio (PAPR) of the radio frequency input signal is greater than the second preset threshold, the loop detector uses the mean detector.

6. The radio frequency automatic level control device according to claim 1, characterized in that, The resistance value of the zero-point resistor and the capacitance value of the second capacitor are set according to the video bandwidth of the radio frequency automatic level control device, so that the zero-point resistor and the second capacitor jointly determine the frequency position of the first-order zero.

7. The radio frequency automatic level control device according to claim 6, characterized in that, The resistance value of the zero-point resistor and the capacitance value of the second capacitor satisfy the following relationship: 2π×f×C2×R0=1, Where f is the video bandwidth of the radio frequency automatic level control device, R0 is the resistance value of the zero-point resistor, and C2 is the capacitance value of the second capacitor.

8. The radio frequency automatic level control device according to claim 1, characterized in that, The first-order zero introduced by the second branch is used to increase the loop system damping ratio of the RF automatic level control device without changing the steady-state characteristics of the second-order integral loop. This reduces the response overshoot when responding to the step amplitude change of the RF input signal and shortens the loop adjustment time to lock the RF input signal.

9. The radio frequency automatic level control device according to claim 1, characterized in that, The radio frequency automatic level control device also includes a digital control interface and a digital-to-analog converter; The digital control interface is used to receive the target power digital quantity set by external instructions. The input terminal of the digital-to-analog converter is connected to the digital control interface, and the output terminal of the digital-to-analog converter is connected to the non-inverting input terminal of the loop integrating operational amplifier, for converting the target power digital quantity into the analog reference voltage.

10. A transceiver, characterized in that, Includes the radio frequency automatic level control device according to any one of claims 1 to 9.

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