An attenuator based on two-dimensional wafer-level material

Abstract

This invention belongs to the field of integrated circuit technology, specifically an attenuator based on two-dimensional wafer-level materials. The attenuator comprises a two-dimensional material-based RF switching transistor, a high-precision on-chip resistor network, and a digital control circuit, achieving multi-level adjustable signal amplitude attenuation. The attenuator employs a switch-gated topology, controlling the on / off state of the two-dimensional switching transistor to switch the T-type or π-type resistor attenuation network with different resistance values ​​into the signal path, thereby obtaining the desired attenuation. This invention significantly reduces the insertion loss and turn-off capacitance of the switch, effectively reducing substrate loss and improving attenuation accuracy. While ensuring high-precision amplitude control, it provides a low-insertion-loss, high-linearity, and highly integrated on-chip attenuation solution for high-frequency communication systems, phased array radar, and instrumentation, with broad application prospects.

Description

Technical Field

[0001] This invention belongs to the field of integrated circuit technology, specifically relating to radio frequency attenuators, and particularly to digital step attenuators used in high-frequency communication and radar systems. Background Technology

[0002] Attenuators are critical amplitude control devices in RF transceiver systems, phased array radars, and microwave measurement instruments. Their function is to precisely attenuate the power of transmitted RF signals to achieve gain control, impedance matching, or signal level adjustment. Traditional silicon-based RF attenuators are mostly implemented using bulk silicon CMOS or silicon-on-insulator (SiI) processes. However, the contradiction between substrate loss, on-resistance, and turn-off capacitance in silicon-based switching transistors is becoming increasingly prominent. Higher on-resistance leads to increased insertion loss in the attenuator, while larger turn-off capacitance limits the attenuation dynamic range and accuracy at high frequencies.

[0003] Two-dimensional transition metal chalcogenides, represented by molybdenum disulfide and tungsten disulfide, possess unique physical properties such as atomic-level thickness and the absence of dangling bonds on their surfaces. Radio frequency (RF) switching transistors fabricated based on these two-dimensional materials exhibit ultra-thin channels that effectively suppress short-channel effects and reduce source-drain parasitic capacitance in the off-state. Simultaneously, the higher intrinsic carrier mobility of these materials helps reduce on-resistance. Applying wafer-level two-dimensional material processing to RF attenuator design is expected to significantly improve the high-frequency insertion loss performance, attenuation accuracy, and chip integration of attenuators, meeting the stringent requirements of next-generation high-frequency communication systems. Summary of the Invention

[0004] The purpose of this invention is to propose an attenuator based on two-dimensional wafer-level materials to overcome the problems of high insertion loss, limited attenuation accuracy, and poor radiation resistance of existing silicon-based attenuators at high frequencies.

[0005] The attenuator proposed in this invention, based on two-dimensional wafer-level materials, employs a switch-gated resistor network topology. The attenuator consists of N cascaded or parallel attenuation units. Each attenuation unit comprises two core components: a radio frequency switching transistor fabricated based on wafer-level two-dimensional semiconductor materials, and a T-type, bridge-T-type, or π-type attenuation network composed of high-precision on-chip resistors.

[0006] In this invention, the attenuation unit utilizes a two-dimensional switching transistor to switch the signal transmission path. When the switching transistor is on, the radio frequency signal is transmitted through a low-loss direct path; this state is defined as the reference state (minimum attenuation state). When the switching transistor is off, the radio frequency signal is forced to flow through a resistor attenuation network, thereby introducing a preset attenuation amplitude. By selecting different combinations of attenuation units using a digital control word, precise amplitude control can be achieved over a wide bandwidth.

[0007] To improve high-frequency performance, the present invention employs the following specific technical means:

[0008] Low-loss switching design: The switching transistor uses wafer-level two-dimensional semiconductor material as the channel to achieve extremely low channel resistance. This significantly reduces the insertion loss of the attenuator and has intrinsic radiation resistance; the two-dimensional semiconductor material includes molybdenum disulfide, molybdenum diselenide, tungsten disulfide, tungsten diselenide, bismuth oxyselenide, and indium selenide.

[0009] High-precision resistor network: The on-chip resistor network is fabricated using a metal thin film compatible with two-dimensional wafer-level processes. Precise photolithography and layout design control the resistor dimensions to ensure accuracy and batch consistency in attenuation. The on-chip resistor materials include tantalum nitride, titanium nitride, titanium tungsten, and chromium-nickel alloys.

[0010] Monolithic integrated architecture: The RF switches and resistor networks in the attenuator are fabricated simultaneously on the same wafer-level two-dimensional process platform, realizing full-function monolithic integration and eliminating parasitic effects and impedance discontinuities caused by multi-chip interconnection.

[0011] The attenuator uses high-resistivity sapphire material as a substrate to reduce the loss of radio frequency signals in the substrate and improve radiation resistance.

[0012] This invention significantly reduces insertion loss and turn-off capacitance of switches by leveraging the atomic-level thickness and high carrier mobility of two-dimensional materials. Simultaneously, the use of a high-resistivity substrate compatible with two-dimensional processes and a high-Q passive resistor effectively reduces substrate loss and improves attenuation accuracy. Wafer-level two-dimensional material growth and transfer processes ensure large-area uniformity and consistency of the transistor. While guaranteeing high-precision amplitude control, this invention provides a low-insertion-loss, high-linearity, and highly integrated on-chip attenuation solution for high-frequency communication systems, phased-array radar, and instrumentation, demonstrating broad application prospects.

[0013] This invention combines the advantages of high-frequency switching of two-dimensional materials with a high-precision passive resistor network to realize an RF attenuator with low insertion loss, high attenuation accuracy and high integration, providing key amplitude control chip support for high-frequency communication and radar systems.

[0014] Furthermore, the attenuator designed in this invention possesses intrinsic radiation resistance. First, the transistor uses a two-dimensional semiconductor material with atomic-level thickness as the channel, which has intrinsic radiation resistance. This means that after the two-dimensional transistor is subjected to cumulative radiation dose, the change in on-resistance and off-resistance is very small. After the attenuator is subjected to radiation dose throughout its entire life cycle, the increment of insertion loss and the drift of attenuation accuracy are maintained at extremely low levels. It can directly meet the stringent application requirements of extreme space environments such as satellite communication, deep space exploration, and manned spaceflight without the need for additional bulky shielding measures. Attached Figure Description

[0015] Figure 1 This is a schematic diagram of the system architecture of an attenuator design based on two-dimensional wafer-level materials according to the present invention.

[0016] Figure 2 This is a circuit diagram of a single attenuation unit (T-type network) in this invention.

[0017] Figure 3 The performance parameters of the T-type network attenuator in this invention are shown in the diagram.

[0018] Figure 4 The radiation resistance performance diagram of the T-type network attenuator in this invention is shown.

[0019] Figure 5 The circuit diagram of a single attenuation unit (π-type network) in this invention is shown.

[0020] Figure 6 The performance parameters of the π-type network attenuator in this invention are shown in the diagram.

[0021] Figure 7 The radiation resistance performance diagram of the π-type network attenuator in this invention is shown. Detailed Implementation

[0022] The invention will now be described in more detail with reference to the accompanying drawings and embodiments. In the various drawings, the same elements are indicated by similar reference numerals. For clarity, the various parts in the drawings are not drawn to scale. Furthermore, some well-known parts may not be shown in the drawings.

[0023] Many specific details of the invention, such as the structure, materials, dimensions, processing methods, and techniques of the devices, are described below to provide a clearer understanding of the invention. However, as those skilled in the art will understand, the invention may be implemented without following these specific details.

[0024] Figure 1 A schematic diagram of an attenuator architecture based on two-dimensional wafer-level materials is shown. The attenuator 100 based on two-dimensional wafer-level materials consists of N cascaded attenuation units (105). The attenuator 100 based on two-dimensional wafer-level materials proposed in this invention utilizes chemical vapor deposition to grow a single layer of wafer-level two-dimensional material channel material (101) on sapphire. An atomic layer deposition dielectric material serves as the gate dielectric. Each attenuation unit (103) includes a two-dimensional material-based switching device (102) and an on-chip resistor network (104), and all units are integrated on the same sapphire substrate.

[0025] Figure 2The circuit diagram of a single attenuation unit (T-network) in this invention is shown. The attenuation unit 200 includes a T-type resistive attenuation network and two RF switches 201 and 202 based on molybdenum disulfide. RF switches 201 and 202 employ a bottom-gate top-contact structure. The substrate is a 500 μm thick high-resistivity sapphire wafer. The channel material is a single-layer molybdenum disulfide film grown by chemical vapor deposition, with a thickness of approximately 0.65 nm. The source / drain metal contacts employ a chromium / gold bilayer structure with thicknesses of 5 nm and 30 nm, respectively, deposited by electron beam evaporation and patterned using a lift-off process. The gate dielectric is atomically deposited hafnium oxide with a thickness of 20 nm. The gate metal is chromium / gold with thicknesses of 5 nm / 30 nm. The transistor has a gate length of 2 μm and a gate width of 50 μm.

[0026] The T-network consists of series resistors , and parallel resistors The structure is fabricated using a tantalum nitride metal thin film with a sheet resistance of 50 Ω / □. For a 10 dB attenuation unit, , When switches 201 and 202 are driven by a control level to switch to the upper path, the radio frequency signal is transmitted directly through the low-loss metal wire.

[0027] Figure 3 The performance parameters of the T-type network attenuator in this invention are shown in the diagram. At 15 GHz, the insertion loss in the reference state (0 dB) is 1.1 dB, mainly due to switch on-resistance and metal interconnect loss. The measured attenuation in the 10 dB attenuation state is 10.6 dB.

[0028] Figure 4 The radiation resistance performance of the T-network attenuator in this invention is shown in the diagram. To verify the intrinsic radiation resistance of the attenuator in this embodiment, a total dose irradiation experiment was conducted on the chip using a cobalt-60 gamma ray source, with a cumulative irradiation dose of 10 Mrad(Si). After irradiation, the S-parameters were remeasured, and the results showed that the increase in insertion loss in the reference state was only 2.1 dB, and the attenuation drift in the attenuation state was only 1.4 dB. This confirms the excellent suppression capability of the two-dimensional semiconductor channel and the high-resistivity sapphire substrate against radiation-induced damage.

[0029] Figure 5 The circuit diagram of a single attenuation unit (π-type network) in this invention is shown. The attenuation unit 400 includes a π-type resistor attenuation network and two single-pole double-throw radio frequency switches 401 and 402 based on two-dimensional materials.

[0030] The RF switching transistor employs a dual-gate structure to enhance turn-off isolation. The channel material is a monolayer bismuth oxide selenide thin film grown by chemical vapor deposition. The source / drain contacts are bismuth / gold with thicknesses of 10 nm / 30 nm, utilizing the half-metallic properties of bismuth to form a near-zero Schottky barrier contact, significantly reducing on-resistance. The gate dielectric is hexagonal boron nitride with a thickness of 10 nm. The dual gates are located on the upper and lower sides of the channel, respectively, and symmetrical driving is used to improve switching speed.

[0031] π-type networks consist of resistors , , Composition. Taking an 8 dB attenuation unit as an example, , A nickel-chromium alloy thin film with a sheet resistance of 100 Ω / □ was deposited by magnetron sputtering and patterned by ion beam etching. The temperature coefficient of the nickel-chromium alloy is less than 50 ppm / °C, ensuring the stability of the attenuation over the entire temperature range.

[0032] Figure 6 The performance parameters of the π-type network attenuator in this invention are shown in the diagram. At 15 GHz, the insertion loss in the reference state (0 dB) is 1.8 dB, mainly due to switch on-resistance and metal interconnect losses. The measured attenuation in the 8 dB attenuation state is 8.2 dB.

[0033] Figure 7 The radiation resistance performance of the π-type network attenuator in this invention is shown in the diagram. To verify the intrinsic radiation resistance of the attenuator in this embodiment, a total dose irradiation experiment was conducted on the chip using a cobalt-60 gamma ray source, with a cumulative irradiation dose of 10 Mrad(Si). After irradiation, the S-parameters were remeasured, and the results showed that the increase in insertion loss in the reference state was only 1.9 dB, and the attenuation drift in the attenuation state was only 1.4 dB. This confirms the excellent suppression capability of the two-dimensional semiconductor channel and the high-resistivity sapphire substrate for radiation-induced damage.

[0034] This embodiment adds a dual-gate fabrication step to the standard two-dimensional transistor process and uses a nickel-chromium alloy thin-film resistor. The specific process includes back gate metal deposition and patterning, back gate dielectric deposition, two-dimensional channel transfer, source / drain formation, top gate dielectric deposition and top gate metal patterning, nickel-chromium alloy thin-film resistor deposition, and interconnect metallization.

[0035] This invention is not limited to the specific embodiments described. Many variations are possible based on the above description. Modifications made by those skilled in the art based on the embodiments of this invention are all within the scope of protection of the claims.

Claims

1. An attenuator based on two-dimensional wafer-level materials, characterized in that, It adopts a switch-selective resistor network topology; it consists of N cascaded or parallel attenuation units; each attenuation unit comprises two parts: one is an RF switching transistor fabricated based on wafer-level two-dimensional semiconductor materials, and the other is a T-type, bridge T-type, or π-type attenuation network composed of high-precision on-chip resistors; wherein: The attenuation unit utilizes a two-dimensional switching transistor to switch the signal transmission path: when the switching transistor is on, the RF signal is transmitted through a low-loss direct path, and this state is defined as the reference state; when the switching transistor is off, the RF signal is forced to flow through the resistor attenuation network, thereby introducing a preset attenuation amplitude; by selecting different combinations of attenuation units through a digital control word, precise amplitude control in steps can be achieved within a wide bandwidth.

2. The attenuator according to claim 1, characterized in that, The switching transistor uses wafer-level two-dimensional semiconductor material as the channel to achieve extremely low channel resistance, reduce the insertion loss of the attenuator, and has intrinsic radiation resistance.

3. The attenuator according to claim 2, characterized in that, The two-dimensional semiconductor material is selected from molybdenum disulfide, molybdenum diselenide, tungsten disulfide, tungsten diselenide, bismuth oxyselenide, and indium selenide.

4. The attenuator according to claim 1, characterized in that, The on-chip resistor attenuation network is fabricated using a metal thin film compatible with two-dimensional wafer-level processes; the resistor dimensions are controlled through precise photolithography and layout design to ensure the accuracy of attenuation and batch consistency.

5. The attenuator according to claim 4, characterized in that, The on-chip resistor material is selected from tantalum nitride, titanium nitride, titanium tungsten, and chromium-nickel alloy.

6. The attenuator according to claim 1, characterized in that, The attenuator uses high-resistivity sapphire material as a substrate to reduce the loss of radio frequency signals in the substrate and improve radiation resistance.

7. The attenuator according to claim 1, characterized in that, The radio frequency switching transistor and the on-chip resistor attenuation network are fabricated simultaneously on the same wafer-level two-dimensional process platform to achieve full-function monolithic integration and eliminate parasitic effects and impedance discontinuities caused by multi-chip interconnection.

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