Multi-stage forward error correction with link level retransmission
By combining multi-level FEC and LLR communication link design, and utilizing internal and external FEC error correction combined with LLR retransmission, the problems of bandwidth impact and BER improvement in existing technologies are solved, and efficient and reliable data transmission is achieved.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- HEWLETT PACKARD ENTERPRISE DEV LP
- Filing Date
- 2025-06-25
- Publication Date
- 2026-07-31
AI Technical Summary
Existing technologies for improving data reliability in communication links suffer from impacts on effective bandwidth and delays due to forward error correction (FEC) and link-level retransmission (LLR) methods, making it difficult to effectively reduce the bit error rate (BER) without significantly affecting bandwidth.
A multi-level FEC scheme is adopted, which combines internal FEC and external FEC with LLR. The internal FEC is used for initial error correction, the external FEC is used for further error correction, and the LLR is used for retransmission to ensure data reliability while reducing bandwidth consumption.
Without significantly impacting link bandwidth, it significantly reduces BER and improves data transmission reliability and efficiency. Through a combined solution of multi-level FEC and LLR, it enhances the effective bandwidth of the communication link.
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Figure CN122496151A_ABST
Abstract
Description
Technical Field
[0001] This disclosure relates to a system and method for improving the reliability of communication links. More specifically, this disclosure relates to combining multi-stage forward error correction (FEC) with link-level retransmission (LLR) to reduce the effective bit error rate (BER) of a communication link while minimizing the impact on effective link bandwidth. Background Technology
[0002] The ever-increasing demands of advanced artificial intelligence (AI) and high-performance computing (HPC) systems are placing increasing demands on network bandwidth. However, as link data rates rise to meet these demands, signal integrity can be compromised due to higher losses and reduced noise immunity, leading to a higher bit error rate (BER). Existing mitigation strategies for higher BER include forward error correction (FEC) and link-level retransmission (LLR). FEC requires the transmitter to add parity symbols (called error-correcting codes) to the original message to allow the receiver to detect and potentially correct errors, while LLR requires the transmitter to retransmit data when an error is detected. However, both methods reduce the effective bandwidth of the communication link by transmitting additional data (i.e., transmitting parity symbols in the case of FEC, and retransmitted data in the case of LLR). Attached Figure Description
[0003] Figures 1A to 1C An example of a data flow on a communication link according to one aspect of this application is illustrated.
[0004] Figure 2 A simplified block diagram of a communication link front-end according to one aspect of this application is shown.
[0005] Figure 3 An example of a receive (RX) path within a network node according to one aspect of this application is illustrated.
[0006] Figure 4 An example of a transmit (TX) path within a network node according to one aspect of this application is illustrated.
[0007] Figure 5 A flowchart illustrating an example process for transmitting data on a communication link implementing multi-level FEC and link-level retransmission (LLR) is presented, representing one aspect of this application.
[0008] Figure 6 A flowchart illustrating an example process for receiving data on a communication link implementing multi-level FEC and link-level retransmission (LLR) is presented, representing one aspect of this application.
[0009] Figure 7 An example network node implementing multi-level FEC and LLR according to one aspect of this disclosure is illustrated.
[0010] In these accompanying drawings, the same reference numerals refer to the same elements. Detailed Implementation
[0011] Forward error correction (FEC) is widely used in digital communication systems to improve data reliability. In a data link implementing FEC, the sender encodes the original user data (called information bits) using an error correction algorithm and transmits the encoded bits (which include redundant data) to the receiver. If some bits are corrupted during transmission (e.g., due to noise, interference, or signal degradation), the receiver can reconstruct the original user data using the redundant data. The maximum proportion of errors that an FEC scheme can correct depends on the strength of the FEC code. Stronger FEC codes have greater error correction capabilities but tend to have lower code rates (i.e., the ratio between the number of information bits and the total number of encoded bits). The coding gain provided by stronger FEC is offset by the corresponding increase in line rate required to accommodate the additional code bits. When FEC fails to correct detected errors, retransmission is required, thus delaying new data transmission and consuming link bandwidth. An existing method to improve FEC's ability to correct burst errors is to use interleaved FEC, where the order of the bits or symbols to be transmitted is rearranged. However, interleaving increases FEC latency.
[0012] To improve FEC performance without significantly impacting link bandwidth, some aspects of this disclosure provide a solution combining multi-level FEC with LLR. The multi-level FEC coding scheme may include encoding user data at the transmitter using internal (or lower-level) FEC codes and external (or higher-level) FEC codes. The transmitter may initially send user data along with internal FEC parity symbols to the receiver, which may use these symbols to detect and correct potential errors in the received data. The transmitter may send external FEC parity symbols in response to the internal FEC failing to correct all errors in the received data. If both internal and external FEC fail to correct errors, an LLR operation can be performed to recover the correct data. In some aspects, FEC codeword interleaving may also be employed to improve burst error correction.
[0013] In some respects, to further improve efficiency, this multi-level FEC coding scheme with LLR can be applied to multiple independent streams of data. Streams of data can include a series of related packets that share the same source and destination endpoints and may also have other similar characteristics, such as belonging to the same traffic category or being part of a single communication (e.g., in the case of a TCP stream). Packets within the same stream of data can be ordered, while there are no ordering constraints between packets belonging to different streams of data at any network layer.
[0014] Figures 1A to 1C An example of a data flow on a communication link according to one aspect of this application is illustrated. In these examples, each data flow includes two independent stream data, namely stream data A and stream data B. In practice, any number of independent stream data present in the traffic on the communication link can participate (e.g., protected by multi-level FEC codes), but not exceeding implementation-specific limitations. Including additional stream data provides significant benefits. However, even in the extreme case of a single stream data, certain latency and bandwidth benefits can still be provided.
[0015] exist Figure 1A In this example, data stream 100 on the communication link may include two independent data streams, namely data stream A and data stream B, where each data stream includes multiple data blocks (e.g., data blocks 102 to 110). Each data block may include one or more internal FEC codewords, where each internal FEC codeword includes both the original user data and the internal FEC parity symbol. Note that there are no ordering constraints between the two data streams, and the FEC codewords belonging to each data stream can be transmitted as they become available. In this example, data blocks 102 and 106 belong to data stream A, and data blocks 104, 108, and 110 belong to data stream B, where data block 104 in data stream B is transmitted between data blocks 102 and 106 in data stream A. However, it may be necessary to maintain the order between data blocks within the same data stream (i.e., these data blocks will be transmitted and processed according to a predetermined order). Figure 1A In the example shown, data blocks in both streams may contain no errors or only a few errors, making the internal FEC sufficient to correct all detected errors. Therefore, both streams are transmitted / received normally without the need to transmit external FEC parity symbols or retransmit internal FEC codewords.
[0016] exist Figure 1B In this example, data stream 120 includes independently transmitted stream data A and stream data B, where each stream data includes multiple data blocks (e.g., data blocks 122 to 130). In this example, data blocks 122 and 126 belong to stream data A, and data blocks 124, 128, and 120 belong to stream data B. Figure 1BIn this example, data block 126 in stream data A contains errors that the internal FEC cannot correct. Upon detecting an uncorrected error, the receiver can request the transmitter to transmit parity symbols for external FEC encoding of the user data in data block 126 (i.e., external FEC parity symbol (P_S) block 132 in stream data A). Since the receiver already has the user data, there is no need to transmit the entire external FEC codeword, thus saving bandwidth. Subsequent data blocks belonging to stream data A will not proceed until all errors in data block 126 are corrected, but data belonging to stream data B (e.g., data block 128) can be transmitted normally. In this example, the number of detected errors is small enough that these errors can all be corrected based on the external FEC P_S block 132 in stream data A. Therefore, no retransmission is required. On the other hand, stream data B is adequately protected by the internal FEC and can be transmitted normally (i.e., there is no need to request external FEC parity symbols).
[0017] exist Figure 1C Similarly, data stream 140 includes stream data A and stream data B, where each stream data includes multiple data blocks (e.g., data blocks 142 to 148). In this example, data block 142 belongs to stream data A, and data blocks 144, 146, and 148 belong to stream data B. Figure 1B As in the example shown, data stream 140 contains data block 142 with errors that the internal FEC cannot correct, and external FEC P_S block 150 from stream data A is transmitted. However, in this example, the number of errors in data block 142 exceeds the error correction capability of the external FEC, thus requiring retransmission of user data (i.e., retransmission of data block 152). While stream data A is processing external FEC decoding (e.g., based on P_S block 150) and retransmission of user data, stream data B (e.g., blocks 144 and 146) is transmitted normally. The initial data block (i.e., internal FEC codeword), external FEC parity symbol, and retransmitted data block can be transmitted in an order based on availability. Figure 1C In the example shown, the internal FEC codeword belonging to stream data B can be transmitted between data block 142 and the transmission of external FEC P_S block 150 in stream data A, and / or can be transmitted between external FEC P_S block 150 in stream data A and the transmission of retransmitted data block 152.
[0018] Figure 2 A simplified block diagram of the communication link front-end according to one aspect of this application is shown. Figure 2In this configuration, the front-end block 200 may include a receive (RX) path 202 and a transmit (TX) path 210. The RX path 202 may include an RX Physical Coding Sublayer (PCS) block 204, an RX Media Access Control (MAC) block 206, and an RX LLR block 208. The TX path 210 may include a TX PCS block 212, a TX MAC block 214, and a TX LLR block 216.
[0019] RX PCS block 204 is responsible for receiving data from the serializer / deserializer (SerDes) interface and performing clock recovery and stream data alignment. RX PCS block 204 may also include function blocks for 64b / 66b decoding. Note that 64b / 66b encoding is widely used for high-speed data transmission to facilitate clock recovery and stream data alignment at the receiver. The 64b / 66b decoder in RX PCS block 204 can convert the encoded 66-bit blocks back to 64-bit data. The decoded 64-bit data is sent to RX MAC block 206, which is responsible for performing various functions in the MAC layer, such as frame delimitation and identification, and Frame Check Sequence (FCS) checking. The output of RX MAC block 206 (e.g., separated data frames and FCS check results) is sent to RX LLR block 208, which is responsible for determining whether retransmission is needed and requesting retransmission of user data if necessary. In this example, the communication link is an Ethernet link, and the received user data (including retransmitted user data) can be sent to the Ethernet block for further processing.
[0020] The TX PCS block 212 is responsible for sending the data to be transmitted (which may originate from an Ethernet block) to the serializer / deserializer (SerDes) interface and may include function blocks for performing 64b / 66b encoding. The TX MAC block 214 is responsible for attaching the FCS and inserting inter-packet gaps (IPGs). The TX LLR block 216 is responsible for retransmitting user data in response to receiving an LLR request from a link partner.
[0021] Figure 3 The illustration shows an example of a receive (RX) path within a network node according to one aspect of this application. For simplicity, functional blocks unrelated to FEC and LLR operations may be omitted from the figures. Figure 3 In the receiver path 300, the internal FEC decoder 302, frame splitting / FCS check block 304, demultiplexer (DEMUX) 306, external FEC decoder and buffer A 308, external FEC decoder and buffer B 310, multiplexers 312 and 314, sequence A checker 316 and sequence B checker 318 may be included.
[0022] The SerDes interface of the network node can receive internally FEC-encoded user data and send it to the internal FEC decoder 302. This internal FEC decoder can use a predetermined internal FEC algorithm to detect and correct errors in the received data. Note that the logic block used to perform clock recovery, data deskewing, and other functions is not included in... Figure 3 As shown in the diagram. After internal FEC decoding, user data can be sent to Frame Separation / FCS Check block 304 for frame separation and FCS checking. An FCS check failure indicates the presence of uncorrected errors in the decoded data. Internal FEC decoding can also indicate errors that internal FEC failed to correct. DEMUX 306 can separate packets belonging to different streams of data into different paths. In this example, the received stream data includes stream data A and stream data B, and packets belonging to these two streams can be sent to different paths for further processing. Depending on some aspects, each received packet can include a stream indicator in its packet header, which identifies which stream the received data belongs to, and DEMUX 306 can send these packets to different paths based on the stream indicator included in the packet header.
[0023] If the internal FEC decoder 302 cannot correct all errors (e.g., the packet fails subsequent FCS checks or the external FEC decoder indicates one or more uncorrectable errors), the output of DEMUX 306 may include a request for an external FEC parity symbol. This request can be sent to the link partner of the network node via its transmission path. Furthermore, these packets that fail the FCS check can be sent to the corresponding external FEC decoder and buffer to await external FEC processing. If the erroneous user data belongs to stream A, it will be sent to the external FEC decoder and buffer A 308 for buffering and external FEC decoding; if the erroneous user data belongs to stream B, it will be sent to the external FEC decoder and buffer B 310. These packets will remain in the buffer until the external FEC parity symbol is received and processed.
[0024] If no errors are found in the received data or the internal FEC decoder 302 has corrected all errors (i.e., these packets pass FCS checks), then user data can bypass the external FEC decoder and buffer. More specifically, error-free data from stream A, along with the output of the FEC decoder and buffer A 308, can be multiplexed at MUX 312 and sent to sequence A checker 316, which performs FCS checks on the externally FEC-decoded data and also checks whether packets in stream A are out of order. Similarly, error-free data from stream B, along with the output of the FEC decoder and buffer B 310, can be sent to MUX 312. At position 314, the packet is multiplexed and sent to Sequence B checker 318. Out-of-order packets can be discarded. Furthermore, if external FEC decoding fails to correct all errors (i.e., the decoded data does not pass the FCS check), Sequence A checker 316 can generate a retransmission request, which can be sent to the link partner to request retransmission of user data. In some respects, the retransmission request may include an LLR Negative Acknowledgment (NACK) message. The ordered, error-free packets can then be sent to the Ethernet block for further processing.
[0025] Figure 4 A more detailed illustration is provided of the transmit (TX) path within a network node according to one aspect of this application. For simplicity, functional blocks unrelated to FEC and LLR operations may be omitted from the figures. For example, functional blocks handling transmission credits and other functional blocks are not shown. Figure 4 As shown in [the image]. Figure 4 In the MUX 406, when packets from an Ethernet block are sent, copies of these packets can be stored in the corresponding retransmission buffers. For example, a copy of a packet belonging to stream A can be stored in retransmission buffer A402, while a copy of a packet belonging to stream B can be stored in retransmission buffer B404. These copies remain in the buffers until a corresponding acknowledgment (ACK) is received from the link partner or another indication that the link partner has received the correct data. In addition to data packets, the MUX 406 can also receive other information (e.g., from the receive path of network nodes), such as external FEC parity symbol requests and retransmission requests.
[0026] The output of MUX 406 can be sent to FCS / IPG block 408 for attaching the FCS and setting the IPG. Data can then be sent simultaneously to internal FEC encoder 410 and external FEC encoder 412 for FEC encoding. In some respects, the internal FEC code can be weaker than the external FEC code (i.e., the internal FEC can have a higher code rate than the external FEC). In some respects, both the internal and external FEC codes can include Reed-Solomon (RS) codes. In one example, the internal FEC code can include RS(520, 514) or RS(528, 514), while the external FEC code can include RS(544, 514). The internal FEC codeword (i.e., user data plus the internal FEC parity symbol) can be forwarded to the SerDes interface via MUX 418, while the external FEC parity symbol can be stored in a corresponding buffer. For example, the external FEC parity symbol for flow data A can be stored in the external FEC P_S buffer A414, and the external FEC parity symbol for flow data B can be stored in the external FEC P_S buffer B416. The external FEC parity symbols will remain in the buffers until the network node receives an ACK message from its link partner for the transmitted user data, receives another indication of correct data from the link partner, or receives a request for an external FEC parity symbol. If an ACK for a given flow data is received from the link partner, the associated external FEC parity symbol can be discarded from the buffer. If a request for an external FEC parity symbol for a given flow data is received from the link partner, the associated external FEC parity symbol can be selected for transmission by MUX 418.
[0027] Figure 5 A flowchart illustrating an example process for transmitting data on a communication link implementing multi-level FEC and link-level retransmission (LLR) is presented, representing one aspect of this application. Figure 5 All or any part of the operations shown can be, for example, by Figures 2 to 4 The logic block shown is executed. Although... Figure 5 The example process in the flowchart illustrates a specific order in which certain operations are performed, but the process is not limited to this order. Operations shown consecutively in the flowchart can be performed in different orders, and can be performed simultaneously, partially simultaneously, or in combination.
[0028] Communication links can implement various communication protocols. In some respects, a communication link can be an Ethernet link implementing the Ethernet protocol. In other respects, a communication link can be a point-to-point link connecting two communication endpoints or nodes, one node being called the sending node and its link partner being called the receiving node. Sender and receiver are relative terms relating to the exchange of information / messages via a communication link, where the sender sends a message to the receiver.
[0029] During operation, the sending node can encode the first data block using a first FEC code and a second FEC code to generate a first set of parity symbols and a second set of parity symbols, respectively (Operation 502). The first and second FEC codes can provide multi-level FEC protection for user data, where the first FEC code is a weaker code (i.e., with a higher code rate) and the second FEC code is a stronger FEC code (i.e., with a lower code rate). In other words, the first set of parity symbols can have fewer symbols than the second set of parity symbols. In one example, the first FEC code may include RS(520, 514) or RS(528, 514) codes, while the second FEC code may include RS(544, 514) codes. Depending on some aspects, to enhance the error correction capability against burst errors, the FEC codes can be interleaved as needed. In some examples, only the second or stronger FEC codes are interleaved.
[0030] The first data block may include user data belonging to the first stream data. Note that multiple stream data from the sender to the receiver can participate in the same protection scheme (i.e., a scheme implementing multi-level FEC with LLR). In one example, two stream data (i.e., the first stream data and the second stream data) can participate in the same protection scheme.
[0031] The sending node can transmit the first data block along with the first set of parity symbols to its link partner (operation 504). Upon receiving the first data block and the first set of parity symbols, the link partner can perform a first FEC decoding operation based on the first set of parity symbols. If the number of errors in the received first data block is relatively small, the first FEC decoding operation can correct all errors. In this case, the link partner can respond to the sender with an ACK message and send the decoded data for further processing. If the first FEC decoding operation cannot correct all errors (e.g., the decoded data fails the FCS check or the FEC decoding indicates uncorrectable errors), the link partner can send a request for a second set of parity symbols.
[0032] The sending node receives a request for the second set of parity symbols (operation 506) and transmits the second set of parity symbols to its link partner (operation 508). This transmission does not include the first data block, and therefore consumes less bandwidth compared to the original transmission. According to some aspects, after generating the first and second sets of parity symbols for the streaming data, the sending node may transmit the first set of parity symbols along with the user data, but store the second set of parity symbols in a buffer corresponding to the streaming data (e.g., ...). Figure 4 The second set of parity symbols is held in buffer 414 or 416 as shown. This second set of parity symbols may be retained in the buffer until the sender receives an ACK or other indication from the link partner indicating successful data transmission. Upon receiving the second set of parity symbols, the receiver may perform a second FEC decoding operation to correct any additional errors in the received data. If all errors are corrected, the link partner may respond to the sender with an ACK message and transmit the decoded data for further processing. If the second FEC decoding operation also fails to correct all errors (e.g., the decoded data fails the FCS check or the FEC decoding indicates uncorrectable errors), the link partner may send a retransmission request. In one example, the retransmission request may include an LLR NACK message or use some other indication.
[0033] The sending node receives the retransmission request (operation 510) and retransmits the first data block along with the first set of parity symbols to its link partner (operation 512). The retransmitted data block can be processed by the link partner in a manner similar to the initial transmission. Note that the sender can store user data belonging to different streams in different retransmission buffers (e.g., ...). Figure 4 In buffers 402 and 404 shown. A data block can be ejected from the buffer in response to the sender receiving the corresponding ACK message from the link partner.
[0034] Figure 5 The example shown focuses on data transmission within the first stream. In practice, while the sender is awaiting an ACK or NACK message from its link partner regarding the first stream, it can send data belonging to the second stream. Independent transmission and error correction operations for multiple streams can enhance effective link bandwidth.
[0035] Figure 6 A flowchart illustrating an example process for receiving data on a communication link implementing multi-level FEC and link-level retransmission (LLR) is presented, representing one aspect of this application. Figure 6 All or any part of the operations shown can be, for example, by Figures 2 to 4 The logic block shown is executed. Although... Figure 6The example process in the flowchart illustrates a specific order in which certain operations are performed, but the process is not limited to this order. Operations shown consecutively in the flowchart can be performed in different orders, and can be performed simultaneously, partially simultaneously, or in combination.
[0036] During operation, the receiving node can receive a first data block along with a first set of parity symbols from its link partner (operation 602). The first set of parity symbols can be generated by the link partner using a first FEC code. The link partner can also simultaneously generate a second set of parity symbols for the first data block using a second FEC code, which is stronger than the first FEC code (i.e., has a lower code rate). Instead of sending the second set of parity symbols to the receiving node, the link partner temporarily stores the second set of parity symbols in a buffer specific to the streaming data.
[0037] The receiving node can perform FEC decoding based on the first set of parity symbols (operation 604) and determine whether all errors have been corrected (operation 606). Determining whether all errors have been corrected may include performing an FCS check on the decoded data or determining whether the FEC decoding detected any uncorrectable errors. If all errors have been corrected, the receiving node can send a first data block for further processing (operation 614). In one example, the communication link implements the Ethernet protocol, and the receiving node can send an error-free data block for Ethernet processing.
[0038] If uncorrected errors exist, the receiving node can send a request for a second set of parity symbols to its link partner (operation 608). The receiving node can receive the second set of parity symbols and then perform FEC decoding based on them (operation 610). Because the second FEC code may be stronger than the first FEC code, it may be able to correct more errors than the first FEC code. In some examples, the second FEC code may be interleaved, and the receiver may need to deinterleave the received FEC codewords before performing FEC decoding.
[0039] The receiving node can determine whether all errors have been corrected (operation 612). If so, the receiving node can send the first data block for further processing (operation 614). If residual errors exist (e.g., decoded data failed the FCS check or FEC decoding detected uncorrectable errors), the receiving node can send a retransmission request to its link partner (operation 616), and subsequently receive the retransmitted first data block and the first set of parity symbols (operation 602). For each transmitted codeword, the process can be repeated... Figure 6 The operation shown.
[0040] Figure 6The example shown focuses on receiving data belonging to the first stream of data. In practice, while the receiving node is waiting for the transmission of the second set of parity symbols or for a retransmission of the original data from the link partner regarding the first stream of data, the receiver can receive data belonging to the second stream of data and perform appropriate FEC decoding.
[0041] Figure 7 The illustration depicts an example network node implementing multi-level FEC and LLR according to one aspect of this disclosure. Figure 7 In this context, network node 700 may include any physical device that allows hardware on a computer network to communicate and interact with each other. The term "network node" may refer to one or more computing devices configured to emulate one or more of the functions described herein. "Computing device" may be a server, server cluster, storage array, computer equipment, workstation, desktop computer, laptop computer, switch, router, or any other processing device or apparatus that includes processing resources.
[0042] exist Figure 7 In the example shown, network node 700 may include multiple communication ports, such as ports 702 and 704, for communicating with other network nodes. Network node 700 may include one or more processing resources (e.g., processing resource 706), one or more storage devices (e.g., storage device 708), and a multi-level FEC system 710 with LLR. Network node 700 may include... Figure 7 The entities shown are fewer or more entities.
[0043] In the examples described herein, processing resources may include, for example, one or more processors included in a single computing device or distributed across multiple computing devices. In some examples, concurrent processes may execute on a single computing device or multiple computing devices. As used herein, a “processor” may be at least one of a central processing unit (CPU), a semiconductor-based microprocessor, a graphics processing unit (GPU), a field-programmable gate array (FPGA) configured to fetch and execute instructions, other electronic circuitry suitable for fetching and executing instructions stored on a computer-readable storage medium, or combinations thereof. In the examples described herein, processing resources may fetch, decode, and execute instructions stored on a storage medium to perform the function described with respect to the instructions stored on the computer-readable medium. In other examples, the function described with respect to any instructions described herein may be implemented in the form of electronic circuitry, executable instructions encoded on a computer-readable medium, or a combination thereof. The computer-readable storage medium may be located in or away from the computing device executing the instructions but accessible (e.g., via a computer network) for execution. In the examples illustrated herein, a node may be implemented by one or more computer-readable storage media.
[0044] The multi-level FEC system 710 with LLR may include any number of software units, hardware units, and firmware units that work together to achieve the goals of reducing FEC latency and increasing effective link bandwidth. According to some aspects, the multi-level FEC system 710 with LLR may include instructions that, when executed by processing resource 706, cause processing resource 706 to perform the methods and / or processes described in this disclosure. Specifically, the multi-level FEC system 710 with LLR may include a transmit instruction 712 for transmitting data to a link partner and a receive instruction 722 for receiving data from a link partner.
[0045] Launch command 712 may include the above-mentioned... Figure 5 The operation 502 shown describes an instruction 714 that encodes a first data block using a first FEC code and a second FEC code to generate a first set of parity symbols and a second set of parity symbols, respectively. According to some aspects, the first and second FEC codes may include RS codes, wherein the second FEC code may be a stronger code than the first FEC code. Encoding the first data block using the first and second FEC codes may also include interleaving the FEC codewords. The first and second FEC encoding operations may be performed by two FEC encoders (e.g., Figure 4 The encoders 410 and 412 shown are executed simultaneously.
[0046] Launch command 712 may include the above-mentioned... Figure 5 The instruction 716, as described in operation 504, transmits the first data block along with the first set of parity symbols to the link partner. While the first set of parity symbols is transmitted along with the data, the second set of parity symbols is not transmitted and can be stored in a buffer within network node 700 (e.g., ...). Figure 4 In the buffer (414 or 416) shown.
[0047] Transmission command 712 may include the information mentioned above. Figure 5 The instructions 718, as described in operations 506 and 508, transmit a second set of parity symbols in response to a request received from the link partner. The link partner may send a request for the second set of parity symbols when it detects an uncorrectable error based on the result of the FEC decoding operation.
[0048] Transmission command 712 may include the information mentioned above. Figure 5 The instructions 720, as described in operations 510 and 512, retransmit the first data block along with the first set of parity symbols in response to a retransmission request received from the link partner. When the link partner detects an uncorrectable error based on the second set of parity symbols, the link partner may send a retransmission request (e.g., LLR NACK).
[0049] Receive instruction 722 may include the above-mentioned... Figure 6 The instruction 724, which receives the first data block along with the first set of parity symbols from the link partner, as described in operation 602.
[0050] Receive instruction 722 may include the above-mentioned... Figure 6 The illustrated operations 604 to 608 describe an instruction 726 that sends a request for a second set of parity symbols in response to the detection of an uncorrectable error based on the first set of parity symbols. More specifically, instruction 726 may include an FEC decoding instruction and a parity symbol request generation instruction.
[0051] Receive instruction 722 may include the above-mentioned... Figure 6 The illustrated operations 604 to 608 respond to the instruction 728 that sends a retransmission request in response to the detection of an uncorrectable error based on the second set of parity symbols. More specifically, instruction 728 may include an FEC decoding instruction and a retransmission request generation instruction.
[0052] Receive instruction 722 may include the above-mentioned... Figure 6 The instruction 730 for receiving the retransmitted first data block along with the first set of parity symbols, as described in operation 602.
[0053] The multi-stage FEC system 710 with LLR can include more than Figure 7 The instructions shown are further instructions. For example, transmission instruction 712 may include instructions for sequentially transmitting data blocks and parity symbols belonging to different streams of data in order based on availability and / or FEC interleaving.
[0054] In general, aspects of this disclosure provide a multi-level FEC solution combined with LLR to reduce the BER on a communication link without significantly impacting the effective link bandwidth. Multiple independent streams of data transmitted from the sender node to the receiver node can participate in the same protection scheme combining multi-level FEC and LLR, where each stream is encoded using either a lower-level or weaker FEC code or a higher-level or stronger FEC code. The initial transmission of the stream data may include user data and parity symbols for the lower-level FEC to allow the receiver to correct errors based on the lower-level FEC parity symbols. If the stream data fails the FCS check at the receiver, the transmitter can receive a request to send parity symbols for the higher-level FEC. If the higher-level FEC still fails to correct all errors, the receiver can send an LLR NACK to the transmitter, requesting a retransmission of the internally FEC-encoded user data. While the receiver is waiting for the higher-level FEC parity symbols and / or a retransmission of one stream, the receiver can normally receive and / or process other stream data, thus further enhancing the effective bandwidth of the communication link.
[0055] One aspect of this application provides a system and method for improving the reliability of data transmission. During operation, a network node can encode a first data block using a first forward error correction (FEC) code and a second FEC code to generate a first set of parity symbols and a second set of parity symbols, respectively, and transmit the first data block along with the first set of parity symbols to a link partner via a data link. In response to receiving a request for the second set of parity symbols from the link partner, the network node can transmit the second set of parity symbols to the link partner. In response to receiving a retransmission request from the link partner, the network node can retransmit the first data block along with the first set of parity symbols to the link partner. The link partner can be configured to decode the received data based on the first FEC code and the first set of parity symbols, and can send a request for the second set of parity symbols in response to the first FEC decoding detecting an uncorrectable error.
[0056] In variations of this design, the second FEC code can be stronger than the first FEC code, or the second set of parity symbols can be longer than the first set of parity symbols. For example, the second FEC code can have a lower code rate than the first FEC code.
[0057] In variations thereof, the first or second FEC code may include Reed-Solomon (RS) codes. For example, the first FEC code may include RS(520, 514) or RS(528, 514) codes, while the second FEC code may include RS(544, 514) codes.
[0058] In a variation of this approach, the data link can implement Link-Level Retransmission (LLR), and the retransmission request can include an LLR Negative Acknowledgment (NACK) message. For example, a link partner can be configured to perform a second FEC decoding based on a second set of parity symbols. If the decoded data fails the FCS check or the second FEC decoding indicates an uncorrectable error, the link partner can send an LLR NACK.
[0059] In a further variation, in response to the link partner detecting an uncorrectable error in the first data block based on the second set of parity symbols, the network node can receive an LLR NACK message from the link partner. The link partner can detect an uncorrectable error if the FEC decoding indicates an uncorrectable error or if the decoded data fails the FCS check.
[0060] In this variation, the first data block can be associated with the first stream of data, and the network node can encode the second data block associated with the second stream of data and transmit it to its link partner. Allowing multiple independent streams of data to participate in a multi-level FEC protection scheme can improve data transmission efficiency.
[0061] In a further variation, the first data block, the second data block, and the second set of parity symbols can be transmitted sequentially based on availability. Data blocks belonging to different data streams can be transmitted in an interleaved manner, without any ordering constraints between these different data streams.
[0062] In a variation of this, the request for the second set of parity symbols is received from the link partner in response to the link partner detecting an uncorrectable error in the first data block based on the first set of parity symbols.
[0063] One aspect of this application provides a network node. The network node may include: a first forward error correction (FEC) encoder for encoding a first data block using a first FEC code to generate a first set of parity symbols; a second FEC encoder for encoding the first data block using a second FEC code to generate a second set of parity symbols; and a transmitter for transmitting the first data block, along with the first set of parity symbols, to a link partner via a data link. In response to receiving a request for the second set of parity symbols from the link partner, the transmitter may transmit the second set of parity symbols to the link partner. In response to receiving a retransmission request from the link partner, the transmitter may retransmit the first data block, along with the first set of parity symbols, to the link partner.
[0064] One aspect of this application provides a system and method for improving the reliability of data transmission. During operation, a network node can receive a first data block from a link partner along with a first set of parity symbols generated using a first forward error correction (FEC) code. In response to detecting an uncorrectable error in the first data block based on the first set of parity symbols, the network node can send a request to the link partner to request a second set of parity symbols generated using a second FEC code and receive the second set of parity symbols. In response to detecting an uncorrectable error in the first data block based on the second set of parity symbols, the network node can send a retransmission request to the link partner and receive the retransmitted first data block along with the first set of parity symbols.
[0065] In this disclosure, the functionality includes multiple logical units capable of performing predetermined logical functions described throughout this disclosure. Figure 5 and Figure 6 The functions illustrated herein can be implemented using any form of hardware, software, or a combination thereof. For example, one or more processors, controllers, ASICs, PLAs, PALs, CPLDs, FPGAs, logic components, software routines, or other mechanisms can be implemented to form a circuit. In implementations, the various functions described herein can be implemented as discrete circuits, or the described functions and features can be shared partially or wholly among one or more circuits. Although the various features or elements of a function can be described or declared separately as separate functions, these features and functions can be shared among one or more common functions, and such description does not require or imply the need for separate circuits to implement such features or functions.
[0066] The methods and processes described in the Detailed Description section can be embodied in code and / or data, which can be stored in a computer-readable storage medium as described above. When a computer system reads and executes the code and / or data stored on the computer-readable storage medium, the computer system executes the methods and processes embodied in data structures and code and stored within the computer-readable storage medium.
[0067] The methods and processes described above may be included in hardware modules or devices. Hardware modules or devices may include, but are not limited to, application-specific integrated circuit (ASIC) chips, field-programmable gate arrays (FPGAs), dedicated or shared processors that execute specific software modules or code at specific times, and other programmable logic devices now known or developed later. When a hardware module or device is activated, it executes the methods and processes included therein.
[0068] The foregoing description is presented to enable any person skilled in the art to make and use the aspects and examples, and is provided in the context of a particular application and its requirements. Various modifications to the disclosed aspects will be apparent to those skilled in the art, and the general principles defined herein can be applied to other aspects and applications without departing from the spirit and scope of this disclosure. Therefore, the aspects described herein are not limited to those shown, but are intended to be consistent with the maximum scope of the principles and features disclosed herein.
[0069] Furthermore, the foregoing descriptions of the various aspects have been presented solely for illustrative and descriptive purposes. These descriptions are not intended to be exhaustive or to limit the aspects described herein to the disclosed forms. Accordingly, many modifications and variations will be apparent to those skilled in the art. Additionally, the foregoing disclosure is not intended to limit the aspects described herein. The scope of the aspects described herein is defined by the appended claims.
Claims
1. A method comprising: The first data block is encoded using a first forward error correction (FEC) code and a second FEC code to generate a first set of parity check symbols and a second set of parity check symbols, respectively. The first data block, along with the first set of parity symbols, is transmitted to the link partner via the data link. In response to receiving a request for the second set of parity symbols from the link partner, the second set of parity symbols is transmitted to the link partner; as well as In response to receiving a retransmission request from the link partner, the first data block, together with the first set of parity symbols, is retransmitted to the link partner.
2. The method of claim 1, wherein: The second FEC code is stronger than the first FEC code; or The second set of parity symbols is longer than the first set of parity symbols.
3. The method as described in claim 1, wherein, The first FEC code or the second FEC code includes the Reed-Solomon (RS) code.
4. The method of claim 1, wherein, The data link implements Link-Level Retransmission (LLR), and the retransmission request includes an LLR Negative Acknowledgment (NACK) message.
5. The method of claim 4, further comprising receiving the LLR NACK message from the link partner in response to the link partner detecting an uncorrectable error in the first data block based on the second set of parity symbols.
6. The method as described in claim 1, in, The first data block is associated with the first stream of data, and The method further includes encoding a second data block associated with the second stream data and transmitting the second data block to the link partner.
7. The method of claim 6, wherein, The first data block, the second data block, and the second set of parity symbols are transmitted sequentially based on availability.
8. The method of claim 1, wherein, The request for the second set of parity symbols is received from the link partner in response to the link partner detecting an uncorrectable error in the first data block based on the first set of parity symbols.
9. A network node, comprising: A first forward error correction (FEC) encoder is used to encode a first data block using a first FEC code to generate a first set of parity symbols. A second FEC encoder is used to encode the first data block using a second FEC code to generate a second set of parity check symbols. as well as A transmitter, the transmitter being used for: The first data block, along with the first set of parity symbols, is transmitted to the link partner via the data link. In response to receiving a request for the second set of parity symbols from the link partner, the second set of parity symbols is transmitted to the link partner; as well as In response to receiving a retransmission request from the link partner, the first data block, together with the first set of parity symbols, is retransmitted to the link partner.
10. The network node as described in claim 9, wherein: The second FEC code is stronger than the first FEC code; or The second set of parity symbols is longer than the first set of parity symbols.
11. The network node as described in claim 9, wherein, The first FEC code or the second FEC code includes the Reed-Solomon (RS) code.
12. The network node as described in claim 9, wherein, The data link implements Link-Level Retransmission (LLR), and the retransmission request includes an LLR Negative Acknowledgment (NACK) message.
13. The network node as described in claim 12, wherein, The LLR NACK message is received from the link partner in response to the link partner detecting an uncorrectable error in the first data block encoded based on the second set of parity symbols.
14. The network node as described in claim 9, in, The first data block is associated with the first stream of data, and The method further includes encoding a second data block associated with the second stream data and transmitting the second data block to the link partner.
15. The network node as described in claim 14, wherein, The transmitter is used to transmit the first data block, the second data block, and the second set of parity symbols in an order based on availability.
16. The network node as described in claim 9, wherein, The request for the second set of parity symbols is received from the link partner in response to the link partner detecting an uncorrectable error in the first data block based on the first set of parity symbols.
17. A method comprising: At the network node, the first data block is received from the link partner along with the first set of parity symbols generated using the first forward error correction (FEC) code; In response to the detection of an uncorrectable error in the first data block based on the first set of parity symbols, a request is sent to the link partner to request the use of the second set of parity symbols generated by the second FEC code; Receive the second set of parity symbols; In response to the detection of an uncorrectable error in the first data block based on the second set of parity symbols, a retransmission request is sent to the link partner; as well as The first data block to be retransmitted is received along with the first set of parity symbols.
18. The method of claim 17, wherein, The second FEC code is stronger than the first FEC code, and wherein the second set of parity symbols is longer than the first set of parity symbols, and wherein either the first FEC code or the second FEC code includes a Reed-Solomon (RS) code.
19. The method of claim 17, wherein, The data link implements Link-Level Retransmission (LLR), and the retransmission request includes an LLR Negative Acknowledgment (NACK) message.
20. The method of claim 17, wherein, The first data block is associated with the first stream of data, and The method further includes receiving a second data block associated with the second stream data from the link partner.