Communication signal short circuit detection device, method, equipment and storage medium

Abstract

This invention provides a communication signal short-circuit detection device, method, equipment, and storage medium. The device includes a detection mode control module, a signal preprocessing module, a multi-dimensional detection module, and an anomaly determination module. The detection mode control module switches to short-circuit detection matching the current communication stage based on a transmit or receive enable signal. The signal preprocessing module filters and synchronizes the original transmit and receive signals. The multi-dimensional detection module determines the short-circuit frame condition for each communication frame and outputs a valid short-circuit frame flag when the condition is met. The anomaly determination module dynamically calculates an adaptive threshold based on the current communication rate and the number of bits per frame, and outputs a short-circuit anomaly signal when the cumulative number of valid short-circuit frame flags reaches the threshold. This invention achieves blind-spot-free detection across all scenarios during both the transmit and receive stages. It significantly reduces the false positive rate through multi-dimensional joint determination, and the threshold can adaptively match different rates and frame lengths, exhibiting strong compatibility.

Description

Technical Field

[0001] This invention relates to the field of communication detection technology, and in particular to a communication signal short-circuit detection device, method, equipment, and storage medium. Background Technology

[0002] In serial communication systems, short circuits between the transmitter and receiver are a common fault. Failure to detect them promptly and accurately can lead to data transmission errors, equipment damage, or even system failure. Currently, existing technologies disclose short circuit detection schemes based on "detecting the number of signal changes during transmission." The core logic is: during the information transmission phase, by synchronizing the path delays of the transmitted and received signals, the number of level changes in each frame of signal is compared; a short circuit is determined when the number of changes is consistent and accumulates to a fixed threshold. However, this existing technology has the following significant shortcomings: First, there is a blind spot in the detection scenario—the scheme only starts detection during the information transmission stage and cannot cover the information reception stage (for example, when the slave sends data to the master, the receiving end of the master is short-circuited with its own transmitting end), which is prone to missed detection in full-duplex serial communication scenarios; Second, the anti-interference capability is weak—it only uses "consistent number of signal changes" as the sole criterion for judgment. When external electromagnetic interference causes the received signal to occasionally show the same number of changes as the transmitted signal, it is very easy to make a false judgment; Third, the threshold flexibility is poor—it uses a fixed short-circuit anomaly threshold and cannot adaptively adjust according to different communication rates (such as 1Mbps and 100Mbps) and frame lengths, which is prone to missed or false judgments in high-speed or long-frame communication scenarios.

[0003] In summary, the shortcomings of the existing technology urgently need to be addressed. Summary of the Invention

[0004] This invention provides a communication signal short-circuit detection device, method, equipment, and storage medium to overcome the deficiencies in the prior art and achieve technological advancements in areas such as detection scene coverage, anti-interference capability, and threshold self-adaptation.

[0005] This invention provides a communication signal short-circuit detection device, comprising: The detection mode control module has its input terminals connected to the transmit enable terminal and receive enable terminal of the communication device under test, respectively. The detection mode control module is used to trigger and switch to short-circuit detection matching the current communication stage according to the transmit enable signal or receive enable signal, and output a detection start signal. The signal preprocessing module has a first input terminal connected to the transmitting end of the communication device under test, a second input terminal connected to the receiving end of the communication device under test, and a third input terminal connected to the output terminal of the detection mode control unit. The signal preprocessing module is used to filter and synchronize the original transmitted signal and the original received signal, and output a preprocessed transmitted signal and a preprocessed received signal. A multi-dimensional detection module is provided, wherein its first input terminal is connected to the output terminal of the signal preprocessing module, and its second input terminal is connected to the frame synchronization signal. The multi-dimensional detection module is used to determine whether the short-circuit frame condition is met for each communication frame based on the preprocessed transmitted signal and the preprocessed received signal, and outputs a valid short-circuit frame flag when the condition is met. The short-circuit frame condition includes the signal change number consistency condition, the level sampling consistency condition, and the timing deviation rationality condition. An anomaly determination module is provided, wherein the first input terminal of the anomaly determination module is connected to the output terminal of the multi-dimensional detection module, and the second input terminal of the anomaly determination module is used to input the current communication rate and the number of bits per frame, to dynamically calculate the adaptive short-circuit anomaly threshold based on the current communication rate and the number of bits per frame, to accumulate the number of received valid short-circuit frame flags, and to output a short-circuit anomaly signal when the accumulated number of valid short-circuit frame flags reaches or exceeds the adaptive short-circuit anomaly threshold.

[0006] A short-circuit detection method for communication signals according to the present invention further includes: A short-circuit location module is provided. The first input terminal of the short-circuit location module is connected to the output terminal of the multi-dimensional detection module to receive a valid short-circuit frame flag. The second input terminal is connected to the signal of the internal detection point of the communication device under test, and the third input terminal is connected to the signal of the external communication port of the communication device under test. The module is used to compare the internal detection point signal with the external detection point signal and output a short-circuit location flag based on the comparison result.

[0007] According to a communication signal short-circuit detection method provided by the present invention, the short-circuit location module is further used for: When the internal detection point signal is normal but the external communication port signal is inconsistent with the internal detection point signal, but meets the short-circuit frame condition, an indicator representing a short circuit in the external transmission line is output. When both the internal detection point signal and the external communication port signal meet the short-circuit frame condition and deviate from the expected transmitted signal or the expected received signal, an indicator representing a short circuit in the internal circuit of the device is output.

[0008] According to a communication signal short-circuit detection method provided by the present invention, the multi-dimensional detection module includes: A change count counter is used to count the number of level transitions between the preprocessed transmitted signal and the preprocessed received signal within one frame, and output the difference in the number of transitions. A level sampling comparator is used to compare the level values ​​of the preprocessed transmitted signal and the preprocessed received signal at multiple preset sampling points within a frame time, and output a level consistency flag; Timing deviation calculator is used to calculate the frame start bit trigger time difference between the preprocessed transmitted signal and the preprocessed received signal, and output a timing pass flag; The valid short-circuit frame determination unit is connected to the change count counter, the level sampling comparator, and the timing deviation calculator, respectively, and is used to output a valid short-circuit frame flag when the change count difference is zero, the level consistency flag is valid, and the timing qualification flag is valid.

[0009] According to the communication signal short-circuit detection method provided by the present invention, the adaptive short-circuit anomaly threshold T in the adaptive threshold calculation and anomaly determination unit is calculated using the following formula: T = max(2, 1000 / (R×L) ) Where R is the communication rate and L is the number of bits per frame.

[0010] According to a communication signal short-circuit detection method provided by the present invention, the signal preprocessing module includes: A second-order RC low-pass filter is used to filter out high-frequency interference in the original transmitted and received signals. A delay line synchronizer is used to calibrate the timing deviation between the processed transmitted signal and the processed received signal.

[0011] A short-circuit detection method for communication signals provided by the present invention, The signal change frequency consistency condition includes: within one frame, the number of level transitions of the preprocessed transmitted signal and the preprocessed received signal are completely consistent; The level sampling consistency condition includes: at multiple preset sampling points within a frame time, the level values ​​of the preprocessed transmitted signal and the preprocessed received signal are all the same; The reasonableness conditions for the timing deviation include: the frame start bit trigger time difference between the preprocessed transmitted signal and the preprocessed received signal is less than or equal to 10% of the single bit period corresponding to the current communication rate.

[0012] The present invention also provides a method for detecting short circuits in communication signals, comprising: Based on the transmit enable signal or receive enable signal of the communication device under test, trigger and switch to short circuit detection that matches the current communication stage, and generate a detection start signal; In response to the detection start signal, the original transmitted signal from the transmitting end of the communication device under test and the original received signal from the receiving end are filtered and synchronized to generate a preprocessed transmitted signal and a preprocessed received signal. For each communication frame, based on the preprocessed transmitted signal and the preprocessed received signal, it is determined whether the short-circuit frame condition is met, and a valid short-circuit frame flag is output when the condition is met; wherein, the short-circuit frame condition includes the signal change number consistency condition, the level sampling consistency condition, and the timing deviation reasonableness condition; The adaptive short-circuit anomaly threshold is dynamically calculated based on the current communication rate and the number of bits per frame. The number of valid short-circuit frame flags received is accumulated, and a short-circuit anomaly signal is output when the accumulated number reaches or exceeds the adaptive short-circuit anomaly threshold.

[0013] The present invention also provides an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the program to implement the communication signal short-circuit detection method as described above.

[0014] The present invention also provides a non-transitory computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the communication signal short-circuit detection method as described above.

[0015] The present invention also provides a computer program product, including a computer program that, when executed by a processor, implements the communication signal short-circuit detection method as described above.

[0016] The communication signal short-circuit detection device, method, equipment, and storage medium provided by this invention, through the setting of a detection mode control module, whose input terminals are respectively connected to the transmit enable terminal and receive enable terminal of the communication device under test, automatically triggers and switches to short-circuit detection matching the current communication stage based on the transmit enable signal or receive enable signal, completely eliminating the detection blind spot in the receive stage of full-duplex serial communication, realizing full-process coverage of the transmit and receive stages, ensuring that short-circuit faults can be captured in a timely manner regardless of whether the device is in transmit or receive state, and guaranteeing the continuity and security of data transmission. Secondly, by setting a signal preprocessing module, the original transmit signal and the original receive signal are filtered and synchronously calibrated, which can effectively remove external high-frequency interference and calibrate the timing deviation of the two signals, providing high-quality and highly consistent preprocessed signals for subsequent multi-dimensional detection, significantly improving the reliability of detection. Furthermore, by setting up a multi-dimensional detection module, three conditions are simultaneously judged for each communication frame: consistency of signal change frequency, consistency of level sampling, and reasonableness of timing deviation. A valid short-circuit frame flag is only output when all three conditions are met. This multi-dimensional joint judgment mechanism can effectively filter out single-dimensional coincidences caused by electromagnetic interference, significantly reducing the false positive rate. Actual measurements show that the false positive rate is reduced by more than 90% compared to existing solutions. Finally, by setting up an anomaly judgment module, an adaptive short-circuit anomaly threshold is dynamically calculated based on the current communication rate and the number of bits per frame, and the number of valid short-circuit frame flags is accumulated. A short-circuit anomaly signal is only output when the accumulated number reaches or exceeds the adaptive threshold. This allows the threshold to automatically match different communication rates and frame length scenarios without manual configuration. In high-speed, short-frame scenarios, the threshold automatically decreases to avoid missed detections, while in low-speed, long-frame scenarios, the threshold remains within a reasonable range to avoid false positives, resulting in stronger compatibility. In summary, this invention has achieved significant technical advancements in detection scenario coverage, anti-interference capability, and threshold adaptation. Attached Figure Description

[0017] To more clearly illustrate the technical solutions in this invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0018] Figure 1 This is a schematic diagram of the communication signal short-circuit detection device provided by the present invention; Figure 2 This is a flowchart illustrating the communication signal short-circuit detection method provided by the present invention; Figure 3 This is a schematic diagram of the structure of the electronic device provided by the present invention. Detailed Implementation

[0019] To make the objectives, technical solutions, and advantages of this invention clearer, the technical solutions of this invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this invention. All other embodiments obtained by those skilled in the art based on the embodiments of this invention without creative effort are within the scope of protection of this invention.

[0020] To address the problems in existing technologies, this invention proposes a communication signal short-circuit detection device, achieving technological advancements in detection scene coverage, anti-interference capability, and threshold self-adaptation. The communication signal short-circuit detection device is described below, as follows: Figure 1 As shown, including but not limited to the following modules: The detection mode control module 110 has its input terminals connected to the transmit enable terminal and receive enable terminal of the communication device under test, respectively. The detection mode control module is used to trigger and switch to short-circuit detection matching the current communication stage according to the transmit enable signal or receive enable signal, and output a detection start signal.

[0021] The input terminals of the detection mode control module 110 are connected to the transmit enable terminal (TX_EN) and receive enable terminal (RX_EN) of the communication device under test, respectively. The core function of this module is to automatically trigger and switch to short-circuit detection matching the current communication phase based on the transmit or receive enable signal. Specifically, when the communication device under test is in the transmit state, the transmit enable signal is high, and the detection mode control module 110 responds to this high-level signal, triggering the "transmit phase short-circuit detection" mode and outputting a detection start signal (DET_START) to subsequent modules. When the communication device under test is in the receive state, the receive enable signal is high, and the detection mode control module 110 responds to this high-level signal, switching to the "receive phase short-circuit detection" mode and simultaneously outputting a detection start signal. Thus, regardless of whether the device is in the transmit or receive phase, detection can be initiated promptly, achieving blind-spot-free coverage in full-duplex serial communication scenarios. In a specific example, the detection mode control module 110 can be implemented using a 2-to-1 multiplexer (such as 74HC157). Its two inputs receive TX_EN and RX_EN respectively, and its output is connected to the detection start signal generation circuit. When TX_EN is high, the transmission detection mode is selected, and when RX_EN is high, the reception detection mode is selected.

[0022] The signal preprocessing module 120 has a first input terminal connected to the transmitting end of the communication device under test, a second input terminal connected to the receiving end of the communication device under test, and a third input terminal connected to the output terminal of the detection mode control unit. The signal preprocessing module is used to filter and synchronize the original transmitted signal and the original received signal, and output a preprocessed transmitted signal and a preprocessed received signal.

[0023] The first input terminal of the signal preprocessing module 120 is connected to the transmitting end of the communication device under test to obtain the original transmitted signal (TX_RAW); its second input terminal is connected to the receiving end of the communication device under test to obtain the original received signal (RX_RAW); and its third input terminal is connected to the output terminal of the detection mode control module 110 to receive the detection start signal. The signal preprocessing module 120 is configured to perform filtering and synchronization calibration on the original transmitted and received signals upon receiving the detection start signal. Filtering removes high-frequency electromagnetic interference from the external environment, and synchronization calibration compensates for the inherent delay differences between the transmitting and receiving paths, ensuring that the two signals maintain a high degree of timing consistency. After preprocessing, the signal preprocessing module 120 outputs a preprocessed transmitted signal (TX_PROC) and a preprocessed received signal (RX_PROC). In a specific example, filtering is implemented using a second-order RC low-pass filter with a cutoff frequency set to twice the current communication rate (e.g., a cutoff frequency of 20MHz when the communication rate is 10Mbps); synchronization calibration uses a delay line synchronizer, which uses multiple delay lines (e.g., 5 levels, each with a delay of 0.2ns) to calibrate the timing deviation between TX_PROC and RX_PROC to within 1ns.

[0024] A multi-dimensional detection module 130 is provided. The first input terminal of the multi-dimensional detection module is connected to the output terminal of the signal preprocessing module, and the second input terminal is connected to the frame synchronization signal. The multi-dimensional detection module is used to determine whether the short-circuit frame condition is met for each communication frame based on the preprocessed transmitted signal and the preprocessed received signal, and output a valid short-circuit frame flag when the condition is met. The short-circuit frame condition includes the signal change number consistency condition, the level sampling consistency condition, and the timing deviation rationality condition.

[0025] The first input terminal of the multi-dimensional detection module 130 is connected to the output terminal of the signal preprocessing module 120 to receive the preprocessed transmit signal and the preprocessed receive signal; its second input terminal is connected to the frame synchronization signal (FRAME_SYNC), which is provided by the frame controller inside the communication device and is used to identify the start and end positions of each frame. The multi-dimensional detection module 130 is configured to simultaneously determine whether the preprocessed transmit signal and the preprocessed receive signal meet the short-circuit frame condition for each communication frame. The short-circuit frame condition includes three dimensions: signal change frequency consistency condition, level sampling consistency condition, and timing deviation reasonableness condition. Only when all three conditions are met will the multi-dimensional detection module 130 output a valid short-circuit frame flag (SHORT_FRAME); otherwise, it will not output the flag or will output an invalid level.

[0026] Taking a full-duplex serial communication system as an example, with a communication rate of 10 Mbps and each frame containing 10 bits (1 bit low start level + 8 bits valid data + 1 bit high stop level), the frame period T = 10 bits / 10 Mbps = 1 μs. The signal change frequency consistency requirement is that the number of level transitions in the preprocessed transmitted signal and the preprocessed received signal must be exactly the same within one frame, for example, both must have 3 transitions. The level sampling consistency requirement is that the level values ​​of the preprocessed transmitted signal and the preprocessed received signal must be the same at three preset sampling points within one frame (e.g., 0.25 μs at 1 / 4 of the frame period, 0.5 μs at 1 / 2 of the frame period, and 0.75 μs at 3 / 4 of the frame period). The timing deviation reasonableness requirement is that the frame start bit trigger time difference between the preprocessed transmitted signal and the preprocessed received signal must be less than or equal to 10% of the single-bit period corresponding to the current communication rate (a single-bit period is 100 ns, so 10% is 10 ns). When the above three conditions are met simultaneously, the multi-dimensional detection module 130 outputs a valid short-circuit frame flag (SHORT_FRAME=1).

[0027] An anomaly determination module 140 has a first input terminal connected to the output terminal of the multi-dimensional detection module, and a second input terminal for receiving the current communication rate and the number of bits per frame. The module is used to dynamically calculate an adaptive short-circuit anomaly threshold based on the current communication rate and the number of bits per frame, accumulate the number of received valid short-circuit frame flags, and output a short-circuit anomaly signal when the accumulated number of valid short-circuit frame flags reaches or exceeds the adaptive short-circuit anomaly threshold.

[0028] The first input terminal of the anomaly determination module 140 is connected to the output terminal of the multi-dimensional detection module 130 to receive valid short-circuit frame flags; its second input terminal is used to input the current communication rate (R) and the number of bits per frame (L). The anomaly determination module 140 is configured to: first, dynamically calculate the adaptive short-circuit anomaly threshold T based on the current communication rate and the number of bits per frame; second, accumulate the number of received valid short-circuit frame flags (denoted as S); finally, when the accumulated number S reaches or exceeds the adaptive threshold T, output a short-circuit anomaly signal (SHORT_ERR), indicating that there is indeed a short-circuit fault in the communication line, rather than being caused by occasional interference.

[0029] The adaptive short-circuit anomaly threshold T is calculated using the formula: T = max(2, 1000 / (R×L) ), where R is in Mbps and L is in bits. This indicates rounding up. The `max` function ensures the threshold is at least 2, preventing false positives due to an excessively low threshold in low-speed, long-frame scenarios. Using the previous example of 10Mbps and 10 bits per frame, we calculate T = max(2, 1000 / (10×10) = max(2, 10) = 10. That is, when 10 valid short-circuit frames accumulate, the anomaly detection module 140 outputs a short-circuit anomaly signal. If the communication rate is increased to 100Mbps and each frame is still 10 bits, then T = max(2, 1000 / (100×10) The threshold is automatically lowered to adapt to high-speed, short-frame scenarios and avoid missed detections. If the communication rate is reduced to 1 Mbps and each frame increases to 64 bits, then T = max(2, 1) = 2. 1000 / (1×64) = max(2, 16) = 16, the threshold is increased to adapt to low-speed long frame scenes and avoid misjudgment due to occasional anomalies in a single frame.

[0030] Through the coordinated operation of the above modules, this device can initiate short-circuit detection in both the transmission and reception phases, filter interference using a multi-dimensional joint judgment mechanism, and adaptively adjust the anomaly judgment threshold based on communication parameters, thereby achieving accurate and reliable detection of short circuits in serial communication signals.

[0031] As a further optional embodiment, it also includes: A short-circuit location module is provided. The first input terminal of the short-circuit location module is connected to the output terminal of the multi-dimensional detection module to receive a valid short-circuit frame flag. The second input terminal is connected to the signal of the internal detection point of the communication device under test, and the third input terminal is connected to the signal of the external communication port of the communication device under test. The module is used to compare the internal detection point signal with the external detection point signal and output a short-circuit location flag based on the comparison result.

[0032] In this embodiment, the device may further include a short-circuit location module 150. See also Figure 1 The short-circuit location module 150 has its first input connected to the output of the multi-dimensional detection module 130 to receive a valid short-circuit frame flag (SHORT_FRAME); its second input connected to the signal of an internal detection point of the communication device under test, which can be, for example, set at the output of an internal driver circuit (denoted as TX_INT / RX_INT); and its third input connected to the signal of an external communication port of the communication device under test, which is the physical interface pin of the device (denoted as TX_EXT / RX_EXT). The short-circuit location module 150 is configured to: upon receiving a valid short-circuit frame flag, compare the internal detection point signal with the external communication port signal, and output a short-circuit location flag (POS_FLAG) based on the comparison result, to distinguish whether the short circuit occurred in the internal circuitry of the device or in the external transmission line.

[0033] Specifically, the short-circuit location module 150 makes the determination according to the following logic: If the internal detection point signal is normal (i.e., conforms to the expected transmission or reception logic of the device), but the external communication port signal is inconsistent with the internal detection point signal, but the external signal and the corresponding received signal (RX_PROC) or transmitted signal (TX_PROC) meet the short-circuit frame conditions (i.e., consistent number of transitions, consistent sampling level, and reasonable timing deviation), then it is determined to be "external transmission line short circuit", and a flag indicating the external short circuit (e.g., POS_FLAG=2) is output. If both the internal detection point signal and the external communication port signal meet the short-circuit frame condition, and both deviate from the expected transmitted or received signal (e.g., the waveform output by the internal drive circuit is distorted), then it is determined that "the internal circuit of the device is short-circuited", and a flag indicating the internal short circuit is output (e.g., POS_FLAG=1). If both are normal and the short-circuit frame condition is not met, then no short-circuit flag is output (e.g., POS_FLAG=0).

[0034] By adding the short-circuit location module 150, this device can not only determine whether a short circuit has occurred, but also accurately locate the specific location of the short circuit, narrowing the troubleshooting scope from "equipment + line" to a single module, significantly improving maintenance efficiency. For example, in a full-duplex serial communication system, when the host detects a short circuit anomaly, if the short-circuit location indicator shows "external transmission line short circuit," maintenance personnel can directly focus on checking the communication cable; if it indicates "internal circuit short circuit," the internal chip or circuit board can be directly replaced or repaired without checking the lines one by one, reducing the troubleshooting time to 1 / 5 of the existing solution.

[0035] As a further optional embodiment, the short-circuit location module is also used for: When the internal detection point signal is normal but the external communication port signal is inconsistent with the internal detection point signal, but meets the short-circuit frame condition, an indicator representing a short circuit in the external transmission line is output. When both the internal detection point signal and the external communication port signal meet the short-circuit frame condition and deviate from the expected transmitted signal or the expected received signal, an indicator representing a short circuit in the internal circuit of the device is output.

[0036] In this embodiment, when the internal detection point signal (e.g., the output of the chip's internal drive circuit, TX_INT or RX_INT) is normal, meaning the signal is consistent with the expected transmit or receive logic level sequence of the communication device under test in the current operating phase, and the external communication port signal (e.g., TX_EXT or RX_EXT at the device's external physical interface) is inconsistent with the internal detection point signal, but the external communication port signal and the corresponding other signal (e.g., the receive signal RX_PROC or the transmit signal TX_PROC) satisfy the short-circuit frame condition (i.e., consistent signal change count, consistent sampling point level, and timing deviation within a reasonable range), the short-circuit location module 150 outputs a location flag indicating "external transmission line short circuit." This situation indicates that the internal circuit of the device is working normally, but the signal short-circuits with another signal line after being output to the external port due to cable twisting, interface short circuit, or other reasons. Therefore, the fault point is located on the external transmission line.

[0037] When both the internal detection point signal and the external communication port signal meet the short-circuit frame condition, and both signals deviate from the expected transmitted or received signal of the communication device under test in the current operating phase (e.g., level sequence error, timing disorder, or waveform distortion), the short-circuit location module 150 outputs a location marker indicating "internal circuit short circuit in the device." This indicates that the short-circuit fault occurs inside the device, such as a short circuit between chip pins due to soldering bridging, dielectric breakdown, etc., causing the signal output by the internal drive circuit to be abnormal, and this abnormal signal is directly coupled to the external port.

[0038] Through the aforementioned two-level judgment logic, the short-circuit location module 150 can accurately distinguish the source of the short-circuit fault, providing maintenance personnel with clear fault location instructions, thereby significantly reducing troubleshooting time and maintenance costs. In practical applications, the judgment result can be reported to the host computer or display interface along with the short-circuit abnormal signal (SHORT_ERR), presented in a straightforward manner, such as "External line short circuit - please check the communication cable" or "Internal circuit short circuit - please replace the device motherboard".

[0039] As a further optional embodiment, the multi-dimensional detection module includes: A change count counter is used to count the number of level transitions between the preprocessed transmitted signal and the preprocessed received signal within one frame, and output the difference in the number of transitions. A level sampling comparator is used to compare the level values ​​of the preprocessed transmitted signal and the preprocessed received signal at multiple preset sampling points within a frame time, and output a level consistency flag; Timing deviation calculator is used to calculate the frame start bit trigger time difference between the preprocessed transmitted signal and the preprocessed received signal, and output a timing pass flag; The valid short-circuit frame determination unit is connected to the change count counter, the level sampling comparator, and the timing deviation calculator, respectively, and is used to output a valid short-circuit frame flag when the change count difference is zero, the level consistency flag is valid, and the timing qualification flag is valid.

[0040] In this embodiment, the multi-dimensional detection module 130 can be implemented using specific hardware sub-modules. Specifically, the multi-dimensional detection module 130 includes a change count counter, a level sampling comparator, a timing deviation calculator, and a valid short-circuit frame determination unit.

[0041] A change count counter (e.g., a 74HC161 binary counter) is connected to the preprocessed transmit signal (TX_PROC) and the preprocessed receive signal (RX_PROC), respectively. This counter, triggered by a rising edge, counts the number of level transitions (i.e., the number of transitions from high to low or from low to high) of TX_PROC and RX_PROC within each frame. It then calculates the difference (ΔC) between the two transition counts and outputs this difference to the valid short-circuit frame determination unit.

[0042] The level sampling comparator (e.g., using an LM339 voltage comparator) also receives TX_PROC and RX_PROC, and receives the frame synchronization signal (FRAME_SYNC) as the sampling trigger. This comparator selects multiple preset sampling points (e.g., three sampling points, located at 1 / 4, 1 / 2, and 3 / 4 of the frame period after the start of the frame, respectively) within each frame time, and compares the level values ​​of TX_PROC and RX_PROC at each sampling point. If the level values ​​at all sampling points are consistent, the output level consistency flag (LEVEL_OK) is valid (e.g., high level); otherwise, the output is invalid.

[0043] A timing deviation calculator (e.g., using a CD4060 timer) is used to calculate the frame start bit trigger time difference (ΔT) between TX_PROC and RX_PROC. The frame start bit is typically low. The timing deviation calculator detects the time difference between the two signals from the start of the frame synchronization signal to the first low-level edge and compares this time difference with the single-bit period corresponding to the current communication rate. If ΔT is less than or equal to 10% of the single-bit period, the timing pass flag (DELAY_OK) is output as valid; otherwise, the output is invalid.

[0044] The valid short-circuit frame determination unit is connected to the outputs of the change count counter, the level sampling comparator, and the timing deviation calculator, respectively. This determination unit can be implemented using AND gate logic circuits, with its three inputs receiving the change count difference ΔC, the level consistency flag LEVEL_OK, and the timing compliance flag DELAY_OK, respectively. The valid short-circuit frame determination unit outputs a valid short-circuit frame flag (SHORT_FRAME=1) only when all three conditions are simultaneously met: ΔC=0 (i.e., the number of transitions is completely consistent), LEVEL_OK=1 (i.e., all sampling points have consistent levels), and DELAY_OK=1 (i.e., the timing deviation is within the allowable range); otherwise, it outputs an invalid level.

[0045] Through the coordinated operation of the aforementioned hardware sub-modules, the multi-dimensional detection module 130 can perform synchronous detection of three dimensions on each frame of signal in real time and in parallel using a purely digital logic approach. This ensures that a valid short-circuit frame flag is output only when the short-circuit characteristics are truly met, thus providing an accurate and reliable basis for subsequent cumulative judgment. This digital circuit implementation method eliminates the need for additional analog detection circuits, offering advantages such as low cost and good compatibility.

[0046] As a further optional embodiment, in the adaptive threshold calculation and anomaly determination unit, the adaptive short-circuit anomaly threshold T is calculated using the following formula: T = max(2, 1000 / (R×L) ) Where R is the communication rate and L is the number of bits per frame.

[0047] In this embodiment, the adaptive short-circuit anomaly threshold T in the anomaly determination module 140 is calculated using the following formula: T = max(2, 1000 / (R×L) ), where R is the current communication rate in Mbps, and L is the number of bits per frame in bits. · The expression indicates rounding up, and the `max` function ensures the threshold is at least 2. This formula is designed to fully consider the impact of communication rate and frame length on short-circuit detection sensitivity. Specifically, when the communication rate R is high or the number of bits per frame L is large, the product of R×L increases, the value of 1000 / (R×L) decreases, and the calculated threshold T decreases accordingly. This allows for faster triggering of short-circuit anomaly detection in high-speed, short-frame scenarios, avoiding missed detections due to excessively high thresholds. Conversely, when the communication rate is low or the number of bits per frame is small, the threshold T automatically increases. In low-speed, long-frame scenarios, more valid short-circuit frames need to be accumulated to trigger anomaly detection, effectively filtering out occasional interference and avoiding false positives. Taking specific values ​​as an example: if the communication rate R = 10 Mbps and the number of bits per frame L = 10 bits, then R × L = 100, 1000 / 100 = 10, T = max(2,10) = 10; if R = 100 Mbps and L = 10 bits, then R × L = 1000, 1000 / 1000 = 1, T = max(2,1) = 2; if R = 1 Mbps and L = 64 bits, then R × L = 64, 1000 / 64 ≈ 15.625, rounded up to 16, T = max(2,16) = 16. It can be seen that this formula can dynamically adjust the threshold according to the actual communication parameters, without manual configuration, and is compatible with serial communication scenarios with different rates from 1 Mbps to 100 Mbps and different frame lengths from 8 bits to 64 bits, significantly improving the device's scenario adaptability.

[0048] As a further optional embodiment, the signal preprocessing module includes: A second-order RC low-pass filter is used to filter out high-frequency interference in the original transmitted and received signals. A delay line synchronizer is used to calibrate the timing deviation between the processed transmitted signal and the processed received signal.

[0049] In this embodiment, the signal preprocessing module 120 includes a second-order RC low-pass filter and a delay line synchronizer. The second-order RC low-pass filter filters the original transmitted signal (TX_RAW) and the original received signal (RX_RAW) to remove high-frequency electromagnetic interference from the external environment. The cutoff frequency of this filter is set to twice the current communication rate; for example, when the communication rate is 10Mbps, the cutoff frequency is 20MHz, thereby effectively suppressing noise components higher than 20MHz while retaining effective signal components. The delay line synchronizer calibrates the timing deviation between the preprocessed transmitted signal (TX_PROC) and the preprocessed received signal (RX_PROC). Due to the inherent delay differences between the transmitted and received paths in physical transmission and circuit processing, the delay line synchronizer uses multiple adjustable delay lines (e.g., 5 levels, each with a delay of 0.2ns) to finely adjust the timing of one of the signals, ensuring that the timing deviation between the two signals is calibrated to within 1ns before entering the multi-dimensional detection module 130. Through the coordinated operation of the aforementioned RC second-order low-pass filter and delay line synchronizer, the signal preprocessing module 120 can output a high-quality, high-timing-consistency preprocessed signal, providing a reliable data foundation for subsequent multi-dimensional short-circuit detection, thereby further improving the detection accuracy and anti-interference capability.

[0050] As a further optional embodiment, the signal change number consistency condition includes: within one frame, the number of level transitions of the preprocessed transmitted signal and the preprocessed received signal are completely consistent; The level sampling consistency condition includes: at multiple preset sampling points within a frame time, the level values ​​of the preprocessed transmitted signal and the preprocessed received signal are all the same; The reasonableness conditions for the timing deviation include: the frame start bit trigger time difference between the preprocessed transmitted signal and the preprocessed received signal is less than or equal to 10% of the single bit period corresponding to the current communication rate.

[0051] In this embodiment, the signal change frequency consistency condition includes: within one frame, the number of level transitions of the preprocessed transmitted signal and the preprocessed received signal are completely consistent. That is, the number of high-low level transitions of each signal is counted during the entire frame period from the start of the frame to the end of the frame. If the number of transitions is equal, the condition is satisfied.

[0052] The level sampling consistency condition includes: at multiple preset sampling points within a frame time, the level values ​​of the preprocessed transmitted signal and the preprocessed received signal are all the same. Preferably, the multiple preset sampling points are three, located at 1 / 4, 1 / 2, and 3 / 4 of the frame period, respectively. The condition is satisfied when the level values ​​of the two signals at these three sampling points are all the same.

[0053] The timing deviation reasonableness condition includes: the frame start bit trigger time difference between the preprocessed transmitted signal and the preprocessed received signal is less than or equal to 10% of the single bit period corresponding to the current communication rate. The frame start bit is usually low level. This condition requires that the time difference between the two signals from the frame synchronization signal trigger to the first low level edge does not exceed one-tenth of the single bit period, thereby ensuring that the two signals have a reasonable synchronization relationship in timing.

[0054] With the above specific conditions in place, the multi-dimensional detection module can quantify and judge each frame of signal with clear numerical indicators, which not only ensures the accuracy of detection, but also facilitates the implementation of hardware circuits and parameter configuration.

[0055] The communication signal short-circuit detection method provided by the present invention is described below, such as... Figure 2 As shown, the communication signal short-circuit detection device described below and the communication signal short-circuit detection method described above can be referred to in correspondence.

[0056] A method for detecting short circuits in communication signals, comprising: Step 210: Based on the transmit enable signal or receive enable signal of the communication device under test, trigger and switch to short circuit detection that matches the current communication stage, and generate a detection start signal; Step 220: In response to the detection start signal, filter and synchronize the original transmitted signal from the transmitting end of the communication device under test and the original received signal from the receiving end to generate a preprocessed transmitted signal and a preprocessed received signal. Step 230: For each communication frame, determine whether the short-circuit frame condition is met based on the preprocessed transmitted signal and the preprocessed received signal, and output a valid short-circuit frame flag when the condition is met; wherein, the short-circuit frame condition includes the signal change number consistency condition, the level sampling consistency condition, and the timing deviation reasonableness condition. Step 240: Dynamically calculate the adaptive short-circuit anomaly threshold based on the current communication rate and the number of bits per frame, accumulate the number of valid short-circuit frame flags received, and output a short-circuit anomaly signal when the accumulated number reaches or exceeds the adaptive short-circuit anomaly threshold.

[0057] Figure 3 An example is a schematic diagram of the physical structure of an electronic device, such as... Figure 3As shown, the electronic device may include: a processor 310, a communications interface 320, a memory 330, and a communication bus 340, wherein the processor 310, the communications interface 320, and the memory 330 communicate with each other via the communication bus 340. The processor 310 can call logical instructions in the memory 330 to execute a communication signal short-circuit detection method, which includes: Based on the transmit enable signal or receive enable signal of the communication device under test, trigger and switch to short circuit detection that matches the current communication stage, and generate a detection start signal; In response to the detection start signal, the original transmitted signal from the transmitting end of the communication device under test and the original received signal from the receiving end are filtered and synchronized to generate a preprocessed transmitted signal and a preprocessed received signal. For each communication frame, based on the preprocessed transmitted signal and the preprocessed received signal, it is determined whether the short-circuit frame condition is met, and a valid short-circuit frame flag is output when the condition is met; wherein, the short-circuit frame condition includes the signal change number consistency condition, the level sampling consistency condition, and the timing deviation reasonableness condition; The adaptive short-circuit anomaly threshold is dynamically calculated based on the current communication rate and the number of bits per frame. The number of valid short-circuit frame flags received is accumulated, and a short-circuit anomaly signal is output when the accumulated number reaches or exceeds the adaptive short-circuit anomaly threshold.

[0058] Furthermore, the logical instructions in the aforementioned memory 330 can be implemented as software functional units and, when sold or used as independent products, can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, essentially, or the part that contributes to the prior art, or a part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of the present invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0059] On the other hand, the present invention also provides a computer program product, the computer program product comprising a computer program that can be stored on a non-transitory computer-readable storage medium, wherein when the computer program is executed by a processor, the computer is able to execute the communication signal short-circuit detection method provided by the above methods, the method comprising: Based on the transmit enable signal or receive enable signal of the communication device under test, trigger and switch to short circuit detection that matches the current communication stage, and generate a detection start signal; In response to the detection start signal, the original transmitted signal from the transmitting end of the communication device under test and the original received signal from the receiving end are filtered and synchronized to generate a preprocessed transmitted signal and a preprocessed received signal. For each communication frame, based on the preprocessed transmitted signal and the preprocessed received signal, it is determined whether the short-circuit frame condition is met, and a valid short-circuit frame flag is output when the condition is met; wherein, the short-circuit frame condition includes the signal change number consistency condition, the level sampling consistency condition, and the timing deviation reasonableness condition; The adaptive short-circuit anomaly threshold is dynamically calculated based on the current communication rate and the number of bits per frame. The number of valid short-circuit frame flags received is accumulated, and a short-circuit anomaly signal is output when the accumulated number reaches or exceeds the adaptive short-circuit anomaly threshold.

[0060] In another aspect, the present invention also provides a non-transitory computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the communication signal short-circuit detection method provided by the methods described above, the method comprising: Based on the transmit enable signal or receive enable signal of the communication device under test, trigger and switch to short circuit detection that matches the current communication stage, and generate a detection start signal; In response to the detection start signal, the original transmitted signal from the transmitting end of the communication device under test and the original received signal from the receiving end are filtered and synchronized to generate a preprocessed transmitted signal and a preprocessed received signal. For each communication frame, based on the preprocessed transmitted signal and the preprocessed received signal, it is determined whether the short-circuit frame condition is met, and a valid short-circuit frame flag is output when the condition is met; wherein, the short-circuit frame condition includes the signal change number consistency condition, the level sampling consistency condition, and the timing deviation reasonableness condition; The adaptive short-circuit anomaly threshold is dynamically calculated based on the current communication rate and the number of bits per frame. The number of valid short-circuit frame flags received is accumulated, and a short-circuit anomaly signal is output when the accumulated number reaches or exceeds the adaptive short-circuit anomaly threshold.

[0061] The device embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs. Those skilled in the art can understand and implement this without any creative effort.

[0062] Through the above description of the embodiments, those skilled in the art can clearly understand that each embodiment can be implemented by means of software plus necessary general-purpose hardware platforms, and of course, it can also be implemented by hardware. Based on this understanding, the above technical solutions, in essence or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, magnetic disk, optical disk, etc., and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute the methods described in the various embodiments or some parts of the embodiments.

[0063] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A communication signal short detection apparatus, characterized by comprising: include: The detection mode control module has its input terminals connected to the transmit enable terminal and receive enable terminal of the communication device under test, respectively. The detection mode control module is used to trigger and switch to short-circuit detection matching the current communication stage according to the transmit enable signal or receive enable signal, and output a detection start signal. The signal preprocessing module has a first input terminal connected to the transmitting end of the communication device under test, a second input terminal connected to the receiving end of the communication device under test, and a third input terminal connected to the output terminal of the detection mode control unit. The signal preprocessing module is used to filter and synchronize the original transmitted signal and the original received signal, and output a preprocessed transmitted signal and a preprocessed received signal. A multi-dimensional detection module is provided, wherein its first input terminal is connected to the output terminal of the signal preprocessing module, and its second input terminal is connected to the frame synchronization signal. The multi-dimensional detection module is used to determine whether the short-circuit frame condition is met for each communication frame based on the preprocessed transmitted signal and the preprocessed received signal, and outputs a valid short-circuit frame flag when the condition is met. The short-circuit frame condition includes the signal change number consistency condition, the level sampling consistency condition, and the timing deviation rationality condition. An anomaly determination module is provided, wherein the first input terminal of the anomaly determination module is connected to the output terminal of the multi-dimensional detection module, and the second input terminal of the anomaly determination module is used to input the current communication rate and the number of bits per frame, to dynamically calculate the adaptive short-circuit anomaly threshold based on the current communication rate and the number of bits per frame, to accumulate the number of received valid short-circuit frame flags, and to output a short-circuit anomaly signal when the accumulated number of valid short-circuit frame flags reaches or exceeds the adaptive short-circuit anomaly threshold.

2. The communication signal short-circuit detection device according to claim 1, characterized in that, Also includes: A short-circuit location module is provided. The first input terminal of the short-circuit location module is connected to the output terminal of the multi-dimensional detection module to receive a valid short-circuit frame flag. The second input terminal is connected to the signal of the internal detection point of the communication device under test, and the third input terminal is connected to the signal of the external communication port of the communication device under test. The module is used to compare the internal detection point signal with the external detection point signal and output a short-circuit location flag based on the comparison result.

3. The communication signal short-circuit detection device according to claim 1, characterized in that, The short-circuit location module is also used for: When the internal detection point signal is normal but the external communication port signal is inconsistent with the internal detection point signal, but meets the short-circuit frame condition, an indicator representing a short circuit in the external transmission line is output. When both the internal detection point signal and the external communication port signal meet the short-circuit frame condition and deviate from the expected transmitted signal or the expected received signal, an indicator representing a short circuit in the internal circuit of the device is output.

4. The communication signal short-circuit detection device according to claim 1, characterized in that, The multi-dimensional detection module includes: A change count counter is used to count the number of level transitions between the preprocessed transmitted signal and the preprocessed received signal within one frame, and output the difference in the number of transitions. A level sampling comparator is used to compare the level values ​​of the preprocessed transmitted signal and the preprocessed received signal at multiple preset sampling points within a frame time, and output a level consistency flag; Timing deviation calculator is used to calculate the frame start bit trigger time difference between the preprocessed transmitted signal and the preprocessed received signal, and output a timing pass flag; The valid short-circuit frame determination unit is connected to the change count counter, the level sampling comparator, and the timing deviation calculator, respectively, and is used to output a valid short-circuit frame flag when the change count difference is zero, the level consistency flag is valid, and the timing qualification flag is valid.

5. The communication signal short-circuit detection device according to claim 1, characterized in that, In the adaptive threshold calculation and anomaly determination unit, the adaptive short-circuit anomaly threshold T is calculated using the following formula: T = max(2, 1000 / (R×L) ) Where R is the communication rate and L is the number of bits per frame.

6. The communication signal short-circuit detection device according to claim 1, characterized in that, The signal preprocessing module includes: A second-order RC low-pass filter is used to filter out high-frequency interference in the original transmitted and received signals. A delay line synchronizer is used to calibrate the timing deviation between the processed transmitted signal and the processed received signal.

7. The communication signal short-circuit detection device according to claim 1, characterized in that, The signal change frequency consistency condition includes: within one frame, the number of level transitions of the preprocessed transmitted signal and the preprocessed received signal are completely consistent; The level sampling consistency condition includes: at multiple preset sampling points within a frame time, the level values ​​of the preprocessed transmitted signal and the preprocessed received signal are all the same; The reasonableness conditions for the timing deviation include: the frame start bit trigger time difference between the preprocessed transmitted signal and the preprocessed received signal is less than or equal to 10% of the single bit period corresponding to the current communication rate.

8. A method for detecting short circuits in communication signals, characterized in that, include: Based on the transmit enable signal or receive enable signal of the communication device under test, trigger and switch to short circuit detection that matches the current communication stage, and generate a detection start signal; In response to the detection start signal, the original transmitted signal from the transmitting end of the communication device under test and the original received signal from the receiving end are filtered and synchronized to generate a preprocessed transmitted signal and a preprocessed received signal. For each communication frame, based on the preprocessed transmitted signal and the preprocessed received signal, it is determined whether the short-circuit frame condition is met, and a valid short-circuit frame flag is output when the condition is met; wherein, the short-circuit frame condition includes the signal change number consistency condition, the level sampling consistency condition, and the timing deviation reasonableness condition; The adaptive short-circuit anomaly threshold is dynamically calculated based on the current communication rate and the number of bits per frame. The number of valid short-circuit frame flags received is accumulated, and a short-circuit anomaly signal is output when the accumulated number reaches or exceeds the adaptive short-circuit anomaly threshold.

9. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, When the processor executes the program, it implements the communication signal short-circuit detection method as described in claim 7.

10. A non-transitory computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by the processor, it implements the communication signal short-circuit detection method as described in claim 7.

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