An HDMI splicing output system and method based on ARM SoC

By combining ARM SoC modules and FPGAs, a low-cost, high-efficiency HDMI splicing output based on the ARM SoC platform is achieved, solving the problems of high hardware cost and poor flexibility in existing technologies, and providing a flexible splicing configuration and real-time synchronized multi-screen display solution.

CN122496672APending Publication Date: 2026-07-31SHENZHEN HUIDU TECH
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
SHENZHEN HUIDU TECH
Filing Date
2026-04-14
Publication Date
2026-07-31

AI Technical Summary

Technical Problem

Existing multi-screen splicing technologies rely on dedicated hardware, which is costly and lacks flexibility. The ARM SoC platform has not yet been widely used in large-scale display splicing systems, making it difficult to achieve low-cost, high-efficiency HDMI splicing output.

Method used

By leveraging the computing power of the ARM SoC module and multiple HDMI output interfaces, combined with a TTL signal conversion module and FPGA, multiple display devices can be spliced ​​together. The image processing unit performs signal processing and splicing, and the FPGA is used for further data processing and logic control, supporting user configuration management.

Benefits of technology

It achieves low-cost, high-efficiency multi-screen splicing, improves system flexibility, enhances image synchronization, avoids screen tearing and delay, and provides strong user operability.

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Abstract

This invention relates to an HDMI splicing output system and method based on an ARM SoC. The system includes an ARM SoC module, a TTL signal conversion module, and an FPGA. The ARM SoC module includes multiple HDMI input ports and multiple HDMI output ports. An image processing unit is internally configured within the ARM SoC module to process multiple HDMI video signals input through the HDMI input ports, and distributes the processed image signals to each HDMI output port before outputting them to the TTL signal conversion module. The input terminals of the TTL signal conversion module are connected to the multiple HDMI output ports, and it converts the HDMI video signals output from the ARM SoC module into TTL level signals. The FPGA is connected to the TTL signal conversion module via a TTL line, and it receives the TTL level signals, performs further data processing and logic control, and then outputs them to multiple display devices for splicing display. This invention utilizes the computing power of the ARM SoC platform and multiple HDMI output interfaces to achieve splicing output from multiple display devices, reducing hardware costs and improving system flexibility.
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Description

Technical Field

[0001] This invention relates to the fields of image processing and multi-screen display technology, and in particular to an HDMI splicing output system and method based on ARM SoC. Background Technology

[0002] With the development of high-definition display technology, the demand for multi-display device splicing output is increasing. Applications such as video walls, advertising screens, and information publishing systems all require multiple displays to show content. However, existing multi-screen splicing technologies typically rely on dedicated hardware solutions, resulting in high costs and poor flexibility. Although some solutions based on PCs or embedded platforms are emerging, the low power consumption and high integration of ARM SoCs have not yet allowed for widespread application in large-scale display splicing systems. Therefore, how to achieve low-cost, high-efficiency HDMI splicing output using the ARM SoC platform remains a challenge in technology development. Summary of the Invention

[0003] This invention provides an HDMI splicing output system and method based on ARM SoC, which aims to utilize the computing power of the ARM SoC platform and multiple HDMI output interfaces to realize splicing output of multiple display devices, reduce hardware costs and improve system flexibility.

[0004] This invention provides an HDMI splicing output system based on an ARM SoC, comprising: an ARM SoC module, a TTL signal conversion module, and an FPGA; The ARM SoC module includes multiple HDMI input ports and multiple HDMI output ports; the ARM SoC module has an internal image processing unit for processing multiple HDMI video signals input through the HDMI input ports, distributing the processed image signals to each of the HDMI output ports, and then outputting them to the TTL signal conversion module. The input terminal of the TTL signal conversion module is connected to the multiple HDMI output ports and is used to convert the HDMI video signal output by the ARM SoC module into a TTL level signal. The FPGA is connected to the TTL signal conversion module via a TTL line, which receives the TTL level signal, performs further data processing and logic control, and then outputs it to multiple display devices for splicing display.

[0005] A further technical solution of the present invention is that the step of the image processing unit processing multiple HDMI video signals input through the HDMI input port includes: placing each input HDMI video signal at a different predetermined position on a canvas for image stitching, scaling or stretching the input image to adjust the resolution, and performing color correction and brightness / contrast adjustment on the image for color correction.

[0006] A further technical solution of the present invention is that the canvas is implemented through a frame buffer; One video port of the ARM SoC module is configured to drive at least two physical HDMI output ports. The total width of the frame buffer is the sum of the widths of the display devices connected to the at least two HDMI output ports. The frame buffer is divided in the horizontal direction, and the different regions after division are independently output to the corresponding HDMI output ports. The content output by the at least two HDMI output ports is independent but has a consistent frame rate and timing.

[0007] A further technical solution of the present invention is that the plurality of HDMI input ports include HDMI IN1, HDMI IN2, and HDMI IN3; and the plurality of HDMI output ports include HDMI OUT1 and HDMI OUT2.

[0008] A further technical solution of the present invention is that the image processing unit includes a graphics processing unit and / or a video processing unit.

[0009] A further technical solution of the present invention is that the TTL signal conversion module includes an HDMI to TTL chip.

[0010] A further technical solution of the present invention is that the FPGA performs further data processing and logic control including at least one of image optimization, resolution enhancement, data stream rearrangement, dynamic adjustment of splicing area or fine control of output signal.

[0011] A further technical solution of the present invention includes a user interface and configuration management module, which provides interface management software for users to configure multiple HDMI input and output splicing modes, resolutions and input source parameters, and supports users to adjust display content and splicing methods in real time, as well as quickly switch between different splicing modes, screen layouts and display content.

[0012] To achieve the above objectives, the present invention also proposes an HDMI splicing output method based on an ARM SoC, which is applied to the ARM SoC-based HDMI splicing output system described above. The method includes the following steps: Step S10: Receive multiple HDMI video signals through the multiple HDMI input ports of the ARM SoC module; Step S20: The multi-channel HDMI video signals are processed by the image processing unit inside the ARM SoC module. The processing includes signal splicing, resolution adjustment and color correction. Step S30: Distribute the processed HDMI video signal to each HDMI output port of the ARM SoC module; Step S40: The processed HDMI video signal is transmitted to the TTL signal conversion module through the HDMI output port; Step S50: The HDMI video signal output by the ARM SoC module is converted into a TTL level signal through the TTL signal conversion module; Step S60: The TTL level signal is further processed and logic controlled by the FPGA and then output to multiple display devices for splicing display.

[0013] The beneficial effects of the HDMI splicing output system and method based on ARM SoC of this invention are: 1. Low cost and high efficiency: This invention utilizes the high integration and low power consumption of the ARM SoC module to significantly reduce system cost and improve system efficiency compared to traditional hardware solutions.

[0014] 2. Flexible splicing configuration: Through the computing power of the ARM SoC module, the system can flexibly perform display splicing, including multiple splicing methods and display modes, to adapt to the needs of different scenarios.

[0015] 3. Real-time synchronous output: The system can ensure image synchronization between multiple HDMI output interfaces, avoiding screen tearing and delay, and improving display quality.

[0016] 4. Easy to configure and manage: Through the configuration management of the user interface, users can easily set up and adjust the multi-screen splicing scheme, which has high operability. Attached Figure Description

[0017] Figure 1 The system architecture diagram of a preferred embodiment of the HDMI splicing output system based on ARM SoC of the present invention; Figure 2 This is a flowchart illustrating a preferred embodiment of the HDMI splicing output method based on ARM SoC of the present invention. Detailed Implementation

[0018] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments.

[0019] This invention proposes an HDMI splicing output system based on an ARM SoC, such as... Figure 1 As shown, a preferred embodiment of the HDMI splicing output system based on ARMSoC of the present invention includes an ARM SoC module, a TTL signal conversion module, and an FPGA.

[0020] The ARM SoC module includes multiple HDMI input ports and multiple HDMI output ports. The ARM SoC module has an internal image processing unit for processing multiple HDMI video signals input through the HDMI input ports, distributing the processed image signals to each of the HDMI output ports, and then outputting them to the TTL signal conversion module.

[0021] The input terminal of the TTL signal conversion module is connected to the multiple HDMI output ports, and is used to convert the HDMI video signal output by the ARM SoC module into a TTL level signal.

[0022] The FPGA is connected to the TTL signal conversion module via a TTL line, and is used to receive the TTL level signal and perform further data processing and logic control.

[0023] Furthermore, in this embodiment, the step of the image processing unit processing multiple HDMI video signals input through the HDMI input port includes: placing each input HDMI video signal at a different predetermined position on a canvas for image stitching, scaling or stretching the input image to adjust the resolution, and performing color correction and brightness / contrast adjustment on the image for color correction.

[0024] In this embodiment, the image processing unit includes a graphics processing unit and / or a video processing unit. The ARMSoC module includes multiple HDMI input ports and multiple HDMI output ports, for example... Figure 1 The input ports shown are HDMI IN1, HDMI IN2, and HDMI IN3, and the output ports are HDMI OUT1 and HDMI OUT2. Each input signal enters the ARM SoC module through the HDMI input port. The image processing unit inside the ARM SoC module processes the HDMI video signal, including signal splicing, resolution adjustment, and color correction. The processed image is then distributed to the respective output ports to form a spliced ​​image.

[0025] During the image stitching process, each HDMI video signal is placed in a different position on the "canvas," for example, HDMI1 is displayed on the left half and HDMI2 on the right half. The GPU or VPU inside the ARM SoC module is responsible for combining the signals into a complete image.

[0026] During resolution adjustment, if the HDMI video signal resolution is inconsistent with the final display screen, it will automatically scale or stretch to make all input image sizes match the output screen.

[0027] During color calibration, the image undergoes color correction and brightness / contrast adjustment to ensure that the final image has natural colors and consistent colors between different HDMI video signals.

[0028] Furthermore, in this embodiment, the canvas is implemented through a frame buffer; one video port of the ARM SoC module is configured to drive at least two physical HDMI output ports, the total width of the frame buffer is the sum of the widths of the display devices connected to the at least two HDMI output ports, the frame buffer is divided in the horizontal direction, and the different regions after division are independently output to the corresponding HDMI output ports, and the content output by the at least two HDMI output ports is independent but has a consistent frame rate and timing.

[0029] In this embodiment, the ARM SoC module processes each HDMI video signal internally, splicing and synchronizing the video signals. Tasks such as image segmentation, format conversion, and synchronized output are all performed by the image processing module within the ARM SoC module. Each output signal is transmitted to the connected display device through the HDMI output port, enabling splicing display of multiple screens.

[0030] As one implementation scheme, in this embodiment, a Video Port (VP) can output to two display interfaces to display different content, dividing the framebuffer horizontally. The total width is the sum of the widths of the two display interfaces. The framebuffer is horizontally divided into two parts: the left side outputs to interface A, and the right side outputs to interface B. The output content of the two interfaces is independent, but the frame rate and timing must be consistent.

[0031] Furthermore, in this embodiment, the TTL signal conversion module includes an HDMI to TTL chip.

[0032] This embodiment uses the HDMI to TTL chip to convert HDMI video signals into TTL signals, thereby supporting further signal processing by an FPGA. The HDMI to TTL chip is connected to the FPGA via a dedicated TTL cable, allowing the FPGA to perform further data processing and logic control, achieving higher-level image processing, synchronization, and control.

[0033] Furthermore, in this embodiment, the FPGA performs further data processing and logic control, including at least one of image optimization, resolution enhancement, data stream rearrangement, dynamic adjustment of the splicing area, or fine control of the output signal.

[0034] In this embodiment, the FPGA is responsible for receiving TTL signals and performing further processing as needed. For example, the FPGA can be used for image optimization, resolution enhancement, and data stream rearrangement to ensure the quality and synchronization of the output image. Through FPGA processing, the system can be extended with more complex functions, such as dynamically adjusting the stitching area and finely controlling the output signal. Furthermore, in this embodiment, the HDMI splicing output system based on ARM SoC also includes a user interface and configuration management module. The user interface and configuration management module is used to provide interface management software for users to configure splicing modes, resolutions and input source parameters of multiple HDMI inputs and outputs, and supports users to adjust display content and splicing methods in real time, as well as quickly switch between different splicing modes, screen layouts and display content.

[0035] Therefore, users can easily configure parameters such as splicing mode, resolution, and input source for multiple HDMI inputs and outputs through the interface management software. The interface software works in conjunction with the image processing unit of the ARM SoC module to adjust the displayed content and splicing mode in real time. The user interface supports quick switching between different splicing modes, screen layouts, and displayed content.

[0036] The beneficial effects of the HDMI splicing output system based on ARM SoC of this invention are: 1. Low cost and high efficiency: This invention utilizes the high integration and low power consumption of the ARM SoC module to significantly reduce system cost and improve system efficiency compared to traditional hardware solutions.

[0037] 2. Flexible splicing configuration: Through the computing power of the ARM SoC module, the system can flexibly perform display splicing, including multiple splicing methods and display modes, to adapt to the needs of different scenarios.

[0038] 3. Real-time synchronous output: The system can ensure image synchronization between multiple HDMI output interfaces, avoiding screen tearing and delay, and improving display quality.

[0039] 4. Easy to configure and manage: Through the configuration management of the user interface, users can easily set up and adjust the multi-screen splicing scheme, which has high operability.

[0040] To achieve the above objectives, this invention also proposes an HDMI splicing output method based on an ARM SoC. This method is applied to the ARM SoC-based HDMI splicing output system described in the above embodiments. Figure 2 As shown, the method includes the following steps: Step S10: Receive multiple HDMI video signals through the multiple HDMI input ports of the ARM SoC module.

[0041] Step S20: The multi-channel HDMI video signals are processed by the image processing unit inside the ARM SoC module. The processing includes signal splicing, resolution adjustment and color correction.

[0042] Step S30: Distribute the processed HDMI video signal to each HDMI output port of the ARM SoC module.

[0043] Step S40: The processed HDMI video signal is transmitted to the TTL signal conversion module through the HDMI output port.

[0044] Step S50: The HDMI video signal output by the ARM SoC module is converted into a TTL level signal through the TTL signal conversion module.

[0045] Step S60: The TTL level signal is further processed and logic controlled by the FPGA and then output to multiple display devices for splicing display.

[0046] The beneficial effects of the HDMI splicing output method based on ARM SoC of this invention are: 1. Low cost and high efficiency: This invention utilizes the high integration and low power consumption of the ARM SoC module to significantly reduce system cost and improve system efficiency compared to traditional hardware solutions.

[0047] 2. Flexible splicing configuration: Through the computing power of the ARM SoC module, the system can flexibly perform display splicing, including multiple splicing methods and display modes, to adapt to the needs of different scenarios.

[0048] 3. Real-time synchronous output: The system can ensure image synchronization between multiple HDMI output interfaces, avoiding screen tearing and delay, and improving display quality.

[0049] 4. Easy to configure and manage: Through the configuration management of the user interface, users can easily set up and adjust the multi-screen splicing scheme, which has high operability.

[0050] The above description, in conjunction with specific preferred embodiments, provides a further detailed explanation of the present invention. It should not be construed that the specific implementation of the present invention is limited to these descriptions. For those skilled in the art, various simple deductions or substitutions can be made without departing from the concept of the present invention, and all such modifications and substitutions should be considered within the scope of protection of the present invention.

Claims

1. An HDMI splicing output system based on an ARM SoC, characterized in that, include: ARM SoC modules, TTL signal conversion modules, and FPGAs; The ARM SoC module includes multiple HDMI input ports and multiple HDMI output ports; The ARM SoC module has an internal image processing unit for processing multiple HDMI video signals input through the HDMI input port, distributing the processed image signals to each of the HDMI output ports, and then outputting them to the TTL signal conversion module. The input terminal of the TTL signal conversion module is connected to the multiple HDMI output ports and is used to convert the HDMI video signal output by the ARM SoC module into a TTL level signal. The FPGA is connected to the TTL signal conversion module via a TTL line, which receives the TTL level signal, performs further data processing and logic control, and then outputs it to multiple display devices for splicing display.

2. The HDMI splicing output system based on ARM SoC according to claim 1, characterized in that, The steps of the image processing unit in processing multiple HDMI video signals input through the HDMI input port include: placing each input HDMI video signal at a different predetermined position on a canvas for image stitching, scaling or stretching the input image to adjust the resolution, and performing color correction and brightness / contrast adjustment on the image for color correction.

3. The HDMI splicing output system based on ARM SoC according to claim 2, characterized in that, The canvas is implemented using a frame buffer; One video port of the ARM SoC module is configured to drive at least two physical HDMI output ports. The total width of the frame buffer is the sum of the widths of the display devices connected to the at least two HDMI output ports. The frame buffer is divided in the horizontal direction, and the different regions after division are independently output to the corresponding HDMI output ports. The content output by the at least two HDMI output ports is independent but has a consistent frame rate and timing.

4. The HDMI splicing output system based on ARM SoC according to claim 1, characterized in that, The plurality of HDMI input ports include HDMI IN1, HDMI IN2, and HDMI IN3; the plurality of HDMI output ports include HDMI OUT1 and HDMI OUT2.

5. The HDMI splicing output system based on ARM SoC according to claim 1, characterized in that, The image processing unit includes a graphics processing unit and / or a video processing unit.

6. The HDMI splicing output system based on ARM SoC according to claim 1, characterized in that, The TTL signal conversion module includes an HDMI to TTL chip.

7. The HDMI splicing output system based on ARM SoC according to claim 1, characterized in that, The FPGA performs further data processing and logic control, including at least one of the following: image optimization, resolution enhancement, data stream rearrangement, dynamic adjustment of splicing area, or fine control of output signal.

8. The HDMI splicing output system based on ARM SoC according to claim 1, characterized in that, It also includes a user interface and configuration management module, which provides interface management software for users to configure splicing modes, resolutions and input source parameters for multiple HDMI inputs and outputs, and supports users to adjust display content and splicing methods in real time, as well as quickly switch between different splicing modes, screen layouts and display content.

9. A method for HDMI splicing output based on ARM SoC, characterized in that, The method is applied to the HDMI splicing output system based on ARM SoC as described in any one of claims 1 to 8, and the method includes the following steps: Step S10: Receive multiple HDMI video signals through the multiple HDMI input ports of the ARM SoC module; Step S20: The multi-channel HDMI video signals are processed by the image processing unit inside the ARM SoC module. The processing includes signal splicing, resolution adjustment and color correction. Step S30: Distribute the processed HDMI video signal to each HDMI output port of the ARM SoC module; Step S40: The processed HDMI video signal is transmitted to the TTL signal conversion module through the HDMI output port; Step S50: The HDMI video signal output by the ARM SoC module is converted into a TTL level signal through the TTL signal conversion module; Step S60: The TTL level signal is further processed and logic controlled by the FPGA and then output to multiple display devices for splicing display.